Solar cell and photovoltaic module

By setting a doped semiconductor layer and a tunneling layer on both sides of the passivation contact solar cell, a high and low junction structure is formed, the problem of poor passivation effect is solved and the conversion efficiency and service life are improved.

CN119907353APending Publication Date: 2025-04-29TRINA SOLAR CO LTD
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Patent Information

Application Number
CN202510124096.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-26
Publication Date
2025-04-29

AI Technical Summary

Technical Problem

Passivation contact solar cells have poor passivation effect, which makes it difficult to improve the conversion efficiency.

Method used

A double-sided passivation contact solar cell is designed, and a high and low junction structure is formed by providing different doped semiconductor layers and tunneling layers on both sides of the substrate to improve the passivation effect and contact resistance.

Benefits of technology

It improves the open circuit voltage and conversion efficiency of solar cells and extends the service life of the battery.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a solar cell and a photovoltaic module, the solar cell comprises a substrate, a first tunneling layer, a first doped semiconductor layer, a second doped semiconductor layer, a second tunneling layer, a third doped semiconductor layer, a first electrode and a second electrode, the first tunneling layer is arranged on a first surface of the substrate; the first doped semiconductor layer is arranged on the side, away from the substrate, of the first tunneling layer; the second doped semiconductor layer is arranged on the second surface of the substrate; the second tunneling layer is arranged on one side, away from the substrate, of the second doped semiconductor layer; the third doped semiconductor layer is arranged on the side, away from the substrate, of the second tunneling layer, and the first electrode is arranged on the side, away from the substrate, of the first doped semiconductor layer; the second electrode is arranged on the side, away from the substrate, of the third doped semiconductor layer. Therefore, the passivation effect of the solar cell can be improved, and the conversion efficiency of the solar cell can be improved.
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Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to solar cells and photovoltaic modules. Background Art

[0002] Solar cells, also known as photovoltaic cells, are semiconductor devices that convert sunlight directly into electrical energy. As they are green and environmentally friendly products that do not cause environmental pollution, and solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0003] Passivated contact solar cell designs, such as the tunnel oxide passivated contact solar cell (TOPCon cell), can make the cell efficiency exceed 25%, and is the mainstream technology for the next generation of mass production revolution after the Passivated Emitter Rear Cell (PERC cell).

[0004] However, in the related art, the passivation contact solar cell still has the problem of poor passivation effect, which makes it difficult to improve the conversion efficiency of the passivation contact solar cell. Summary of the invention

[0005] Based on this, the present application provides a solar cell and a photovoltaic module to improve the conversion efficiency of the solar cell.

[0006] An embodiment of the first aspect of the present application provides a solar cell, comprising:

[0007] The substrate comprises a first surface and a second surface which are arranged opposite to each other.

[0008] A first tunneling layer, disposed on the first surface of the substrate;

[0009] A first doped semiconductor layer is provided on a side of the first tunneling layer away from the substrate; the doping type of the first doped semiconductor layer is the same as the doping type of the substrate;

[0010] A second doped semiconductor layer is disposed on the second surface of the substrate; the doping type of the second doped semiconductor layer is different from the doping type of the first doped semiconductor layer;

[0011] A second tunneling layer is provided on a side of the second doped semiconductor layer facing away from the substrate;

[0012] A third doped semiconductor layer is provided on a side of the second tunneling layer away from the substrate, and the doping type of the third doped semiconductor layer is the same as the doping type of the second doped semiconductor layer;

[0013] A first electrode is disposed on a side of the first doped semiconductor layer facing away from the substrate;

[0014] The second electrode is arranged on a side of the third doped semiconductor layer facing away from the substrate.

[0015] In some embodiments, the substrate includes a first region and a second region that are alternately distributed; the solar cell also includes a third tunneling layer and a fourth doped semiconductor layer, the third tunneling layer is located on a side of the first doped semiconductor layer away from the substrate; the first electrode and the fourth doped semiconductor layer are located in the first region, the fourth doped semiconductor layer is located on a side of the third tunneling layer away from the substrate; the doping type of the fourth doped semiconductor layer is the same as the doping type of the first doped semiconductor layer; the first electrode is located on a side of the fourth doped semiconductor layer away from the substrate and is connected to the fourth doped semiconductor layer.

[0016] In some embodiments, the doping concentration of the fourth doped semiconductor layer is greater than the doping concentration of the first doped semiconductor layer; and / or

[0017] The doping concentration of the fourth doped semiconductor layer is 1×10 16 ~1×10 23 cm -3 The doping concentration of the first doped semiconductor layer is 1×10 13 ~1×10 21 cm -3 .

[0018] In some embodiments, the thickness of the fourth doped semiconductor layer is 10-400 nm; and / or

[0019] The thickness of the third tunneling layer is 2-10 nm.

[0020] In some of the embodiments, the substrate includes a first region and a second region that are alternately distributed; the solar cell also includes a fourth tunneling layer and a fifth doped semiconductor layer, the fourth tunneling layer is located on a side of the third doped semiconductor layer away from the substrate; the fifth doped semiconductor layer and the second electrode are located in the first region; the fifth doped semiconductor layer is located on a side of the fourth tunneling layer away from the substrate; the doping type of the fifth doped semiconductor layer is the same as the doping type of the third doped semiconductor layer; the second electrode is located on a side of the fifth doped semiconductor layer away from the substrate and is connected to the fifth doped semiconductor layer.

[0021] In some embodiments, the doping concentration of the fifth doped semiconductor layer is greater than the doping concentration of the third doped semiconductor layer; and / or

[0022] The doping concentration of the fifth doped semiconductor layer is 1×10 16 ~1×10 23 cm -3 ; and / or

[0023] The thickness of the fifth doped semiconductor layer is 10-400 nm; and / or

[0024] The thickness of the fourth tunneling layer is 2-10 nm.

[0025] In some embodiments, the doping concentration of the second doped semiconductor layer is less than the doping concentration of the third doped semiconductor layer; and / or

[0026] The doping concentration of the second doped semiconductor layer is 1×10 10 ~1×10 19 cm -3 The doping concentration of the third doped semiconductor layer is 1×10 13 ~1×10 21 cm -3 .

[0027] In some embodiments, the thickness of the first doped semiconductor layer is less than the thickness of the second doped semiconductor layer; and / or

[0028] The thickness of the first doped semiconductor layer is 10-300 nm; the thickness of the second doped semiconductor layer is 10-1000 nm.

[0029] In some embodiments, the thickness of the first tunneling layer is 1-7 nm; and / or

[0030] The thickness of the second tunneling layer is 1-7 nm.

[0031] An embodiment of the second aspect of the present application provides a photovoltaic assembly, comprising the solar cell described in any of the above embodiments.

[0032] The solar cell provided in the embodiment of the present application is provided by making the first tunneling layer arranged on the first surface of the substrate; the first doped semiconductor layer arranged on the side of the first tunneling layer away from the substrate; the doping type of the first doped semiconductor layer is the same as the doping type of the substrate; the second doped semiconductor layer arranged on the second surface of the substrate; the doping type of the second doped semiconductor layer is different from the doping type of the first doped semiconductor layer; the second tunneling layer is arranged on the side of the second doped semiconductor layer away from the substrate; the third doped semiconductor layer is arranged on the side of the second tunneling layer away from the substrate, and the doping type of the third doped semiconductor layer is the same as the doping type of the second doped semiconductor layer. Thus, on the one hand, the first tunneling layer and the first doped semiconductor layer can constitute the passivation contact structure of the first surface of the solar cell, and the second tunneling layer and the third doped semiconductor layer can constitute the passivation contact structure of the second surface of the solar cell, so that the solar cell can be a double-sided passivation contact solar cell, improve the passivation effect of the double surfaces of the solar cell, improve the open circuit voltage of the solar cell, and further improve the conversion efficiency of the solar cell; on the other hand, the second doped semiconductor layer and the third doped semiconductor layer can constitute a high-low junction, so that the passivation effect can be further improved, the contact resistance can be improved, and further improve the conversion efficiency of the solar cell. Furthermore, the doping type of the first doped semiconductor layer is the same as the doping type of the substrate, the doping type of the second doped semiconductor layer is different from the doping type of the first doped semiconductor layer, and the doping type of the third doped semiconductor layer is the same as the doping type of the second doped semiconductor layer. In this way, the P-type doped semiconductor layer in the solar cell can be always on the backlight side through the setting, thereby slowing down the light decay of the solar cell and extending the service life of the solar cell; reducing the parasitic absorption of the solar cell, which is beneficial to improving the conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 Schematic diagram of the structure of a solar cell in some embodiments of the present application.

[0034] Figure 2 Schematic diagram of the structure of solar cells in other embodiments of the present application.

[0035] Description of reference numerals:

[0036] 10. Solar cells;

[0037] 110, substrate; 110a, first surface; 110b, second surface; 111a, first region; 112, second region; 120, first tunneling layer; 130, first doped semiconductor layer; 140, second doped semiconductor layer; 150, second tunneling layer; 160, third doped semiconductor layer; 171, first electrode; 172, second electrode; 180, third tunneling layer; 190, fourth doped semiconductor layer; 200, fourth tunneling layer; 210, fifth doped semiconductor layer; 220, first passivation anti-reflection layer; 230, second passivation anti-reflection layer. DETAILED DESCRIPTION

[0038] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0039] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0040] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0041] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0042] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0043] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0044] Solar cells, also known as photovoltaic cells, are semiconductor devices that convert sunlight directly into electrical energy. As they are green and environmentally friendly products that do not cause environmental pollution, and solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0045] Passivated contact solar cell designs, such as the tunnel oxide passivated contact solar cell (TOPCon cell), can make the cell efficiency exceed 25%, and is the mainstream technology for the next generation of mass production revolution after the Passivated Emitter Rear Cell (PERC cell).

[0046] However, in the related art, the passivation contact solar cell still has the problem of poor passivation effect. For example, the front side of the tunnel oxide layer passivation contact solar cell lacks an effective passivation structure, which results in poor passivation effect of the solar cell, affects the open circuit voltage of the solar cell, and reduces the conversion efficiency of the solar cell.

[0047] Based on the above technical problems, the present application provides a solar cell and a photovoltaic module to improve the conversion efficiency of the solar cell.

[0048] First, see Figure 1 and Figure 2 The embodiment of the present application provides a solar cell 10, comprising a substrate 110, a first tunneling layer 120, a first doped semiconductor layer 130, a second doped semiconductor layer 140, a second tunneling layer 150, a third doped semiconductor layer 160, a first electrode 171 and a second electrode 172; the substrate 110 comprises a first surface 110a and a second surface 110b arranged opposite to each other, the first tunneling layer 120 is arranged on the first surface 110a of the substrate 110; the first doped semiconductor layer 130 is arranged on a side of the first tunneling layer 120 away from the substrate 110; the doping type of the first doped semiconductor layer 130 is the same as the doping type of the substrate 110; the second doped semiconductor layer 150 is arranged on the first surface 110b of the substrate 110; the first doped semiconductor layer 130 is arranged on the second surface 110b of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110a of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110b of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110b of the substrate 110; the second doped semiconductor layer 150 is arranged on the second surface 110b of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110a of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110b of the substrate 110; the second doped semiconductor layer 150 is arranged on the second surface 110b of the substrate 110; the first doped semiconductor layer 130 is arranged on the first surface 110b of the substrate 110; the first doped semiconductor layer The body layer 140 is arranged on the second surface 110b of the substrate 110; the doping type of the second doped semiconductor layer 140 is different from the doping type of the first doped semiconductor layer 130; the second tunneling layer 150 is arranged on the side of the second doped semiconductor layer 140 away from the substrate 110; the third doped semiconductor layer 160 is arranged on the side of the second tunneling layer 150 away from the substrate 110, and the doping type of the third doped semiconductor layer 160 is the same as the doping type of the second doped semiconductor layer 140; the first electrode 171 is arranged on the side of the first doped semiconductor layer 130 away from the substrate 110; the second electrode 172 is arranged on the side of the third doped semiconductor layer 160 away from the substrate 110.

[0049] It should be noted that the substrate 110 may be a silicon substrate, and the silicon substrate may be a P-type substrate or an N-type substrate; in the embodiment of the present application, the solar cell 10 may be an N-type solar cell or a P-type solar cell.

[0050] See also Figure 1 and Figure 2 The solar cell 10 includes a light-receiving surface and a backlight surface. One of the first surface 110a and the second surface 110b can be the light-receiving surface, and the other can be the backlight surface. In a specific example, the light-receiving surface of the solar cell 10 can be provided with a velvet structure to reduce reflection and improve the conversion efficiency of the solar cell 10. Figure 1 In another specific example, a velvet structure may be provided on the backlight surface of the solar cell.

[0051] For a specific example, see Figure 1 When the silicon substrate 110 is an N-type substrate 110, the first surface 110a is the light-receiving surface of the solar cell 10, and the second surface 110b is the backlight surface of the solar cell 10; the first doped semiconductor layer 130 is an N-type doped semiconductor layer; the second doped semiconductor layer 140 and the third doped semiconductor layer 160 are both P-type doped semiconductor layers. Figure 2 When the silicon substrate 110 is a P-type substrate 110, the first surface 110a is the backlight surface of the solar cell 10, and the second surface 110b is the light-receiving surface of the solar cell 10; the first doped semiconductor layer 130 is a P-type doped semiconductor layer, and the second doped semiconductor layer 140 and the third doped semiconductor layer 160 are N-type doped semiconductor layers. Thus, the P-type doped semiconductor layer can always be on the backlight surface, thereby slowing down the light decay of the P-type doped semiconductor layer and extending the service life of the solar cell 10. In addition, the difficulty of manufacturing the P-type doped semiconductor layer is greater than that of the N-type doped semiconductor layer, and the thickness of the manufactured P-type doped semiconductor layer is greater than that of the N-type doped semiconductor layer, so that the P-type doped semiconductor layer is always on the backlight surface, which can reduce the parasitic absorption of the P-type doped semiconductor layer, thereby facilitating the improvement of the conversion efficiency of the solar cell 10.

[0052] See also Figure 1 and Figure 2 The first tunneling layer 120 is arranged on the first surface 110a of the substrate 110; the first doped semiconductor layer 130 is arranged on the side of the first tunneling layer 120 away from the substrate 110; the second doped semiconductor layer 140 is arranged on the second surface 110b of the substrate 110; the second tunneling layer 150 is arranged on the side of the second doped semiconductor layer 140 away from the substrate 110; the third doped semiconductor layer 160 is arranged on the side of the second tunneling layer 150 away from the substrate 110; in this way, the first tunneling layer 120 and the first doped semiconductor layer 130 constitute a passivation contact structure of the first surface 110a of the solar cell 10, and the second tunneling layer 150 and the third doped semiconductor layer 160 constitute a passivation contact structure of the second surface 110b of the solar cell 10, thereby making the solar cell 10 a double-sided passivation contact solar cell 10, thereby improving the passivation effect of the double sides of the solar cell 10, increasing the open circuit voltage of the solar cell 10, and further increasing the conversion efficiency of the solar cell 10.

[0053] See also Figure 1 and Figure 2The second doped semiconductor layer 140 is disposed on the second surface 110b of the substrate 110, and the second tunneling layer 150 is disposed on the side of the second doped semiconductor layer 140 away from the substrate 110; the third doped semiconductor layer 160 is disposed on the side of the second tunneling layer 150 away from the substrate 110, and the second electrode 172 is disposed on the side of the third doped semiconductor layer 160 away from the substrate 110 and connected to the third doped semiconductor layer 160. In this way, the second doped semiconductor layer 140 and the third doped semiconductor layer 160 can form a high-low junction, and the second electrode 172 does not directly contact the second doped semiconductor layer 140, thereby further improving the passivation effect and the contact resistance, thereby further improving the conversion efficiency of the solar cell 10.

[0054] In summary, the solar cell 10 provided in the embodiment of the present application is configured such that the first tunneling layer 120 is disposed on the first surface 110a of the substrate 110; the first doped semiconductor layer 130 is disposed on the side of the first tunneling layer 120 facing away from the substrate 110; the doping type of the first doped semiconductor layer 130 is the same as the doping type of the substrate 110; the second doped semiconductor layer 140 is disposed on the second surface 110b of the substrate 110; the doping type of the second doped semiconductor layer 140 is different from the doping type of the first doped semiconductor layer 130; the second tunneling layer 150 is disposed on the side of the second doped semiconductor layer 140 facing away from the substrate 110; the third doped semiconductor layer 160 is disposed on the side of the second tunneling layer 150 facing away from the substrate 110, and the doping type of the third doped semiconductor layer 160 is the same as the doping type of the second doped semiconductor layer 140. Therefore, on the one hand, the first tunneling layer 120 and the first doped semiconductor layer 130 can constitute a passivation contact structure of the first surface 110a of the solar cell 10, and the second tunneling layer 150 and the third doped semiconductor layer 160 can constitute a passivation contact structure of the second surface 110b of the solar cell 10, so that the solar cell 10 can be a double-sided passivation contact solar cell 10, improve the passivation effect of both sides of the solar cell 10, increase the open circuit voltage of the solar cell 10, and further improve the conversion efficiency of the solar cell 10; on the other hand, the second doped semiconductor layer 140 and the third doped semiconductor layer 160 can constitute a high-low junction, thereby further improving the passivation effect, improving the contact resistance, and further improving the conversion efficiency of the solar cell 10. Furthermore, the doping type of the first doped semiconductor layer 130 is the same as the doping type of the substrate 110, the doping type of the second doped semiconductor layer 140 is different from the doping type of the first doped semiconductor layer 130, and the doping type of the third doped semiconductor layer 160 is the same as the doping type of the second doped semiconductor layer 140. In this way, the P-type doped semiconductor layer in the solar cell 10 can be always on the backlight side through the setting, thereby slowing down the light decay of the solar cell 10 and extending the service life of the solar cell 10; reducing the parasitic absorption of the solar cell 10, which is beneficial to improving the conversion efficiency of the solar cell 10.

[0055] See also Figure 1 and Figure 2 In some embodiments, the substrate 110 includes a first area 111 and a second area 112 that are alternately distributed; the solar cell 10 also includes a third tunneling layer 180 and a fourth doped semiconductor layer 190, and the third tunneling layer 180 is located on the side of the first doped semiconductor layer 130 away from the substrate 110; the first electrode 171 and the fourth doped semiconductor layer 190 are located in the first area 111, and the fourth doped semiconductor side cover 190 is located on the side of the third tunneling layer 180 away from the substrate 110; the doping type of the fourth doped semiconductor layer 190 is the same as the doping type of the first doped semiconductor layer 130; the first electrode 171 is electrically connected to the fourth doped semiconductor layer 190.

[0056] In this way, a local passivation contact structure can be formed in the area where the first electrode 171 is located, thereby reducing parasitic absorption. At the same time, a better ohmic contact can be formed between the first electrode 171 and the fourth doped semiconductor layer 190, reducing contact resistance, increasing short-circuit current, and further improving the conversion efficiency of the solar cell 10.

[0057] In some embodiments, the doping concentration of the fourth doped semiconductor layer 190 is greater than the doping concentration of the first doped semiconductor layer 130 .

[0058] In this way, a high-low junction is formed between the fourth doped semiconductor layer 190 and the first doped semiconductor layer 130 , thereby further improving the passivation effect of the solar cell 10 and the contact resistance, thereby further improving the conversion efficiency of the solar cell 10 .

[0059] In some embodiments, the doping concentration of the fourth doped semiconductor layer 190 is 1×10 16 ~1×10 23 cm -3 Specifically, the doping concentration of the fourth doped semiconductor layer 190 may be 1×10 20 cm -3 , 3×10 20 cm -3 , 5×10 20 cm -3 ,7×10 20 cm -3 ,9×10 20 cm -3 , 1×10 21 cm -3 , 3×10 21 cm -3 , 5×10 21 cm -3 ,7×10 21cm -3 .

[0060] In some embodiments, the doping concentration of the first doped semiconductor layer 130 is 1×10 13 ~1×10 21 cm -3 Specifically, the doping concentration of the first doped semiconductor layer 130 may be 1×10 18 cm -3 , 3×10 18 cm -3 , 5×10 18 cm -3 ,7×10 18 cm -3 ,9×10 18 cm -3 , 1×10 19 cm -3 , 3×10 19 cm -3 , 5×10 19 cm -3 ,7×10 19 cm -3 .

[0061] In some embodiments, the thickness of the fourth doped semiconductor layer 190 is 10-400 nm. Specifically, the thickness of the fourth doped semiconductor layer 190 may be 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, or 115 nm.

[0062] In some embodiments, the thickness of the third tunnel layer 180 is 2-10 nm. Specifically, the thickness of the third tunnel layer 180 may be 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 7.5 nm, or 8 nm.

[0063] See also Figure 1 and Figure 2 In some embodiments, the solar cell 10 further includes a fourth tunneling layer 200 and a fifth doped semiconductor layer 210, the fourth tunneling layer 200 is located on the side of the third doped semiconductor layer 160 away from the substrate 110; the fifth doped semiconductor layer 210 and the second electrode 172 are located in the first region 111; the fifth doped semiconductor layer 210 is located on the side of the fourth tunneling layer 200 away from the substrate 110; the doping type of the fifth doped semiconductor layer 210 is the same as the doping type of the third doped semiconductor layer 160; the second electrode 172 is located on the side of the fifth doped semiconductor layer 210 away from the substrate 110 and is connected to the fifth doped semiconductor layer 210.

[0064] In this way, a local passivation contact structure can be formed in the area where the second electrode 172 is located, thereby reducing parasitic absorption. At the same time, a better ohmic contact can be formed between the second electrode 172 and the fifth doped semiconductor layer 210, reducing contact resistance, increasing short-circuit current, and further improving the conversion efficiency of the solar cell 10.

[0065] In some embodiments, the doping concentration of the fifth doped semiconductor layer 210 is greater than the doping concentration of the third doped semiconductor layer 160 .

[0066] In this way, a high-low junction is formed between the fifth doped semiconductor layer 210 and the third doped semiconductor layer 160 , thereby further improving the passivation effect of the solar cell 10 and the contact resistance, thereby further improving the conversion efficiency of the solar cell 10 .

[0067] In some embodiments, the doping concentration of the fifth doped semiconductor layer 210 is 1×10 16 ~1×10 23 cm -3 Specifically, the doping concentration of the fifth doped semiconductor layer 210 may be 1×10 20 cm -3 , 3×10 20 cm -3 , 5×10 20 cm -3 ,7×10 20 cm -3 ,9×10 20 cm -3 , 1×10 21 cm -3 , 3×10 21 cm -3 , 5×10 21 cm -3 ,7×10 21 cm -3 .

[0068] In some embodiments, the fifth doped semiconductor layer 210 has a thickness of 10-400 nm. Specifically, the fifth doped semiconductor layer 210 may have a thickness of 130 nm, 132 nm, 134 nm, 136 nm, 138 nm, 140 nm, 142 nm, or 144 nm.

[0069] In some embodiments, the thickness of the fourth tunnel layer 200 is 2-10 nm. Specifically, the thickness of the fourth tunnel layer 200 may be 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 7.5 nm, or 8 nm.

[0070] In some embodiments, the doping concentration of the second doped semiconductor layer 140 is less than the doping concentration of the third doped semiconductor layer 160 .

[0071] In this way, a high-low junction is formed between the second doped semiconductor layer 140 and the third doped semiconductor layer 160 , thereby further improving the passivation effect of the solar cell 10 and the contact resistance, thereby further improving the conversion efficiency of the solar cell 10 .

[0072] In some embodiments, the doping concentration of the second doped semiconductor layer 140 is 1×10 10 to 1×10 19 cm −3 . 15 cm-3、3×10 15 cm -3 , 5×10 15 cm -3 ,7×10 15 cm -3 ,9×10 15 cm -3 , 1×10 16 cm -3 , 3×10 16 cm -3 , 5×10 16 cm -3 ,7×10 16 cm -3 wait.

[0073] In some embodiments, the doping concentration of the third doped semiconductor layer 160 is 1×10 13 ~1×10 21 cm -3 Specifically, the doping concentration of the third doped semiconductor layer 160 may be 1×10 18 cm -3 , 3×10 18 cm -3 , 5×10 18 cm -3 ,7×10 18 cm -3 ,9×10 18 cm -3 , 1×10 19 cm -3 , 3×10 19 cm -3 , 5×10 19 cm -3 ,7×10 19 cm -3 wait.

[0074] In some embodiments, the thickness of the first doped semiconductor layer 130 is smaller than the thickness of the second doped semiconductor layer 140 .

[0075] Thus, the parasitic absorption of the first doped semiconductor layer 130 can be reduced, which is beneficial to improving the light utilization rate of the solar cell 10 and further improving the conversion efficiency of the solar cell 10 .

[0076] In some embodiments, the thickness of the first doped semiconductor layer 130 is 10-300 nm. Specifically, the thickness of the first doped semiconductor layer 130 may be 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, etc.

[0077] In some embodiments, the thickness of the second doped semiconductor layer 140 is 10-1000 nm. Specifically, the thickness of the second doped semiconductor layer 140 may be 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, etc.

[0078] In some embodiments, the thickness of the first tunnel layer 120 is 1-7 nm. Specifically, the thickness of the first tunnel layer 120 may be 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, etc.

[0079] In some embodiments, the thickness of the second tunnel layer 150 is 1-7 nm. Specifically, the thickness of the second tunnel layer 150 may be 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, etc.

[0080] See also Figure 1 and Figure 2 In some embodiments, a first passivation anti-reflection layer 220 is further included. The first passivation anti-reflection layer 220 is disposed on a side of the fourth doped semiconductor layer 190 away from the substrate 110, and the first electrode 171 passes through the first passivation anti-reflection layer 220 and is connected to the fourth doped semiconductor layer 190. Specifically, the first passivation anti-reflection layer 220 may include a passivation layer and an anti-reflection layer stacked. The material of the first passivation anti-reflection layer 220 includes at least one of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0081] Therefore, by providing the first passivation anti-reflection layer 220 , the passivation effect of the solar cell 10 can be improved, and the light utilization rate of the solar cell 10 can be increased, which is beneficial to improving the conversion efficiency of the solar cell 10 .

[0082] See also Figure 1 and Figure 2In some embodiments, a second passivation anti-reflection layer 230 is further included. The second passivation anti-reflection layer 230 is disposed on a side of the fifth doped semiconductor layer 210 away from the substrate 110. The second electrode 172 passes through the second passivation anti-reflection layer 230 and is connected to the fifth doped semiconductor layer 210. Specifically, the second passivation anti-reflection layer 230 may include a passivation layer and an anti-reflection layer stacked. The material of the second passivation anti-reflection layer 230 includes at least one of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0083] Therefore, by providing the second passivation anti-reflection layer 230 , the passivation effect of the solar cell 10 can be improved, and the light utilization rate of the solar cell 10 can be increased, which is beneficial to improving the conversion efficiency of the solar cell 10 .

[0084] The second aspect of the present application provides a photovoltaic module, comprising the solar cell 10 in any of the above embodiments, thereby improving the conversion efficiency of the photovoltaic module and extending the service life of the photovoltaic module.

[0085] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0086] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: include: A substrate, comprising a first surface and a second surface arranged opposite to each other; A first tunneling layer, disposed on the first surface of the substrate; A first doped semiconductor layer is disposed on a side of the first tunneling layer away from the substrate; the doping type of the first doped semiconductor layer is the same as the doping type of the substrate; A second doped semiconductor layer is disposed on the second surface of the substrate; the doping type of the second doped semiconductor layer is different from the doping type of the first doped semiconductor layer; A second tunneling layer is provided on a side of the second doped semiconductor layer facing away from the substrate; A third doped semiconductor layer is provided on a side of the second tunneling layer away from the substrate, and the doping type of the third doped semiconductor layer is the same as the doping type of the second doped semiconductor layer; A first electrode is disposed on a side of the first doped semiconductor layer facing away from the substrate; The second electrode is arranged on a side of the third doped semiconductor layer away from the substrate.

2. The solar cell according to claim 1, characterized in that The substrate includes a first region and a second region that are alternately distributed; the solar cell also includes a third tunneling layer and a fourth doped semiconductor layer, the third tunneling layer is located on a side of the first doped semiconductor layer away from the substrate; the first electrode and the fourth doped semiconductor layer are located in the first region, the fourth doped semiconductor layer is located on a side of the third tunneling layer away from the substrate; the doping type of the fourth doped semiconductor layer is the same as the doping type of the first doped semiconductor layer; the first electrode is located on a side of the fourth doped semiconductor layer away from the substrate and is connected to the fourth doped semiconductor layer.

3. The solar cell according to claim 2, characterized in that: The doping concentration of the fourth doped semiconductor layer is greater than the doping concentration of the first doped semiconductor layer; and / or The doping concentration of the fourth doped semiconductor layer is 1×10 16 ~1×10 23 cm -3 The doping concentration of the first doped semiconductor layer is 1×10 13 ~1×10 21 cm -3 .

4. The solar cell according to claim 2, characterized in that: The thickness of the fourth doped semiconductor layer is 10-400 nm; and / or The thickness of the third tunneling layer is 2-10 nm.

5. The solar cell according to claim 1, characterized in that: The substrate comprises a first region and a second region that are alternately distributed; the solar cell further comprises a fourth tunneling layer and a fifth doped semiconductor layer, the fourth tunneling layer is located on a side of the third doped semiconductor layer away from the substrate; the fifth doped semiconductor layer and the second electrode are located in the first region; The fifth doped semiconductor layer is located on a side of the fourth tunneling layer away from the substrate; the doping type of the fifth doped semiconductor layer is the same as the doping type of the third doped semiconductor layer; The second electrode is located at a side of the fifth doped semiconductor layer away from the substrate and is connected to the fifth doped semiconductor layer.

6. The solar cell according to claim 5, characterized in that: The doping concentration of the fifth doped semiconductor layer is greater than the doping concentration of the third doped semiconductor layer; and / or The doping concentration of the fifth doped semiconductor layer is 1×10 16 ~1×10 23 cm -3 ; and / or The thickness of the fifth doped semiconductor layer is 10-400 nm; and / or The thickness of the fourth tunneling layer is 2-10 nm.

7. The solar cell according to claim 1, characterized in that The doping concentration of the second doped semiconductor layer is less than the doping concentration of the third doped semiconductor layer; and / or The doping concentration of the second doped semiconductor layer is 1×10 10 ~1×10 19 cm -3 The doping concentration of the third doped semiconductor layer is 1×10 13 ~1×10 21 cm -3 .

8. The solar cell according to claim 1, characterized in that The thickness of the first doped semiconductor layer is less than the thickness of the second doped semiconductor layer; and / or The thickness of the first doped semiconductor layer is 10-300 nm; the thickness of the second doped semiconductor layer is 10-1000 nm.

9. The solar cell according to claim 1, characterized in that: The thickness of the first tunneling layer is 1-7 nm; and / or The thickness of the second tunneling layer is 1-7 nm.

10. A photovoltaic module, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 9.

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