Display device with light emitting device

Abstract

A display apparatus having a light emitting device is provided. The light emitting device may include a light emitting cell between an anode electrode and a cathode electrode. The light emitting unit may include at least one blue emitting stack. The blue emission stack may include a first light emitting layer and a second light emitting layer in contact with a surface of the first light emitting layer facing the cathode electrode. The host of the second light emitting layer may have a higher triplet level than the host of the first light emitting layer. Accordingly, in the display device, degradation of efficiency and lifetime of the light emitting device due to accumulation of triplet excitons may be prevented or minimized. Thus, lower power driving is possible, and power consumption is reduced.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2023-0144842, filed on October 26, 2023, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a display device having increased efficiency and improved use length in which a light emitting device is disposed in each pixel region. Background Art

[0004] Typically, a display device provides an image to a user. For example, a display device may include a plurality of light emitting devices. Each of the light emitting devices may emit light for displaying a specific color. For example, each of the light emitting devices may include a light emitting layer between a lower electrode and an upper electrode. The light emitting layer may generate light using energy from the recombination of electrons and holes. For example, the light emitting layer may include a host and a dopant doped into the host.

[0005] The region where electrons and holes recombine in the light-emitting layer may vary depending on the characteristics of the host. For example, when the host has good hole transport properties, the region where electrons and holes recombine may appear near the surface of the light-emitting layer, which is disposed close to the second electrode serving as a cathode electrode. That is, for each light-emitting device of the display device, triplet excitons may accumulate at the surface of the light-emitting layer.

[0006] Therefore, in the display device, a layer disposed near the surface of the light-emitting layer may degrade relatively quickly due to the accumulation of triplet excitons. For example, in the display device, an electron transport layer disposed between the light-emitting layer and the second electrode of the light-emitting device may degrade relatively quickly. Therefore, in the display device, the efficiency and lifespan (e.g., service life) of each light-emitting device may be reduced or degraded. Summary of the invention

[0007] Accordingly, the present disclosure is directed to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0008] An object of the present disclosure is to provide a display device capable of improving the efficiency and lifespan of a light emitting device.

[0009] Another object of the present disclosure is to provide a display device capable of preventing a layer disposed adjacent to a surface of a light-emitting layer from being rapidly degraded due to accumulation of triplet excitons.

[0010] Additional advantages, objects, and features of the present disclosure will be set forth in part in the following description, and in part will become apparent to one of ordinary skill in the art upon review of the following, or may be learned from practice of the present disclosure. The objects and other advantages of the present disclosure may be realized and obtained by the structures specifically pointed out in the written description and claims thereof, as well as in the accompanying drawings.

[0011] To achieve these objects and other advantages and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a display device including a device substrate is provided. A first electrode is disposed on a pixel area of ​​the device substrate. An upper emission stack is disposed on the first electrode. The upper emission stack has a stacked structure of a first blue light-emitting layer and a second blue light-emitting layer. An electron transport layer is disposed on the second blue light-emitting layer of the upper emission stack. A second electrode is disposed on the electron transport layer. The second blue light-emitting layer contacts a surface of the first blue light-emitting layer facing the electron transport layer. A second host of the second blue light-emitting layer has a triplet energy level higher than that of the first host of the first blue light-emitting layer.

[0012] The lowest unoccupied molecular orbital (LUMO) energy level of the electron transport layer may be higher than the LUMO energy level of the second blue light emitting layer.

[0013] The first blue dopant of the first blue light emitting layer may have a higher triplet energy level than the first host. The second blue dopant of the second blue light emitting layer may have a higher triplet energy level than the second host.

[0014] The second blue dopant may include a material different from that of the first blue dopant.

[0015] The triplet energy level of the first blue dopant may be lower than the triplet energy level of the second host.

[0016] The thickness of the second blue light emitting layer may be smaller than the thickness of the first blue light emitting layer.

[0017] A lower emission stack may be disposed between the first electrode and the upper emission stack. A first charge generation layer may be disposed between the lower emission stack and the upper emission stack.

[0018] The light-emitting layer of the lower emitting stack may consist of a single layer including the lower blue dopant.

[0019] A second charge generation layer may be disposed between the first charge generation layer and the upper emission stack. An intermediate emission stack may be disposed between the first charge generation layer and the second charge generation layer. Light emitted from the intermediate emission stack may display a different color from light emitted from the lower emission stack and light emitted from the upper emission stack.

[0020] The light emitting layer of the intermediate emitting stack may include a red dopant and a green dopant.

[0021] In another embodiment, a display device including a first electrode is provided. An intermediate charge generation layer is provided on the first electrode. A second electrode is provided on the intermediate charge generation layer. The second electrode has a smaller work function than the first electrode. A first blue emission stack is provided between the first electrode and the intermediate charge generation layer. A second blue emission stack is provided between the intermediate charge generation layer and the second electrode. The second blue emission stack includes a first upper light-emitting layer and a second upper light-emitting layer, the second upper light-emitting layer being in contact with a surface of the first upper light-emitting layer facing the second electrode. A host of the second upper light-emitting layer has a triplet energy level higher than that of the host of the first upper light-emitting layer.

[0022] The intermediate charge generation layer may have a stack structure of an n-type charge generation layer and a p-type charge generation layer. The p-type charge generation layer may be disposed between the n-type charge generation layer and the first upper light emitting layer.

[0023] The first blue emission stack may include a first lower light emitting layer and a second lower light emitting layer. The second lower light emitting layer may be in contact with a surface of the first lower light emitting layer facing the second electrode. The host of the second lower light emitting layer may have a triplet energy level lower than that of the host of the first lower light emitting layer.

[0024] The blue dopant of the first lower light emitting layer may have a higher triplet energy level than a host of the first lower light emitting layer. The blue dopant of the second lower light emitting layer may have a higher triplet energy level than a host of the second lower light emitting layer.

[0025] The blue dopant of the first upper light-emitting layer and the blue dopant of the second upper light-emitting layer may have a higher triplet energy level than a host of the second upper light-emitting layer.

[0026] In another embodiment, a display device including an anode electrode and a cathode electrode is provided. A light-emitting unit is provided between the cathode electrode and the anode electrode. The light-emitting unit includes at least an upper emission stack, the upper emission stack includes a first upper light-emitting layer and a second upper light-emitting layer, the second upper light-emitting layer is in contact with a surface of the first upper light-emitting layer facing the cathode electrode. The second host of the second upper light-emitting layer has a higher triplet energy level than the first host of the first upper light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. These drawings illustrate (one or more) embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0028] Figure 1 is a view schematically showing a display device according to an embodiment of the present disclosure;

[0029] Figure 2is a view showing a circuit of a pixel region in a display device according to an embodiment of the present disclosure;

[0030] Figure 3 is a view schematically showing a cross section of a pixel region in a display device according to an embodiment of the present disclosure;

[0031] Figure 4 yes Figure 3 A magnified view of the K1 region in Figure 2;

[0032] Figure 5 is a view showing an energy band diagram of an upper emission stack in a display device according to an embodiment of the present disclosure;

[0033] Figure 6 is a diagram showing relative energy levels of materials of an upper emission stack in a display device according to an embodiment of the present disclosure; and

[0034] Figures 7 to 12 is a view showing a display device according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] Hereinafter, details related to the above-mentioned purposes, technical configurations and operational effects of the embodiments of the present disclosure will be clearly understood through the following detailed description with reference to the accompanying drawings showing some embodiments of the present disclosure. Here, embodiments of the present disclosure are provided so that the technical spirit of the present disclosure can be satisfactorily conveyed to those skilled in the art, and thus the present disclosure can be embodied in other forms and is not limited to the embodiments described below.

[0036] In addition, throughout the specification, the same or very similar elements may be represented by the same reference numerals, and in the drawings, the lengths and thicknesses of layers and regions may be exaggerated for convenience. It will be understood that when a first element is referred to as being "on" a second element, although the first element may be disposed on the second element to contact the second element, a third element may be inserted between the first element and the second element.

[0037] Here, terms such as "first" and "second" may be used to distinguish any one element from another element. However, without departing from the technical spirit of the present disclosure, the first element and the second element may be arbitrarily named according to the convenience of those skilled in the art.

[0038] The terms used in the specification of the present disclosure are only used to describe specific embodiments and are not intended to limit the scope of the present disclosure. For example, an element described in the singular is intended to include multiple elements unless the context clearly indicates otherwise. In addition, in the specification of the present disclosure, it will be further understood that the terms "comprising" and "including" specify the existence of the described features, integers, steps, operations, elements, parts and / or combinations thereof, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, parts and / or combinations.

[0039] Also, unless “directly” is used, the terms “connected” and “coupled” may include two components being “connected” or “coupled” via one or more other components located between the two components.

[0040] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments belong. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0041] (Implementation Method)

[0042] Figure 1 is a view schematically illustrating a display device according to an embodiment of the present disclosure. Figure 2 is a view showing a circuit of a pixel region in a display device according to an embodiment of the present disclosure.

[0043] Reference Figure 1 and Figure 2, a display device according to an embodiment of the present disclosure may include a display panel DP. The display panel DP may generate an image provided to a user. For example, the display panel DP may include a plurality of pixel areas PA. Here, the pixel area PA may also be referred to as a pixel. Various signals may be provided in each pixel area PA through signal wirings GL, DL, and PL. For example, the signal wirings GL, DL, and PL may include a gate line GL that sequentially applies a gate signal to each pixel area PA, a data line DL that applies a data signal to each pixel area PA, and a power voltage supply line PL that provides a power voltage to each pixel area PA. The gate line GL may be electrically connected to a gate driver GD, and the data line DL may be electrically connected to a data driver DD. The gate driver GD and the data driver DD may be controlled by a timing controller TC. For example, the gate driver GD may receive a clock signal, a reset signal, and a start signal from the timing controller TC, and the data driver DD may receive digital video data and a source timing signal from the timing controller TC. The power voltage supply line PL may be electrically connected to the power unit PU.

[0044] The display panel DP may include an active area AA in which the pixel area PA is arranged and a border area BZ arranged outside the active area AA. For example, the border area BZ may completely or only partially surround the active area AA. The border area BZ may be a non-active area or a part of a non-active area. At least one of the gate driver GD, the data driver DD, the timing controller TC, and the power unit PU may be arranged on the border area BZ of the display panel DP. For example, the display device according to an embodiment of the present disclosure may be a GIP (Gate In Panel) type display device, in which the gate driver GD is formed on the border area BZ of the display panel DP.

[0045] Each of the pixel areas PA can realize a specific color. For example, a light emitting device 300 and a pixel driving circuit DC electrically connected to the light emitting device 300 can be provided in each pixel area PA. The pixel driving circuit DC of each pixel area PA can be electrically connected to the signal wirings GL, DL and PL. For example, the pixel driving circuit DC of each pixel area PA can be electrically connected to one of the gate lines GL, one of the data lines DL and one of the power voltage supply lines PL. The pixel driving circuit DC of each pixel area PA can supply a driving current corresponding to the data signal to the light emitting device 300 of the corresponding pixel area PA within one frame according to the gate signal. For example, the pixel driving circuit DC of each pixel area PA may include a first thin film transistor TR1, a second thin film transistor TR2 and a storage capacitor Cst.

[0046] Figure 3is a view schematically showing a cross section of a pixel region in a display device according to an embodiment of the present disclosure. Figure 4 yes Figure 3 A magnified view of the K1 region in Figure 2.

[0047] Reference Figures 2 to 4 , the first thin film transistor TR1 of each pixel area PA can transmit the data signal to the second thin film transistor TR2 of the corresponding pixel area PA according to the gate signal. For example, the first thin film transistor TR1 of each pixel area PA can be used as a switching thin film transistor. The first thin film transistor TR1 of each pixel area PA may include a first semiconductor pattern, a first gate electrode, a first drain electrode, and a first source electrode. For example, the first gate electrode of each pixel area PA may be electrically connected to the corresponding gate line GL, and the first drain electrode of each pixel area PA may be electrically connected to the corresponding data line DL.

[0048] The second thin film transistor TR2 of each pixel area PA can generate a driving current corresponding to the data signal. For example, the second thin film transistor TR2 of each pixel area PA can be used as a driving thin film transistor. The second thin film transistor TR2 of each pixel area PA can have the same structure as the first thin film transistor TR1 of the corresponding pixel area PA. For example, the second thin film transistor TR2 of each pixel area PA may include a second semiconductor pattern 221, a second gate electrode 223, a second drain electrode 225, and a second source electrode 227. The second gate electrode 223 of each pixel area PA can be electrically connected to the first source electrode of the corresponding pixel area PA, and the second drain electrode 225 of each pixel area PA can be electrically connected to the corresponding power voltage supply line PL. The light emitting device 300 of each pixel area PA can be electrically connected to the second source electrode 227 of the corresponding pixel area PA.

[0049] The second semiconductor pattern 221 may include a semiconductor material. For example, the second semiconductor pattern 221 may include amorphous silicon (a-Si), polycrystalline silicon (Poly-Si) or an oxide semiconductor such as IGZO. The second semiconductor pattern 221 may include a drain region, a channel region and a source region. The channel region may be disposed between the drain region and the source region. The drain region and the source region may have a lower resistance than the channel region. For example, the drain region and the source region may include a conductive region of an oxide semiconductor. The channel region may be a non-conductive region of an oxide semiconductor.

[0050] The second semiconductor pattern 221 may include the same material as the first semiconductor pattern. The second semiconductor pattern 221 may be disposed on the same layer as the first semiconductor pattern. The second semiconductor pattern 221 may be formed by the same process as the first semiconductor pattern. For example, the second semiconductor pattern 221 may be formed simultaneously with the first semiconductor pattern.

[0051] The second gate electrode 223 may be disposed on a portion of the second semiconductor pattern 221. For example, the second gate electrode 223 may overlap with a channel region of the second semiconductor pattern 221. The drain region and the source region of the second semiconductor pattern 221 may be disposed outside the second gate electrode 223. The second gate electrode 223 may include a conductive material. For example, the second gate electrode 223 may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second gate electrode 223 may be insulated from the second semiconductor pattern 221. For example, the channel region of the second semiconductor pattern 221 may have a conductivity corresponding to a voltage applied to the second gate electrode 223.

[0052] The second gate electrode 223 may include the same material as the first gate electrode. The second gate electrode 223 may be disposed on the same layer as the first gate electrode. The second gate electrode 223 may be formed by the same process as the first gate electrode. For example, the second gate electrode 223 may be formed simultaneously with the first gate electrode.

[0053] The second drain electrode 225 may include a conductive material. For example, the second drain electrode 225 may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second drain electrode 225 may include a material different from that of the second gate electrode 223. The second drain electrode 225 may be disposed on a layer different from that of the second gate electrode 223. For example, the second drain electrode 225 may be insulated from the second gate electrode 223. The second drain electrode 225 may be electrically connected to the drain region of the second semiconductor pattern 221.

[0054] The second drain electrode 225 may include the same material as the first drain electrode. The second drain electrode 225 may be disposed on the same layer as the first drain electrode. The second drain electrode 225 may be formed by the same process as the first drain electrode. For example, the second drain electrode 225 may be formed simultaneously with the first drain electrode. The first drain electrode may be insulated from the first gate electrode.

[0055] The second source electrode 227 may include a conductive material. For example, the second source electrode 227 may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti) and tungsten (W). The second source electrode 227 may include a material different from the second gate electrode 223. The second source electrode 227 may be disposed on a layer different from the second gate electrode 223. For example, the second source electrode 227 may be insulated from the second gate electrode 223. The second source electrode 227 may be disposed on the same layer as the second drain electrode 225. The second source electrode 227 may include the same material as the second drain electrode 225. The second source electrode 227 may be formed by the same process as the second drain electrode 225. For example, the second source electrode 227 may be formed simultaneously with the second drain electrode 225. The second source electrode 227 may be spaced apart from the second drain electrode 225. The second source electrode 227 may be electrically connected to the source region of the second semiconductor pattern 221.

[0056] The second source electrode 227 may include the same material as the first source electrode. The second source electrode 227 may be disposed on the same layer as the first source electrode. The second source electrode 227 may be formed by the same process as the first source electrode. For example, the second source electrode 227 may be formed simultaneously with the first source electrode. The first source electrode may be insulated from the first drain electrode.

[0057] The storage capacitor Cst of each pixel area PA can maintain the signal applied to the second gate electrode 223 of the corresponding pixel area PA for one frame. For example, the storage capacitor Cst of each pixel area PA can be electrically connected between the second gate electrode 223 of the corresponding pixel area PA and the second source electrode 227. The storage capacitor Cst of each pixel area PA can have a stacked structure of capacitor electrodes. The storage capacitor Cst of each pixel area PA can be formed by using a process for forming a first thin film transistor TR1 and a second thin film transistor TR2 of the corresponding pixel area PA. For example, the storage capacitor Cst of each pixel area PA may include a first capacitor electrode formed simultaneously with the second gate electrode 233 of the corresponding pixel area PA and a second capacitor electrode formed simultaneously with the second source electrode 227 of the corresponding pixel area PA.

[0058] The pixel driving circuit DC of each pixel area PA may be disposed on the device substrate 100. The device substrate 100 may include an insulating material. For example, the device substrate 100 may include glass or plastic. A plurality of insulating layers 110, 120, 130, 140, 150, and 160 for preventing unnecessary electrical connection in each pixel area PA may be disposed on the device substrate 100. For example, a buffer insulating layer 110, a gate insulating layer 120, an interlayer insulating layer 130, a device passivation layer 140, a planarization layer 150, and a bank insulating layer 160 may be disposed on the device substrate 100.

[0059] The buffer insulating layer 110 may be disposed close to the device substrate 100. The buffer insulating layer 110 may prevent contamination caused by the device substrate 100 during the process of forming the first thin film transistor TR1 and the second thin film transistor TR2 in each pixel area PA. For example, the upper surface of the device substrate 100 facing the first thin film transistor TR1 and the second thin film transistor TR2 of each pixel area PA may be completely covered by the buffer insulating layer 110. The buffer insulating layer 110 may include an insulating material. For example, the buffer insulating layer 110 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The buffer insulating layer 110 may have a multilayer structure. For example, the buffer insulating layer 110 may have a stacked structure of an inorganic insulating layer made of silicon oxide (SiOx) and an inorganic insulating layer made of silicon nitride (SiNx).

[0060] The gate insulating layer 120 may be disposed on the buffer insulating layer 110. For example, the buffer insulating layer 110 may be disposed between the device substrate 100 and the gate insulating layer 120. The first and second gate electrodes 223 of each pixel region PA may be insulated from the first and second semiconductor patterns 221 of the corresponding pixel region PA by the gate insulating layer 120. For example, the gate insulating layer 120 may cover the first and second semiconductor patterns 221 of each pixel region PA. The first and second gate electrodes 223 of each pixel region PA may be disposed on the gate insulating layer 120. The gate insulating layer 120 may include an insulating material. For example, the gate insulating layer 120 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx).

[0061] The interlayer insulating layer 130 may be disposed on the gate insulating layer 120. For example, the gate insulating layer 120 may be disposed between the buffer insulating layer 110 and the interlayer insulating layer 130. The first drain electrode, the first source electrode, the second drain electrode 225, and the second source electrode 227 of each pixel region PA may be insulated from the first gate electrode and the second gate electrode 223 of the corresponding pixel region PA by the interlayer insulating layer 130. For example, the interlayer insulating layer 130 may cover the first gate electrode and the second gate electrode 223 of each pixel region PA. The first drain electrode, the first source electrode, the second drain electrode 225, and the second source electrode 227 of each pixel region PA may be disposed on the interlayer insulating layer 130. The interlayer insulating layer 130 may include an insulating material. For example, the interlayer insulating layer 130 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx).

[0062] The device passivation layer 140 may be disposed on the interlayer insulating layer 130. For example, the interlayer insulating layer 130 may be disposed between the gate insulating layer 120 and the device passivation layer 140. The device passivation layer 140 may prevent the pixel driving circuit DC in each pixel area PA from being damaged due to external impact and moisture. For example, the device passivation layer 140 may be a linear layer extending along the surface of each pixel driving circuit DC opposite to the device substrate 100. The first drain electrode, the first source electrode, the second drain electrode 225, and the second source electrode 227 of each pixel area PA may be covered by the device passivation layer 140. The device passivation layer 140 may include an insulating material. For example, the device passivation layer 140 may be an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx).

[0063] The planarization layer 150 may be disposed on the device passivation layer 140. For example, the device passivation layer 140 may be disposed between the interlayer insulating layer 130 and the planarization layer 150. The planarization layer 150 may eliminate the thickness difference caused by the pixel driving circuit DC of each pixel area PA. For example, the upper surface of the planarization layer 150 opposite to the device substrate 100 may be a flat surface. The planarization layer 150 may include an insulating material. The planarization layer 150 may include a material different from the device passivation layer 140. The planarization layer 150 may include a material having relatively high fluidity. For example, the planarization layer 150 may include an organic insulating material.

[0064] The light emitting device 300 of each pixel region PA may be disposed on the planarization layer 150. The light emitting device 300 of each pixel region PA may emit light showing a specific color. For example, the light emitting device 300 of each pixel region PA may include a first electrode 310, a light emitting unit 320, and a second electrode 330 stacked sequentially.

[0065] The first electrode 310 and the second electrode 330 may include a conductive material. The second electrode 330 may include a material different from the first electrode 310. The transmittance of the first electrode 310 may be greater than the transmittance of the second electrode 330. The second electrode 330 may have a higher reflectivity than the first electrode 310. For example, the first electrode 310 may be a transparent electrode made of a transparent conductive material such as ITO and IZO, and the second electrode 330 may include a metal. The second electrode 330 may have a smaller work function than the first electrode 310. For example, the first electrode 310 may be used as an anode electrode, and the second electrode 330 may be used as a cathode electrode.

[0066] The light emitting unit 320 may generate light having a brightness corresponding to the voltage difference between the first electrode 310 and the second electrode 330. The light emitting unit 320 may include a plurality of emission stacks 321, 322, and 323, and at least one charge generation layer 329a and 329b. For example, the light emitting unit 320 may include a lower emission stack 321, a first charge generation layer 329a, an intermediate emission stack 322, a second charge generation layer 329b, and an upper emission stack 323 stacked in sequence.

[0067] Each of the first charge generation layer 329a and the second charge generation layer 329b may supply electrons or holes to adjacent emission stacks 321, 322, and 323. For example, each of the first charge generation layer 329a and the second charge generation layer 329b may have a stacked structure of an n-type charge generation layer 329n and a p-type charge generation layer 329p. The n-type charge generation layer 329n may be disposed close to the first electrode 310, and the p-type charge generation layer 329p may be disposed close to the second electrode 330. For example, the p-type charge generation layer 329p of each of the first charge generation layer 329a and the second charge generation layer 329b may be disposed between the corresponding n-type charge generation layer 329n and the second electrode 330. Therefore, in the display device according to the embodiment of the present disclosure, electrons and holes may be supplied to each emission stack 321, 322, and 323 in a balanced manner.

[0068] The lower emission stack 321 may be disposed between the first electrode 310 and the first charge generation layer 329a. The intermediate emission stack 322 may be disposed between the first charge generation layer 329a and the second charge generation layer 329b. The upper emission stack 323 may be disposed between the second charge generation layer 329b and the second electrode 330. Each of the lower emission stack 321, the intermediate emission stack 322, and the upper emission stack 323 may include at least one light-emitting layer 321bm, 322rm, 322gm, 323b1, and 323b2. For example, the lower emission stack 321 may include a lower hole injection layer 321hi, a lower hole transport layer 321ht, a lower light-emitting layer 321bm, and a lower electron transport layer 321et sequentially stacked on the first electrode 310. The middle emission stack 322 may include a middle hole transport layer 322ht, a first middle light-emitting layer 322rm, a second middle light-emitting layer 322gm, and a middle electron transport layer 322et sequentially stacked on the first charge generation layer 329a. The upper emission stack 323 may include an upper hole transport layer 323ht, a first upper light-emitting layer 323b1, a second upper light-emitting layer 323b2, an upper electron transport layer 323et, and an upper electron injection layer 323ei sequentially stacked on the second charge generation layer 329b. The second electrode 330 may be disposed on the upper electron injection layer 323ei.

[0069] Each of the light-emitting layers 321bm, 322rm, 322gm, 323b1, and 323b2 can generate light using energy through the recombination of electrons and holes. For example, each of the light-emitting layers 321bm, 322rm, 322gm, 323b1, and 323b2 can include a host and a dopant doped into the host. Here, the term "doping" refers to adding a second material having a physical property different from that of the first material to a layer in which the first material occupies most of the weight ratio. For example, the dopant of each light-emitting layer 321bm, 322rm, 322gm, 323b1, and 323b2 can have a weight ratio of less than 30% of the corresponding light-emitting layer 321bm, 322rm, 322gm, 323b1, and 323b2. Furthermore, the lowest unoccupied molecular orbital (LUMO) energy level and the highest occupied molecular orbital (HOMO) energy level of each light-emitting layer 321bm, 322rm, 322gm, 323b1 and 323b2 may mean the LUMO energy level and the HOMO energy level of the main body occupying most of the weight ratio in the corresponding light-emitting layers 321bm, 322rm, 322gm, 323b1 and 323b2.

[0070] The light emitted from the light emitting unit 320 may display a white color. At least one of the light emitting layers 321bm, 322rm, 322gm, 323b1, and 323b2 may generate light having a wavelength range different from that of the other light emitting layers 321bm, 322rm, 322gm, 323b1, and 323b2. For example, the light emitted from the intermediate emission stack 322 may display a color different from that of the light emitted from the lower emission stack 321 and the light emitted from the upper emission stack 323. The first upper light emitting layer 323b1 and the second upper light emitting layer 323b2 of the upper emission stack 323 may generate light displaying the same color as the lower light emitting layer 321bm of the lower emission stack 321. For example, the light emitted from the lower emission stack 321 and the light emitted from the upper emission stack 323 may display a blue color. The light emitted from the intermediate emission stack 322 may display a color that is in a complementary color relationship with the blue color. For example, the intermediate emission stack 322 may generate light displaying a yellow color.

[0071] The lower light emitting layer 321bm may generate light using holes supplied from the first electrode 310 through the lower hole injection layer 321hi and the lower hole transport layer 321ht and electrons supplied through the n-type charge generation layer 329n of the first charge generation layer 329a. The lower light emitting layer 321bm may include a lower main body and a lower blue dopant doped into the lower main body. The lower blue dopant may be a fluorescent dopant. For example, the lower main body of the lower light emitting layer 321bm may include one of a naphthalene portion, anthracene, pyrene, and phenanthrene, and the lower blue dopant of the lower light emitting layer 321bm may be a pyrene-based blue fluorescent dopant or a boron-based blue fluorescent dopant.

[0072] The first intermediate light-emitting layer 322rm and the second intermediate light-emitting layer 322gm can generate light using holes supplied from the p-type charge generation layer 329p of the first charge generation layer 329a through the intermediate hole transport layer 322ht and electrons supplied from the n-type charge generation layer 329n of the second charge generation layer 329b through the intermediate electron transport layer 322et. For example, the first intermediate light-emitting layer 322rm may include a first intermediate body and a first intermediate dopant doped into the first intermediate body, and the second intermediate light-emitting layer 322gm may include a second intermediate body and a second intermediate dopant doped into the second intermediate body, and the first intermediate dopant and the second intermediate dopant may include a material different from the lower blue dopant. The light generated by the second intermediate light-emitting layer 322gm may show a different color from the light generated by the first intermediate light-emitting layer 322rm. The second intermediate dopant may include a material different from the first intermediate dopant. For example, the first intermediate dopant may include a red dopant, and the second intermediate dopant may include a green dopant. The first intermediate dopant and the second intermediate dopant may include a phosphorescent dopant. For example, the first intermediate host of the first intermediate light-emitting layer 322rm and the second intermediate host of the second intermediate light-emitting layer 322gm may include CBP (carbazole biphenyl) or mCP (1,3-bis(carbazole-9-yl)), and the first intermediate dopant of the first intermediate light-emitting layer 322rm may be a red dopant selected from Ir(Piq)3(tris(1-phenylisoquinoline)iridium(III)), Ir(Piq)2(acac)(bis(1-phenylisoquinoline)(acetylacetonate)iridium(III)), Ir(btp) The second intermediate dopant of the second intermediate light-emitting layer 322gm may be at least one of the group consisting of Ir(ppy)3 (face-tris(2-phenylpyridine)iridium), Ir(ppy)2(acac), and Ir(mpyp)3. The second intermediate host of the second intermediate light-emitting layer 322gm may include a material different from the first intermediate host of the first intermediate light-emitting layer 322rm.

[0073] The first upper light emitting layer 323b1 and the second upper light emitting layer 323b2 may generate light using holes supplied from the p-type charge generation layer 329p of the second charge generation layer 329b through the upper hole transport layer 323ht and electrons supplied from the second electrode 330 through the upper electron injection layer 323ei and the upper electron transport layer 323et. The second upper light emitting layer 323b2 may be in direct contact with the first upper light emitting layer 323b1. For example, the upper surface of the first upper light emitting layer 323b1 facing the second electrode 330 may be in contact with the lower surface of the second upper light emitting layer 323b2 facing the first electrode 310. The light generated by the second upper light emitting layer 323b2 may display the same color as the light generated by the first upper light emitting layer 323b1. For example, the first upper light emitting layer 323b1 may include a first upper host and a first blue dopant doped into the first upper host, and the second upper light emitting layer 323b2 may include a second upper host and a second blue dopant doped into the second upper host. The first blue dopant and the second blue dopant may be fluorescent materials. The light generated by the second upper light emitting layer 323b2 may have the same wavelength range as the light generated by the first upper light emitting layer 323b1. For example, the second blue dopant may be made of the same material as the first blue dopant.

[0074] The first upper body and the second upper body may have relatively high hole transport properties. According to the spin arrangement, the excitons generated by the combination of holes and electrons can be divided into singlet excitons with paired spin forms and triplet excitons with unpaired spin forms. In the emission of fluorescent materials, the contribution of singlet excitons is higher than that of triplet excitons. Therefore, in the display device according to the embodiment of the present disclosure, triplet excitons may be accumulated in the first upper light-emitting layer 323b1 and the second upper light-emitting layer 323b2. For example, in the display device according to the embodiment of the present disclosure, triplet excitons generated in the first upper light-emitting layer 323b1 may be accumulated at the interface between the first upper light-emitting layer 323b1 and the second upper light-emitting layer 323b2.

[0075] Figure 5 is a view showing an energy band diagram of the upper emission stack 323 in the display device according to an embodiment of the present disclosure. Figure 6 is a view showing relative energy levels of materials of the upper emission stack 323 in a display device according to an embodiment according to the present disclosure. Figure 6 The S1 in represents the singlet energy level.

[0076] Reference Figure 5 and Figure 6, the second upper body BH2 of the second upper light-emitting layer 323b2 may have a triplet energy level T1 higher than the first upper body BH1 of the first upper light-emitting layer 323b1. The second upper body BH2 may include a material different from the first upper body BH1. For example, the first upper body BH1 may include an anthracene-based material, and the second upper body BH2 may include a pyrene-based material. Therefore, in the display device according to the embodiment of the present disclosure, the triplet excitons generated in the second upper light-emitting layer 323b2 may be transferred to the first upper light-emitting layer 323b1 by dexter energy transfer. For example, in the display device according to the embodiment of the present disclosure, the accumulation of triplet excitons at the upper surface of the second upper light-emitting layer 323b2 toward the second electrode 330 may be prevented. Therefore, in the display device according to the embodiment of the present disclosure, the degradation and damage of the upper electron transport layer 323et in contact with the upper surface of the second upper light-emitting layer 323b2 due to the accumulation of triplet excitons may be prevented. Also, in the display device according to the embodiment of the present disclosure, the lifespan of the upper emission stack 323 may be increased.

[0077] The triplet excitons accumulated at the interface between the first upper light-emitting layer 323b1 and the second upper light-emitting layer 323b2 can contribute to the emission of the first blue dopant BD1 and / or the emission of the second blue dopant BD2. For example, in the display device according to the embodiment of the present disclosure, the triplet excitons generated in the second upper light-emitting layer 323b2 can be recycled. Therefore, in the display device according to the embodiment of the present disclosure, the efficiency of the upper emission stack 323 can be improved.

[0078] The first blue dopant BD1 of the first upper light-emitting layer 323b1 and the second blue dopant BD2 of the second upper light-emitting layer 323b2 may have a triplet energy level higher than the second upper host BH2 of the second upper light-emitting layer 323b2. Therefore, in the display device according to the embodiment of the present disclosure, the degradation of the first blue dopant BD1 and / or the second blue dopant BD2 due to the capture of singlet excitons and / or triplet excitons may be delayed. Therefore, in the display device according to the embodiment of the present disclosure, the efficiency and life of the upper emission stack 323 may be improved.

[0079] The LUMO energy level of the upper electron transport layer 323et may be higher than the LUMO energy level of the second upper light-emitting layer 323b2. Here, since the LUMO energy level is based on the vacuum energy level, the expression "high LUMO energy level" means that the absolute value of the LUMO energy level is small. For example, in a display device according to an embodiment of the present disclosure, the LUMO energy level of the upper electron transport layer 323et may have an absolute value smaller than the LUMO energy level of the second upper light-emitting layer 323b2. Therefore, in a display device according to an embodiment of the present disclosure, electrons can be smoothly supplied to the second upper light-emitting layer 323b2 through the upper electron transport layer 323et.

[0080] The HOMO energy level of the upper electron transport layer 323et may be lower than the HOMO energy level of the second upper light-emitting layer 323b2. Here, since the HOMO energy level is based on the vacuum energy level, the expression "low HOMO energy level" means that the absolute value of the HOMO energy level is large. For example, in a display device according to an embodiment of the present disclosure, the HOMO energy level of the upper electron transport layer 323et may have an absolute value greater than the HOMO energy level of the second upper light-emitting layer 323b2. Therefore, in a display device according to an embodiment of the present disclosure, holes provided to the second upper light-emitting layer 323b2 may not flow smoothly into the upper electron transport layer 323et. For example, in a display device according to an embodiment of the present disclosure, the upper electron transport layer 323et may be used as a hole blocking layer. Therefore, in a display device according to an embodiment of the present disclosure, the efficiency of the upper emission stack can be effectively improved.

[0081] Table 1 below shows the relative external quantum efficiency (EQE) and lifetime (T95) of the light emitting unit 320 according to the thickness ratio of the first upper light emitting layer 323b1 to the second upper light emitting layer 323b2. Here, T95 means the time until the brightness decreases to 95% of the initial value.

[0082] [Table 1]

[0083] Thickness ratio of the first upper light emitting layer to the second upper light emitting layer EQE T95 9:1 101％ 121％ 8:2 103％ 165％ 6:4 102％ 143％ 5:5 97％ 115％

[0084] Referring to Table 1 above, if the thickness of the second upper light emitting layer 323b2 is 10% to 40% of the first upper light emitting layer 323b1, both the efficiency and the life of the light emitting unit 320 can be improved. And, if the thickness of the second upper light emitting layer 323b2 is 50% of the first upper light emitting layer 323b1, the life of the light emitting unit 320 can be increased, but the efficiency of the light emitting unit 320 may be reduced. Therefore, in the display device according to the embodiment of the present disclosure, the second upper light emitting layer 323b2 may have a thickness thinner than the first upper light emitting layer 323b1. For example, in the display device according to the embodiment of the present disclosure, the second upper light emitting layer 323b2 may have a thickness of 10% to 40% of the first upper light emitting layer 323b1. Therefore, in the display device according to the embodiment of the present disclosure, both the efficiency and the life of the light emitting unit 320 can be improved.

[0085] In the display device according to the embodiment of the present disclosure, a color filter 400 may be disposed between the device passivation layer 140 and the planarization layer 150 of each pixel area PA. Figure 3 As shown. The color filter 400 of each pixel area PA may be arranged on the path of light emitted from the light emitting device 300 of the corresponding pixel area PA. For example, the color filter 400 of each pixel area PA may overlap with the light emitting device 300 of the corresponding pixel area PA. The light generated by the light emitting unit 320 of each pixel area PA may be emitted to the outside through the first electrode 310 of the corresponding pixel area PA, the color filter 400 and the device substrate 100. Therefore, in the display device according to the embodiment of the present disclosure, an image composed of various colors can be provided to the user. The thickness difference caused by the color filter 400 of each pixel area PA can be removed by the planarization layer 150.

[0086] The bank insulation layer 160 may be disposed on the planarization layer 150. The bank insulation layer 160 may define an emission area in each pixel area PA. For example, the bank insulation layer 160 may include an opening overlapping the color filter 400 of each pixel area PA. The light emitting device 300 of each pixel area PA may be controlled independently of the light emitting device 300 of the adjacent pixel area PA. For example, the first electrode 310 of each pixel area PA may be insulated from the first electrode 310 of the adjacent pixel area PA by the bank insulation layer 160. The first electrode 310 of each pixel area PA may be spaced apart from the first electrode 310 of the adjacent pixel area PA. For example, the edge of the first electrode 310 in each pixel area PA may be covered by the bank insulation layer 160. The bank insulation layer 160 may include an insulating material. For example, the bank insulation layer 160 may be an organic insulating material. The bank insulation layer 160 may include a material different from the planarization layer 150.

[0087] The light emitting unit 320 of each pixel area PA may have the same structure as the light emitting unit 320 of the adjacent pixel area PA. The light emitting unit 320 of each pixel area PA may be formed by the same process as the light emitting unit 320 of the adjacent pixel area PA. For example, the light emitting unit 320 of each pixel area PA may be formed simultaneously with the light emitting unit 320 of the adjacent pixel area PA. The light emitting unit 320 of each pixel area PA may be in direct contact with the light emitting unit 320 of the adjacent pixel area PA. For example, the light emitting unit 320 of each pixel area PA may extend onto the embankment insulating layer 160. Therefore, in the display device according to the embodiment of the present disclosure, the process of forming the light emitting unit 320 in each pixel area PA may be simplified.

[0088] The voltage applied to the second electrode 330 of each pixel area PA may be the same as the voltage applied to the second electrode 330 of the adjacent pixel area PA. For example, the second electrode 330 of each pixel area PA may be electrically connected to the second electrode 330 of the adjacent pixel area PA. The second electrode 330 of each pixel area PA may include the same material as the second electrode 330 of the adjacent pixel area PA. The second electrode 330 of each pixel area PA may be formed by the same process as the second electrode of the adjacent pixel area PA. For example, the second electrode 330 of each pixel area PA may be formed simultaneously with the second electrode 330 of the adjacent pixel area PA. The second electrode 330 of each pixel area PA may be in direct contact with the second electrode 330 of the adjacent pixel area PA. For example, the second electrode 330 of each pixel area PA may extend onto the bank insulating layer 160. Therefore, in the display device according to the embodiment of the present disclosure, the process of forming the second electrode 330 in each pixel area PA may be simplified. And, in the display device according to the embodiment of the present disclosure, the brightness of the light emitted from the light emitting device 300 of each pixel area PA may be adjusted by the data signal applied to the pixel driving circuit DC of the corresponding pixel area PA.

[0089] The encapsulation unit 500 may be provided on the light emitting device 300 of each pixel region PA. The encapsulation unit 500 may prevent the light emitting device 300 from being damaged due to external moisture and impact. The encapsulation unit 500 may have a multilayer structure. For example, the encapsulation unit 500 may include a first encapsulation layer 510, a second encapsulation layer 520, and a third encapsulation layer 530 stacked in sequence. The first encapsulation layer 510, the second encapsulation layer 520, and the third encapsulation layer 530 may include an insulating material. The second encapsulation layer 520 may include a material different from the first encapsulation layer 510 and the third encapsulation layer 530. For example, the first encapsulation layer 510 and the third encapsulation layer 530 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx), and the second encapsulation layer 520 may include an organic insulating material. The thickness difference caused by the light emitting device 300 of each pixel region PA may be removed by the second encapsulation layer 520. For example, the upper surface of the encapsulation unit 500 opposite to the device substrate 100 may be a flat surface. Therefore, in the display device according to the embodiment of the present disclosure, the light emitting device 300 in each pixel area PA may be effectively prevented from being damaged due to external moisture and impact.

[0090] Therefore, in the display device according to the embodiment of the present disclosure, the light-emitting device 300 of each pixel area PA may include a light-emitting unit 320 between the first electrode 310 and the second electrode 330, and the light-emitting unit 320 generating white light may include a lower emission stack 321, an intermediate emission stack 322 and an upper emission stack 323, and the upper emission stack 323 arranged close to the second electrode 330 serving as a cathode electrode may have a stacked structure of a first upper light-emitting layer 323b1 including a first upper body BH1 and a first blue dopant BD1 and a second upper light-emitting layer 323b2 including a second upper body BH2 and a second blue dopant BD2, the second upper light-emitting layer 323b2 may be in contact with the upper surface of the first upper light-emitting layer 323b1 facing the second electrode 330, and the second upper body BH2 of the second upper light-emitting layer 323b2 may have a triplet energy level higher than the first upper body BH1 of the first upper light-emitting layer 323b1. Therefore, in the display device according to the embodiment of the present disclosure, triplet excitons generated in the second upper light-emitting layer 323b2 can be transferred to the first upper light-emitting layer 323b1. For example, in the display device according to the embodiment of the present disclosure, the accumulation of triplet excitons at the upper surface of the second upper light-emitting layer 323b2 toward the second electrode 330 can be prevented. Therefore, in the display device according to the embodiment of the present disclosure, the efficiency and life of the light-emitting device 300 in each pixel area PA can be improved.

[0091] The display device according to an embodiment of the present disclosure is described as the pixel driving circuit DC of each pixel area PA can be composed of a first thin film transistor TR1, a second thin film transistor TR2 and a storage capacitor Cst. However, in a display device according to another embodiment of the present disclosure, the pixel driving circuit DC of each pixel area PA may include at least one thin film transistor. For example, in a display device according to another embodiment of the present disclosure, the pixel driving circuit DC of each pixel area PA may include a first thin film transistor TR1, a second thin film transistor TR2, a storage capacitor Cst and a third thin film transistor. The third thin film transistor may initialize the storage capacitor Cst according to a gate signal. The third thin film transistor may have the same structure as the first thin film transistor TR1 and the second thin film transistor TR2. For example, the third gate electrode of the third thin film transistor may be electrically connected to the corresponding gate line GL, the third drain electrode of the third thin film transistor may be electrically connected to the initial line to which the initial signal is applied, and the third source electrode of the third thin film transistor may be electrically connected to the storage capacitor Cst. Therefore, in a display device according to another embodiment of the present disclosure, the degree of freedom of configuring each pixel driving circuit DC can be improved.

[0092] In the display device according to an embodiment of the present disclosure, the positions and electrical connections of the first drain electrode, the first source electrode, the second drain electrode 225, and the second source electrode 227 in each pixel driving circuit DC may vary according to the configuration of the corresponding pixel driving circuit DC and / or the types of the corresponding thin film transistors TR1 and TR2. For example, in the display device according to another embodiment of the present disclosure, the second gate electrode 223 of each pixel driving circuit DC may be electrically connected to the first drain electrode of the corresponding pixel driving circuit DC. Therefore, in the display device according to another embodiment of the present disclosure, the degree of freedom of the configuration of each pixel driving circuit DC and the type of each thin film transistor TR1 and TR2 may be increased.

[0093] The display device according to an embodiment of the present disclosure is described as the second blue dopant may include the same material as the first blue dopant. However, in a display device according to another embodiment of the present disclosure, the second blue dopant of the second upper light-emitting layer 323b2 may include a material different from the first blue dopant of the first upper light-emitting layer 323b1, and the second blue dopant of the second upper light-emitting layer 323b2 may have a triplet energy level different from the first blue dopant of the first upper light-emitting layer 323b1. For example, in a display device according to another embodiment of the present disclosure, the first blue dopant may have a triplet energy level higher than the first upper host, the second blue dopant may have a triplet energy level higher than the second upper host, and the triplet energy level of the first blue dopant may be lower than the triplet energy level of the second upper host. Therefore, in a display device according to another embodiment of the present disclosure, the degradation of the first blue dopant and / or the second blue dopant due to the capture of singlet excitons and / or triplet excitons may be delayed. Also, in the display device according to another embodiment of the present disclosure, the degree of freedom of materials of the first blue dopant and the second blue dopant may be improved.

[0094] The display device according to an embodiment of the present disclosure is described as the lower emission stack 321, and the lower light emitting layer 321bm may be a single layer including a lower blue dopant. For example, in the display device according to an embodiment of the present disclosure, the thickness of the lower light emitting layer 321bm may be less than the sum of the thickness of the first upper light emitting layer 323b1 and the thickness of the second upper light emitting layer 323b2. However, in a display device according to another embodiment of the present disclosure, the lower emission stack 321 may have a stacked structure of the first lower light emitting layer 321b1 and the second lower light emitting layer 321b2, and the upper emission stack 323 may have a stacked structure of the first upper light emitting layer 323b1 and the second upper light emitting layer 323b2, as Figure 7 The second lower light emitting layer 321b2 may be in direct contact with the upper surface of the first lower light emitting layer 321b1 facing the second electrode 330, and the second upper light emitting layer 323b2 may be in direct contact with the upper surface of the first upper light emitting layer 323b1 facing the second electrode 330. For example, in a display device according to another embodiment of the present disclosure, the sum of the thickness of the first lower light emitting layer 321b1 and the thickness of the second lower light emitting layer 321b2 may be the same as the sum of the thickness of the first upper light emitting layer 323b1 and the thickness of the second upper light emitting layer 323b2.

[0095] The first lower light emitting layer 321b1 may include a first lower body and a first lower dopant doped into the first lower body. The second lower light emitting layer 321b2 may include a second lower body and a second lower dopant doped into the second lower body. The second lower dopant may include the same material as the first lower dopant. For example, the first lower dopant and the second lower dopant may include the same material as the first blue dopant and the second blue dopant of the upper emission stack 323.

[0096] The relationship between the triplet energy level of the first lower body and the triplet energy level of the second lower body may be different from the relationship between the triplet energy level of the first upper body and the triplet energy level of the second upper body. Table 2 below shows the relative external quantum efficiency (EQE) and lifetime (T95) according to the thickness ratio of the first lower light-emitting layer 321b1 to the second lower light-emitting layer 321b2 in a display device in which the lower emission stack 321 has a stacked structure of a first lower light-emitting layer 321b1 and a second lower light-emitting layer 321b2, the intermediate emission stack 322 includes a first intermediate light-emitting layer 322rm as a red light-emitting layer and a second intermediate light-emitting layer 322gm as a green light-emitting layer, and the upper emission stack 323 includes a single blue light-emitting layer, wherein the second lower body of the second lower light-emitting layer 321b2 has a higher triplet energy level than the first lower body of the first lower light-emitting layer 321b1.

[0097] [Table 2]

[0098] Thickness ratio of the first lower light emitting layer to the second lower light emitting layer EQE T95 9:1 95％ 28％ 8:2 96％ 32％ 6:4 93％ 25％

[0099] Referring to Table 2 above, regardless of the thickness ratio of the first lower light-emitting layer 321b1 to the second lower light-emitting layer 321b2, the life of the light-emitting unit 320 may be greatly shortened. Table 2 may be interpreted as if the second lower body of the second lower light-emitting layer 321b2 has a higher triplet energy level than the first lower body of the first lower light-emitting layer 321b1, triplet excitons in the first lower light-emitting layer 321b1 are accumulated at the lower surface of the first lower light-emitting layer 321b1 toward the first electrode 310, and the lower hole transport layer 321ht in contact with the lower surface of the first lower light-emitting layer 321b1 is degraded due to the accumulation of triplet excitons. Therefore, in the display device according to another embodiment of the present disclosure, the second lower body of the second lower light-emitting layer 321b2 may have a lower triplet energy level than the first lower body of the first lower light-emitting layer 321b1. For example, in the display device according to another embodiment of the present disclosure, triplet excitons generated in the first lower light emitting layer 321b1 may be transferred to the second lower light emitting layer 321b2. Therefore, in the display device according to another embodiment of the present disclosure, degradation of the life of the light emitting unit 320 due to accumulation of triplet excitons may be prevented. The second lower light emitting layer 321b2 may have a greater thickness than the first lower light emitting layer 321b1.

[0100] The first lower body and the second lower body may include materials different from the first upper body and the second upper body. For example, the first lower body and the second lower body may include materials having relatively high electron transport properties. The second lower body may include a material different from the first lower body. For example, the first lower body may include a naphthyl material, and the second lower body may include one of anthracene, pyrene, and phenanthrene. The first lower dopant of the first lower light-emitting layer 321b1 and the second lower dopant of the second lower light-emitting layer 321b2 may have a triplet energy level higher than that of the first lower body. That is, the first lower dopant of the first lower light-emitting layer 321b1 may have a triplet energy level higher than that of the first lower body, and the second lower dopant of the second lower light-emitting layer 321b2 may have a triplet energy level higher than that of the second lower body. Therefore, in a display device according to another embodiment of the present disclosure, the efficiency and life of the light-emitting unit 320 can be greatly improved.

[0101] The display device according to an embodiment of the present disclosure is described as the lower light emitting layer 321bm can be in direct contact with the lower hole transport layer 321ht. However, in a display device according to another embodiment of the present disclosure, the lower emission stack 321 may include an electron blocking layer 321eb between the lower hole transport layer 321ht and the lower light emitting layer 321bm, such as Figure 8 As shown. Therefore, in the display device according to another embodiment of the present disclosure, the emission efficiency of the lower light emitting layer 321bm can be improved. Therefore, in the display device according to another embodiment of the present disclosure, the efficiency and life of the light emitting device in each pixel area can be improved.

[0102] The display device according to an embodiment of the present disclosure is described as a lower emission stack 321 that may include a single lower hole transport layer 321ht. However, in a display device according to another embodiment of the present disclosure, the lower emission stack 321 may include a plurality of lower hole transport layers 321ht. Therefore, in a display device according to another embodiment of the present disclosure, holes supplied to the lower light-emitting layer 321bm may be controlled by the interaction between the hole injection layer 321hi and the lowermost lower hole transport layer 321ht of the lower emission stack 321 and the difference in HOMO energy levels between the lower hole transport layers 321ht. For example, in a display device according to another embodiment of the present disclosure, the region where electrons and holes recombine in the lower light-emitting layer 321bm may be controlled by a layer disposed between the first electrode 310 and the lower light-emitting layer 321bm. Therefore, in a display device according to another embodiment of the present disclosure, the life of the light-emitting device in each pixel area may be effectively improved.

[0103] The display device according to an embodiment of the present disclosure is described as the light emitting unit 320 may include three emission stacks 321, 322 and 323. However, in a display device according to another embodiment of the present disclosure, the light emitting unit 320 emitting white light may include at least two emission stacks. For example, in a display device according to another embodiment of the present disclosure, the light emitting unit 620 between the first electrode 610 and the second electrode 630 may include a red emission stack 621, a first charge generation layer 629a, a lower blue emission stack 622, a second charge generation layer 629b, a green emission stack 623, a third charge generation layer 629c and an upper blue emission stack 624, as shown in FIG. Fig. 9 shown.

[0104] Each of the first charge generation layer 629a, the second charge generation layer 629b, and the third charge generation layer 629c may supply electrons or holes to adjacent emission stacks 621, 622, 623, and 624. For example, each of the first charge generation layer 629a, the second charge generation layer 629b, and the third charge generation layer 629c may have a stacked structure of an n-type charge generation layer 629n and a p-type charge generation layer 629p.

[0105] The red emission stack 621 between the first electrode 610 and the first charge generation layer 629a may include a hole injection layer 621hi, a first hole transport layer 621ht, a red light emitting layer 621rm, and a first electron transport layer 621et. The red light emitting layer 621rm may have a single layer structure including a red host and a red dopant.

[0106] The lower blue emission stack 622 between the first and second charge generation layers 629a and 629b may include a second hole transport layer 622ht, a lower blue light emitting layer 622bm, and a second electron transport layer 622et. The lower blue light emitting layer 622bm may have a single layer structure including a lower host and a lower blue dopant.

[0107] The green emission stack 623 between the second and third charge generation layers 629b and 629c may include a third hole transport layer 623ht, a green light emitting layer 623gm, and a third electron transport layer 623et. The green light emitting layer 623gm may have a single layer structure including a green host and a green dopant.

[0108] The upper blue emission stack 624 between the third charge generation layer 629c and the second electrode 630 may include a fourth hole transport layer 624ht, a first upper light-emitting layer 624b1, a second upper light-emitting layer 624b2, a fourth electron transport layer 624et, and an electron injection layer 624ei. The first upper light-emitting layer 624b1 may include a first upper host and a first blue dopant. The second upper light-emitting layer 624b2 may include a second upper host and a second blue dopant. The second upper host may have a triplet energy level higher than that of the first upper host. The first blue dopant and the second blue dopant may have a triplet energy level higher than that of the second upper host. Therefore, in a display device according to another embodiment of the present disclosure, the efficiency and lifespan of the light-emitting unit 620 may be increased, and the color characteristics of the white light emitted from the light-emitting unit 620 may be improved.

[0109] The display device according to an embodiment of the present disclosure is described as the light emitting unit 320 of each pixel area PA can emit white light. However, in a display device according to another embodiment of the present disclosure, the light emitted from the light emitting unit 320 of each pixel area PA can display a different color from the light emitted from the light emitting unit 320 of the adjacent pixel area PA. For example, in a display device according to another embodiment of the present disclosure, the pixel area may include a red pixel area RPA for realizing a red color, a blue pixel area BPA for realizing a blue color, and a green pixel area GPA for realizing a green color, and the light emitting unit 720 of the light emitting device 700 in each pixel area RPA, BPA, and GPA can be separated from the light emitting unit 720 of the light emitting device 700 in the adjacent pixel areas RPB, BPA, and GPA, as shown in FIG. Fig.10 and Fig.11 As shown, Fig.11 yes Fig.10 For example, the end of the light emitting unit 720 in each of the pixel regions RPA, BPA, and GPA may be covered by the second electrode 730 of the corresponding pixel region RPA, BPA, and GPA.

[0110] The light emitting unit 720 of each pixel area RPA, BPA, and GPA may include emission stacks 721 and 722 in which light showing the same color is generated. For example, the light-emitting unit 720 of the light-emitting device 700 in the blue pixel area BPA may include a lower emission stack 721, a charge generation layer 729 and an upper emission stack 722, wherein the lower emission stack 721 may include a lower hole injection layer 721hi, a lower hole transport layer 721ht, a lower light-emitting layer 721bm and a lower electron transport layer 721et, wherein the upper emission stack 722 may include an upper hole transport layer 722ht, a first upper light-emitting layer 722b1, a second upper light-emitting layer 722b2, an upper electron transport layer 722et and an upper electron injection layer 722ei, wherein each of the lower light-emitting layer 721bm, the first upper light-emitting layer 722b1 and the second upper light-emitting layer 722b2 may have a single-layer structure including a blue host and a blue dopant, and wherein the blue host of the second upper light-emitting layer 722b2 may have a triplet energy level higher than that of the blue host of the first upper light-emitting layer 722b1. The charge generation layer 729 may supply electrons or holes to adjacent emission stacks 721 and 722. For example, the charge generation layer 729 may have a stacked structure of an n-type charge generation layer 729n and a p-type charge generation layer 729p. Therefore, in a display device according to another embodiment of the present disclosure, the efficiency and life of the light emitting unit 720 on the pixel regions RPA, BPA, and GPA displaying different colors may be improved.

[0111] In a display device according to another embodiment of the present disclosure, the light-emitting unit 720 of each pixel region RPA, BPA, and GPA may include a single emission stack. For example, in a display device according to another embodiment of the present disclosure, the light-emitting device of each blue pixel region may include a hole injection layer 720hi, a hole transport layer 720ht, an electron blocking layer 720eb, a first blue light-emitting layer 720b1, a second blue light-emitting layer 720b2, an electron transport layer 720et, an electron injection layer 720ei, and a second electrode 730 sequentially stacked on a first electrode 710, wherein the first blue light-emitting layer 720b1 may include a first blue host and a first blue dopant, wherein the second blue light-emitting layer 720b2 may include a second blue host and a second blue dopant, and wherein the second blue light host may have a triplet energy level higher than that of the first blue host, such as Fig.12 Therefore, in the display device according to another embodiment of the present disclosure, the degree of freedom can be improved when configuring the light emitting unit 720 provided between the first electrode 710 and the second electrode 730 .

[0112] Although the above description only takes the light-emitting device in the blue pixel area as an example Fig.10However, it is understood that the light-emitting devices in the red pixel area RPA and the green pixel area GPA may have similar configurations. In addition, the above description of the upper emission stack and the lower emission stack also applies to the corresponding emission stack of the light-emitting unit 720.

[0113] Therefore, the display device according to the embodiment of the present disclosure may include a light-emitting device on each pixel area, wherein the light-emitting device may include a light-emitting unit between an anode electrode and a cathode electrode, the light-emitting unit may include at least one blue emission stack, the blue emission stack may include a first light-emitting layer and a second light-emitting layer, and the body of the second light-emitting layer in contact with the surface of the first light-emitting layer facing the cathode electrode may have a triplet energy level higher than that of the body of the first light-emitting layer. Thus, in the display device according to the embodiment of the present disclosure, the degradation of the efficiency and life of the light-emitting device due to the accumulation of triplet excitons can be prevented or minimized. In addition, in the display device according to the embodiment of the present disclosure, lower power driving is possible, and power consumption can be reduced or minimized.

Claims

1. A display device, comprising: a first electrode on a pixel region of a device substrate; an upper emission stack on the first electrode, the upper emission stack having a stacked structure of a first blue light-emitting layer and a second blue light-emitting layer; an electron transport layer on the second blue light-emitting layer of the upper emission stack; as well as a second electrode on the electron transport layer, wherein the second blue light-emitting layer is in contact with a surface of the first blue light-emitting layer facing the electron transport layer, and The second host of the second blue light-emitting layer has a higher triplet energy level than the first host of the first blue light-emitting layer.

2. The display device according to claim 1, wherein: The lowest unoccupied molecular orbital LUMO energy level of the electron transport layer is higher than the LUMO energy level of the second blue light emitting layer.

3. The display device according to claim 1, wherein: The first blue dopant of the first blue light emitting layer has a triplet energy level higher than that of the first host of the first blue light emitting layer, and The second blue dopant of the second blue light-emitting layer has a triplet energy level higher than that of the second host of the second blue light-emitting layer.

4. The display device according to claim 3, wherein: The second blue dopant includes a material different from that of the first blue dopant.

5. The display device according to claim 3, wherein: The triplet energy level of the first blue dopant is lower than the triplet energy level of the second host.

6. The display device according to claim 1, wherein: The thickness of the second blue light-emitting layer is smaller than the thickness of the first blue light-emitting layer.

7. The display device according to claim 1, further comprising: a lower emitter stack disposed between the first electrode and the upper emitter stack; as well as A first charge generation layer is disposed between the lower emitter stack and the upper emitter stack.

8. The display device according to claim 7, wherein: The light-emitting layer of the lower emitting stack consists of a single layer including a lower blue dopant.

9. The display device according to claim 7, further comprising: a second charge generation layer disposed between the first charge generation layer and the upper emitter stack; as well as an intermediate emission stack disposed between the first charge generation layer and the second charge generation layer, Wherein, light emitted from the middle emission stack exhibits a different color from light emitted from the lower emission stack and light emitted from the upper emission stack.

10. The display device according to claim 9, wherein: The light-emitting layer of the intermediate emission stack includes a red dopant and a green dopant.

11. A display device, comprising: a first electrode on the substrate; an intermediate charge generation layer on the first electrode; a second electrode on the intermediate charge generation layer, the second electrode having a smaller work function than the first electrode; a first blue emission stack disposed between the first electrode and the intermediate charge generation layer; as well as a second blue emission stack disposed between the intermediate charge generation layer and the second electrode, The second blue emission stack includes a first upper light-emitting layer and a second upper light-emitting layer, the second upper light-emitting layer is in contact with a surface of the first upper light-emitting layer facing the second electrode, and The host of the second upper light-emitting layer has a higher triplet energy level than that of the host of the first upper light-emitting layer.

12. The display device according to claim 11, wherein: The intermediate charge generation layer has a stacked structure of an n-type charge generation layer and a p-type charge generation layer, and Wherein, the p-type charge generation layer is arranged between the n-type charge generation layer and the first upper light-emitting layer.

13. The display device according to claim 11, wherein: The first blue emission stack includes a first lower light emitting layer and a second lower light emitting layer, the second lower light emitting layer is in contact with a surface of the first lower light emitting layer facing the second electrode, and The host of the second lower light-emitting layer has a triplet energy level lower than that of the host of the first lower light-emitting layer.

14. The display device according to claim 13, wherein: The blue dopant of the first lower light-emitting layer has a triplet energy level higher than that of a host of the first lower light-emitting layer, and The blue dopant of the second lower light-emitting layer has a triplet energy level higher than that of the host of the second lower light-emitting layer.

15. The display device according to claim 11, wherein: The blue dopant of the first upper light emitting layer and the blue dopant of the second upper light emitting layer have a higher triplet energy level than a host of the second upper light emitting layer.

16. A display device, comprising: a cathode electrode and an anode electrode; as well as a light emitting unit between the cathode electrode and the anode electrode, The light-emitting unit at least comprises an upper emission stack, the upper emission stack comprises a first upper emission layer and a second upper emission layer, the second upper emission layer is in contact with a surface of the first upper emission layer facing the cathode electrode, and The second host of the second upper light-emitting layer has a higher triplet energy level than the first host of the first upper light-emitting layer.

17. The display device according to claim 16, wherein: The light emitting unit further comprises: a lower emitter stack between the anode electrode and the upper emitter stack; and A first charge generation layer is between the lower emitter stack and the upper emitter stack.

18. The display device according to claim 17, wherein: The lower emitting stack includes a lower light emitting layer, a lower hole transport layer, and an electron blocking layer between the lower light emitting layer and the lower hole transport layer.

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