Resource board card management method and device and electronic equipment

Abstract

The embodiment of the invention discloses a resource board card management method and device and electronic equipment, and the method comprises the steps that any resource board card obtains target position information in power-on and power-off data, and when the target position information is consistent with the position information of any resource board card, the power-on and power-off data of any resource board card is obtained; and any resource board card determines whether the board card state setting information of any resource board card is consistent with the current board card state information, and when the board card state setting information is not consistent with the current board card state information, any resource board card executes the state operation instruction. Therefore, according to the target position information of the power-on and power-off data and the position information of the resource board cards, the resource board cards executing the power-on and power-off data can be quickly determined, so that power-on or power-off operation can be automatically performed on one or more specific resource board cards, data blockage is avoided, the power-on and power-off efficiency of the resource board cards is improved, and the power-on and power-off efficiency of the resource board cards is improved. And the test efficiency of the chip test equipment is improved.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and in particular to a resource board management method, device and electronic equipment. Background Art

[0002] Chip testing equipment is used to test the parameters, functions and performance of chips or wafers. During the operation of the chip testing equipment, the operating status of the chip testing equipment will be monitored, and when an abnormal board appears in the chip testing equipment, the abnormal board will be powered off manually, and after the abnormal board is repaired, the repaired board will be powered on to restart the board.

[0003] In the process of implementing the present application, it was discovered through research that in the related technology, when powering on a board, it is usually necessary to power on the board manually. In particular, when powering on a group of boards, it is necessary to power on each board manually in turn, resulting in low power-on efficiency of the boards, thereby affecting the test efficiency of the chip testing equipment. Summary of the invention

[0004] In order to solve the above problems, the embodiments of the present application provide a resource board management method, device and electronic device.

[0005] One aspect of an embodiment of the present application provides a method for managing a resource board, which is applied to a chip testing device, wherein the chip testing device includes multiple resource boards, and the method includes: in response to receiving a power-on and power-off data packet, for each power-on and power-off data in the power-on and power-off data packet, any one of the multiple resource boards obtains target location information in the power-on and power-off data; in response to the target location information being consistent with the location information of any one of the resource boards, the any one of the resource boards determines whether board status setting information of the any one of the resource boards is consistent with current board status information, the board status setting information and the current board status information both include a power-on state or a power-off state, the board status setting information being the status information of the resource board after executing a status operation instruction in the power-on and power-off data; in response to the board status setting information being inconsistent with the current board status information, the any one of the resource boards executes the status operation instruction.

[0006] One aspect of an embodiment of the present application provides a management device for a resource board, which is applied to a chip testing device, wherein the chip testing device includes multiple resource boards, and the device includes: a first parsing module, which is used to respond to receiving a power-on and power-off data packet, for each power-on and power-off data in the power-on and power-off data packet, any resource board among the multiple resource boards obtains target location information in the power-on and power-off data; a first judgment module, which is used to respond to the target location information being consistent with the location information of any resource board, for any resource board to determine whether board status setting information of any resource board is consistent with current board status information, wherein the board status setting information and the current board status information both include a power-on state or a power-off state, and the board status setting information is the status information of the resource board after executing the status operation instruction in the power-on and power-off data; and a power-on and power-off module, which is used to respond to the board status setting information being inconsistent with the current board status information, for any resource board to execute the status operation instruction.

[0007] Another aspect of an embodiment of the present application provides an electronic device, comprising: a memory for storing a computer program; a processor for executing the computer program stored in the memory, and when the computer program is executed, the above-mentioned resource board management method is implemented.

[0008] In another aspect of the embodiments of the present application, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the above-mentioned resource board management method is implemented.

[0009] In another aspect of the embodiments of the present application, a computer program product is provided, including computer program instructions, which implement the above-mentioned resource board management method when executed by a processor.

[0010] A management method, device and electronic device for resource boards in the embodiments of the present application. The management method for resource boards includes: when receiving a power-on and power-off data packet, for each power-on and power-off data in the power-on and power-off data packet, any resource board obtains the target position information in the power-on and power-off data, when the target position information is consistent with the position information of any resource board, any resource board determines whether the board state setting information of any resource board is consistent with the current board state information, when the board state setting information is inconsistent with the current board state information, any resource board executes the state operation instruction. Therefore, in the embodiments of the present application, through the target position information of the power-on and power-off data and the position information of the resource board, the resource board that executes the power-on and power-off data can be quickly determined, thereby realizing the automatic power-on or power-off operation of one or more specific resource boards, avoiding data congestion, improving the efficiency of powering on and off the resource board, and thus improving the test efficiency of the chip test equipment.

[0011] In addition, by determining whether the current board status information of the resource board is consistent with the board setting status information, it is determined whether the resource board executes the status operation instructions in the power-on and power-off data, thereby avoiding the resource board from executing the status operation instructions that are the same as its current board status, thereby achieving fool-proof processing for the resource board.

[0012] The technical solution of the present application is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present application and, together with the description, serve to explain the principles of the present application.

[0014] The present application can be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0015] Figure 1 It is a flowchart of a resource board management method provided by an exemplary embodiment of the present application.

[0016] Figure 2 It is a flowchart of a resource board management method provided by another exemplary embodiment of the present application.

[0017] Figure 3 It is a flowchart of step S220 provided by an exemplary embodiment of the present application.

[0018] Figure 4 ] is a schematic diagram of an alarm page provided by an example embodiment of the present application.

[0019] Figure 5 It is a flowchart of alarm data generation provided by an exemplary embodiment of the present application.

[0020] Figure 6 It is a schematic diagram of the connection between a resource board and a host computer provided by an exemplary embodiment of the present application.

[0021] Figure 7 It is a structural block diagram of a resource board management device provided by an exemplary embodiment of the present application.

[0022] Figure 8 This is a schematic diagram of the structure of an application embodiment of the electronic device of the present application. DETAILED DESCRIPTION

[0023] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application.

[0024] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present application are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0025] It should also be understood that in the embodiments of the present application, "plurality" may refer to two or more than two, and "at least one" may refer to one, two or more than two.

[0026] It should also be understood that any component, data or structure mentioned in the embodiments of the present application can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0027] In addition, the term "and / or" in this application is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this application generally indicates that the associated objects before and after are in an "or" relationship.

[0028] It should also be understood that the description of the various embodiments in this application focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0029] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0030] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present application, its application, or uses.

[0031] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0032] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0033] The embodiments of the present application can be applied to electronic devices such as terminal devices, computer systems, servers, etc., which can operate with many other general or special computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, servers, etc. include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems, etc.

[0034] Electronic devices such as terminal devices, computer systems, servers, etc. can be described in the general context of computer system executable instructions (such as program modules) executed by computer systems. Generally, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media including storage devices.

[0035] In the process of implementing this application, it is found through research that in the prior art, since the chip test equipment may cause abnormal operation of the board due to factors such as voltage, temperature, and smoke during operation, the abnormal board will not only affect the operation of the chip test equipment, but also cause irreversible damage to the tested chip. Therefore, when the board is abnormal, the board will be powered off and repaired, and then the board will be powered on manually, which leads to low power-on efficiency of the board, thereby affecting the test efficiency of the chip test equipment.

[0036] Figure 1 FIG. 1 is a flow chart of a resource board management method provided by an exemplary embodiment of the present application. This embodiment can be applied to chip testing equipment, such as Figure 1 As shown, the resource board management method may include the following steps:

[0037] Step S110 , in response to receiving the power-on and power-off data packet, any resource board among the plurality of resource boards obtains target location information in the power-on and power-off data for each power-on and power-off data in the power-on and power-off data packet.

[0038] Wherein, the chip test equipment includes a plurality of resource boards. In one embodiment, the chip test equipment may be, for example, an integrated circuit automatic tester (Automatic Test Equipment, ATE). The chip test equipment may include a lower computer, which may be used to test a chip, a wafer or an integrated circuit to be tested, and the lower computer may include a plurality of resource boards. The resource board is used to test at least one performance and / or function of the chip. The resource board may include, for example, but is not limited to: a chip power supply test board, a chip I / O port test board, and a chip analog signal test board.

[0039] The power-on and power-off data packet may include at least one power-on and power-off data, and each of the at least one power-on and power-off data is used to control a resource board to perform a power-on or power-off operation. The power-on and power-off data includes target location information, and the target location information includes an address of a resource board receiving the power-on and power-off data, and the address may be a register address. Exemplarily, the target location information may be determined from a destination address (Destination, DST) in the power-on and power-off data.

[0040] In one embodiment, each resource board includes a management chip, which can be, for example, a control unit (Microcontroller Unit, MCU) or an ARM processor. A plurality of chambers and a plurality of serial ports can be provided on the lower computer, and at least two resource boards can be provided in each chamber, each chamber corresponds to a serial port on the lower computer, and each resource board in each chamber is respectively connected to the serial port corresponding to the chamber. The power-on and power-off data can be transmitted to the resource board via the serial port on the lower computer, and when the resource board receives the power-on and power-off data, the management chip of the resource board obtains the target location information from the power-on and power-off data.

[0041] Step S120 , in response to the target location information being consistent with the location information of any resource board, any resource board determines whether the board state setting information of any resource board is consistent with the current board state information.

[0042] The board state setting information and the current board state information both include the power-on state or the power-off state. The board state setting information is the state information of the resource board after the state operation instruction in the power-on and power-off data is executed. The current board state information is the current state (power-on state or power-off state) of any resource board.

[0043] The location information of any resource board includes the address of the resource board, and the address of the resource board may be a register address corresponding to the resource board.

[0044] In one embodiment, the state operation instruction may include power on and power off. When the state operation instruction is power on, it means that any resource board is powered on, and the board state setting information is a power on state; when the state operation instruction is power off, it means that any resource board is powered off, and the board state setting information is a power off state.

[0045] The management chip of any board compares the target location information with the location information of any resource board, and determines whether the target location information is consistent with the location information of any resource board. When they are consistent, the management chip determines the board status setting information of any resource board based on the status operation instruction, and compares the board status setting information of any resource board with the current board status information. When the management chip determines that the target location information is inconsistent with the location information of any resource board, any resource board discards the power-on and power-off data, and the lower computer transmits the power-on data to the next resource board of any resource board.

[0046] Step S130: In response to the inconsistency between the board state setting information and the current board state information, any resource board executes the state operation instruction.

[0047] When the management chip determines that the board state setting information of any resource board is inconsistent with the current board state information, the management chip controls any resource board to execute a state operation instruction so that the state information of any resource board is updated to the board state setting information.

[0048] Exemplarily, when the current board status information of any resource board is a power-off state and the status operation instruction is a power-on operation, the board status setting information of any resource board is a power-on state. Therefore, the current board status information (power-off state) of any resource board is inconsistent with the board status setting information (power-on state). The management chip controls any resource board to perform a power-on operation (status operation instruction).

[0049] In one implementation, when the board state setting information of any resource board is consistent with the current board state information, any resource board does not execute the state operation instruction.

[0050] In the embodiment of the present application, the resource board that executes the power-on and power-off data can be quickly determined through the target location information of the power-on and power-off data and the location information of the resource board, thereby realizing the automatic power-on or power-off operation of one or more specific resource boards, avoiding data congestion, improving the efficiency of powering on and off the resource board, and thus improving the test efficiency of the chip test equipment. In addition, by determining whether the current board state information of the resource board is consistent with the board setting state information, it is determined whether the resource board executes the state operation instruction in the power-on and power-off data, thereby avoiding the resource board from executing the state operation instruction that is the same as its current board state, and realizing the foolproof processing of the resource board.

[0051] In some optional implementations, in an embodiment of the present application, step S110 may include: any resource board determines the target location information in the power-on and power-off data based on a preset protocol.

[0052] Among them, the preset protocol includes the information type of each byte mapping, and the information type may include: information header (Header), source address (Source, SRC), destination address, operation instruction (OP), register (Reg), data length (Length), load information (Payload) and cumulative sum.

[0053] Correspondingly, the power-on and power-off data include an information header, a source address, a destination address, an operation instruction, a register, a data length, load information, and a cumulative sum. The operation instruction may be, for example, a power-on operation, a power-off operation, or a read operation, and the specific operation instruction may include a state operation instruction. In the power-on and power-off data, the load information includes the state operation instruction and the register address corresponding to the resource board card that executes the state operation instruction. The data length indicates the length of the power-on and power-off data and the length of the data stream in the load information. The register includes the register address corresponding to the operation instruction. The source address includes the address of the device that sends the power-on and power-off data. For example, when the power-on and power-off data is sent by the host computer of the chip test equipment, the source address includes the address of the host computer; the destination address includes the register address corresponding to the resource board card that receives the power-on and power-off data.

[0054] In one embodiment, a preset protocol can be pre-loaded onto each resource board. The preset protocol also includes information header data corresponding to the information header. The management chip of any resource board can determine the information header of each power-on and power-off data in the power-on and power-off data packet based on the information header data specified in the preset protocol. For each power-on and power-off data, the power-on and power-off data is parsed according to the preset protocol with the information header as the starting point, that is, the information type corresponding to each byte in the power-on and power-off data is determined, the DST in the power-on and power-off data is determined, and the register address included in the DST is determined as the target location information, or the target location information (the register address corresponding to the resource board that executes the status operation instruction) can also be obtained from the load information in the power-on and power-off data.

[0055] In the embodiment of the present application, by specifying the information type of each byte mapping in the preset protocol, the target location information in the power-on and power-off data can be quickly parsed using the preset protocol.

[0056] In some optional implementations, in the embodiment of the present application, before step S120, it may also include: any resource board determines the state operation instruction in the power-on and power-off data based on a preset protocol, and determines the board state setting information based on the state operation instruction.

[0057] In one embodiment, the management chip of any resource board card determines the operation instructions in the power on and off data based on the preset protocol including the information type of each byte mapping, and determines the instructions included in the operation instructions as status operation instructions; or, the management chip of any resource board card determines the load information in the power on and off data based on the preset protocol including the information type of each byte mapping, and obtains the status operation instructions in the load information.

[0058] In the embodiment of the present application, the status operation instructions in the power-on and power-off data can be quickly parsed by utilizing the information type of each byte mapping specified in the preset protocol.

[0059] In some optional implementations, in the embodiment of the present application, before step S110, the following may also be included: any resource board verifies the integrity of the power-on and power-off data, and when it is determined that the power-on and power-off data are complete, executes an operation to obtain the target location information in the power-on and power-off data.

[0060] In one embodiment, the power-on and power-off data also include a cumulative sum, and the cumulative sum in the power-on and power-off data is obtained by accumulating other data in the power-on and power-off data except the cumulative sum. The management chip of any resource board calculates the cumulative sum of the information header, source address, destination address, operation instruction, register, data length and load information in the power-on and power-off data, and determines whether the calculated cumulative sum is consistent with the cumulative sum in the power-on and power-off data. When it is determined that the calculated cumulative sum is consistent with the cumulative sum in the power-on and power-off data, it is determined that the power-on and power-off data are complete. When it is determined that the calculated cumulative sum is inconsistent with the cumulative sum in the power-on and power-off data, it is determined that the power-on and power-off data are incomplete, and the power-on and power-off data are directly discarded without processing.

[0061] In the embodiment of the present application, before processing the power-on and power-off data, the integrity of the power-on and power-off data is first verified to ensure that the processed power-on and power-off data is complete data, thereby ensuring the accuracy of the power-on and power-off data analysis.

[0062] In some optional embodiments, the chip testing equipment may further include a host computer. When the host computer receives a power-on or power-off instruction for sending, the host computer generates power-on and power-off data based on a preset protocol, and sends the power-on and power-off data to each resource board via the serial port of the host computer and the serial port of the slave computer.

[0063] Figure 2 FIG. 1 is a flow chart of a resource board management method provided by another exemplary embodiment of the present application. Figure 2 As shown, the resource board management method also includes the following steps:

[0064] Step S210: The upper computer polls and reads the alarm data packets in the lower computer.

[0065] The chip testing equipment further includes a host computer, which is connected to multiple resource boards. The host computer can be a computing device for controlling the lower computers to test the chip, wafer or integrated circuit to be tested. The computing device can include, for example, a desktop computer, a tablet computer, a laptop computer, a server or a smart phone.

[0066] In one embodiment, the host computer includes a plurality of serial ports, and each serial port on the host computer is connected to a serial port on the lower computer. The host computer can poll a preset number of resource boards once at a preset time interval, and form an alarm data packet based on the alarm data appearing in the preset number of resource boards, and transmit the alarm data packet to the host computer via the serial port of the lower computer and the serial port of the host computer. Exemplarily, the host computer can poll 20 resource boards at an interval of 10ms.

[0067] The alarm data packet includes the alarm data of at least one resource board. The alarm data of each resource board can be generated based on the status data of the resource board. The status data may include, for example, voltage value, current value, temperature value, smoke concentration value, etc. The management chip of the resource board determines whether the operation status of the resource board is abnormal based on the status data, and generates alarm data based on a preset protocol when it is determined that the operation status is abnormal. Exemplarily, when the voltage value (status data) of the resource board is monitored to be abnormal, it can be determined that the operation status of the resource board is abnormal, and the alarm data of the resource board is generated.

[0068] The alarm data can be set according to the information type mapped by each byte in the preset protocol. That is, the alarm data can include: information header, source address, destination address, operation instruction, register, data length, load information and cumulative sum. In the alarm data: the load information can include the register address corresponding to the abnormal status data, and the register address corresponding to the resource board card that generates the alarm data, the operation instruction can include the read operation, the information header can be the information header data in the preset protocol, the source address can include the chamber where the resource board card that generates the alarm data is located, and the register address corresponding to the resource board card, and the destination address can include the address of the host computer.

[0069] Step S220: for each alarm data in the at least one alarm data, the host computer parses the alarm data based on a preset protocol, determines the board information of the alarm resource board, and displays the board information of the alarm resource board.

[0070] The alarm resource board is a resource board that generates alarm data. The board information of the alarm resource board may include the board identification and abnormal status data of the alarm resource board.

[0071] In one embodiment, the preset protocol can be preloaded into the host computer. The host computer can determine the information type (parse) of each byte mapping in the alarm data based on the information type of each byte mapping in the preset protocol to determine the load information in the alarm data, and can obtain the register address corresponding to the resource board card generating the alarm data from the load information, and determine the resource board card corresponding to the register address as the alarm resource board card, determine the board card identification of the alarm resource board card based on the register address, and obtain the abnormal status data based on the register address corresponding to the abnormal status data.

[0072] In the embodiment of the present application, the upper computer polls and displays the alarm data of each resource board in the lower computer, thereby realizing that the alarm data of the resource board can be reported to the upper computer in real time, improving the immediacy of obtaining the alarm data and avoiding delayed reporting.

[0073] Exemplarily, Table 1 shows power-on and power-off data or alarm data, and Table 2 shows SRC or DST.

[0074] Table 1

[0075]

[0076] Table 2

[0077]

[0078]

[0079] Among them, 0xC35A represents the information header data corresponding to the information header, and the information headers of the power-on and power-off data and the alarm data are both 0xC35A. 0xC35A can be queried in the power-on and power-off data packet to determine the information headers of each power-on and power-off data, and 0xC35A can be queried in the alarm data packet to determine the information headers of each alarm data; 0x0 and 0x1 are respectively the codes corresponding to the chambers where the resource board is located. When it is 0x0, it means that the resource board is in the 0th chamber, and when it is 0x1, it means that the resource board is in the 1st chamber. 8'h5, 8'h6, 8'h7, 8'h8 and 8'h9 are all operation codes corresponding to operation instructions. When it is power-on and power-off data, the data stream includes the status operation instruction and the register address corresponding to the resource board that executes the status operation instruction. When it is alarm data, the data stream may include the register address corresponding to the abnormal status data and the register address corresponding to the resource board that generates the alarm data;

[0080] Board represents the resource board, SubTarget represents the register address. In this example, it is assumed that there are 24 resource boards, which are numbered 0 to 23. The value of Board can be any one of 0 to 23. When the value of Board is 1, it represents the resource board numbered 1. When the management chip of the resource board is ARM, the total register address can be represented as 0xA. When the management chip of the resource board is MUC, the total register address can be represented as 0xB. FE represents the specific register address corresponding to the resource board, which can be represented as 0xC. Among them, when it is power-on and power-off data, the information in SRC is replaced with the address of the host computer. When it is alarm data, the information in DST is replaced with the address of the host computer.

[0081] Figure 3 is a flow chart of step S220 provided by an exemplary embodiment of the present application. Figure 3 As shown, step S220 may include the following steps:

[0082] Step S221: the host computer verifies the integrity of the alarm data.

[0083] The alarm data also includes a cumulative sum, and the cumulative sum in the alarm data is obtained by accumulating other data in the alarm data except the cumulative sum.

[0084] In one embodiment, the host computer calculates the cumulative sum of the information header, source address, destination address, operation instruction, register, data length and load information in the alarm data, and determines whether the calculated cumulative sum is consistent with the cumulative sum in the alarm data. When it is determined that the calculated cumulative sum is consistent with the cumulative sum in the alarm data, it is determined that the alarm data has passed the integrity verification; when it is determined that the calculated cumulative sum is inconsistent with the cumulative sum in the power-on and power-off data, it is determined that the alarm data has not passed the integrity verification.

[0085] Step S222, in response to the alarm data passing integrity verification, the host computer determines the address information corresponding to the board information based on a preset protocol.

[0086] The address information corresponding to the board information may include a register address corresponding to the alarm resource board and a register address corresponding to the abnormal status data.

[0087] In one embodiment, the host computer determines the load information in the alarm data based on the information type mapped by each byte in the preset protocol, and obtains the register address corresponding to the alarm resource board from the load information, that is, the register address corresponding to the resource board that generates the alarm data, and the register address corresponding to the abnormal status data, etc. When the alarm data fails the integrity verification, the host computer does not process the alarm data.

[0088] Step S223, determining the board information based on the address information corresponding to the board information and the preset text conversion information.

[0089] The preset text conversion information includes a mapping relationship between a register address and a board identifier. Each resource board has a board identifier, and the board identifier corresponding to the alarm resource board in the address information corresponding to the board information can be determined by using the mapping relationship between the register address and the board identifier in the preset text conversion information. The host computer obtains abnormal status data based on the register address corresponding to the abnormal status data in the address information corresponding to the board information, and the board information is combined with the board identifier of the alarm resource board and the abnormal status data, and displayed.

[0090] Exemplarily, the upper computer can also collect the status data of each resource board through the serial port of the upper computer and the serial port of the lower computer, and generate a log corresponding to each resource board. Each log includes the status data of a resource board and the board identification of the resource board. When the upper computer determines the board information of the alarm data, the board information is updated to the log of the corresponding resource board, and the log is displayed in a flashing red manner on the visual interactive interface. Figure 4 FIG. 1 is a schematic diagram of an alarm page provided by an exemplary embodiment of the present application. Figure 4 The logs corresponding to the 48 resource boards in two chambers (chamber 1 and chamber 2) are displayed. BRVBD represents the log corresponding to the resource board, and the number in front of it represents the number of the resource board. When an abnormality occurs in a resource board, the BRVBD corresponding to the abnormal resource board is displayed in red flashing mode, and the abnormal status data is displayed on the left side of the visual interactive interface.

[0091] In some optional implementations, the resource board management method in the embodiment of the present application may further include:

[0092] In response to monitoring that a new resource board is added to the chip testing device, the host computer updates the mapping relationship between the new register address corresponding to the new resource board and the board identifier into the preset text conversion information.

[0093] The mapping relationship between the new register address and the board identifier includes: the mapping relationship between the register address of the new resource board and the board identifier of the new resource board.

[0094] In one embodiment, the host computer can bind the board identification of the new resource board with the register address of the new resource board to establish a mapping relationship between the register address corresponding to the new resource board and the board identification of the new resource board, and update the mapping relationship to the preset text conversion information.

[0095] In an embodiment of the present application, when a new resource board is added to the chip testing device, it is only necessary to update the mapping relationship between the new register address corresponding to the new resource board and the board identifier to the preset text conversion information to display the corresponding board information, thereby improving the user experience.

[0096] In some optional implementations, each of the multiple resource boards in the embodiments of the present application includes a management chip.

[0097] Correspondingly, the resource board management method in the embodiment of the present application may also include: for multiple resource boards, the management chip of the resource board detects the operating status of the resource board, and when it is determined that the operating status of the resource board is abnormal, generates alarm data for the resource board based on a preset protocol, and in response to the alarm type in the alarm data being a preset alarm type, the management chip controls the resource board to perform a power-off operation.

[0098] The alarm data includes an alarm type. The alarm type may include a prompt alarm or a power-off alarm. The preset alarm type is a power-off alarm.

[0099] For each resource board, the management chip of the resource board can detect the status data of the resource board in real time, and determine whether the operating status of the resource board is abnormal based on the status data. When it is determined that the operating status of the resource board is abnormal, the alarm type can be determined according to the status data, and the alarm data corresponding to the resource board is generated. For example, a corresponding alarm type determination method can be used for different status data. For example, when an abnormal voltage value (status data) is detected, the alarm type can be determined as a power-off alarm; when the temperature value (status data) of the resource board is higher than the first preset temperature threshold and lower than the second temperature threshold, the alarm type is determined to be a prompt alarm, and when the temperature value exceeds the second preset temperature threshold, the alarm type is determined to be a power-off alarm, and the second preset temperature threshold is greater than the first preset temperature threshold.

[0100] For example, Figure 5 FIG. 1 is a flow chart of alarm data generation provided by an exemplary embodiment of the present application. Figure 5 As shown, it may include:

[0101] S1, the management chip detects the IO (Input / Output) value (status data) of the voltage or current output by the analog-to-digital converter (ADC);

[0102] S2, when the IO value interruption output by the ADC is detected, the operation state of the resource board is determined to be abnormal, and the alarm type is determined to be a power-off alarm, the current ADC detection value (sampling value) is saved, the alarm data is generated, and the resource board is controlled to be powered off;

[0103] S3, when the host computer polls the resource board, the alarm data is reported to the host computer;

[0104] S4, the resource board waits for reset (power-on) or the chip test equipment is powered off.

[0105] In one embodiment, the management chip can generate alarm data based on the information type corresponding to each byte in the preset protocol, the register address corresponding to the alarm type can be set in the load information, and the host computer can obtain the alarm type based on the register address corresponding to the alarm type.

[0106] In an embodiment of the present application, a management chip is used to monitor the operating status of the resource board, and when an abnormality occurs in the resource board, alarm data is promptly generated and reported to the host computer, thereby improving the efficiency of alarm data reporting; in addition, when the alarm type is a preset alarm type, the management chip controls the resource board to power off, thereby improving the processing efficiency of the abnormal resource board, and avoiding the situation where the resource board or the chip is damaged due to the resource board being in an abnormal state for a long time.

[0107] Figure 6 FIG. 1 is a schematic diagram of the connection between a resource board and a host computer provided by an exemplary embodiment of the present application. Figure 6 As shown, the chip testing equipment includes a host computer and a slave computer, the host computer runs the management method of the resource board in the above embodiment, and the slave computer includes multiple resource boards, and the multiple resource boards can be arranged in two chambers (chamber), respectively chamber 1 (chamber1) and chamber 2 (chamber2), each chamber is provided with 24 resource boards (slots), each chamber corresponds to a serial port, and the 24 resource boards in each chamber communicate with the host computer through the serial port corresponding to the chamber, and the host computer is provided with two serial ports, and each serial port on the host computer is connected to the serial port corresponding to the chamber. The host computer can communicate with the multiple resource boards using the recommended standard 485 (RS485). Between the host computer and the multiple resource boards, the host computer is the master device, and the multiple resource boards are slave devices.

[0108] Figure 7 1 is a structural block diagram of a resource board management device provided by an exemplary embodiment of the present application. The resource board management device is applied to a chip testing device, the chip testing device includes a plurality of resource boards, and the resource board management device includes:

[0109] A first parsing module 310 is configured to, in response to receiving a power-on and power-off data packet, obtain, for each power-on and power-off data in the power-on and power-off data packet, target location information in the power-on and power-off data by any resource board of the plurality of resource boards;

[0110] A first judgment module 320 is used for, in response to the target location information being consistent with the location information of any resource board, for any resource board to determine whether the board state setting information of any resource board is consistent with the current board state information, wherein both the board state setting information and the current board state information include a power-on state or a power-off state, and the board state setting information is the state information of the resource board after executing the state operation instruction in the power-on and power-off data;

[0111] The power-on and power-off module 330 is used for causing any resource board to execute the status operation instruction in response to the board status setting information being inconsistent with the current board status information.

[0112] In some optional implementations, the first parsing module 310 is specifically used for any resource board to determine the target location information in the power-on and power-off data based on a preset protocol, and the preset protocol includes information types mapped by each byte.

[0113] In some optional implementations, the resource board management device further includes:

[0114] The second parsing module is used for any resource board to determine the state operation instruction in the power-on and power-off data based on a preset protocol, and to determine the board state setting information based on the state operation instruction.

[0115] In some optional implementations, the resource board management device further includes:

[0116] The verification module is used for any resource board to verify the integrity of the power-on and power-off data, and when it is determined that the power-on and power-off data is complete, to execute the operation of obtaining the target location information in the power-on and power-off data.

[0117] In some optional implementations, the chip testing device further includes a host computer, and the host computer is in communication connection with the plurality of resource boards. The resource board management device further includes:

[0118] A polling module, used for the upper computer to poll and read the alarm data packet in the lower computer, wherein the alarm data packet includes the alarm data of at least one resource board;

[0119] The alarm data determination module is used for analyzing each alarm data in the at least one alarm data based on a preset protocol by the host computer, determining the board information of the alarm resource board, and displaying the board information of the alarm resource board.

[0120] In some optional implementations, the alarm data determination module includes:

[0121] A verification submodule, used for the host computer to verify the integrity of the alarm data;

[0122] A parsing submodule, configured to, in response to the alarm data passing integrity verification, determine, by the host computer, address information corresponding to the board information based on the preset protocol;

[0123] The information determination submodule is used to determine the board information based on the address information corresponding to the board information and the preset text conversion information.

[0124] In some optional implementations, the resource board management device further includes:

[0125] A registration module is used for responding to monitoring the addition of a new resource board in the chip testing device, and the host computer updates the mapping relationship between the new register address corresponding to the new resource board and the board identifier to the preset text conversion information, wherein the mapping relationship between the new register address and the board identifier includes the mapping relationship between the register address of the new resource board and the board identifier of the new resource board.

[0126] In some optional implementations, each of the plurality of resource boards includes a management chip, and the device further includes:

[0127] An alarm detection module is used for the management chip of the resource board to detect the operating status of the resource board for the multiple resource boards, and when it is determined that the operating status of the resource board is abnormal, to generate alarm data of the resource board based on the preset protocol, wherein the alarm data includes an alarm type; in response to the alarm type being a preset alarm type, the management chip controls the resource board to perform a power-off operation.

[0128] The resource board management device of the embodiment of the present application corresponds to the embodiment of the resource board management method of the present application, and the relevant contents can be referenced to each other and will not be repeated here.

[0129] The beneficial technical effects corresponding to the exemplary embodiment of the resource board management device of the embodiment of the present application can be found in the corresponding beneficial technical effects of the above-mentioned corresponding exemplary method part, which will not be repeated here.

[0130] In addition, an embodiment of the present application further provides an electronic device, including:

[0131] Memory for storing computer programs;

[0132] The processor is used to execute the computer program stored in the memory, and when the computer program is executed, the resource board management method described in any of the above embodiments of the present application is implemented.

[0133] Figure 8 This is a schematic diagram of the structure of an application embodiment of the electronic device of the present application. Figure 8 The electronic device according to the embodiment of the present application is described. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the collected input signal from them.

[0134] like Figure 8 As shown, the electronic device includes one or more processors and memory.

[0135] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0136] The memory may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor may execute the program instructions to implement the resource board management method of each embodiment of the present application described above and / or other desired functions.

[0137] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0138] In addition, the input device may also include, for example, a keyboard, a mouse, and the like.

[0139] The output device can output various information to the outside, including the determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0140] Of course, to simplify, Figure 8 Only some of the components in the electronic device related to the present application are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, the electronic device may further include any other appropriate components according to specific application conditions.

[0141] In addition to the above-mentioned methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the resource board management method according to various embodiments of the present application described in the above part of this specification.

[0142] The computer program product may be written in any combination of one or more programming languages ​​to write program codes for performing the operations of the embodiments of the present application, including object-oriented programming languages, such as Java, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as an independent software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0143] In addition, an embodiment of the present application may also be a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by a processor, the processor executes the steps of the resource board management method according to various embodiments of the present application described in the above part of this specification.

[0144] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0145] A person of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: ROM, RAM, magnetic disk or optical disk, etc., various media that can store program codes.

[0146] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.

[0147] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0148] The block diagrams of the devices, apparatuses, equipment, and systems involved in this application are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.

[0149] The method and apparatus of the present application may be implemented in many ways. For example, the method and apparatus of the present application may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of steps for the method is for illustration only, and the steps of the method of the present application are not limited to the order specifically described above, unless otherwise specifically stated. In addition, in some embodiments, the present application may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present application. Therefore, the present application also covers a recording medium storing a program for executing the method according to the present application.

[0150] It should also be noted that in the apparatus, device and method of the present application, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present application.

[0151] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0152] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A resource board management method, characterized in that: Applied to a chip testing device, the chip testing device includes a plurality of resource boards, and the method includes: In response to receiving the power-on and power-off data packet, any resource board card among the plurality of resource boards acquires target location information in the power-on and power-off data for each power-on and power-off data in the power-on and power-off data packet; In response to the target location information being consistent with the location information of any resource board, the any resource board determines whether the board state setting information of the any resource board is consistent with the current board state information, the board state setting information and the current board state information both including a power-on state or a power-off state, the board state setting information being the state information of the resource board after executing the state operation instruction in the power-on and power-off data; In response to the board state setting information being inconsistent with the current board state information, any one of the resource boards executes the state operation instruction.

2. The method according to claim 1, characterized in that Any one of the plurality of resource boards obtains the target location information in the power-on and power-off data, including: Any resource board determines the target location information in the power-on and power-off data based on a preset protocol, and the preset protocol includes information types mapped by each byte.

3. The method according to claim 1 or 2, characterized in that: Before any resource board determines whether the board state setting information of any resource board is consistent with the current board state information, the method further includes: The any resource board determines the state operation instruction in the power-on and power-off data based on a preset protocol, and determines the board state setting information based on the state operation instruction.

4. The method according to any one of claims 1 to 3, characterized in that: Before any one of the plurality of resource boards obtains the target location information in the power-on and power-off data, the method further includes: Any one of the resource boards verifies the integrity of the power-on and power-off data, and when it is determined that the power-on and power-off data are complete, performs an operation of acquiring the target location information in the power-on and power-off data.

5. The method according to any one of claims 1 to 4, characterized in that: The chip testing device further includes a host computer, the host computer is communicatively connected with the plurality of resource boards, and the method further includes: The upper computer polls and reads the alarm data packet in the lower computer, wherein the alarm data packet includes the alarm data of at least one resource board; For each alarm data in the at least one alarm data, the host computer parses the alarm data based on a preset protocol, determines the board information of the alarm resource board, and displays the board information of the alarm resource board.

6. The method according to claim 5, characterized in that The host computer analyzes the alarm data based on a preset protocol, including: The host computer verifies the integrity of the alarm data; In response to the alarm data passing integrity verification, the host computer determines address information corresponding to the board information based on the preset protocol; The board information is determined based on the address information corresponding to the board information and preset text conversion information.

7. The method according to claim 5 or 6, characterized in that: Also includes: In response to monitoring the addition of a new resource board in the chip testing device, the host computer updates the mapping relationship between the new register address corresponding to the new resource board and the board identifier to the preset text conversion information, and the mapping relationship between the new register address and the board identifier includes the mapping relationship between the register address of the new resource board and the board identifier of the new resource board.

8. The method according to any one of claims 5 to 7, characterized in that: Each of the plurality of resource boards includes a management chip, and the method further includes: For the multiple resource boards, the management chip of the resource board detects the running status of the resource board, and when determining that the running status of the resource board is abnormal, generates alarm data of the resource board based on the preset protocol, wherein the alarm data includes an alarm type; In response to the alarm type being a preset alarm type, the management chip controls the resource board to perform a power-off operation.

9. A resource board management device, characterized in that: Applied to a chip testing device, the chip testing device includes a plurality of resource boards, and the device includes: A first parsing module is configured to, in response to receiving a power-on and power-off data packet, obtain, for each power-on and power-off data in the power-on and power-off data packet, target location information in the power-on and power-off data by any resource board of the plurality of resource boards; A first judgment module is used for, in response to the target location information being consistent with the location information of any resource board, the any resource board determining whether the board state setting information of the any resource board is consistent with the current board state information, the board state setting information and the current board state information both including a power-on state or a power-off state, the board state setting information being the state information of the resource board after executing the state operation instruction in the power-on and power-off data; The power-on and power-off module is used for causing any resource board to execute the status operation instruction in response to the inconsistency between the board status setting information and the current board status information.

10. An electronic device, characterized in that: include: Memory for storing computer programs; The processor is used to execute the computer program stored in the memory, and when the computer program is executed, the resource board management method described in any one of claims 1 to 8 is implemented.

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