Multi-device Joint Simulation Method, Computer Device, Storage Device

Abstract

Embodiments of the present disclosure disclose a multi-device joint simulation method, a computer device, and a storage device. Among them, the method includes: constructing a data flow directed graph based on the obtained device information; constructing a netlist based on each directed edge in the data flow directed graph and the point information of each node; obtaining the trigger timing of the device to be simulated, and constructing a time linked list based on the data flow directed graph and the trigger timing; obtaining the causal relationship data of the nodes based on the netlist and the time linked list, and updating the actual advancement time of the nodes and the advancement clock value of the simulation system; when the causal relationship data is obtained, updating the time linked list; sequentially calling each node for calculation according to the causal relationship data, the actual advancement time, the advancement clock value, and the new time linked list until the preset simulation end condition is met. This method can perform parallel scheduling of simulation devices based on the componentized nodes defined by the netlist, and solves the problems of simulation data synchronization and calculation efficiency of complex fine-grained components.

Description

Technical Field

[0001] The present disclosure relates to the field of digital simulation technology, and in particular, to a multi-device joint simulation method, a computer device, and a storage device. Background Art

[0002] The digital simulation method is an important means for carrying out scientific research, data analysis, and process deduction. With the continuous deepening of research, it is necessary to construct a hierarchical system or a more complex network structure to describe and analyze the processing process and operation mechanism of complex problems. Especially in the drills of relevant departments, such as the simulation training of radar equipment, a more fine-grained description is required. However, with the refinement of the basic model, the model complexity increases, there are feedback loops with different depths between nodes, and the signal flow graphs of models between different equipment are significantly different. The simulation granularity and signal flow relationship between different devices are complex, there is data coupling between the internal processing processes of electronic equipment, and it is difficult to synchronize data under different processing clocks. These problems lead to a decline in the accuracy and reliability of the simulation model, affecting the simulation effect and training quality. Summary of the Invention

[0003] In view of this, the embodiments of the present disclosure provide a multi-device joint simulation method, a computer device, and a storage device, which can perform parallel scheduling of simulation devices based on componentized nodes defined by a netlist, and solve the problems of simulation data synchronization and calculation efficiency of complex fine-grained components.

[0004] In a first aspect, the embodiments of the present disclosure provide a multi-device joint simulation method, adopting the following technical solutions:

[0005] Obtain the device information of multiple devices to be simulated;

[0006] Construct a data flow directed graph based on the device information, where the data flow directed graph is composed of nodes representing each device to be simulated and directed edges representing the data flow relationship;

[0007] Construct a netlist based on each directed edge in the data flow directed graph and the point information of each node;

[0008] Obtain the trigger timing of the device to be simulated, and construct a time linked list based on the data flow directed graph and the trigger timing;

[0009] Based on the netlist and the time linked list, obtain the causal relationship data of the nodes, and update the actual advancement time of the nodes and the advancement clock value of the simulation system;

[0010] When the causal relationship data between all nodes is obtained, update the time linked list;

[0011] Call each node for calculation in sequence according to the causal relationship data, the actual advancement time, the advancement clock value, and the new time linked list until the preset simulation end condition is met.

[0012] Optionally, the expression of the netlist is:

[0013] N{n(i,k,j,m)|i,j∈I,k∈K,m∈M};

[0014] Wherein, N represents the netlist; n(·) represents the connection function, n ∈ N; i, j represent nodes; k represents the output port; m represents the input port; I represents the set of nodes; K represents the set of output ports; M represents the set of input ports; when n(i,k,j,m) = 1, it means that the k-th output port of the i-th node transfers data to the m-th input port of the j-th node; when n(i,k,j,m) = 0, it means that the k-th output port of the i-th node does not transfer data to the m-th input port of the j-th node.

[0015] Optionally, obtaining the trigger timing of the device to be simulated and constructing a time linked list based on the data flow directed graph and the trigger timing includes:

[0016] Construct a multi-way tree based on the data flow directed graph;

[0017] Traverse all paths of the multi-way tree to determine whether there is an algebraic loop structure in the current path;

[0018] If so, set the input port attribute of the node with the algebraic loop structure to the slave port;

[0019] If not, set the input port attribute of the nodes included in the current path to the master port;

[0020] Construct a time-triggered event list based on the input port attribute and the trigger timing, where the time-triggered event list includes events and the time stamps of the events;

[0021] Obtain the time stamps for the state update of each node based on the simulation step size of each node;

[0022] Merge the time stamps in the time-triggered event list with the time stamps for the state update of each node into a time stamp set;

[0023] Traverse the time stamp set in chronological order and generate multiple node trigger parameters in the traversal order, where the node trigger parameters include time stamps and the nodes participating in the calculation at the time stamps;

[0024] Store the node trigger parameters into a preset empty linked list to generate a time linked list.

[0025] Optionally, obtaining the causal relationship data of nodes based on the netlist and the time linked list, and updating the actual advancement time of the nodes and the advancement clock value of the simulation system includes:

[0026] Record the timing value of a preset time calculator, and the timing value is initially 0;

[0027] Select nodes from the time linked list based on the timing value and make calls;

[0028] Update the actual advancement time based on the netlist and the called nodes;

[0029] Record the causal relationship data of the called nodes;

[0030] Update the timing value, and based on the new timing value, re-call new nodes from the time linked list and update the advancement clock value until all nodes in the time linked list are called at least once;

[0031] Wherein, the causal relationship data includes at least one of a predecessor node, predecessor data, successor node, connection relationship with the predecessor node and successor node, calculation result, and calculation resource allocation result.

[0032] Optionally, updating the actual advancement time based on the netlist and the called nodes includes:

[0033] Based on the netlist, determine whether the called node has a predecessor node;

[0034] If not, update the actual advancement time of the called node, and the called node performs calculations;

[0035] If so, determine whether the called node meets the preset advancement condition;

[0036] If it meets, determine that the predecessor node has prepared the predecessor data, and the called node performs calculations based on the prepared predecessor data;

[0037] Update the actual advancement time of each node based on the first preset function, the second preset function, and the current advancement clock value of the simulation system;

[0038] If it does not meet, determine that the predecessor node has not prepared the predecessor data, and the called node does not perform calculations;

[0039] Update the actual advancement time of each node based on the second preset function, the third preset function, and the current advancement clock value of the simulation system.

[0040] Optionally, the expression of the preset advancement condition is:

[0041]

[0042] Among them, r represents the predecessor node of the called node; t(r) represents the actual advancement time of the predecessor node; u represents the called node; q(u) represents the simulation step size of the u-th node; k represents the output port; m represents the input port; n(r,k,u,m)=1 indicates that the k-th output port of the r-th node transfers data to the m-th input port of the u-th node; I represents the node set; I represents the node set; K represents the output port set; p(u,k)=1 indicates that the attribute of the k-th output port of the u-th node is the main port; ∩ represents and.

[0043] Optionally, the expression of the first preset function is:

[0044] o′(x)=o(x)-(time1 - time2 - q(x));

[0045] Among them, x represents the active node, and the active node includes the called node and the predecessor node; o′(x) represents the updated time offset of the active node; o(x) represents the time offset of the active node before update; time1 represents the time scale currently used by the time linked list; time2 represents the time scale used by the time linked list last time; q(x) represents the simulation step size of the active node;

[0046] The expression of the second preset function is:

[0047] o′(y)=o(y)+(time1 - time2);

[0048] Among them, y represents the inactive node, and the inactive node includes nodes other than the called node and the predecessor node; o′(y) represents the updated time offset of the inactive node; o(y) represents the time offset of the inactive node before update;

[0049] The expression of the third preset function is:

[0050] o′(x)=o(x)+(time1 - time2).

[0051] Optionally, the updating of the timing value includes:

[0052] Adding the current timing value to the preset period value to obtain a new timing value;

[0053] The updating of the advancement clock value includes:

[0054] Setting the time scale of the newly called node to the new advancement clock value.

[0055] Optionally, the preset simulation end condition includes:

[0056] The actual advancement time of each node is greater than the preset simulation cutoff time.

[0057] Second, the embodiments of the present disclosure also provide a multi-device joint simulation system, adopting the following technical solutions:

[0058] An information acquisition module, configured to acquire device information of multiple devices to be simulated;

[0059] A directed graph construction module, configured to construct a data flow directed graph based on the device information, where the data flow directed graph is composed of nodes representing each device to be simulated and directed edges representing data flow relationships;

[0060] A netlist construction module, configured to construct a netlist based on each directed edge in the data flow directed graph and the point information of each node;

[0061] A linked list construction module, configured to obtain the trigger timing of the device to be simulated and construct a time linked list based on the data flow directed graph and the trigger timing;

[0062] A system startup module, configured to obtain causal relationship data of nodes based on the netlist and the time linked list, and update the actual advancement time of the nodes and the advancement clock value of the simulation system;

[0063] A linked list update module, configured to update the time linked list after all the causal relationship data between nodes is obtained;

[0064] A sequential call module, configured to sequentially call each node for calculation according to the causal relationship data, the actual advancement time, the advancement clock value, and the new time linked list until a preset simulation end condition is met.

[0065] Third, the embodiments of the present disclosure also provide a computer device, adopting the following technical solutions:

[0066] YY+242341P-YX

[0067] The computer device includes:

[0068] At least one processor; and,

[0069] A memory communicatively connected to the at least one processor; wherein,

[0070] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute any one of the above multi-device joint simulation methods.

[0071] Fourthly, embodiments of the present disclosure further provide a computer-readable storage medium storing computer instructions for causing a computer to execute the multi-device joint simulation method described in any one of the above.

[0072] Fifthly, embodiments of the present disclosure further provide a computer program product including computer programs / instructions which, when executed by a processor, implement the steps of the method described in any one of the above.

[0073] The multi-device joint simulation method provided by the embodiments of the present disclosure can comprehensively understand the hardware and software characteristics of the devices to be simulated by obtaining device information, providing accurate basic data for the subsequent construction of the data flow directed graph. The construction of the data flow directed graph makes the data flow relationship between nodes clearly visible, facilitating the understanding and analysis of the interaction logic between devices, and providing structured data support for the subsequent construction of the netlist and the time linked list. The construction of the netlist digitizes the logical relationship of the data flow directed graph, facilitating the calculation and scheduling of the simulation system and improving the accuracy and efficiency of the simulation. The construction of the time linked list combines the device trigger timing and the data flow directed graph, ensuring the correct time sequence of node operations during the simulation process, avoiding logical errors in time, and improving the real-time performance and accuracy of the simulation. In the startup phase of the simulation system, by obtaining the causal relationship data of the nodes and updating the actual advancement time, the simulation system can accurately capture the causal relationship between the simulation devices, clarify the simulation call order, ensure that the time advancement during the simulation process is consistent with the actual device operations, and improve the precision and reliability of the simulation. Updating the time linked list ensures the accuracy of the operation sequence and time advancement of the simulation system at different time points, providing a basis for node calls in the next round of simulation and avoiding simulation errors caused by inaccurate time linked lists. Then, based on the obtained causal relationship data, the time required for the simulation, and the call order provided by the new time linked list, nodes can be sequentially called for calculation in the simulation loop, and the simulation system can perform the simulation according to the preset logic and time sequence until the preset simulation end condition is met, ending the simulation. This method improves the precision and reliability of the simulation, ensures the correctness of time and logic during the simulation process, thereby improving the accuracy of the simulation results, and realizing an efficient and accurate simulation process.

[0074] The above description is only an overview of the technical solutions of the present disclosure. In order to understand the technical means of the present disclosure more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present disclosure more obvious and understandable, the following preferred embodiments are specifically given and described in detail in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0076] Figure 1 Flow diagram of the multi-device joint simulation method provided by the embodiments of the present disclosure;

[0077] Figure 2 Schematic diagram of the data flow directed graph provided by the embodiments of the present disclosure;

[0078] Figure 3 Flow diagram of the time linked list construction method provided by the embodiments of the present disclosure;

[0079] Figure 4 Schematic diagram of the multi-way tree provided by the embodiments of the present disclosure;

[0080] Figure 5 Flow diagram of the operation method in the startup phase of the simulation system provided by the embodiments of the present disclosure;

[0081] Figure 6 Flow diagram of the actual advancement time update method provided by the embodiments of the present disclosure;

[0082] Figure 7 Principle block diagram of the multi-device joint simulation system provided by the embodiments of the present disclosure;

[0083] Figure 8 Schematic diagram of the structure of a computer device provided by the embodiments of the present disclosure. Specific embodiments

[0084] The following will describe the embodiments of the present disclosure in detail with reference to the drawings.

[0085] It should be clear that the following illustrates the implementation manners of the present disclosure through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. Obviously, the described embodiments are only some embodiments of the present disclosure, rather than all embodiments. The present disclosure can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present disclosure without creative efforts belong to the scope of protection of the present disclosure.

[0086] Note that the following description relates to various aspects of embodiments within the scope of the appended claims. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on this disclosure, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of the aspects set forth herein can be used to implement an apparatus and / or practice a method. Additionally, this apparatus and / or method can be implemented using other structures and / or functionality in addition to one or more of the aspects set forth herein.

[0087] It should also be noted that the diagrams provided in the following embodiments merely illustrate the basic concept of the present disclosure schematically. Only the components related to the present disclosure are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0088] In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the aspects described herein can be practiced without these specific details.

[0089] Referring to Figure 1 , the present disclosure provides a multi-device joint simulation method, including the following steps:

[0090] S1: Obtain device information of multiple devices to be simulated;

[0091] S2: Construct a data flow directed graph based on the device information, where the data flow directed graph consists of nodes representing each device to be simulated and directed edges representing data flow relationships;

[0092] S3: Construct a netlist based on each directed edge and the point information of each node in the data flow directed graph;

[0093] S4: Obtain the trigger timing of the device to be simulated, and construct a time linked list based on the data flow directed graph and the trigger timing;

[0094] S5: Based on the netlist and the time linked list, obtain the causal relationship data of the nodes, and update the actual advancement time of the nodes and the advancement clock value of the simulation system;

[0095] S6: When the causal relationship data between all nodes is obtained, update the time linked list;

[0096] S7: Sequentially call each node for calculation according to the causal relationship data, actual advancement time, advancement clock value, and the new time linked list until the preset simulation end condition is met.

[0097] In the multi-device joint simulation method of the present disclosure, by obtaining device information, the hardware and software characteristics of the devices to be simulated can be comprehensively understood, providing accurate basic data for the subsequent construction of the data flow directed graph. The construction of the data flow directed graph makes the data flow relationship between nodes clearly visible, facilitating the understanding and analysis of the interaction logic between devices, and providing structured data support for the subsequent netlist construction and time linked list construction. The construction of the netlist digitalizes the logical relationship of the data flow directed graph, facilitating the calculation and scheduling of the simulation system, and improving the accuracy and efficiency of the simulation. The construction of the time linked list combines the device trigger timing and the data flow directed graph, ensuring the correct time sequence of node operations during the simulation process, avoiding logical errors in time, and improving the real-time performance and accuracy of the simulation. In the startup phase of the simulation system, by obtaining the causal relationship data of the nodes and updating the actual advancement time, the simulation system can accurately capture the causal relationship between the simulation devices, clarify the simulation call order, ensure that the time advancement during the simulation process is consistent with the actual device operations, and improve the accuracy and reliability of the simulation. Updating the time linked list ensures the accuracy of the operation sequence and time advancement of the simulation system at different time points, providing a basis for node calls in the next round of simulation, and avoiding simulation errors caused by inaccurate time linked lists. Then, based on the obtained causal relationship data, the time required for the simulation, and the call order provided by the new time linked list, nodes can be sequentially called for calculation in the simulation loop. The simulation system can perform the simulation according to the preset logic and time sequence until the preset simulation end condition is met, ending the simulation. This method improves the accuracy and reliability of the simulation, ensures the correctness of time and logic during the simulation process, thereby improving the accuracy of the simulation results, and realizing an efficient and accurate simulation process.

[0098] In S1, obtain the simulation blueprint, and based on this blueprint, collect in detail the information of each device that needs to participate in the simulation, that is, the various attributes of the devices to be simulated, including key data such as device name, type, interface standard, communication protocol, and time characteristics. Organize and store this information in a unified data format for subsequent processing and analysis.

[0099] In S2, a data flow directed graph is constructed using the idea of component-based modeling. Here, component-based means decomposing a complex system into several independent and reusable components, which are the "components". In the multi-device joint simulation method of the present disclosure, component-based means treating each device to be simulated as an independent component to simplify the complexity of the model, improve the flexibility and maintainability of the model. Specifically, in a graphical and wired manner, these devices to be simulated are componentized, and a topology graph of the signal flow between components is clearly constructed. This step helps to intuitively understand the data interaction relationship between devices and provides a solid foundation for subsequent simulation experiments. In a specific scenario, a complete data flow directed graph is constructed based on these components and their signal flow relationships. Refer to Figure 2 the schematic diagram of the data flow directed graph shown, the data flow directed graph is composed of nodes and directed edges. Each node represents a device to be simulated, such as Figure 2 A-L in Figure 2 while the directed edges clearly indicate the direction and path of the data flow, such as the arrow direction in

[0100]

[0101] N{n(i,k,j,m)|i,j∈I,k∈K,m∈M}; (Formula 1)

[0102] In Formula 1, N represents the netlist; n(·) represents the connection function, n ∈ N; i and j represent nodes. Here, i and j are set for facilitating the display of the connection relationship between nodes. Since there is a situation where a node returns data to itself, node i and node j can represent two different nodes or the same node; k represents the output port; m represents the input port; I represents the set of nodes; K represents the set of output ports; M represents the set of input ports; when n(i,k,j,m) = 1, it means that the k-th output port of the i-th node transfers data to the m-th input port of the j-th node, and there is a connection relationship between the k-th output port of the i-th node and the m-th input port of the j-th node; when n(i,k,j,m) = 0, it means that the k-th output port of the i-th node does not transfer data to the m-th input port of the j-th node, and there is no connection relationship between the k-th output port of the i-th node and the m-th input port of the j-th node.

[0103] In S4, before the simulation starts, the configuration work of the nodes is carried out, including setting the simulation time and the simulation parameters of each node. Among them, the simulation time includes the simulation start time T0 and the simulation end time T end , and the simulation parameters include the simulation step size. The simulation step sizes of each node are combined into a simulation step size set, and the expression of the simulation step size set is as follows:

[0104] Q{q(l)∈R + |l∈I}; (Formula 2)

[0105] In Formula 2, Q represents the simulation step size set; l represents a node. Here, l can represent any one of all nodes, which is set for the convenience of referring to all nodes; q(l) represents the simulation step size of the l-th node; R + represents the set of positive real numbers.

[0106] Set the actual advancement time of each node. The expression of the actual advancement time is t(l), and the initial value of the actual advancement time is set to 0, that is, t(l)=0. Determine whether each node has a predecessor node according to the netlist. A predecessor node is a node that transmits data to the current node, that is, a node that completes calculations and outputs data earlier than the current node during the simulation process. Set a predecessor data indication parameter for each node with a predecessor node. The expression of the predecessor data indication parameter is a(l), and this parameter is used to indicate whether the predecessor data of the current node is ready. Initially, the predecessor data indication parameter is set to 0, that is, a(l)=0, indicating that the predecessor data is not ready yet. Among them, the predecessor data refers to the data generated by the predecessor node and transmitted to the current node as the input data of the current node, and the current node needs to rely on the predecessor data to execute.

[0107] The configuration work of the nodes also includes constructing a time linked list. Referring to Figure 3 the flow schematic diagram of the time linked list construction method shown, "obtaining the trigger timing of the device to be simulated and constructing a time linked list based on the data flow directed graph" includes the following steps:

[0108] S41: Based on the data flow directed graph, construct a multi-way tree, traverse all paths of the multi-way tree, and record the currently traversed path as the current path;

[0109] S42: Determine whether there is an algebraic loop structure in the current path; if so, execute S43; if not, execute S44;

[0110] S43: Set the input port attribute of the node with the algebraic loop structure to the slave port;

[0111] S44: Set the input port attribute of the nodes included in the current path to the master port;

[0112] S45: Construct a time-triggered event list based on the input port attributes and trigger timing;

[0113] S46: Obtain the time stamps for the status updates of each node based on the simulation step sizes of the respective nodes;

[0114] S47: Merge the time stamps in the time-triggered event list with the time stamps for the status updates of each node into a time stamp set;

[0115] S48: Traverse the time stamp set in chronological order and generate multiple node trigger parameters in the traversal order;

[0116] S49: Store the node trigger parameters in a preset empty linked list to generate a time linked list.

[0117] In S41 - S44, the data flow directed graph is two-dimensional, and it is more convenient to construct a multi-way tree based on this two-dimensional graph. Refer to Figure 4 the schematic diagram of the multi-way tree shown. Similar to the structural principle of the data flow directed graph, the multi-way tree is composed of nodes and branches. Each node in the multi-way tree represents a device to be simulated, and each branch represents the connection between the devices to be simulated.

[0118] Refer to Figure 4 the path of A→B→N→B in [reference]. Among them, B→N→B constitutes an algebraic loop structure. The algebraic loop structure means that the starting point and the ending point of the current path are the same node, and the other nodes in this path do not repeat, that is, there is a loop situation. If the data flow directed graph is directly used for simulation, the loop situation in the data flow directed graph may cause the simulation system (also known as the simulation engine) to fall into an infinite loop, resulting in simulation errors or even the collapse of the simulation system. Therefore, by converting the data flow directed graph into a multi-way tree, splitting the loop structure into a sequential structure, and then through the differentiated setting of the input port attributes of each node, the simulation system can clearly identify the data flow direction, solve the problem of infinite loops, and facilitate the execution of the simulation.

[0119] To facilitate recording the input port attributes of each node, construct and initialize an attribute matrix. The expression of the attribute matrix is as follows:

[0120] P = p(i,k), i ∈ I, k ∈ K; (Formula 3)

[0121] In Formula 3, P represents the attribute matrix; p(i,k) is an attribute parameter, representing the attribute of the k-th output port of the i-th node.

[0122] Initialize each attribute parameter in the attribute matrix to 1, i.e., p(i,k) = 1. When detecting whether there is an algebraic loop structure in the current path, modify the attribute parameter corresponding to the node with the algebraic loop structure to 0, i.e., p(i,k) = 0. After all paths of the multi-way tree are traversed, the values of each attribute parameter in the attribute matrix will also be determined accordingly. At this time, for the i-th node, if p(i,k) = 1, it means that the k-th output port attribute of the i-th node is the main port; if p(i,k) = 0, it means that the k-th output port attribute of the i-th node is the slave port. For example, in Figure 4 the attribute of the input port where node B receives data from node N is defined as the slave port; if p(i,k) is neither equal to 1 nor equal to 0, it means that the k-th output port does not belong to the i-th node.

[0123] Through the attribute matrix with determined values, the simulation system can read the input port attributes of each node more quickly.

[0124] In S45, the trigger timing refers to the timing when the device to be simulated triggers each event during the simulation process. Based on the trigger timing of the device to be simulated, obtain the time stamps (which can also be called trigger times or start times) of each event, where the event refers to the service behavior of the node. Based on the input port attributes, clarify the data flow directions of each node, and then sort each event according to the data flow directions of each node. Based on the sorting result, combine the event with its corresponding time stamp into an event trigger parameter, and these event trigger parameters form the time-triggered event list. The expression of the time-triggered event list is as follows:

[0125] E{e(time,event)}; (Formula 4)

[0126] In Formula 4, E represents the time-triggered event list; e(·) represents the event trigger parameter, which is a two-dimensional structure; time represents the time stamp of the event; event represents the event.

[0127] In S46, store relevant data such as the netlist, simulation time, simulation parameters, actual advancement time, predecessor data indication parameter, attribute matrix, and time-triggered event list into a preset file to generate a scenario description file. Transmit the scenario description file to the simulation system, and the simulation system imports the relevant data according to the scenario description file to provide data support for the subsequent node simulation work.

[0128] In the preparation stage of the simulation work by the simulation system (which can also be called the initialization stage of the simulation system), the simulation system first parses the netlist in the scenario description file. According to the node information and the connection relationships between the nodes provided by the netlist, it provides memory space for the nodes that require precursor data, that is, it applies for and initializes the port data cache space for data transmission between the nodes to prepare for the subsequent simulation process and ensure the accuracy and consistency of data transmission. Specifically, for nodes that do not require precursor data, the simulation system does not need to set a buffer for them, and the default memory space provided for them is 0; for nodes that require precursor data, the simulation system will set a memory for them, predict the memory value occupied by the precursor data, and allocate a memory space of the corresponding size for the memory of the node according to this value. This memory space can be regarded as existing between two nodes with a connection relationship. After the precursor node generates the precursor data, it can directly store the precursor data into the corresponding memory space, so as to facilitate the subsequent connected nodes to quickly access these precursor data. These memory spaces constitute the port data cache space, and the expression of the port data cache space is as follows:

[0129]

[0130] In Formula 5, S represents the port data cache space; s(·) represents the memory space indication function; s(i,k,j,m) represents the memory space size provided by the m-th input port of the j-th node for the precursor data to be generated by the k-th output port of the i-th node.

[0131] After allocating the memory space, the simulation system calls the initialization functions of each model to load all the models that need to participate in the simulation. These models can be physical models, behavioral models, environmental models, etc. They define the nodes and the behaviors of the nodes in the simulation and provide a basic simulation environment. After the simulation environment is deployed, the simulation system completes the parameter initialization work of each node based on the scenario description file, including reading the simulation step length of each node. In actual processing, a certain node may forget to set the simulation step length or lose the simulation step length of individual nodes during data transmission. Therefore, when there is no feedback on the simulation step length of the node, it is processed according to the system default value to enable the node to have a new simulation step length.

[0132] According to the simulation step length of the node, calculate in advance the time scale for the state update of the node. For example, if the simulation step length of the node is 1 second, the node will update its state at time points such as the 1st second, the 2nd second, and the 3rd second.

[0133] In S47 - S49, the time stamps in the time - triggered event list are merged with the time stamps calculated by each node based on the simulation step size to form a unified set of time stamps. First, create an empty linked list, and then traverse each time stamp in the set of time stamps in chronological order. For each time stamp, determine the nodes that need to participate in the calculation at that time stamp. Among them, the nodes participating in the calculation include two types. One is the nodes that execute events; the other is the nodes that need to update their states determined according to the simulation step size, and these nodes include those models that need to update their states regularly, such as physical simulations, control logics, etc. Combine each time stamp with the nodes participating in the calculation at that time stamp to form a node trigger parameter (i.e., an entry). Store the generated node trigger parameters into the empty linked list in sequence to generate a time linked list.

[0134] For example, two events obtained from the time - triggered event list are Event 1 and Event 2 respectively. The time stamp of Event 1 is 1 second, and this event involves Node A; the time stamp of Event 2 is 3 seconds, and this event involves Node B. The start time of the simulation is 0 seconds. The simulation step size of Node A is 1 second, and the calculated time stamps for Node A to update its state are 0 seconds, 1 second, 2 seconds, 3 seconds, 4 seconds...; the simulation step size of Node B is 2 seconds, and the calculated time stamps for Node B to update its state are 0 seconds, 2 seconds, 4 seconds, 6 seconds.... The merged set of time stamps includes 0 seconds, 1 second, 2 seconds, 3 seconds, 4 seconds.... Through the merger, it is determined that after the formal start of the subsequent simulation of the simulation system, the states of Node A and Node B need to be updated at 0 seconds, Event 1 (involving Node A) needs to be processed at 1 second, the states of Node A and Node B need to be updated at 2 seconds, Event 2 (involving Node B) needs to be processed at 3 seconds, and at the same time, the state of Node A needs to be updated, and so on. The expression of the time linked list is as follows:

[0135] G{g(time′,v)|v∈I}; (Formula 6)

[0136] In Formula 6, G represents the time linked list; g(·) represents the node trigger parameter; time′ represents the time stamp, and here the time stamp is the merged time stamp; v represents the nodes participating in the calculation at the time stamp, which can be one or more.

[0137] Based on the above, the time - triggered event list is constructed according to the order of the topological signal flow, and the time linked list is constructed according to the chronological order. Through these two tables, the simulation system can ensure that events are executed in the correct order and the normal progress of the simulation time at the same time.

[0138] The simulation system also sets the time offset of each node. The time offset represents the time deviation of the node relative to the advancing clock value of the simulation system during the simulation process. The reason for the time deviation is the requirement of data causality in the calculation process. The advancing clock value refers to the reference time for the simulation advancement, which is used to unify the simulation time of each node. The initial value of the time offset is 0. These time offsets are combined into a time offset set, and the expression of the time offset set is as follows:

[0139] O{o(l)|l∈I}; (Formula 7)

[0140] In Formula 7, O represents the time offset set; o(l) represents the time offset of the l-th node. In the initial state, o(l) = 0.

[0141] In the preparation stage of the simulation system for the simulation work, a time calculator is also set and initialized, and the timing value of the time calculator is recorded. The timing value is represented as tt, and the initial value of the timing value is 0, that is, tt = 0.

[0142] In S5, starting from the simulation start time, the simulation system is started, marking the official start of the simulation process. Refer to Figure 5 the flowchart of the operation method in the startup stage of the shown simulation system. "In the startup stage, based on the netlist and the time linked list, obtain the causal relationship data of the nodes, and update the actual advancement time of the nodes and the advancing clock value of the simulation system", including the following steps:

[0143] S51: Select and call nodes from the time linked list based on the timing value;

[0144] S52: Update the actual advancement time based on the netlist and the called nodes;

[0145] S53: Record the causal relationship data of the called nodes;

[0146] S54: Update the timing value. Based on the new timing value, re-call new nodes from the time linked list and update the advancing clock value until all nodes in the time linked list are called at least once.

[0147] In S51, query the time scale equal to the current timing value from the time linked list, and call the nodes participating in the calculation under this time scale. The called nodes (which can also be called calculation nodes) may be one or more. The following expression reflects the node screening and calling process:

[0148] u = {v|g(time′,v)∈G,time′ = tt}; (Formula 8)

[0149] In Equation 8, u represents the called node. The meaning of Equation 8 is to filter out the node trigger parameters with a time stamp equal to the current timing value from the multiple node trigger parameters in the time linked list, and then filter out the corresponding node from these node trigger parameters and make a call.

[0150] Referring to Figure 6 the flowchart of the actual advancement time update method shown, in S52, "updating the actual advancement time based on the netlist and the called node" includes the following steps:

[0151] S521: Based on the netlist, determine whether the called node has a predecessor node; if not, execute S522; if so, execute S523;

[0152] S522: Update the actual advancement time of the called node, and the called node performs calculations;

[0153] S523: Determine whether the called node meets the preset advancement condition; if so, execute S524; if not, execute S526;

[0154] S524: Determine that the predecessor node has prepared the predecessor data, and the called node performs calculations based on the prepared predecessor data;

[0155] S525: Update the actual advancement time of each node based on the first preset function, the second preset function, and the current advancement clock value of the simulation system;

[0156] S526: Determine that the predecessor node has not prepared the predecessor data, and the called node does not perform calculations;

[0157] S527: Update the actual advancement time of each node based on the second preset function, the third preset function, and the current advancement clock value of the simulation system.

[0158] In S521 and S522, through the connection relationship between nodes shown in the netlist, it is detected whether the called node has a predecessor node. If the called node has no predecessor node, it means that the execution of this called node does not depend on other nodes, and the actual advancement time of the called node is directly updated using the node time update function shown in Equation 9 below, and the called node performs calculations, where the calculations include at least one of state update and execution of events. The expression of the node time update function is as follows:

[0159] t(u) = {time′|g(time′,v) ∈ G, time′ = tt}; (Equation 9)

[0160] In Equation 9, t(u) represents the actual advancement time of the called node. The meaning of Equation 8 is to filter out the node trigger parameters with time stamps equal to the current timing value from the multiple node trigger parameters in the time linked list, and filter out the corresponding time stamps from these node trigger parameters to update the actual advancement time of the called node. Essentially, the actual advancement time of the called node is equal to the time stamp corresponding to the called node.

[0161] In S523 - S527, when it is determined that the called node has a predecessor node, it indicates that the execution of the called node depends on the predecessor node. At this time, it is necessary to determine whether the predecessor data is ready according to the preset advancement condition. Specifically, when the called node meets the preset advancement condition, it means that the predecessor node has completed execution. Correspondingly, the predecessor data of the called node is ready, and the predecessor data indication parameter of the called node is modified to 1, that is, a(u) = 1, indicating that the called node can be executed next, and the called node will perform calculations based on the ready predecessor data. When the called node does not meet the preset advancement condition, it means that the predecessor node is executing. Correspondingly, the predecessor data is not ready, and the called node cannot be executed yet. Among them, the expression of the preset advancement condition is as follows:

[0162]

[0163] In Equation 10, r represents the predecessor node of the called node; t(r) represents the actual advancement time of the predecessor node; q(u) represents the simulation step size of the u-th node, that is, the simulation step size of the called node; n(r,k,u,m) = 1 means that the k-th output port of the r-th node transmits data to the m-th input port of the u-th node, and there is a connection relationship between the k-th output port of the r-th node and the m-th input port of the u-th node; p(u,k) = 1 means that the attribute of the k-th output port of the u-th node is the main port; ∩ represents and.

[0164] When it is determined that the predecessor node has prepared the predecessor data, update the time offset of the active nodes based on the preset first preset function, update the time offset of the inactive nodes based on the preset second preset function, form the time offsets of all nodes according to the time offsets of the active nodes and the inactive nodes, and update the actual advancement time of each node according to these time offsets. Among them, active nodes refer to the nodes participating in the simulation operation in the current beat. Active nodes include the called node and the predecessor node; inactive nodes refer to the nodes not participating in the simulation operation in the current beat. Inactive nodes include the nodes other than the called node and the predecessor node. The current beat is determined by the timing value and represents the current time after the discretization processing of the simulation time.

[0165] Among them, the expression of the first preset function is as follows:

[0166] o'(x) = o(x) - (time1 - time2 - q(x)); (Formula 11)

[0167] In Formula 11, x represents an active node; o'(x) represents the updated time offset of the active node; o(x) represents the time offset of the active node before update; time1 represents the time scale currently used by the time linked list, that is, the time scale in the time linked list equal to the current timing value; time2 represents the time scale used by the time linked list last time, that is, the time scale in the time linked list equal to the previous timing value; q(x) represents the simulation step size of the active node.

[0168] The expression of the second preset function is as follows:

[0169] o'(y) = o(y) + (time1 - time2); (Formula 12)

[0170] In Formula 12, y represents an inactive node; o'(y) represents the updated time offset of the inactive node; o(y) represents the time offset of the inactive node before update;

[0171] After the time offset of each node is updated, the current advancement clock value of the simulation system and the updated time offset are used to calculate the new actual advancement time of each node. The new actual advancement time is equal to the difference between the current advancement clock value and the updated time offset. Among them, the expression of the actual advancement time is as follows:

[0172] t'(l) = T - o(l); (Formula 13)

[0173] In Formula 13, t'(l) represents the actual advancement time of the node after update; T represents the current advancement clock value of the simulation system.

[0174] When it is determined that the predecessor node has not prepared the predecessor data, the time offset of the active node is updated based on the third preset function, and the time offset of the inactive node is updated based on the second preset function. The actual advancement time of each node is updated according to these time offsets and Formula 13. Among them, the expression of the third preset function is as follows:

[0175] o'(x) = o(x) + (time1 - time2). (Formula 14)

[0176] In S53, the startup phase of the simulation system is equivalent to the warm-up inside the system. All nodes are called at least once, and causal relationship data is recorded during the calling process. The causal relationship data includes at least one of the predecessor node, predecessor data, successor node, the connection relationship with the predecessor and successor nodes (i.e., the forward and backward data flow of the called node), calculation result (including at least one of the result of state update and the result of event execution), and calculation resource allocation result (including the processor, communication channel, etc. used by the called node).

[0177] In S54, the current timing value is added to the preset cycle value to obtain a new timing value. The preset cycle value can be set to 1 second. Once the new timing value is obtained, a new corresponding time scale is immediately re-searched from the time linked list using the new timing value. Then, based on the new time scale, a new node is called, and at the same time, the time scale of the newly called node is set to the new advancing clock value. And so on, the actual advancing time of the nodes and the advancing clock value of the simulation system are repeatedly updated to keep the time synchronized, and at the same time, the corresponding events or state updates are executed to advance the operation of the simulation until all nodes in the time linked list are called at least once, that is

[0178] In S6 - S7, when all nodes have been called at least once, it represents the end of the startup phase and the start of the pipeline phase. At this time, the simulation system already knows the causal relationships of all nodes, updates all time scales in the time linked list, that is, adds the preset cycle value to each time scale to obtain a new time scale, and then loops through the nodes in the order of the time linked list. After each traversal of the time linked list, the time linked list is updated to feedback the calling time of the next beat until the preset simulation end condition is met. According to actual simulation requirements, the setting of the simulation end condition can be different. Here, this application provides a simulation end condition, that is, when the actual advancing time of each node is greater than the preset simulation cut-off time, the simulation ends, and the corresponding nodes and memory space are released.

[0179] YY + 242341P - YX

[0180] During the process of calling a node, corresponding events or other operations will be responded to. In each cycle, according to the relationship between the sending and receiving nodes, the simulation system transmits the precursor data in the memory space to the ports of the corresponding nodes through shared memory or network communication interfaces, and calls the corresponding nodes to execute an action once. Synchronously, time and data synchronization caching management is carried out inside the nodes. Based on the current actual advancement time and advancement clock value, in subsequent loop calls of the nodes, the actual advancement time of the nodes is continuously updated. In order to unify the time of the nodes and the simulation system, the timing value and advancement clock value are also continuously updated. However, in the pipeline stage, there is no need to determine whether the called node meets the preset advancement condition. Instead, directly update the time offset of the active nodes based on the first preset function, update the time offset of the inactive nodes based on the second preset function, and then update the corresponding actual advancement time based on the time offsets of these nodes in combination with Formula 13.

[0181] Traditional methods are no longer sufficient to meet the requirements of digital simulation for the description and analysis of complex problems. There is an urgent need to build a hierarchical system or a more refined network structure. For example, in traditional joint simulation of multiple types of equipment, the simulation objects can be divided into multiple levels according to granularity, such as task level, engagement level, and engineering level. For models at the engineering level of granularity, the objects they face are usually digital models of individual electronic equipment. With the increasing complexity of the functions of electronic equipment, the simulation requirements have gradually been upgraded. Especially for the fine description of the electromagnetic domain, signal-level simulation granularity often needs to reach the microsecond (μs) or even nanosecond (ns) level. However, the simulation granularity and signal flow relationship of different components are complex. During the simulation process, not only causalities and timing constraints need to be considered, but also computational efficiency and data synchronization issues across clock domains need to be taken into account.

[0182] Traditional multi-equipment digital models usually use the overall electronic equipment as the meta-model, and adopt a hybrid step size or dynamic step size scheduling strategy through a communication middleware to handle information interaction and synchronization issues between platforms. However, this approach has problems such as insufficient meta-model granularity, low data interaction efficiency, and insufficient parallel scheduling ability. For the first problem, in the traditional solution, using the overall electronic equipment as the meta-model cannot meet the simulation requirements of the new generation of electronic equipment. Although the introduction of a fine-grained model can improve the description accuracy, it also increases the model complexity, resulting in multiple feedback loops between nodes, and significant differences in signal flow graphs between different equipment, which poses a severe challenge to data synchronization and causality determination. For the second problem, in the traditional solution, the internal processing processes of electronic equipment are coupled with each other, with diverse data types spanning multiple clock domains. The traditional data interaction method based on a communication middleware is difficult to meet the computational efficiency requirements, especially when facing high-refresh-rate data interaction, and dynamically adjusting the communication strategy is particularly important. For the third problem, for the fine-grained equipment topology structure in the traditional solution, the traditional module sorting pipeline scheduling method is difficult to meet the parallel processing requirements. How to efficiently drive the multi-equipment simulation advancement based on the new generation of graphical and process-based visualization module blueprints remains a difficult point.

[0183] In view of the above problems, the multi-device joint simulation method proposed in this disclosure can achieve the simulation advancement and data time synchronization of complex topological structures on a graph. By constructing the memory space between the transceiver nodes based on the netlist, and automatically determining the master / slave extension attributes of the ports according to the directed graph depth determination criterion, the algebraic loop simulation problem of the feedback system is solved. At the same time, causality judgment is combined with the time linked list to ensure the scheduling timing of each node in the simulation system and the node data synchronization under the simulation advancement. In addition, this method can also adapt to the requirements of dynamic simulation step size adjustment.

[0184] In summary, the method based on the component-based model parallel scheduling and data synchronization simulation method and simulation platform defined by the netlist can solve the problems of simulation advancement, data synchronization, and computational efficiency of complex fine-grained components.

[0185] Referring to Figure 7 , this disclosure provides a multi-device joint simulation system, including:

[0186] An information acquisition module 101, configured to acquire device information of multiple devices to be simulated;

[0187] A directed graph construction module 102, configured to construct a data flow directed graph based on the device information, where the data flow directed graph is composed of nodes representing each device to be simulated and directed edges representing data flow relationships;

[0188] A netlist construction module 103, configured to construct a netlist based on each directed edge and the point information of each node in the data flow directed graph;

[0189] The linked list construction module 104 is configured to obtain the trigger timing of the device to be simulated and construct a time linked list based on the data flow directed graph and the trigger timing.

[0190] The system startup module 105 is configured to obtain the causal relationship data of the nodes based on the netlist and the time linked list, and update the actual advancement time of the nodes and the advancement clock value of the simulation system.

[0191] The linked list update module 106 is configured to update the time linked list after the causal relationship data between all nodes is obtained.

[0192] The sequential call module 107 is configured to sequentially call each node for calculation according to the causal relationship data, the actual advancement time, the advancement clock value, and the new time linked list until a preset simulation end condition is met.

[0193] The various variation methods and specific examples in the multi-device joint simulation method provided above are equally applicable to the multi-device joint simulation system provided in this disclosure. Through the foregoing detailed description of the multi-device joint simulation method, those skilled in the art can clearly know the implementation method of the multi-device joint simulation system. For the sake of brevity of the specification, it will not be described in detail here.

[0194] The computer device according to an embodiment of the present disclosure includes a memory and a processor. The memory is used to store non-transitory computer-readable instructions. Specifically, the memory may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory may include, for example, read-only memory (ROM), YY+242341P-YX

[0195] hard disk, flash memory, etc.

[0196] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the computer device to perform desired functions. In an embodiment of the present disclosure, the processor is used to run the computer-readable instructions stored in the memory, so that the computer device executes all or part of the steps of the multi-device joint simulation method of the foregoing embodiments of the present disclosure.

[0197] Those skilled in the art should understand that, in order to solve the technical problem of how to obtain a good user experience effect, this embodiment may also include well-known structures such as communication buses and interfaces, and these well-known structures should also be included in the protection scope of the present disclosure.

[0198] As Figure 8 FIG. 427 is a schematic structural diagram of a computer device provided by an embodiment of the present disclosure, which shows a schematic structural diagram of a computer device suitable for implementing the computer device in the embodiment of the present disclosure. Figure 8 The computer device shown is merely an example and should not impose any limitation on the functions and usage scope of the embodiments of the present disclosure.

[0199] As Figure 8 As shown, the computer device may include a processor (such as a central processing unit, a graphics processing unit, etc.), which may perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) or a program loaded from a storage device into a random access memory (RAM). In the RAM, various programs and data required for the operation of the computer device are also stored. The processor, ROM, and RAM are connected to each other through a bus. An input / output (I / O) interface is also connected to the bus.

[0200] Generally, the following devices may be connected to the I / O interface: an input device including, for example, a sensor or a visual information acquisition device; an output device including, for example, a display screen; a storage device including, for example, a magnetic tape, a hard disk, etc.; and a communication device. The communication device may allow the computer device to communicate with other devices (such as edge computing devices) wirelessly or wiredly to exchange data. Although Figure 8 FIG. 434 shows a computer device having various devices, it should be understood that it is not required to implement or have all the shown devices. Instead, more or fewer devices may be implemented or had.

[0201] Specifically, according to an embodiment of the present disclosure, the process described above with reference to the flowchart may be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program includes program codes for performing the method shown in the flowchart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication device, or installed from a storage device, or installed from a ROM. When the computer program is executed by the processor, all or part of the steps of the multi-device joint simulation method of the embodiments of the present disclosure are executed.

[0202] For a detailed description of this embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, and details are not repeated here.

[0203] According to an embodiment of the present disclosure, a non-transitory computer-readable instruction is stored on a computer-readable storage medium. When the non-transitory computer-readable instruction is run by a processor, all or part of the steps of the multi-device joint simulation method of the foregoing embodiments of the present disclosure are executed.

[0204] The above computer-readable storage media include but are not limited to: optical storage media (e.g., CD-ROMs and DVDs), magneto-optical storage media (e.g., MOs), magnetic storage media (e.g., magnetic tapes or external hard drives), media with built-in rewritable non-volatile memories (e.g., memory cards), and media with built-in ROMs (e.g., ROM cartridges).

[0205] For a detailed description of this embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, which will not be repeated here.

[0206] The basic principles of the present disclosure have been described above in connection with specific embodiments. However, it should be noted that the advantages, benefits, effects, etc. mentioned in the present disclosure are merely examples and not limitations, and it cannot be considered that these advantages, benefits, effects, etc. are essential for each embodiment of the present disclosure. Additionally, the specific details disclosed above are for illustrative and facilitating understanding purposes only, and not for limitation. These details do not limit the present disclosure to necessarily implementing with such specific details.

[0207] In the present disclosure, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The block diagrams of the devices, apparatuses, equipment, and systems involved in the present disclosure are only illustrative examples and do not intend to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open-ended terms meaning "including but not limited to", and can be used interchangeably with each other. The words "or" and "and" used herein refer to the word "and / or", and can be used interchangeably with each other unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to", and can be used interchangeably with each other.

[0208] In addition, as used herein, the "or" used in the listing of items starting with "at least one" indicates a disjunctive listing, so that for example, the listing of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the term "exemplary" does not mean that the described examples are preferred or better than other examples.

[0209] It should also be noted that in the systems and methods of the present disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of the present disclosure.

[0210] YY+242341P-YX

[0211] Various changes, substitutions, and alterations to the technology described herein can be made without departing from the teachings defined by the appended claims. Additionally, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of events, means, methods, and acts described above. Processes, machines, manufactures, compositions of events, means, methods, or acts that are currently available or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein can be utilized. Accordingly, the appended claims include such processes, machines, manufactures, compositions of events, means, methods, or acts within their scope.

[0212] The foregoing description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the present disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0213] The foregoing description has been presented for purposes of illustration and description. Additionally, this description is not intended to limit the embodiments of the present disclosure to the form disclosed herein. Although numerous example aspects and embodiments have been discussed above, those skilled in the art will recognize some of their variations, modifications, alterations, additions, and subcombinations.

Claims

1. A multi-device joint simulation method, characterized in that Including: Obtaining device information of multiple devices to be simulated; Constructing a data flow directed graph based on the device information, where the data flow directed graph is composed of nodes representing each device to be simulated and directed edges representing data flow relationships; Constructing a netlist based on each directed edge and the point information of each node in the data flow directed graph; Obtaining the trigger timing of the device to be simulated, and constructing a time linked list based on the data flow directed graph and the trigger timing; Based on the netlist and the time linked list, obtaining causal relationship data of nodes, and updating the actual advancement time of the nodes and the advancement clock value of the simulation system; When the causal relationship data between all nodes is obtained, updating the time linked list; According to the causal relationship data, the actual advancement time, the advancement clock value, and the new time linked list, sequentially calling each node for calculation until a preset simulation end condition is met.

2. The multi-device joint simulation method according to claim 1, characterized in that, The expression of the netlist is: ； Among them, represents a netlist; represents a connection function, ; represents a node; represents an output port; represents an input port; represents a set of nodes; represents a set of output ports; represents a set of input ports; When it is the case, it means that the th output port of the th node transmits data to the th input port of the th node; When it is the case, it means that the th output port of the th node does not transmit data to the th input port of the th node.

3. The multi-device joint simulation method according to claim 1, characterized in that, The obtaining the trigger timing of the device to be simulated, and constructing a time linked list based on the data flow directed graph and the trigger timing includes: Based on the data flow directed graph, constructing a multi-way tree; Traversing all paths of the multi-way tree, and determining whether there is an algebraic loop structure in the current path; If so, setting the input port attribute of the node with the algebraic loop structure to a slave port; If not, setting the input port attribute of the nodes included in the current path to a master port; Based on the input port attribute and the trigger timing, constructing a time trigger event list, where the time trigger event list includes events and the time stamps of the events; Based on the simulation step length of each node, obtaining the time stamps of the state updates of each node; Merging the time stamps in the time trigger event list with the time stamps of the state updates of each node into a time stamp set; Traversing the time stamp set in chronological order, and generating multiple node trigger parameters in the traversal order, where the node trigger parameters include time stamps and the nodes participating in the calculation at the time stamps; Storing the node trigger parameters into a preset empty linked list to generate a time linked list.

4. The multi-device joint simulation method according to claim 3, wherein The obtaining causal relationship data of nodes based on the netlist and the time linked list, and updating the actual advancement time of the nodes and the advancement clock value of the simulation system includes: Recording the timing value of a preset time calculator, and the timing value is initially 0; Selecting and calling nodes from the time linked list based on the timing value; Updating the actual advancement time based on the netlist and the called node; Recording the causal relationship data of the called node; Updating the timing value, and based on the new timing value, re-calling new nodes from the time linked list and updating the advancement clock value until all nodes in the time linked list are called at least once; Wherein, the causal relationship data includes at least one of a predecessor node, predecessor data, a successor node, the connection relationship with the predecessor node and the successor node, a calculation result, and a calculation resource allocation result.

5. The multi-device joint simulation method according to claim 4, wherein The updating the actual advancement time based on the netlist and the called node includes: Based on the netlist, determining whether the called node has a predecessor node; If not, update the actual advancement time of the called node, and the called node performs calculations; If so, determine whether the called node meets the preset advancement condition; If it meets, determine that the predecessor node has prepared the predecessor data, and the called node performs calculations based on the prepared predecessor data; Update the actual advancement time of each node based on the first preset function, the second preset function, and the current advancement clock value of the simulation system; If it does not meet, determine that the predecessor node has not prepared the predecessor data, and the called node does not perform calculations; Update the actual advancement time of each node based on the second preset function, the third preset function, and the current advancement clock value of the simulation system.

6. The multi-device joint simulation method according to claim 5, wherein The expression of the preset advancement condition is: ； Among them, represents the predecessor node of the called node; represents the actual advancement time of the predecessor node; represents the called node; represents the simulation step size of the nth node; represents the output port; represents the input port; represents the nth output port of the nth node transfers data to the mth input port of the mth node; represents the set of nodes; represents the set of nodes; represents the set of output ports; represents the nth output port of the nth node has the property of the main port; represents AND.

7. The multi-device joint simulation method according to claim 6, wherein The expression of the first preset function is: ； Among them, represents an active node, and the active node includes a called node and a predecessor node; represents the time offset after the active node is updated; represents the time offset before the active node is updated; represents the time scale currently used by the time linked list; represents the time scale used by the time linked list last time; represents the simulation step size of the active node; The expression of the second preset function is: ； Among them, represents an inactive node, and the inactive node includes nodes other than the called node and the predecessor node; represents the time offset after the update of the inactive node; represents the time offset before the update of the inactive node; The expression of the third preset function is: 。 8. The multi-device joint simulation method according to claim 4, wherein The updating of the timing value includes: Adding the current timing value to the preset period value to obtain a new timing value; The updating of the advancement clock value includes: Setting the time scale of the newly called node to the new advancement clock value.

9. A computer device, characterized in that, The computer device includes: At least one processor; and, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the multi-device joint simulation method according to any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to execute the multi-device joint simulation method according to any one of claims 1-8.

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