Bidirectional buck-boost circuit for battery charging and discharging and control method

Abstract

The invention belongs to the technical field of battery charging and discharging, and discloses a bidirectional buck-boost circuit for battery charging and discharging and a control method, the bidirectional buck-boost circuit comprises a buck-boost switching control circuit, a double-tube main power buck-boost circuit and a charging and discharging current sampling switching circuit; the step-down-step-up switching control circuit is electrically connected with the double-tube main power step-down-step-up circuit, and the double-tube main power step-down-step-up circuit is electrically connected with the charging and discharging current sampling switching circuit. The double-tube BUCK-BOOST topological structure is adopted, the BUCK charging function can be achieved, the reverse BOOST discharging function can also be achieved, remarkable cost and size advantages are achieved, analog power supply chip control is adopted, a complex control algorithm is not needed, and PWM wave output is controlled only through hardware logic.

Description

Technical Field

[0001] The present invention relates to the technical field of battery charging and discharging, and in particular to a bidirectional buck-boost circuit and a control method for battery charging and discharging. Background Art

[0002] With the development of energy storage technology, batteries, as key components, play a vital role. In the battery manufacturing process, battery formation is an important process step, which is the process of charging the battery after liquid injection. The purpose is to allow the battery to complete the transformation from a "pile of materials" to a stable "electrochemical system". At the same time, before the battery leaves the factory, it must undergo multiple charge and discharge cycle tests.

[0003] In the charging and discharging system, the main function of the bidirectional BUCK-BOOST circuit is to step down the high voltage to the voltage that matches the battery during the charging process, and to step up the battery voltage to the required high voltage during the discharging process, and convert it into mains power through the inverter to feed back to the grid. The current design schemes usually include the following two:

[0004] Independent BUCK and BOOST circuits: This solution uses a BUCK circuit and a BOOST circuit, which can only work separately during charging and discharging, respectively, which will increase the cost and volume;

[0005] Dual or quadruple power tube solution: This solution uses a shared power tube to implement the BUCK and BOOST functions, which can be flexibly switched during the charging and discharging process. However, when using this solution, an MCU (microcontroller unit) is usually required for precise control and complex control algorithms are relied on to adjust the working state of the circuit.

[0006] Therefore, how to provide a bidirectional buck-boost circuit and control method for battery charging and discharging is a problem that needs to be solved urgently. Summary of the invention

[0007] The embodiment of the present invention provides a bidirectional buck-boost circuit and a control method for battery charging and discharging, so as to solve the problem of relying on complex control algorithms to adjust the working state of the circuit in the prior art.

[0008] In order to have a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended to be a general review, nor is it intended to identify key / important components or to delineate the scope of protection of these embodiments. Its only purpose is to present some concepts in a simple form as a preface to the detailed description that follows.

[0009] According to a first aspect of an embodiment of the present invention, a bidirectional buck-boost circuit for battery charging and discharging is provided.

[0010] In one embodiment, the bidirectional buck-boost circuit for battery charging and discharging includes a buck-boost switching control circuit, a dual-tube main power buck-boost circuit, and a charge and discharge current sampling switching circuit;

[0011] The buck-boost switching control circuit is electrically connected to the dual-tube main power buck-boost circuit, and the dual-tube main power buck-boost circuit is electrically connected to the charge and discharge current sampling switching circuit.

[0012] In one embodiment, the buck-boost switching control circuit includes a power chip U1, an inverter U2, an AND gate U3, an AND gate U4, an AND gate U5, an NAND gate U6, a half-bridge driver chip U7, an operational amplifier U8, an operational amplifier U9, an operational amplifier U10, an operational amplifier U11, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a capacitor C1, a capacitor C2, a capacitor C3, a diode D1, a diode D2 and a diode D3;

[0013] The power chip U1 inputs the PWM signal to one end of the inverter U2 and the first pin of the NAND gate U6, the second pin of the NAND gate U6 is connected to the MODE signal, the other end of the inverter U2 is connected to the first pin of the AND gate U3, the second pin of the AND gate U3 is connected to the MODE signal, the third pin of the AND gate U3 is connected to the first pin of the AND gate U4, the second pin of the AND gate U4 is connected to the first pin of the AND gate U5 and is connected to the EN signal, the second pin of the AND gate U5 is connected to the third pin of the AND gate U6, the third pin of the AND gate U4 is connected to the HIN pin of the half-bridge driver chip U7, the third pin of the AND gate U5 is connected to the LIN pin of the half-bridge driver chip U7, the VS pin of the half-bridge driver chip U7 is connected to one end of the capacitor C1, the other end of the capacitor C1 is respectively connected to the VB pin of the half-bridge driver chip U7 and the cathode of the diode D1, and the cathode of the diode D1 is connected to the VCC pin of the half-bridge driver chip U7;

[0014] The Comp pin of the power chip U1 is respectively connected to the cathode of the diode D2 and the cathode of the diode D3, the anode of the diode D2 is respectively connected to one end of the capacitor C2 and the output end of the operational amplifier U11, the other end of the capacitor C2 is respectively connected to one end of the resistor R12, the other end of the resistor R12 is respectively connected to the negative phase input end of the operational amplifier U11 and one end of the resistor R7, the other end of the resistor R7 sets the voltage value VSET, the non-inverting input end of the operational amplifier U11 is respectively connected to one end of the resistor R6 and the output end of the operational amplifier U8 through the resistor R8, the other end of the resistor R6 is respectively connected to the negative phase input end of the operational amplifier U8 and one end of the resistor R1, the other end of the resistor R1 is connected to the negative electrode of the battery, the non-inverting input end of the operational amplifier U8 is respectively connected to one end of the resistor R2 and one end of the resistor R14, the other end of the resistor R2 is connected to the positive electrode of the battery, The other end of the resistor R14 is grounded, the positive electrode of the diode D3 is respectively connected to one end of the capacitor C3 and the output end of the operational amplifier U10, the other end of the capacitor C3 is connected to one end of the resistor R11, the other end of the resistor R11 is respectively connected to the negative phase input end of the operational amplifier U10 and one end of the resistor R9, the other end of the resistor R9 sets the current value ISET, the non-inverting input end of the operational amplifier U10 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R5 and the output end of the operational amplifier U9, the other end of the resistor R5 is respectively connected to the negative phase input end of the operational amplifier U9 and one end of the resistor R3, the non-inverting input end of the operational amplifier U9 is respectively connected to one end of the resistor R4 and one end of the resistor R13, the other end of the resistor R13 is grounded, and the other end of R3 and the other end of the resistor R4 are respectively connected to the charging and discharging current sampling feedback voltage.

[0015] In one embodiment, the operational amplifier U8, the resistor R6, the resistor R1, the resistor R2 and the resistor R14 in the buck-boost switching control circuit form a differential amplifier circuit, and the differential amplifier circuit is used to sample and amplify the battery voltage.

[0016] In one embodiment, the resistor R7, the resistor R8, the resistor R12, the capacitor C2, the operational amplifier U11, and the diode D2 in the buck-boost switching control circuit form a voltage loop error amplifier, and the voltage loop error amplifier is used to respond to changes in battery voltage and provide a comparison value for the power chip U1 to generate a PWM signal.

[0017] In one embodiment, the dual-tube main power buck-boost circuit includes electrolytic C4, electrolytic C5, field effect tube VT2, field effect tube VT3, diode D4, diode D5, inductor L1, resistor R_Isense, relay switch S1 and battery VBAT;

[0018] The positive electrode of the electrolytic capacitor C4 is respectively connected to the VIN terminal, the negative electrode of the diode D4 and the drain of the field effect transistor VT2, the gate of the field effect transistor VT2 is connected to the Ho_driver terminal, the source of the field effect transistor VT2 is respectively connected to the positive electrode of the diode D4, the VS terminal, one end of the inductor L1, the drain of the field effect transistor VT3 and the negative electrode of the diode D5, the other end of the inductor L1 is respectively connected to the I- terminal, one end of the resistor R_Isense and the positive electrode of the electrolytic capacitor C5, the other end of the resistor R_Isense is respectively connected to the I+ terminal and one end of the relay switch S1, the other end of the relay switch S1 is connected to the positive electrode of the battery VBAT, the negative electrode of the battery VBAT is respectively connected to the negative electrode of the electrolytic capacitor C5, the positive electrode of the diode D5, the source of the field effect transistor VT3 and the negative electrode of the electrolytic capacitor C4 and grounded, and the gate of the field effect transistor VT3 is connected to the Lo_driver terminal.

[0019] In one embodiment, the electrolysis C4 is an input electrolysis, the electrolysis C5 is an output electrolysis; the resistor R_Isense is a charge and discharge current sampling resistor.

[0020] In one embodiment, the charging and discharging current sampling and switching circuit includes an analog switch chip U11, a resistor R15, a resistor R16, and a transistor VT1;

[0021] The S1 pin and the S3 pin of the analog switch chip U11 are both connected to the I- terminal, the S2 pin and the S4 pin of the analog switch chip U11 are both connected to the I+ terminal, the D1 pin and the D2 pin of the analog switch chip U11 are both connected to the I— terminal, the D3 pin and the D4 pin of the analog switch chip U11 are both connected to the I++ terminal, the IN4 pin of the analog switch chip U11 is connected to the MODE signal, the IN1 pin of the analog switch chip U11 is respectively connected to the MODE signal and one end of the resistor R16, the other end of the resistor R16 is connected to the base of the transistor VT1, the collector of the transistor VT1 is respectively connected to the resistor R15, the IN2 pin of the analog switch chip U11 and the IN3 pin of the analog switch chip U11, and the emitter of the transistor VT1 is grounded.

[0022] In one embodiment, the charge and discharge current sampling switching circuit realizes automatic switching of current sampling according to the MODE signal, and ensures that the output of the differential amplifier circuit is a positive voltage.

[0023] In one embodiment, the inputs of the analog switch chip U11 are IN1 pin, IN2 pin, IN3 pin and IN4 pin respectively, and the IN1 pin controls the switch of the S1 pin and the D1 pin, the IN2 pin controls the switch of the S2 pin and the D2 pin, the IN3 pin controls the switch of the S3 pin and the D3 pin, and the IN4 pin controls the switch of the S4 pin and the D4 pin.

[0024] According to a second aspect of an embodiment of the present invention, a control method for a bidirectional buck-boost circuit for battery charging and discharging is provided.

[0025] In one embodiment, the control method of the bidirectional buck-boost circuit for battery charging and discharging includes:

[0026] When the relay switch S1 is turned on, and the EN signal and the MODE signal are both in a high-level state, a PWM signal is output through the Ho_driver pin of the half-bridge driver chip U7, and the Lo_driver pin of the power chip U7 is always in a low-level state. At this time, the dual-tube main power buck-boost circuit is in a buck charging mode, and the field effect tube VT2 and the diode D5 start working to realize battery charging;

[0027] When the relay switch S1 is turned on, and the EN signal is in a high-level state, and the MODE signal is in a low-level state, a PWM signal is output through the Lo_driver pin of the half-bridge driver chip U7, and the Ho_driver pin of the power chip U7 is always in a low-level state. At this time, the dual-tube main power buck-boost circuit is in a boost discharge mode, and the field effect tube VT3 and the diode D4 start working to realize battery discharge;

[0028] When the relay switch S1 is disconnected and the EN signal and the MODE signal are in a low level state, the Ho_driver pin and the Lo_driver pin of the power chip U7 are both in a low level state, and the battery stops charging and discharging.

[0029] The technical solution provided by the embodiment of the present invention may have the following beneficial effects:

[0030] The present invention adopts a dual-tube BUCK-BOOST topology structure, which can realize both the BUCK charging function and the reverse BOOST discharging function, has significant cost and volume advantages, and adopts analog power chip control, does not require complex control algorithms, and only controls the PWM wave output through hardware logic; the present invention can realize the control of the upper tube by performing hardware control on the PWM wave output by the power chip, thereby completing the BUCK charging function; at the same time, by controlling the lower tube, the reverse BOOST discharging function can be realized, thereby effectively reducing the cost and volume, and adopting pure hardware control, so that the solution is simple and reliable.

[0031] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0033] Figure 1 is a principle block diagram of a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment;

[0034] Figure 2 is a flow chart showing a control method of a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment;

[0035] Figure 3 is a circuit diagram of a buck-boost switching control circuit in a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment;

[0036] Figure 4 is a circuit diagram of a dual-tube main power buck-boost circuit in a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment;

[0037] Figure 5 is a circuit diagram of a charging and discharging current sampling switching circuit in a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment;

[0038] Figure 6 The present invention is a charge and discharge control flow chart showing a control method of a bidirectional buck-boost circuit for battery charging and discharging according to an exemplary embodiment. DETAILED DESCRIPTION

[0039] The following description and accompanying drawings fully illustrate the specific embodiments of this article so that those skilled in the art can practice them. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. The scope of the embodiments of this article includes the entire scope of the claims, as well as all available equivalents of the claims. Herein, the terms "first", "second", etc. are only used to distinguish one element from another, without requiring or implying any actual relationship or order between these elements. In fact, the first element can also be called the second element, and vice versa. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that the structure, device or equipment including a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also include elements inherent to such structure, device or equipment. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the structure, device or equipment including the elements. Each embodiment is described in a progressive manner herein, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the embodiments can be referred to each other.

[0040] The terms "longitudinal", "lateral", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. in this document indicate the orientation or position relationship based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing this document and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In the description of this document, unless otherwise specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a mechanical connection or an electrical connection, it can also be the internal communication of two elements, it can be a direct connection, or it can be an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0041] As used herein, the term "plurality" means two or more than two, unless otherwise specified.

[0042] In this document, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B.

[0043] In this article, the term "and / or" is a description of the association relationship between objects, indicating that three relationships may exist. For example, A and / or B means: A or B, or, A and B.

[0044] It should be understood that, although the various steps in the flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0045] Each module in the device or system of the present application can be implemented in whole or in part by software, hardware, or a combination thereof. The above modules can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to the above modules.

[0046] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0047] Figure 1 An embodiment of a bidirectional buck-boost circuit for battery charging and discharging of the present invention is shown.

[0048] In this optional embodiment, the bidirectional buck-boost circuit for battery charging and discharging includes a buck-boost switching control circuit 1, a dual-tube main power buck-boost circuit 2, and a charge and discharge current sampling switching circuit 3;

[0049] The buck-boost switching control circuit 1 is electrically connected to the dual-tube main power buck-boost circuit 2 , and the dual-tube main power buck-boost circuit 2 is electrically connected to the charge and discharge current sampling switching circuit 3 .

[0050] In this alternative embodiment, if Figure 3 As shown, the buck-boost switching control circuit 1 includes a power chip U1, an inverter U2, an AND gate U3, an AND gate U4, an AND gate U5, an NAND gate U6, a half-bridge driver chip U7, an operational amplifier U8, an operational amplifier U9, an operational amplifier U10, an operational amplifier U11, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a capacitor C1, a capacitor C2, a capacitor C3, a diode D1, a diode D2 and a diode D3;

[0051] The power chip U1 inputs the PWM signal to one end of the inverter U2 and the first pin of the NAND gate U6, the second pin of the NAND gate U6 is connected to the MODE signal, the other end of the inverter U2 is connected to the first pin of the AND gate U3, the second pin of the AND gate U3 is connected to the MODE signal, the third pin of the AND gate U3 is connected to the first pin of the AND gate U4, the second pin of the AND gate U4 is connected to the first pin of the AND gate U5 and is connected to the EN signal, the second pin of the AND gate U5 is connected to the third pin of the AND gate U6, the third pin of the AND gate U4 is connected to the HIN pin of the half-bridge driver chip U7, the third pin of the AND gate U5 is connected to the LIN pin of the half-bridge driver chip U7, the VS pin of the half-bridge driver chip U7 is connected to one end of the capacitor C1, the other end of the capacitor C1 is respectively connected to the VB pin of the half-bridge driver chip U7 and the cathode of the diode D1, and the cathode of the diode D1 is connected to the VCC pin of the half-bridge driver chip U7;

[0052] The Comp pin of the power chip U1 is respectively connected to the cathode of the diode D2 and the cathode of the diode D3, the anode of the diode D2 is respectively connected to one end of the capacitor C2 and the output end of the operational amplifier U11, the other end of the capacitor C2 is respectively connected to one end of the resistor R12, the other end of the resistor R12 is respectively connected to the negative phase input end of the operational amplifier U11 and one end of the resistor R7, the other end of the resistor R7 sets the voltage value VSET, the non-inverting input end of the operational amplifier U11 is respectively connected to one end of the resistor R6 and the output end of the operational amplifier U8 through the resistor R8, the other end of the resistor R6 is respectively connected to the negative phase input end of the operational amplifier U8 and one end of the resistor R1, the other end of the resistor R1 is connected to the negative electrode of the battery, the non-inverting input end of the operational amplifier U8 is respectively connected to one end of the resistor R2 and one end of the resistor R14, the other end of the resistor R2 is connected to the positive electrode of the battery, The other end of the resistor R14 is grounded, the positive electrode of the diode D3 is respectively connected to one end of the capacitor C3 and the output end of the operational amplifier U10, the other end of the capacitor C3 is connected to one end of the resistor R11, the other end of the resistor R11 is respectively connected to the negative phase input end of the operational amplifier U10 and one end of the resistor R9, the other end of the resistor R9 sets the current value ISET, the non-inverting input end of the operational amplifier U10 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R5 and the output end of the operational amplifier U9, the other end of the resistor R5 is respectively connected to the negative phase input end of the operational amplifier U9 and one end of the resistor R3, the non-inverting input end of the operational amplifier U9 is respectively connected to one end of the resistor R4 and one end of the resistor R13, the other end of the resistor R13 is grounded, and the other end of R3 and the other end of the resistor R4 are respectively connected to the charging and discharging current sampling feedback voltage.

[0053] In this optional embodiment, the operational amplifier U8, the resistor R6, the resistor R1, the resistor R2 and the resistor R14 in the buck-boost switching control circuit 1 form a differential amplifier circuit, and the differential amplifier circuit is used to sample and amplify the battery voltage.

[0054] In this optional embodiment, the resistor R7, the resistor R8, the resistor R12, the capacitor C2, the operational amplifier U11, and the diode D2 in the buck-boost switching control circuit 1 form a voltage loop error amplifier, and the voltage loop error amplifier is used to respond to changes in the battery voltage and provide a comparison value for the power chip U1 to generate a PWM signal.

[0055] In this alternative embodiment, if Figure 4As shown, the dual-tube main power buck-boost circuit 2 includes electrolytic C4, electrolytic C5, field effect tube VT2, field effect tube VT3, diode D4, diode D5, inductor L1, resistor R_Isense, relay switch S1 and battery VBAT;

[0056] The positive electrode of the electrolytic capacitor C4 is respectively connected to the VIN terminal, the negative electrode of the diode D4 and the drain of the field effect transistor VT2, the gate of the field effect transistor VT2 is connected to the Ho_driver terminal, the source of the field effect transistor VT2 is respectively connected to the positive electrode of the diode D4, the VS terminal, one end of the inductor L1, the drain of the field effect transistor VT3 and the negative electrode of the diode D5, the other end of the inductor L1 is respectively connected to the I- terminal, one end of the resistor R_Isense and the positive electrode of the electrolytic capacitor C5, the other end of the resistor R_Isense is respectively connected to the I+ terminal and one end of the relay switch S1, the other end of the relay switch S1 is connected to the positive electrode of the battery VBAT, the negative electrode of the battery VBAT is respectively connected to the negative electrode of the electrolytic capacitor C5, the positive electrode of the diode D5, the source of the field effect transistor VT3 and the negative electrode of the electrolytic capacitor C4 and grounded, and the gate of the field effect transistor VT3 is connected to the Lo_driver terminal.

[0057] In this optional embodiment, the electrolysis C4 is the input electrolysis, the electrolysis C5 is the output electrolysis; and the resistor R_Isense is the charge and discharge current sampling resistor.

[0058] In this alternative embodiment, if Figure 5 As shown, the charging and discharging current sampling and switching circuit 3 includes an analog switch chip U11, a resistor R15, a resistor R16, and a transistor VT1;

[0059] The S1 pin and the S3 pin of the analog switch chip U11 are both connected to the I- terminal, the S2 pin and the S4 pin of the analog switch chip U11 are both connected to the I+ terminal, the D1 pin and the D2 pin of the analog switch chip U11 are both connected to the I— terminal, the D3 pin and the D4 pin of the analog switch chip U11 are both connected to the I++ terminal, the IN4 pin of the analog switch chip U11 is connected to the MODE signal, the IN1 pin of the analog switch chip U11 is respectively connected to the MODE signal and one end of the resistor R16, the other end of the resistor R16 is connected to the base of the transistor VT1, the collector of the transistor VT1 is respectively connected to the resistor R15, the IN2 pin of the analog switch chip U11 and the IN3 pin of the analog switch chip U11, and the emitter of the transistor VT1 is grounded.

[0060] In this optional embodiment, the charge and discharge current sampling switching circuit 3 realizes automatic switching of current sampling according to the MODE signal, and ensures that the output of the differential amplifier circuit is a positive voltage.

[0061] In this optional embodiment, the inputs of the analog switch chip U11 are IN1 pin, IN2 pin, IN3 pin and IN4 pin respectively, and the IN1 pin controls the switch of the S1 pin and the D1 pin, the IN2 pin controls the switch of the S2 pin and the D2 pin, the IN3 pin controls the switch of the S3 pin and the D3 pin, and the IN4 pin controls the switch of the S4 pin and the D4 pin.

[0062] Figure 2 An embodiment of a control method of a bidirectional buck-boost circuit for battery charging and discharging according to the present invention is shown.

[0063] In this optional embodiment, the control method of the bidirectional buck-boost circuit for battery charging and discharging includes:

[0064] S201, when the relay switch S1 is turned on, and the EN signal and the MODE signal are both in a high level state, a PWM signal is output through the Ho_driver pin of the half-bridge driver chip U7, and the Lo_driver pin of the power chip U7 is always in a low level state. At this time, the dual-tube main power buck-boost circuit 2 is in a buck charging mode, and the field effect tube VT2 and the diode D5 start working to realize battery charging;

[0065] S203, when the relay switch S1 is turned on, and the EN signal is in a high level state, and the MODE signal is in a low level state, a PWM signal is output through the Lo_driver pin of the half-bridge driver chip U7, and the Ho_driver pin of the power chip U7 is always in a low level state. At this time, the dual-tube main power buck-boost circuit 2 is in a boost discharge mode, and the field effect tube VT3 and the diode D4 start working to realize battery discharge;

[0066] S205, when the relay switch S1 is disconnected, and the EN signal and the MODE signal are in a low level state, the Ho_driver pin and the Lo_driver pin of the power chip U7 are both in a low level state, and the battery stops charging and discharging.

[0067] In order to facilitate understanding of the above technical solutions of the present invention, the bidirectional buck-boost circuit and control method for battery charging and discharging in the actual process of the present invention are described in detail below:

[0068] A bidirectional buck-boost circuit for battery charging and discharging (a bidirectional buck-boost circuit is a circuit that can realize mutual conversion of voltages during charging and discharging, and integrates buck and boost functions, so that it can support battery charging and discharging at the same time, i.e., a bidirectional buck-boost circuit), comprising a PWM control and buck-boost switching control circuit (equivalent to a buck-boost switching control circuit), a dual-tube main power buck-boost circuit (equivalent to a dual-tube main power buck-boost circuit) and a charge and discharge current sampling switching circuit (equivalent to a charge and discharge current sampling switching circuit).

[0069] The working principles between each circuit are as follows:

[0070] 1. BUCK charging (step-down charging): When the EN signal and the MODE signal are high, the charge-discharge current sampling and switching circuit sends the output charging current signal to the PWM control and BUCK-BOOST switching control circuit for differential amplification according to the MODE signal; the PWM control and BUCK-BOOST switching control circuit outputs a PWM drive signal according to the output charging current and the battery voltage signal; the PWM signal drives the high-side MOS tube of the dual-tube main power BUCK-BOOST circuit to work.

[0071] 2. BOOST discharge (boost discharge): EN signal is high and MODE signal is low. The charge and discharge current sampling switching circuit sends the discharge current signal to the PWM control and BUCK-BOOST switching control circuit for differential amplification according to the MODE signal; the PWM control and BUCK-BOOST switching control circuit outputs a PWM drive signal according to the discharge current signal; the PWM signal drives the low-side MOS tube (field effect tube) of the dual-tube main power BUCK-BOOST circuit to work.

[0072] Among them, the PWM control and BUCK-BOOST switching control circuit includes: operational amplifier U8, operational amplifier U9, operational amplifier U10, operational amplifier U11, resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, capacitor C2, capacitor C3, diode D2, diode D3, and the power chip U1 constitutes a PWM control circuit to realize dual closed-loop control of voltage and current. V+ and V- are battery feedback voltages, and I++ and I-- are charge and discharge current sampling feedback voltages. The voltage loop and the current loop compete for priority through diodes D2 and D3. The one with a larger value enters the Comp pin of the power chip U1. Through the control inside the power chip U1, a PWM wave is output, in which the low level of PWM is the effective duty cycle; inverter U2, AND gate U3, AND gate U4, AND gate U5, NAND gate U6, half-bridge driver chip U7, capacitor C1, and diode D1 constitute a BUCK-BOOST switching control circuit (buck-boost switching control circuit) to achieve BUCK and BOOST mode switching and provide drive for the power tube of the dual-tube main power BUCK-BOOST circuit; the main hardware implementation logic is:

[0073] 1. BUCK charging (EN signal is high, MODE signal is high): ①When PWM is low, the inverter U2 outputs high, the AND gate U3 outputs high, and the AND gate U4 outputs high, that is, HIN is high, and the Ho_driver of the half-bridge driver chip U7 is high; when PWM is high, the inverter U2 outputs low, the AND gate U3 outputs low, and the AND gate U4 outputs low, that is, HIN is low, and the Ho_driver of the half-bridge driver chip U7 is low; therefore, Ho_driver is controlled by the PWM output of the power chip U1; ②When MODE is high, the NAND gate U6 always outputs low, and the AND gate U5 always outputs low, that is, LIN is always low, therefore, Lo_driver is always low and is not controlled by the PWM output of the power chip; ③Ho_driver is used to control the upper tube, and Lo_driver is used to control the lower tube; therefore, the BUCK charging function can be realized.

[0074] 2. BOOST discharge (EN is high, MODE is low): ① MODE is low, AND gate U3 always outputs low, AND gate U4 always outputs low, that is, HIN is always low, therefore, Ho_driver is not controlled by the PWM output of the power chip; ② When PWM is low, NAND gate U6 outputs high, AND gate U5 outputs high, that is, LIN is high, and Lo_driver of the half-bridge driver chip U7 is high; when PWM is high, NAND gate U6 outputs low, AND gate U5 outputs low, that is, LIN is low, and Lo_driver of the half-bridge driver chip U7 is low; therefore, Lo_driver is controlled by the PWM output of the power chip; ③ Ho_driver is used to control the upper tube, and Lo_driver is used to control the lower tube; therefore, the BOOST discharge function can be realized.

[0075] 3. Stop charging and discharging (EN and MODE are low): EN is low, HIN and LIN are both low, Ho_driver and Lo_driver are also low, the upper and lower tubes do not work, and charging and discharging are stopped.

[0076] Among them, the dual-tube main power BUCK-BOOST circuit includes: input electrolytic C3, MOS tube (field effect tube) VT2, field effect tube VT3, diode D4, diode D5, inductor L1, output electrolytic C2, charge and discharge current sampling resistor R_Isense and relay switch S1. Its working principle is as follows:

[0077] 1. BUCK charging: Ho_driver outputs PWM waveform to drive MOS tube VT2 to work, Lo_driver is always low, and MOS tube VT3 does not work; when Ho_driver is high, the input voltage VIN excites the inductor L1 and provides energy to the battery; when Ho_driver is low, the inductor L1 continues to flow through the diode D5 to provide energy to the battery.

[0078] 2. BOOST discharge: Lo_driver outputs PWM waveform to drive MOS tube VT3 to work, Ho_driver is always low, and MOS tube VT2 does not work; when Lo_driver is high, the battery excites the inductor L1, and the input capacitor C1 provides discharge energy; when Lo_driver is low, the inductor L1 and the battery voltage are freewheeling through the diode D4 to provide discharge energy.

[0079] 3. Stop charging and discharging: Ho_driver and Lo_driver are both low, both tubes do not work, and relay switch S1 is disconnected to prevent battery voltage backflow.

[0080] Among them, the charging and discharging current sampling and switching circuit includes: an analog switch chip U11, a resistor R15, a resistor R16, and a transistor VT1; the inputs of the analog switch chip U11 are IN1, IN2, IN3, and IN4, which respectively control the opening and closing of the S1 pin and the D1 pin, the S2 pin and the D2 pin, the S3 pin and the D3 pin, and the S4 pin and the D4 pin, and the low level is effective; since the charging and discharging directions are opposite, the circuit can realize the automatic switching of the current sampling, and its working principle is as follows:

[0081] 1. BUCK charging: The voltage level across the charge and discharge current sampling resistor R_Isense is: I->I+, the MODE signal is high, the S2 pin and the D2 pin, the S3 pin and the D3 pin are turned on, I++=I-, I--=I+, ensuring that the current sampling differential circuit outputs a positive voltage.

[0082] 2. BOOST discharge: The voltage levels across the charge and discharge current sampling resistor R_Isense are: I+>I-, the MODE signal is low, the S1 pin and the D pin 1, the S4 pin and the D4 pin are turned on, I++=I+, I--=I-, ensuring that the output voltage of the current sampling differential circuit is a positive voltage.

[0083] The connection method of the buck-boost switching control circuit, the dual-tube main power buck-boost circuit and the charge and discharge current sampling switching circuit is described in detail below.

[0084] Among them, the connection method of PWM control and BUCK-BOOST switching control circuit is:

[0085] 1. One end of the resistor R1 is connected to the negative electrode V- of the battery, and the other end is connected to the negative phase input of the operational amplifier U8; one end of the resistor R2 is connected to the positive electrode V+ of the battery, and the other end is connected to the non-inverting input of the operational amplifier U8; one end of the resistor R6 is connected to the negative phase input of the operational amplifier U8, and the other end is connected to the output of the operational amplifier U8; one end of the resistor R14 is connected to the non-inverting input of the operational amplifier U8, and the other end is connected to GND; wherein the resistor R1 = resistor R2, and the resistor R14 = resistor R6; the operational amplifier U8, the resistor R6, the resistor R1, the resistor R2, and the resistor R14 constitute a differential amplifier circuit for sampling and amplifying the battery voltage; wherein V- is directly connected to the root of the negative electrode of the battery to prevent the line voltage of the power circuit from affecting the battery voltage sampling.

[0086] 2. One end of the resistor R8 is connected to the output of the operational amplifier U8, and the other end is connected to the non-inverting input of the operational amplifier U11; one end of the resistor R7 is connected to the set voltage value VSET, and the other end is connected to the negative input of the operational amplifier U11; one end of the resistor R12 is connected to the negative input of the operational amplifier U11, and the other end is connected to the capacitor C2; one end of the capacitor C2 is connected to the resistor R12, and the other end is connected to the output of the operational amplifier U11; one end of the diode D2 is connected to the output of the operational amplifier U11, and the other end is connected to the Comp of the power chip U1; the resistor R7, the resistor R8, the resistor R12, the capacitor C2, the operational amplifier U11, and the diode D2 constitute a voltage loop error amplifier, which is used to respond to changes in the battery voltage and provide a comparison value for the power chip U1, thereby generating a PWM wave.

[0087] 3. One end of the resistor R3 is connected to the I-- of the charge and discharge current sampling resistor, and the other end is connected to the negative phase input of the operational amplifier U9; one end of the resistor R4 is connected to the I++ of the charge and discharge current sampling resistor, and the other end is connected to the non-inverting input of the operational amplifier U9; one end of the resistor R5 is connected to the negative phase input of the operational amplifier U9, and the other end is connected to the output of the operational amplifier U9; one end of the resistor R13 is connected to the non-inverting input of the operational amplifier U9, and the other end is connected to GND; wherein the resistor R5 = resistor R13, and the resistor R3 = resistor R4; the operational amplifier U9, the resistor R5, the resistor R3, the resistor R4 and the resistor R13 constitute a differential amplifier circuit for sampling the charge and discharge current.

[0088] 4. One end of the resistor R10 is connected to the output of the operational amplifier U9, and the other end is connected to the non-inverting input of the operational amplifier U10; one end of R9 is connected to the set current value ISET, and the other end is connected to the negative input of the operational amplifier U10; one end of the resistor R11 is connected to the negative input of the operational amplifier U10, and the other end is connected to the capacitor C3; one end of the capacitor C3 is connected to the resistor R11, and the other end is connected to the output of the operational amplifier U10; one end of the diode D3 is connected to the output of the operational amplifier U10, and the other end is connected to the Comp of U1; the resistor R9, the resistor R10, the resistor R11, the capacitor C3, the operational amplifier U10, and the diode D3 constitute a current loop error amplifier, which is used to respond to changes in the charging and discharging currents and provide comparison values ​​for the power supply chip, thereby generating a PWM wave.

[0089] 5. The input of inverter U2 is connected to the PWM of power chip U1, the output is connected to input 1 of AND gate U3, the output of AND gate U3 is connected to input 1 of AND gate U4, the output of AND gate U4 is connected to HIN of half-bridge driver chip U7, input 1 of NAND gate U6 is connected to PWM of power chip U1, the output of NAND gate U6 is connected to input 1 of AND gate U5, the output of AND gate U5 is connected to LIN of half-bridge driver chip U7, MODE is connected to input 2 of AND gate U3 and NAND gate U6, EN is connected to input 2 of AND gate U4 and AND gate U5; inverter U2, AND gate U3, AND gate U4, AND gate U5, and NAND gate U6 constitute a BUCK-BOOST switching control circuit. According to the status of MODE and EN, the start and stop of charging and discharging, and the switching of BUCK and BOOST can be realized without algorithm control.

[0090] 6. One end of capacitor C1 is connected to VS of half-bridge driver chip U7, and the other end is connected to VB of half-bridge driver chip U7; one end of D1 is connected to VCC of half-bridge driver chip U7, and the other end is connected to VCC of half-bridge driver chip U7; diode D1 is a bootstrap diode, and capacitor C1 is a bootstrap capacitor. This circuit can realize the driving of high-side MOS tube and low-side MOS.

[0091] Among them, the connection method of the dual-tube main power BUCK-BOOST circuit is:

[0092] The positive electrode of electrolytic C4 is connected to input VIN, and the negative electrode is connected to GND; the cathode of diode D4 is connected to input VIN, and the anode is connected to VS; the gate of field effect tube VT2 is connected to Ho_driver, the drain is connected to VIN, and the source is connected to VS; the cathode of diode D5 is connected to VS, and the anode is connected to GND; the gate of field effect tube VT3 is connected to Lo_driver, the drain is connected to VS, and the source is connected to GND; one end of inductor L1 is connected to VS, and the other end is connected to I-; the positive electrode of capacitor C2 is connected to I-, and the negative electrode is connected to GND; one end of R_Isense is connected to I-, and the other end is connected to I+; one end of relay switch S1 is connected to I+, and the other end is connected to the positive electrode of the battery; the negative electrode of the battery is connected to GND; the circuit receives the driving signal of PWM control and BUCK-BOOST switching control circuit to realize battery charging and discharging.

[0093] Among them, the connection method of the charge and discharge current sampling switching circuit is:

[0094] S1 and S3 of the analog switch chip U11 are both connected to I-, and S2 and S4 are both connected to I+; D1 and D2 of the analog switch chip U11 are both connected to I--, and D3 and D4 are both connected to I++; IN4 and IN1 of the analog switch chip U11 are both connected to MODE; one end of the resistor R16 is connected to MODE, and the other end is connected to the base of the transistor VT1; one end of the resistor R15 is connected to the collector of the transistor VT1, and the other end is connected to the voltage 3.3V; the emitter of the transistor VT1 is connected to GND; IN2 and IN3 of the analog switch chip U11 are both connected to the collector of the transistor VT1; since the directions of charging and discharging are opposite, the circuit can realize automatic switching of current sampling according to the MODE signal, ensuring that the output of the current sampling differential amplifier circuit is always a positive voltage.

[0095] like Figure 6 As shown, when the relay switch S1 is turned on and the EN signal and the MODE signal are both in a high-level state, a PWM signal is output through the Ho_driver pin of the half-bridge driver chip U7, and the Lo_driver pin of the power chip U7 is always in a low-level state. At this time, the dual-tube main power buck-boost circuit is in a buck charging mode, and the field effect tube VT2 and the diode D5 start working to realize battery charging.

[0096] When the relay switch S1 is turned on, the EN signal is in a high level state, and the MODE signal is in a low level state, a PWM signal is output through the Lo_driver pin of the half-bridge driver chip U7, and the Ho_driver pin of the power chip U7 is always in a low level state. At this time, the dual-tube main power buck-boost circuit is in boost discharge mode, and the field effect tube VT3 and the diode D4 start working to realize battery discharge.

[0097] When the relay switch S1 is disconnected and the EN signal and the MODE signal are in a low level state, the Ho_driver pin and the Lo_driver pin of the power chip U7 are both in a low level state, and the battery stops charging and discharging.

[0098] The present invention is not limited to the structures which have been described above and shown in the drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A bidirectional buck-boost circuit for battery charging and discharging, characterized in that: It includes a buck-boost switching control circuit, a dual-tube main power buck-boost circuit and a charge and discharge current sampling switching circuit; The buck-boost switching control circuit is electrically connected to the dual-tube main power buck-boost circuit, and the dual-tube main power buck-boost circuit is electrically connected to the charge and discharge current sampling switching circuit.

2. The bidirectional buck-boost circuit for battery charging and discharging according to claim 1, characterized in that: The buck-boost switching control circuit includes a power chip U1, an inverter U2, an AND gate U3, an AND gate U4, an AND gate U5, an NAND gate U6, a half-bridge driver chip U7, an operational amplifier U8, an operational amplifier U9, an operational amplifier U10, an operational amplifier U11, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a capacitor C1, a capacitor C2, a capacitor C3, a diode D1, a diode D2 and a diode D3; The power chip U1 inputs the PWM signal to one end of the inverter U2 and the first pin of the NAND gate U6, the second pin of the NAND gate U6 is connected to the MODE signal, the other end of the inverter U2 is connected to the first pin of the AND gate U3, the second pin of the AND gate U3 is connected to the MODE signal, the third pin of the AND gate U3 is connected to the first pin of the AND gate U4, the second pin of the AND gate U4 is connected to the first pin of the AND gate U5 and is connected to the EN signal, the second pin of the AND gate U5 is connected to the third pin of the AND gate U6, the third pin of the AND gate U4 is connected to the HIN pin of the half-bridge driver chip U7, the third pin of the AND gate U5 is connected to the LIN pin of the half-bridge driver chip U7, the VS pin of the half-bridge driver chip U7 is connected to one end of the capacitor C1, the other end of the capacitor C1 is respectively connected to the VB pin of the half-bridge driver chip U7 and the cathode of the diode D1, and the cathode of the diode D1 is connected to the VCC pin of the half-bridge driver chip U7; The Comp pin of the power chip U1 is respectively connected to the cathode of the diode D2 and the cathode of the diode D3, the anode of the diode D2 is respectively connected to one end of the capacitor C2 and the output end of the operational amplifier U11, the other end of the capacitor C2 is respectively connected to one end of the resistor R12, the other end of the resistor R12 is respectively connected to the negative phase input end of the operational amplifier U11 and one end of the resistor R7, the other end of the resistor R7 sets the voltage value VSET, the non-inverting input end of the operational amplifier U11 is respectively connected to one end of the resistor R6 and the output end of the operational amplifier U8 through the resistor R8, the other end of the resistor R6 is respectively connected to the negative phase input end of the operational amplifier U8 and one end of the resistor R1, the other end of the resistor R1 is connected to the negative electrode of the battery, the non-inverting input end of the operational amplifier U8 is respectively connected to one end of the resistor R2 and one end of the resistor R14, the other end of the resistor R2 is connected to the positive electrode of the battery, The other end of the resistor R14 is grounded, the positive electrode of the diode D3 is respectively connected to one end of the capacitor C3 and the output end of the operational amplifier U10, the other end of the capacitor C3 is connected to one end of the resistor R11, the other end of the resistor R11 is respectively connected to the negative phase input end of the operational amplifier U10 and one end of the resistor R9, the other end of the resistor R9 sets the current value ISET, the non-inverting input end of the operational amplifier U10 is connected to one end of the resistor R10, the other end of the resistor R10 is respectively connected to one end of the resistor R5 and the output end of the operational amplifier U9, the other end of the resistor R5 is respectively connected to the negative phase input end of the operational amplifier U9 and one end of the resistor R3, the non-inverting input end of the operational amplifier U9 is respectively connected to one end of the resistor R4 and one end of the resistor R13, the other end of the resistor R13 is grounded, and the other end of R3 and the other end of the resistor R4 are respectively connected to the charging and discharging current sampling feedback voltage.

3. The bidirectional buck-boost circuit for battery charging and discharging according to claim 2, characterized in that: The operational amplifier U8, the resistor R6, the resistor R1, the resistor R2 and the resistor R14 in the buck-boost switching control circuit form a differential amplifier circuit, and the differential amplifier circuit is used to sample and amplify the battery voltage.

4. The bidirectional buck-boost circuit for battery charging and discharging according to claim 3, characterized in that: The resistor R7, the resistor R8, the resistor R12, the capacitor C2, the operational amplifier U11, and the diode D2 in the buck-boost switching control circuit form a voltage loop error amplifier, and the voltage loop error amplifier is used to respond to changes in the battery voltage and provide a comparison value for the power chip U1 to generate a PWM signal.

5. The bidirectional buck-boost circuit for battery charging and discharging according to claim 4, characterized in that: The dual-tube main power buck-boost circuit includes electrolytic C4, electrolytic C5, field effect tube VT2, field effect tube VT3, diode D4, diode D5, inductor L1, resistor R_Isense, relay switch S1 and battery VBAT; The positive electrode of the electrolytic capacitor C4 is respectively connected to the VIN terminal, the negative electrode of the diode D4 and the drain of the field effect transistor VT2, the gate of the field effect transistor VT2 is connected to the Ho_driver terminal, the source of the field effect transistor VT2 is respectively connected to the positive electrode of the diode D4, the VS terminal, one end of the inductor L1, the drain of the field effect transistor VT3 and the negative electrode of the diode D5, the other end of the inductor L1 is respectively connected to the I- terminal, one end of the resistor R_Isense and the positive electrode of the electrolytic capacitor C5, the other end of the resistor R_Isense is respectively connected to the I+ terminal and one end of the relay switch S1, the other end of the relay switch S1 is connected to the positive electrode of the battery VBAT, the negative electrode of the battery VBAT is respectively connected to the negative electrode of the electrolytic capacitor C5, the positive electrode of the diode D5, the source of the field effect transistor VT3 and the negative electrode of the electrolytic capacitor C4 and grounded, and the gate of the field effect transistor VT3 is connected to the Lo_driver terminal.

6. The bidirectional buck-boost circuit for battery charging and discharging according to claim 5, characterized in that: The electrolysis C4 is the input electrolysis, and the electrolysis C5 is the output electrolysis; the resistor R_Isense is the charge and discharge current sampling resistor.

7. The bidirectional buck-boost circuit for battery charging and discharging according to claim 6, characterized in that: The charging and discharging current sampling and switching circuit includes an analog switch chip U11, a resistor R15, a resistor R16, and a transistor VT1; The S1 pin and the S3 pin of the analog switch chip U11 are both connected to the I- terminal, the S2 pin and the S4 pin of the analog switch chip U11 are both connected to the I+ terminal, the D1 pin and the D2 pin of the analog switch chip U11 are both connected to the I— terminal, the D3 pin and the D4 pin of the analog switch chip U11 are both connected to the I++ terminal, the IN4 pin of the analog switch chip U11 is connected to the MODE signal, the IN1 pin of the analog switch chip U11 is respectively connected to the MODE signal and one end of the resistor R16, the other end of the resistor R16 is connected to the base of the transistor VT1, the collector of the transistor VT1 is respectively connected to the resistor R15, the IN2 pin of the analog switch chip U11 and the IN3 pin of the analog switch chip U11, and the emitter of the transistor VT1 is grounded.

8. The bidirectional buck-boost circuit for battery charging and discharging according to claim 7, characterized in that: The charge and discharge current sampling switching circuit realizes automatic switching of current sampling according to the MODE signal, and ensures that the output of the differential amplifier circuit is a positive voltage.

9. The bidirectional buck-boost circuit for battery charging and discharging according to claim 8, characterized in that: The inputs of the analog switch chip U11 are IN1 pin, IN2 pin, IN3 pin and IN4 pin respectively, and the IN1 pin controls the switch of the S1 pin and the D1 pin, the IN2 pin controls the switch of the S2 pin and the D2 pin, the IN3 pin controls the switch of the S3 pin and the D3 pin, and the IN4 pin controls the switch of the S4 pin and the D4 pin.

10. A control method for a bidirectional buck-boost circuit for battery charging and discharging, characterized in that: The control method includes: When the relay switch S1 is turned on, and the EN signal and the MODE signal are both in a high-level state, a PWM signal is output through the Ho_driver pin of the half-bridge driver chip U7, and the Lo_driver pin of the power chip U7 is always in a low-level state. At this time, the dual-tube main power buck-boost circuit is in a buck charging mode, and the field effect tube VT2 and the diode D5 start working to realize battery charging; When the relay switch S1 is turned on, and the EN signal is in a high-level state, and the MODE signal is in a low-level state, a PWM signal is output through the Lo_driver pin of the half-bridge driver chip U7, and the Ho_driver pin of the power chip U7 is always in a low-level state. At this time, the dual-tube main power buck-boost circuit is in a boost discharge mode, and the field effect tube VT3 and the diode D4 start working to realize battery discharge; When the relay switch S1 is disconnected and the EN signal and the MODE signal are in a low level state, the Ho_driver pin and the Lo_driver pin of the power chip U7 are both in a low level state, and the battery stops charging and discharging.

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