Display device, preparation method of display device and test method of display device
By setting up test subgroups of different numbers of output electrodes in the test area of the display device and electrically connecting the isolation conductive layer and the test electrode, the problem of inaccurate overlap effect evaluation in the test area in the prior art is solved, and more accurate evaluation and performance improvement are achieved.
Patent Information
- Application Number
- CN202410742460.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-07
- Publication Date
- 2025-05-02
AI Technical Summary
The method used by the existing display device to evaluate the overlap effect of the cathode of the light emitting unit and the isolation structure in the test area is not accurate enough, which affects the accurate evaluation of the overlap effect in the display area, and thus affects the performance of the display device.
By setting the first test subgroup and the second test subgroup in the test area of the display device, the output electrodes of the two are not equal, and electrically connected by the isolation conductive layer and the test electrode, the overlap resistance between the isolation test structure and the test electrode is calculated using the difference in the test resistance of the different test subgroups, thereby more accurately evaluating the overlap effect of the isolation structure and the cathode in the display area.
This method can more accurately test the output electrode of the isolation test structure, and then more accurately evaluate the overlap effect between the isolation structure of the display area and the cathode, thereby improving the performance of the display device.
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Figure CN119923163A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display device, a method for preparing the display device, and a method for testing the display device. Background Art
[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display devices.
[0003] However, there are still some problems in display devices that need to be solved urgently. Summary of the invention
[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display device, wherein the display device includes a display area and a non-display area at least partially surrounding the display area, wherein the non-display area includes a test area, and the display device includes:
[0005] substrate;
[0006] a test element group located at one side of the substrate, the test element group being located at the test area, the test element group comprising a first test subgroup and a second test subgroup, the orthographic projection of the first test subgroup on the substrate being outside the orthographic projection of the second test subgroup on the substrate;
[0007] The test element group includes an isolation conductive layer located on one side of the substrate, the isolation conductive layer includes an isolation test structure and an output electrode, the isolation test structure and the output electrode are electrically connected, and the number of output electrodes of the first test subgroup is not equal to the number of output electrodes of the second test subgroup.
[0008] In a possible implementation, the isolation test structure is provided with a test opening, the test element group further comprises a light emitting test portion and a test electrode which are located in the test opening and are sequentially stacked in a direction away from the substrate, and the test electrode extends to be electrically connected to the isolation test structure and the output electrode;
[0009] Preferably, the orthographic projection of the output electrode on the substrate is located within the orthographic projection of the test opening on the substrate.
[0010] In a possible implementation manner, the isolation conductive layer extends to the display area, the isolation conductive layer includes an isolation structure, the isolation structure is located in the display area, and the isolation structure encloses an isolation opening;
[0011] Preferably, the shape of the orthographic projection of the test opening on the substrate is the same as the shape of the orthographic projection of the isolation opening on the substrate;
[0012] Preferably, an area of an orthographic projection of the test opening on the substrate is N times an area of an orthographic projection of the isolation opening on the substrate, wherein N is greater than 1.
[0013] In a possible implementation, the display device further includes a light emitting unit at least partially located in the isolation opening;
[0014] Preferably, the light-emitting unit comprises a first electrode, a light-emitting portion and a second electrode which are sequentially stacked in a direction away from the substrate;
[0015] Preferably, the light emitting part and the light emitting testing part are arranged on the same layer;
[0016] Preferably, the second electrode and the test electrode are arranged in the same layer.
[0017] In a possible implementation manner, the isolation test structure and the output electrode both include a first test isolation portion and a second test isolation portion which are sequentially stacked in a direction away from the substrate, and an orthographic projection of a side of the first test isolation portion away from the substrate on the substrate is located within an orthographic projection of the second test isolation portion on the substrate;
[0018] Preferably, the test electrode extends to be electrically connected to the first test isolation portion.
[0019] In a possible implementation, the display device further includes:
[0020] A conductive layer located on one side of the substrate, the conductive layer comprising a plurality of test traces, and the test element group comprising the test traces;
[0021] An insulating layer located on a side of the conductive layer away from the substrate, wherein a plurality of first test vias exposing at least a portion of the test traces are provided on the insulating layer in a direction perpendicular to the substrate, and the output electrode and the isolation test structure are electrically connected to the test traces through the first test vias respectively;
[0022] Preferably, the test element group performs signal input via the test trace electrically connected to the isolation test structure;
[0023] Preferably, the test element group outputs signals through the test traces electrically connected to the output electrodes;
[0024] Preferably, the test trace electrically connected to the output electrode is electrically connected to at least two pins;
[0025] Preferably, the test trace electrically connected to the isolation test structure is electrically connected to at least two pins.
[0026] In a possible implementation, the conductive layer includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer stacked in sequence in a direction away from the substrate, and the fourth conductive layer includes the test trace;
[0027] Preferably, the fourth conductive layer is the conductive layer closest to the isolation conductive layer;
[0028] Preferably, a first planarization layer is provided between the third conductive layer and the fourth conductive layer, a second planarization layer is provided on a side of the fourth conductive layer away from the substrate, the insulating layer includes the second planarization layer, and the first test via is arranged on the second planarization layer.
[0029] In a possible implementation, the display device further includes a pixel defining layer located on a side of the insulating layer away from the substrate, and along a direction perpendicular to the substrate, a plurality of second test vias exposing at least a portion of the test traces are provided on the pixel defining layer, and the output electrode and the isolation test structure are electrically connected to the test traces through the second test vias and the first test vias in sequence, respectively;
[0030] Preferably, at least a portion of the pixel defining layer extends to a side wall of the first test via hole;
[0031] Preferably, the pixel defining layer wraps around a side wall of the first test via hole.
[0032] In a possible implementation manner, the orthographic projection of the second test via hole on the substrate is located within the orthographic projection of the first test via hole on the substrate;
[0033] Preferably, the center of the orthographic projection of the first test via hole on the substrate coincides with the center of the orthographic projection of the second test via hole on the substrate;
[0034] Preferably, the pixel defining layer extends to the display area, the pixel defining layer located in the display area includes a pixel opening, and the display device further includes a light emitting unit at least partially located in the pixel opening.
[0035] In a possible implementation manner, the shape of the orthographic projection of the test opening of the first test subgroup on the substrate is the same as the shape of the orthographic projection of the test opening of the second test subgroup on the substrate;
[0036] Preferably, the area of the orthographic projection of the test openings of the first test subgroup on the substrate is equal to the area of the orthographic projection of the test openings of the second test subgroup on the substrate;
[0037] Preferably, an orthographic projection of the output electrode on the substrate does not overlap with an orthographic projection of the isolation test structure on the substrate.
[0038] In a possible implementation manner, the display area of the display device further includes a pixel opening, and the shapes of the orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are at least partially identical to the shapes of the orthographic projections of the pixel opening on the substrate;
[0039] Preferably, the areas of the orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are M times the areas of the orthographic projections of the pixel openings on the substrate, where M is greater than or equal to 1.
[0040] In a possible implementation manner, the areas of the orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are equal to the areas of the orthographic projections of the pixel openings on the substrate;
[0041] Preferably, there are multiple test element groups, and the shapes of the orthographic projections of the output electrodes of at least two of the test element groups on the substrate are different.
[0042] In a possible implementation, the display device further includes a first encapsulation layer located on a side of the light-emitting unit away from the substrate, the first encapsulation layer including a plurality of encapsulation units arranged at intervals;
[0043] Preferably, at least part of the packaging unit extends from a side surface of the isolation structure to a side of the isolation structure away from the substrate, and the side surface of the isolation structure is a surface of the isolation structure facing the isolation opening;
[0044] Preferably, at least part of the packaging unit extends from a side of the isolation test structure to a side of the isolation test structure away from the substrate;
[0045] Preferably, adjacent packaging units are arranged at intervals on a side of the isolation structure away from the substrate;
[0046] Preferably, a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and a side of the isolation structure away from the substrate.
[0047] In a possible implementation, the isolation structure includes a first isolation portion and a second isolation portion which are sequentially stacked in a direction away from the substrate, and an orthographic projection of a side of the first isolation portion away from the substrate on the substrate is located within an orthographic projection of the second isolation portion on the substrate;
[0048] Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further comprises a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion;
[0049] Preferably, the material of the third isolation part includes molybdenum metal; and / or the material of the first isolation part includes aluminum metal; and / or the material of the second isolation part includes titanium metal.
[0050] In a possible implementation, the present application provides a method for preparing a display device, the display device comprising a display area and a non-display area at least partially surrounding the display area, the non-display area comprising a test area, the preparation method comprising:
[0051] providing a substrate;
[0052] A test element group is formed on one side of the substrate, the test element group is located in the test area, the test element group includes a first test subgroup and a second test subgroup, the orthographic projection of the first test subgroup on the substrate is outside the orthographic projection of the second test subgroup on the substrate; the test element group includes an isolation conductive layer located on one side of the substrate, the isolation conductive layer includes an isolation test structure and an output electrode, the isolation test structure and the output electrode are electrically connected, and the number of output electrodes of the first test subgroup is not equal to the number of output electrodes of the second test subgroup.
[0053] In a possible implementation, the isolation test structure is provided with a test opening, the orthographic projection of the output electrode on the substrate is located within the orthographic projection of the test opening on the substrate, and the step of forming a test element group on one side of the substrate includes:
[0054] forming a conductive layer on one side of the substrate, the conductive layer comprising a plurality of test traces, and the test element group comprising the test traces;
[0055] An insulating layer is formed on a side of the conductive layer away from the substrate, and a plurality of first test vias exposing at least a portion of the test traces are provided on the insulating layer in a direction perpendicular to the substrate;
[0056] A pixel defining layer is formed on a side of the insulating layer away from the substrate, and a plurality of second test vias exposing at least a portion of the test wiring are provided on the pixel defining layer in a direction perpendicular to the substrate;
[0057] An isolation conductive layer is formed on a side of the pixel defining layer away from the substrate, and the output electrode and the isolation test structure are electrically connected to the test trace through the second test via hole and the first test via hole respectively;
[0058] A light emitting test portion and a test electrode are sequentially formed in the test opening in a direction away from the substrate, and the test electrode is extended to be electrically connected to both the isolation test structure and the output electrode.
[0059] In a possible implementation manner, after the step of forming a test element group on one side of the substrate, the method further includes:
[0060] The test area is removed.
[0061] In a possible implementation, the present application further provides a method for testing a display device, the display device including the display device described in the present application, the first test subgroup including a output electrodes, and the second test subgroup including b output electrodes; the test method includes:
[0062] Obtaining a first test resistance R of the first test subgroup 量测1 ;
[0063] Obtain the second test resistance R of the second test subgroup 量测2 ;
[0064] Based on the first test resistor R 量测1 and the second test resistor R 量测2 , the lap resistance R between the isolation test structure and the test electrode is obtained by the following formula 搭接 :
[0065] R 搭接 =(R 量测1 / bR 量测2 / a) / (1 / b-1 / a)
[0066] Among them, R 量测1 =R 搭接 +R 内阻 / a,R 量测2 =R 搭接 +R 内阻 / b, b>a, R 内阻 represents the lap resistance between the output electrode and the test electrode;
[0067] Based on the lap resistance R between the isolation test structure and the test electrode 搭接 , determine the overlapping effect between the isolation structure of the display area AA and the second electrode.
[0068] In a possible implementation manner, the bridging resistance R between the isolation test structure and the test electrode 搭接 The step of determining the overlapping effect between the isolation structure of the display area and the second electrode comprises:
[0069] The lap resistance R' between the isolation structure and the second electrode is obtained by the following formula 搭接 :
[0070] R' 搭接 =(R 量测1 / bR 量测2 / a) / ((1 / b-1 / a)*N)
[0071] Based on the bridging resistance R′ between the isolation structure and the second electrode 搭接 , determine the overlapping effect of the isolation structure and the second electrode.
[0072] In a possible implementation, the present application further provides another method for testing a display device, wherein the display device includes the display device described in the present application, the first test subgroup includes a output electrodes, and the second test subgroup includes b output electrodes; the test method includes:
[0073] Obtaining a first test resistance R of the first test subgroup 量测1 ;
[0074] Obtain the second test resistance R of the second test subgroup 量测2 ;
[0075] Based on the first test resistor R 量测1 and the second test resistor R 量测2 , the lap internal resistance R between the output electrode and the test electrode is obtained by the following formula 内阻 :
[0076] R 内阻 =(R 量测1 -R 量测2 )*ab / (ba)
[0077] Among them, R 量测1 =R 搭接 +R 内阻 / a,R量测2 =R 搭接 +R 内阻 / b, b>a, R 搭接 represents the lap resistance between the isolation test structure and the test electrode;
[0078] Based on the internal resistance R between the output electrode and the test electrode 内阻 , obtaining a lap resistance between the isolation test structure and the test electrode;
[0079] Based on the overlap resistance between the isolation test structure and the test electrode, the overlap effect between the isolation structure of the display area and the second electrode is determined.
[0080] Compared with the prior art, this application has the following beneficial effects:
[0081] The present application provides a display device, a method for preparing the display device, and a method for testing the display device. By setting the number of output electrodes of a first test subgroup to be unequal to the number of output electrodes of a second test subgroup, the output electrodes of the isolated test structure can be tested more accurately, thereby more accurately evaluating the overlap effect between the isolation structure of the display area and the cathode, thereby improving the performance of the display device. BRIEF DESCRIPTION OF THE DRAWINGS
[0082] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0083] Figure 1 This is one of the top view schematic diagrams of the display device provided in the embodiment of the present application;
[0084] Figure 2 A schematic top view of a first test subgroup provided in an embodiment of the present application;
[0085] Figure 3 A schematic top view of a second test subgroup provided in an embodiment of the present application;
[0086] Figure 4 Provided for the embodiments of this application Figure 2 One of the cross-sectional diagrams of AA;
[0087] Figure 5 An equivalent circuit diagram for testing the resistance of the first test subgroup provided in an embodiment of the present application;
[0088] Figure 6An equivalent circuit diagram for testing the resistance of the second test subgroup provided in an embodiment of the present application;
[0089] Figure 7 Provided for the embodiments of this application Figure 2 The second schematic diagram of the cross section of AA;
[0090] Figure 8 A partial cross-sectional schematic diagram of a display area and a non-display area of a display device provided in an embodiment of the present application;
[0091] Fig. 9 Provided for the embodiments of this application Figure 2 The third schematic diagram of the cross section of AA;
[0092] Fig.10 A cross-sectional schematic diagram of a display area including a first encapsulation layer provided in an embodiment of the present application;
[0093] Fig.11 A cross-sectional schematic diagram of a display area provided in an embodiment of the present application including a second encapsulation layer and a third encapsulation layer;
[0094] Fig.12 The isolation structure provided in the embodiment of the present application includes a cross-sectional schematic diagram of a three-layer structure;
[0095] Fig.13 A schematic diagram of a process for preparing a display device provided in an embodiment of the present application;
[0096] Fig.14 A schematic cross-sectional view of forming a conductive layer on one side of a substrate according to an embodiment of the present application;
[0097] Fig.15 A cross-sectional schematic diagram of forming an insulating layer on a side of a conductive layer away from a substrate provided in an embodiment of the present application;
[0098] Fig.16 A cross-sectional schematic diagram of forming a pixel defining layer on a side of an insulating layer away from a substrate provided in an embodiment of the present application;
[0099] Fig.17 A second schematic top view of the display device provided in an embodiment of the present application;
[0100] Fig.18 One of the flow charts of a method for testing a display device provided in an embodiment of the present application;
[0101] Fig.19 The second flowchart of a method for testing a display device provided in an embodiment of the present application is shown.
[0102] Figure numerals: 1, test element group; 2, pin; 3, isolation test structure; 31, first test isolation portion; 32, second test isolation portion; 4, test opening; 5, output electrode; 6, substrate; 7, conductive layer; 71, test trace; 701, first conductive layer; 702, second conductive layer; 703, third conductive layer; 704, fourth conductive layer; 8, pixel defining layer; 81, second test via; 82, pixel opening; 9, insulating layer; 91, first test via; 1 0. Light-emitting test part; 11. Test electrode; 12. Isolation structure; 121. First isolation part; 122. Second isolation part; 123. Third isolation part; 13. Isolation opening; 14. First electrode; 15. Light-emitting part; 16. Second electrode; 17. Buffer layer; 18. First planarization layer; 19. Second planarization layer; 20. Light-emitting unit; 21. First encapsulation layer; 211. Encapsulation unit; 22. Second encapsulation layer; 23. Third encapsulation layer; 24. Isolation conductive layer. DETAILED DESCRIPTION
[0103] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0104] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0105] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0106] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0107] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.
[0108] In the related art, a display device includes a substrate, an isolation structure located on one side of the substrate, and a light-emitting unit at least partially located in an isolation opening of the isolation structure. The lap resistance between the cathode of the light-emitting unit and the isolation structure is a key indicator for measuring the process and product feasibility of the display device.
[0109] In the related art, a test area is included in the non-display area of the display device to evaluate the effect of the overlap between the cathode of the light-emitting unit in the display area and the isolation structure. However, the overlap resistance between the cathode of the dummy light-emitting unit and the isolation structure tested in the test area in the related art is not accurate enough, which affects the accuracy of evaluating the overlap resistance between the cathode of the light-emitting unit in the display area and the isolation structure, and ultimately affects the performance of the display device.
[0110] In view of this, the present embodiment provides a solution that can improve the accuracy of evaluating the overlap resistance between the cathode and the isolation structure of the display device. The solution provided by the present embodiment is described in detail below.
[0111] See also Figure 1-Figure 4 This embodiment provides a display device, which includes a display area AA and a non-display area AB at least partially surrounding the display area AA, the non-display area AB includes a test area AC, and the display device includes a substrate 6, a test element group 1 and an isolation conductive layer 24.
[0112] The test element group 1 is located on one side of the substrate 6 , and is located in the test area AC. The test element group 1 includes a first test subgroup and a second test subgroup. The orthographic projection of the first test subgroup on the substrate 6 is outside the orthographic projection of the second test subgroup on the substrate 6 .
[0113] The test element group 1 includes an isolation conductive layer 24, which is located on one side of the substrate 6. The isolation conductive layer 24 includes an isolation test structure 3 and an output electrode 5. The isolation test structure 3 and the output electrode 5 are electrically connected. The number of output electrodes 5 of the first test subgroup is not equal to the number of output electrodes 5 of the second test subgroup.
[0114] The first test subgroup and the second test subgroup are insulated from each other, and the first test subgroup and the second test subgroup are independent of each other and do not affect each other. The test element group 1 may include not only the first test subgroup and the second test subgroup, but also more test subgroups, each test subgroup is insulated from each other, and the number of lap resistors of each test subgroup is different.
[0115] In some embodiments, for example, the first test subgroup includes one output electrode 5, and the second test subgroup includes two output electrodes 5. Figure 5 , Figure 5 is an equivalent circuit diagram when the first test subgroup tests resistance. According to the equivalent circuit diagram, it can be known that the test resistance of the first test subgroup tested by the resistance measuring device is R 量测1 =R 搭接 +R 内阻 .
[0116] See also Figure 6 , Figure 6 is the equivalent circuit diagram of the second test subgroup when testing the resistance. According to the equivalent circuit diagram, it can be known that the test resistance of the second test subgroup is R 量测2 =R 搭接 +R 内阻 / 2. Among them, R 内阻 represents the internal resistance between the output electrode 5 and the test electrode 11 of the test element group 1, R 搭接 represents the lap resistance between the isolated test structure 3 and the test electrode 11 of the test element group 1, R 量测1 represents the test resistance of the first test subgroup, R 量测2 represents the test resistance of the second test subgroup.
[0117] Since the output electrodes 5 of the first test subgroup and the second test subgroup are the same in size and shape, the R 内阻 equal, in this embodiment, R of the first test subgroup and the second test subgroup 搭接 Thus, according to the test resistance R of the first test subgroup 量测1 and the test resistor R of the second test subgroup 量测2 , the lap resistance R between the isolated test structure 3 and the test electrode 11 of the test element group 1 can be obtained 搭接 =2R 量测2 -R 量测1 .
[0118] According to the formula, the bridging resistance R between the isolated test structure 3 and the test electrode 11 of the test element group 1 in this embodiment is 搭接 The output electrode 5 and the test electrode 11 of the test element group 1 are not affected by the internal resistance R 内阻 Therefore, the lap resistance R can be tested more accurately. 搭接 , according to the bridging resistance R 搭接 The overlapping resistance between the isolation structure 12 and the cathode in the display area AA can be obtained more accurately, so as to more accurately determine the overlapping effect between the isolation structure 12 and the cathode in the display area AA, and finally improve the performance of the display device.
[0119] Based on the above design, this embodiment sets the number of output electrodes 5 of the first test subgroup to be unequal to the number of output electrodes 5 of the second test subgroup, thereby more accurately testing the output electrodes 5 of the isolation test structure 3, thereby more accurately evaluating the overlap effect between the isolation structure 12 and the cathode of the display area AA, and further improving the performance of the display device.
[0120] In one possible implementation, see Figure 7 The isolation test structure 3 is provided with a test opening 4, the orthographic projection of the output electrode 5 on the substrate 6 is located within the orthographic projection of the test opening 4 on the substrate 6, and the test element group 1 also includes a light-emitting test part 10 and a test electrode 11 which are located in the test opening 4 and are stacked in sequence in a direction away from the substrate 6, and the test electrode 11 extends to be electrically connected to the isolation test structure 3 and the output electrode 5.
[0121] When forming a light-emitting functional layer, the light-emitting functional layer will be separated by the isolation test structure 3 to form a plurality of spaced-apart light-emitting test parts 10. When forming a second electrode layer, the second electrode layer will be separated by the isolation test structure 3 to form a plurality of spaced-apart test electrodes 11. The isolation test structure 3 and the output electrode 5 include conductive materials, and the second electrode 16 extends to be electrically connected to the isolation structure 12 and the output electrode 5.
[0122] Preferably, see Figure 8 , the isolation conductive layer 24 extends to the display area AA, the isolation conductive layer 24 includes an isolation structure 12, the isolation structure 12 is located in the display area AA, and the isolation structure 12 encloses an isolation opening 13; the display device also includes a light-emitting unit 20 at least partially located in the isolation opening 13, and the light-emitting unit 20 includes a first electrode 14, a light-emitting portion 15, and a second electrode 16 that are sequentially stacked in a direction away from the substrate 6. Among them, the light-emitting portion 15 is arranged in the same layer as the light-emitting test portion 10, and the second electrode 16 is arranged in the same layer as the test electrode 11.
[0123] When forming the light-emitting functional layer, the light-emitting functional layer will be separated by the isolation structure 12 to form a plurality of light-emitting portions 15 arranged at intervals. When forming the second electrode layer, the second electrode layer will be separated by the isolation structure 12 to form a plurality of second electrodes 16 arranged at intervals. The isolation structure 12 includes a conductive material. The second electrode 16 is electrically connected to the isolation structure 12. A first electrode 14, a light-emitting portion 15 and a second electrode 16 form a light-emitting unit 20. Among them, the first electrode 14 is an anode and the second electrode 16 is a cathode.
[0124] When forming the light-emitting functional layer, the light-emitting portion 15 can be formed in the display area AA, and the light-emitting test portion 10 can be formed in the test area AC at the same time; when forming the second electrode layer, the second electrode 16 can be formed in the display area AA, and the test electrode 11 can be formed in the test area AC at the same time. In this way, there is no need to set the light-emitting test portion 10 and the test electrode 11 through a special process, thereby reducing the cost of forming the light-emitting test portion 10 and the test electrode 11.
[0125] In one possible implementation, see again Figure 2 and Figure 3 The shape of the orthographic projection of the test opening 4 of the first test subgroup on the substrate 6 is the same as the shape of the orthographic projection of the test opening 4 of the second test subgroup on the substrate 6, and the area of the orthographic projection of the test opening 4 of the first test subgroup on the substrate 6 is equal to the area of the orthographic projection of the test opening 4 of the second test subgroup on the substrate 6.
[0126] The test openings 4 of the first test subgroup and the second test subgroup are set to have the same shape and size, so that the overlap resistance between the isolated test structure 3 of the first test subgroup and the test electrode 11 can be equal to the overlap resistance between the isolated test structure 3 of the second test subgroup and the test electrode 11, so that the overlap resistance R between the isolated test structure 3 and the test electrode 11 can be tested more accurately. 搭接 .
[0127] Preferably, see again Figure 2 and Figure 3 , the orthographic projection of the output electrode 5 on the substrate 6 does not overlap with the orthographic projection of the isolated test structure 3 on the substrate 6. There is a certain distance between the output electrode 5 and the isolated test structure 3, and the output electrode 5 and the isolated test structure 3 are not in direct contact, so that the test electrode 11 can be better overlapped with the output electrode 5.
[0128] In one possible implementation, see again Figure 7 The isolation test structure 3 and the output electrode 5 both include a first test isolation portion 31 and a second test isolation portion 32 which are stacked in sequence in a direction away from the substrate 6, and the orthographic projection of the side of the first test isolation portion 31 away from the substrate 6 on the substrate 6 is located within the orthographic projection of the second test isolation portion 32 on the substrate 6.
[0129] Since the second test isolation portion 32 is located on the side of the first test isolation portion 31 away from the substrate 6, and the lateral width of the second test isolation portion 32 is greater than the lateral width of the first test isolation portion 31, the second test isolation portion 32 will cause the light-emitting functional layer to be disconnected at the isolation test structure 3 to form a light-emitting test portion 10 located in the test opening 4, and the second electrode layer to be disconnected at the isolation test structure 3 to form a test electrode 11 located in the test opening 4, and the test electrode 11 is extended to overlap with the first test isolation portion 31, so that the overlap resistance between the test electrode 11 and the isolation test structure 3 can be tested more accurately.
[0130] In one possible implementation, see again Figure 7 The display device further includes a conductive layer 7 and an insulating layer 9 located on one side of the substrate 6.
[0131] The conductive layer 7 includes a plurality of test traces 71, and the test element group 1 includes the test traces 71; the insulating layer 9 is located on the side of the conductive layer 7 away from the substrate 6, and a plurality of first test vias 91 exposing at least part of the test traces 71 are provided on the insulating layer 9 in a direction perpendicular to the substrate 6, and the output electrode 5 and the isolation test structure 3 are electrically connected to the test traces 71 through the first test vias 91. The test element group 1 inputs signals through the test traces 71 electrically connected to the isolation test structure 3, and the test element group 1 outputs signals through the test traces 71 electrically connected to the output electrode 5.
[0132] When the isolated test structure 3 and the output electrode 5 are formed, the isolated test structure 3 and the output electrode 5 are electrically connected to the test trace 71 through the first test via 91. In this way, the test trace 71 is finally electrically connected to the test electrode 11. By electrically connecting the resistance test device to the test trace 71, it is easier to test the test resistance R of the first test subgroup. 量测1 The test resistance of the second test subgroup is R 量测2 .
[0133] In one possible implementation, see Fig. 9 The conductive layer 7 includes a first conductive layer 701, a second conductive layer 702, a third conductive layer 703 and a fourth conductive layer 704 which are sequentially stacked in a direction away from the substrate 6, and the fourth conductive layer 704 includes a test trace 71. The fourth conductive layer 704 is the conductive layer closest to the isolation conductive layer 24.
[0134] The display device further includes a buffer layer 17 located on one side of the substrate 6 and a semiconductor layer located on the side of the buffer layer 17 away from the substrate 6, and the first conductive layer 701 is located on the side of the semiconductor layer away from the substrate 6. In the display area AA, the semiconductor layer includes a source region, a drain region and a channel region, the first conductive layer 701 includes a gate and a first capacitor plate, the second conductive layer 702 includes a second capacitor plate, the first capacitor plate and the second capacitor plate form a capacitor, the third conductive layer 703 includes a drain and a source, the drain is electrically connected to the drain region, the source is electrically connected to the source region, the gate, the source and the drain form a switching device, the metal wiring of the fourth conductive layer 704 is connected to the drain, and the metal wiring of the fourth conductive layer 704 is further electrically connected to the first electrode 14. In this embodiment, the test wiring 71 of the test area AC is located in the fourth conductive layer 704.
[0135] Preferably, see again Fig. 9 A first planarization layer 18 is provided between the third conductive layer 703 and the fourth conductive layer 704 , a second planarization layer 19 is provided on the side of the fourth conductive layer 704 away from the substrate 6 , the insulating layer 9 includes the second planarization layer 19 , and the first test via 91 is provided on the second planarization layer 19 .
[0136] The second planarization layer 19 extends to the test area AC. A first test via 91 is provided on the second planarization layer 19 in a direction perpendicular to the substrate 6 . The output electrode 5 and the isolation test structure 3 are electrically connected to the test trace 71 through the first test via 91 .
[0137] In one possible implementation, see again Fig. 9 The display device also includes a pixel defining layer 8 located on a side of the insulating layer 9 away from the substrate 6. Along a direction perpendicular to the substrate 6, a plurality of second test vias 81 exposing at least part of the test trace 71 are provided on the pixel defining layer 8. The output electrode 5 and the isolation test structure 3 are electrically connected to the test trace 71 through the second test vias 81 and the first test vias 91, respectively.
[0138] Please see again Figure 8 , the pixel defining layer 8 extends from the display area AA to the non-display area AB, the pixel defining layer 8 in the display area AA further includes a pixel opening 82, and the display device further includes a light emitting unit 20 at least partially located in the pixel opening 82. In the test area AC, a second test via 81 is provided on the pixel defining layer 8 in a direction perpendicular to the substrate 6, and the second test via 81 can be formed at the same time as the pixel opening 82 is formed. In this way, there is no need to specially set up a process for opening the second test via 81, thereby reducing the cost of opening the second test via 81.
[0139] Preferably, see again Fig. 9, at least part of the pixel defining layer 8 extends to the side wall of the first test via 91. The material of the second planarization layer 19 includes an organic material, and the material of the test trace 71 includes a metal material. Organic materials and metal materials are likely to generate water vapor when in contact, and the material of the pixel defining layer 8 includes an inorganic material, and water vapor is not easily transferred in the inorganic material. Therefore, in this embodiment, by setting the pixel defining layer 8 to extend to the side wall of the first test via 91, it is possible to prevent the water vapor of the second planarization layer 19 from being transferred to the light-emitting unit 20, and it is possible to prevent the formation of voids when the isolation conductive layer 24 is formed, thereby improving the quality of the display device.
[0140] Preferably, see again Fig. 9 The pixel defining layer 8 wraps the side wall of the first test via hole 91 . The pixel defining layer 8 completely wraps the side wall of the first test via hole 91 , so that the water vapor of the second planarization layer 19 is less likely to be transferred toward the light emitting unit 20 .
[0141] In one possible implementation, see again Fig. 9 , the orthographic projection of the second test via 81 on the substrate 6 is located within the orthographic projection of the first test via 91 on the substrate 6; further, the center of the orthographic projection of the first test via 91 on the substrate 6 coincides with the center of the orthographic projection of the second test via 81 on the substrate 6. In this way, the thickness of the pixel defining layer 8 between the first test via 91 and the second test via 81 is equal, which not only makes it more difficult for the water vapor of the second planarization layer 19 to be transmitted toward the light-emitting unit 20, but also improves the electrical connection effect between the output electrode 5 and the test trace 71, and between the isolation test structure 3 and the test trace 71.
[0142] Preferably, see again Figure 2 or Figure 3 The test trace 71 electrically connected to the output electrode 5 is electrically connected to at least two pins 2, and the test trace 71 electrically connected to the isolation test structure 3 is electrically connected to at least two pins 2. The resistance test device can be electrically connected to at least four pins 2, so that the accuracy of the test resistance of the first test subgroup and the second test subgroup can be improved.
[0143] In a possible implementation, the shape of the orthographic projection of the test opening 4 on the substrate 6 is the same as the shape of the orthographic projection of the isolation opening 13 on the substrate 6 , and the area of the orthographic projection of the test opening 4 on the substrate 6 is N times the area of the orthographic projection of the isolation opening 13 on the substrate 6 , where N is greater than 1.
[0144] The shape of the test opening 4 in the test area AC is set to be the same as the shape of the isolation opening 13 located in the display area AA, and the size of the test opening 4 is enlarged compared to the isolation opening 13. In this way, the test opening 4 can imitate the isolation opening 13, and the lap resistance between the isolation test structure 3 and the test electrode 11 finally tested can more easily and directly reflect the lap resistance between the isolation structure 12 and the cathode.
[0145] In some embodiments, for example, the first test subgroup includes one output electrode 5 , the second test subgroup includes two output electrodes 5 , and the area of the orthographic projection of the test opening 4 on the substrate 6 is 5 times the area of the orthographic projection of the isolation opening 13 on the substrate 6 .
[0146] According to the above embodiment, it can be known that the bridging resistance R between the isolation test structure 3 and the test electrode 11 of the test element group 1 搭接 =2R 量测2 -R 量测1 Since the isolation structure 12 is made of the same material as the bridging resistor and the isolation test structure 3, and the test opening 4 is in the same shape as the isolation opening 13, the bridging resistor R′ between the isolation structure 12 and the second electrode 16 in the display area AA is 搭接 =(2R 量测2 -R 量测1 ) / 5. Since the lap resistance R′ between the isolation structure 12 and the second electrode 16 of the display area AA can be obtained more accurately and directly 搭接 , so the overlapping effect between the isolation structure 12 and the cathode can be evaluated more easily and accurately.
[0147] In one possible embodiment, the shape of the orthographic projection of the output electrode 5 of the first test subgroup and the second test subgroup on the substrate 6 is the same as at least a partial shape of the orthographic projection of the pixel opening 82 on the substrate 6, and the area of the orthographic projection of the output electrode 5 of the first test subgroup and the second test subgroup on the substrate 6 is M times the area of the orthographic projection of the pixel opening 82 on the substrate 6, where M is greater than or equal to 1.
[0148] The shape of the positive projection of the output electrode 5 on the substrate 6 is set to be the same as the shape of the positive projection of the pixel opening 82 on the substrate 6, and the size of the output electrode 5 is enlarged compared to the pixel opening 82. In this way, the output electrode 5 can imitate the pixel opening 82, and the lap resistance between the isolation test structure 3 and the test electrode 11 finally tested can more easily and directly reflect the lap resistance between the isolation structure 12 and the cathode.
[0149] In some embodiments, for example, the first test subgroup includes one output electrode 5, and the second test subgroup includes two output electrodes 5; the first test resistor R of the first test subgroup 量测1 =R 搭接 +R内阻 , the second test resistor R of the second test subgroup 量测2 =R 搭接 +R 内阻 / 2; According to the first test resistance R 量测1 and the second test resistor R 量测2 It can be seen that the internal resistance R between the output electrode 5 and the test electrode 11 内阻 =(R 量测1 -R 量测2 )*2.
[0150] According to the internal resistance R between the output electrode 5 and the test electrode 11 内阻 After testing and obtaining the test resistance of other test subgroups, it is easier to obtain the lap resistance R between the corresponding isolated test structure 3 and the test electrode 11. 搭接 For example, the pth test subgroup includes p bridge resistors, and the test resistor of the pth test subgroup is R 量测p =R 搭接 +R 内阻 / p, where R 量测p and R 内阻 are all known, so that it is easier to derive, so that it is easier to evaluate the overlapping effect between the isolation structure 12 and the second electrode 16 of the display area AA.
[0151] In this embodiment, when the shapes of the orthographic projections of the output electrodes 5 of the first test subgroup and the second test subgroup on the substrate 6 are the same as the shapes of the orthographic projections of the pixel openings 82 on the substrate 6, the areas of the orthographic projections of the output electrodes 5 of the first test subgroup and the second test subgroup on the substrate 6 may be set to be M times the areas of the orthographic projections of the pixel openings 82 on the substrate 6. In this way, the stability of the output electrodes 5 may be increased, and the lap resistors may not be easily damaged during the preparation of the display device, so that the test resistances of the test subgroups may be tested more accurately.
[0152] In one possible implementation, the areas of the orthographic projections of the output electrodes 5 of the first test subgroup and the second test subgroup on the substrate 6 are equal to the areas of the orthographic projections of the pixel openings 82 on the substrate 6; when M is equal to 1, the shape and size of the output electrodes 5 are the same as the shape and size of the pixel openings 82; thus, the pixel openings 82 of the display area AA can be simulated more accurately, thereby making it easier to evaluate the overlap effect of the isolation structure 12 and the second electrode 16.
[0153] Preferably, there are multiple test element groups 1 , and the shapes of the orthographic projections of the output electrodes 5 of at least two test element groups on the substrate 6 are different.
[0154] A test element group 1 may include multiple test subgroups. For example, each test subgroup may include a first test subgroup and a second test subgroup. A test element group 1 simulates a light-emitting unit 20 of one color. The shapes of pixel openings 82 of different colors are different. Therefore, the shape of the positive projection of the output electrode 5 of each group of test elements on the substrate 6 is different.
[0155] For example, the first test element group 1 corresponds to the red light emitting unit 20, the second test element group 1 corresponds to the green light emitting unit 20, and the third test element group 1 corresponds to the blue light emitting unit 20. When forming a light emitting unit 20 of one color, different evaporation conditions, such as evaporation angle, can be adjusted.
[0156] For example, if one color of the light-emitting unit 20 corresponds to ten evaporation conditions, the first test element group 1, the second test element group 1 and the third test element group 1 respectively include ten test subgroups, and the first test element group 1, the second test element group 1 and the third test element group 1 have a total of thirty test subgroups. In this way, the overlapping effect of the isolation structure 12 and the second electrode 16 corresponding to the light-emitting units 20 of different colors under different evaporation conditions can be tested, and in future products, the evaporation conditions with better overlapping effect of the isolation structure 12 and the second electrode 16 can be selected to form a display device, and future products can be tested in advance, thereby improving the quality of future display devices.
[0157] In one possible implementation, see Fig.10 The display device also includes a first packaging layer 21 located on the side of the light-emitting unit 20 away from the substrate 6. The first packaging layer 21 includes a plurality of packaging units 211 arranged at intervals. At least some of the packaging units 211 extend from the side of the isolation structure 12 to the side of the isolation structure 12 away from the substrate 6. The side of the isolation structure 12 is the surface of the isolation structure 12 facing the isolation opening 13. At least some of the packaging units 211 extend from the side of the isolation test structure 3 to the side of the isolation test structure 3 away from the substrate 6. Adjacent packaging units 211 are spaced apart on the side of the isolation structure 12 away from the substrate 6. There is a gap between the packaging unit 211 located on the side of the isolation structure 12 away from the substrate 6 and the side of the isolation structure 12 away from the substrate 6.
[0158] During the patterning process of the light-emitting unit 20 , the first encapsulation layer 21 is disconnected at the isolation structure 12 to form the encapsulation unit 211 . The encapsulation unit 211 can completely and independently encapsulate the corresponding light-emitting unit 20 , thereby improving the display characteristics of the display panel.
[0159] Preferably, see Fig.11The display device further includes a second encapsulation layer 22 located on a side of the first encapsulation layer 21 away from the substrate 6 and a third encapsulation layer 23 located on a side of the second encapsulation layer 22 away from the substrate 6. The materials of the first encapsulation layer 21 and the third encapsulation layer 23 both include inorganic materials, and the material of the second encapsulation layer 22 includes organic materials.
[0160] The second encapsulation layer 22 and the third encapsulation layer 23 can provide a better encapsulation effect on the light emitting unit 20 , thereby further improving the encapsulation quality of the display panel.
[0161] In one possible implementation, see again Fig.10 The isolation structure 12 includes a first isolation portion 121 and a second isolation portion 122 which are stacked in sequence in a direction away from the substrate 6 , and the orthographic projection of the side of the first isolation portion 121 away from the substrate 6 on the substrate 6 is located within the orthographic projection of the second isolation portion 122 on the substrate 6 .
[0162] Since the second isolation portion 122 is located on the side of the first isolation portion 121 away from the array substrate, and the lateral width of the second isolation portion 122 is greater than the lateral width of the first isolation portion 121, the second isolation portion 122 disconnects the light-emitting functional layer and the second electrode layer at the isolation structure 12. In this way, the isolation structure 12 formed by the first isolation portion 121 and the second isolation portion 122 can make it easier to package each light-emitting unit 20 independently.
[0163] Preferably, see again Fig.10 The second electrode 16 of the light-emitting unit 20 is electrically connected to the first isolation portion 121; the first isolation portion 121 includes a conductive material, and the second electrode 16 corresponding to the light-emitting unit 20 extends to contact the side wall of the first isolation portion 121 to achieve electrical connection between the second electrode 16 corresponding to the light-emitting unit 20 and the first isolation portion 121.
[0164] See also Fig.12 The isolation structure 12 further includes a third isolation portion 123 located on a side of the first isolation portion 121 facing the substrate 6 , and the second electrode 16 of the light emitting unit 20 is electrically connected to the third isolation portion 123 .
[0165] The third isolation portion 123 includes a conductive material, and the second electrode 16 corresponding to the light emitting unit 20 extends to contact the sidewall of the third isolation portion 123 to achieve electrical connection between the second electrode 16 corresponding to the light emitting unit 20 and the third isolation portion 123 .
[0166] Preferably, the material of the third isolation portion 123 includes molybdenum metal; and / or, the material of the first isolation portion 121 includes aluminum metal; and / or, the material of the second isolation portion 122 includes titanium metal. In this way, when the isolation structure 12 separates the second electrode layer into the second electrode 16, the second electrode 16 is more easily electrically connected to the first isolation portion 121 and / or the third isolation portion 123.
[0167] In summary, the present application can more accurately test the bridging resistance R between the isolated test structure 3 and the test electrode 11 by setting the number of the output electrodes 5 of the first test subgroup to be unequal to the number of the output electrodes 5 of the second test subgroup. 搭接 , so that the overlap resistance between the isolation structure 12 of the display area AA and the second electrode 16 can be obtained more accurately, and then the overlap effect between the isolation structure 12 of the display area AA and the cathode can be evaluated more accurately, and finally the performance of the display device can be improved.
[0168] In a possible implementation, the present application provides a method for manufacturing a display device, wherein the display device includes a display area AA and a non-display area AB at least partially surrounding the display area AA, wherein the non-display area AB includes a test area AC, see Fig.13 , the preparation method comprises:
[0169] S10: providing a substrate 6.
[0170] S12: A test element group 1 is formed on one side of the substrate 6, and the test element group 1 is located in the test area AC. The test element group 1 includes a first test sub-group and a second test sub-group, and the orthographic projection of the first test sub-group on the substrate 6 is outside the orthographic projection of the second test sub-group on the substrate 6; the test element group 1 includes an isolation conductive layer 24 located on one side of the substrate 6, and the isolation conductive layer 24 includes an isolation test structure 3 and an output electrode 5, and the isolation test structure 3 and the output electrode 5 are electrically connected. The isolation test structure 3 is provided with a test opening 4, and the orthographic projection of the output electrode 5 on the substrate 6 is within the orthographic projection of the test opening 4 on the substrate 6, and the number of output electrodes 5 of the first test sub-group is not equal to the number of output electrodes 5 of the second test sub-group.
[0171] See also Fig.14 A conductive layer 7 is formed on one side of the substrate 6 , the conductive layer 7 includes a plurality of test traces 71 , and the test element group 1 includes the test traces 71 . The test traces 71 may be traces in the fourth conductive layer 704 .
[0172] See also Fig.15 An insulating layer 9 is formed on the side of the conductive layer 7 away from the substrate 6 , and a plurality of first test vias 91 exposing at least part of the test traces 71 are provided on the insulating layer 9 in a direction perpendicular to the substrate 6 . The insulating layer 9 may include a second planarization layer 19 .
[0173] See also Fig.16 A pixel defining layer 8 is formed on a side of the insulating layer 9 away from the substrate 6 , and a plurality of second test vias 81 exposing at least a portion of the test traces 71 are provided on the pixel defining layer 8 along a direction perpendicular to the substrate 6 .
[0174] The orthographic projection of the second test via 81 on the substrate 6 is located within the orthographic projection of the first test via 91 on the substrate 6; further, the center of the orthographic projection of the first test via 91 on the substrate 6 coincides with the center of the orthographic projection of the second test via 81 on the substrate 6. In this way, the thickness of the pixel defining layer 8 between the first test via 91 and the second test via 81 is the same, which not only makes it more difficult for the water vapor of the second planarization layer 19 to be transmitted toward the light-emitting unit 20, but also improves the electrical connection effect between the output electrode 5 and the test trace 71, and between the isolation test structure 3 and the test trace 71.
[0175] Please see again Figure 4 An isolation conductive layer 24 is formed on the side of the pixel defining layer 8 away from the substrate 6 , and the output electrode 5 and the isolation test structure 3 are electrically connected to the test trace 71 through the second test via 81 and the first test via 91 respectively.
[0176] At least part of the pixel defining layer 8 extends to the side wall of the first test via 91. The material of the second planarization layer 19 includes an organic material, and the material of the test trace 71 includes a metal material. Organic materials and metal materials are likely to generate water vapor when in contact, and the material of the pixel defining layer 8 includes an inorganic material, and water vapor is not easily transferred in the inorganic material. Therefore, in this embodiment, by setting the pixel defining layer 8 to extend to the side wall of the first test via 91, it is possible to prevent the water vapor of the second planarization layer 19 from being transferred to the light-emitting unit 20, and it is possible to prevent the formation of voids when the isolation conductive layer 24 is formed, thereby improving the quality of the display device.
[0177] Please see again Figure 7 A light emitting test portion 10 and a test electrode 11 are sequentially formed in the test opening 4 in a direction away from the substrate 6 , and the test electrode 11 extends to be electrically connected to both the isolation test structure 3 and the output electrode 5 .
[0178] In the display area AA, when the light-emitting functional layer is formed, the light-emitting functional layer will be isolated by the test structure 3 to form a plurality of light-emitting test parts 10 arranged at intervals. When the second electrode layer is formed, the second electrode layer will be isolated by the test structure 3 to form a plurality of test electrodes 11 arranged at intervals. The test structure 3 and the output electrode 5 include conductive materials, and the second electrode 16 extends to be electrically connected to the isolation structure 12 and the output electrode 5.
[0179] In the test area AC, when the light-emitting functional layer is formed, the light-emitting functional layer will be separated by the isolation structure 12 to form a plurality of light-emitting portions 15 arranged at intervals. When the second electrode layer is formed, the second electrode layer will be separated by the isolation structure 12 to form a plurality of second electrodes 16 arranged at intervals. The isolation structure 12 includes a conductive material. The second electrode 16 is electrically connected to the isolation structure 12. A first electrode 14, a light-emitting portion 15 and a second electrode 16 form a light-emitting unit 20. The first electrode 14 is an anode and the second electrode 16 is a cathode.
[0180] When forming the light-emitting functional layer, the light-emitting portion 15 can be formed in the display area AA, and the light-emitting test portion 10 can be formed in the test area AC at the same time. When forming the second electrode layer, the second electrode 16 can be formed in the display area AA, and the test electrode 11 can be formed in the test area AC at the same time. In this way, there is no need to set the light-emitting test portion 10 and the test electrode 11 through a special process, so that the cost of forming the light-emitting test portion 10 and the test electrode 11 can be reduced.
[0181] In the display device formed by the above method, the first test subgroup and the second test subgroup are insulated from each other, and the first test subgroup and the second test subgroup are independent of each other and do not affect each other. The test element group 1 may include not only the first test subgroup and the second test subgroup, but also more test subgroups, each test subgroup is insulated from each other, and the number of overlap resistors of each test subgroup is different.
[0182] For example, the first test subgroup includes one output electrode 5, and the second test subgroup includes two output electrodes 5. Figure 5 , Figure 5 is an equivalent circuit diagram when the first test subgroup tests resistance. According to the equivalent circuit diagram, it can be known that the test resistance of the first test subgroup tested by the resistance measuring device is R 量测1 =R 搭接 +R 内阻 .
[0183] Please see again Figure 6 , Figure 6 is the equivalent circuit diagram of the second test subgroup when testing the resistance. According to the equivalent circuit diagram, it can be known that the test resistance of the second test subgroup is R 量测2 =R 搭接 +R 内阻 / 2. Among them, R 内阻 represents the internal resistance between the output electrode 5 and the test electrode 11 of the test element group 1, R 搭接 represents the lap resistance between the isolated test structure 3 and the test electrode 11 of the test element group 1, R 量测1 represents the test resistance of the first test subgroup, R 量测2 represents the test resistance of the second test subgroup.
[0184] Since the output electrodes 5 of the first test subgroup and the second test subgroup are the same in size and shape, the R 内阻 equal, in this embodiment, R of the first test subgroup and the second test subgroup 搭接 Thus, according to the test resistance R of the first test subgroup 量测1 and the test resistor R of the second test subgroup 量测2 , the lap resistance R between the isolated test structure 3 and the test electrode 11 of the test element group 1 can be obtained 搭接 =2R 量测2 -R 量测1 .
[0185] According to the formula, the bridging resistance R between the isolated test structure 3 and the test electrode 11 of the test element group 1 in this embodiment is 搭接 The output electrode 5 and the test electrode 11 of the test element group 1 are not affected by the internal resistance R 内阻 Therefore, the lap resistance R can be tested more accurately. 搭接 , according to the bridging resistance R 搭接 The overlapping resistance between the isolation structure 12 and the cathode in the display area AA can be obtained more accurately, so as to more accurately determine the overlapping effect between the isolation structure 12 and the cathode in the display area AA, and finally improve the performance of the display device.
[0186] In a possible implementation manner, after the step of forming the test element group 1 on one side of the substrate 6 , the step further includes: removing the test area AC.
[0187] See also Fig.17 , the test area AC needs to be removed, and the final display device does not include the test area AC. During the preparation process of the display device, the overlap effect between the isolation structure 12 of the display area AA and the cathode can be accurately determined through the test element group 1 of the test area AC.
[0188] In one possible implementation, see Fig.18 The present application also provides a method for testing a display device, the display device includes the display device in the present application, the first test subgroup includes a output electrodes 5, and the second test subgroup includes b output electrodes 5; the testing method includes:
[0189] S20: Obtaining a first test resistance R of the first test subgroup 量测1 .
[0190] R 量测1 =R 搭接 +R 内阻 / a.
[0191] S21: Obtaining a second test resistance R of the second test subgroup量测2 .
[0192] R 量测2 =R 搭接 +R 内阻 / b.
[0193] S22: Based on the first test resistor R 量测1 and the second test resistor R 量测2 , the lap resistance between the isolation test structure 3 and the test electrode 11 is obtained by the following formula:
[0194] R 搭接 =(R 量测1 / bR 量测2 / a) / (1 / b-1 / a)
[0195] Where b>a, R 内阻 It represents the lap resistance between the output electrode 5 and the test electrode 11.
[0196] S23: Based on the bridging resistance R between the isolation test structure 3 and the test electrode 11 搭接 , determine the overlapping effect between the isolation structure 12 and the second electrode 16 in the display area AA.
[0197] For example, the bridging resistance R between the isolation test structure 3 and the test electrode 11 can be 搭接 , the overlap resistance per unit overlap area between the isolation test structure 3 and the test electrode 11 is calculated. Since the material of the isolation test structure 3 is the same as that of the isolation structure 12, and the material of the test electrode 11 is the same as that of the second electrode 16, the overlap resistance per unit overlap area between the isolation test structure 3 and the test electrode 11 is equal to the overlap resistance per unit overlap area between the isolation structure 12 and the second electrode 16. It can be seen that this embodiment can be applied to isolation openings 13 of different morphologies, that is, it can be applied to light-emitting units 20 of different morphologies.
[0198] According to the overlap resistance per unit overlap area between the isolation structure 12 and the second electrode 16, the overlap resistance R′ between the isolation structure 12 and the second electrode 16 can be calculated. 搭接 , according to the bridging resistance R' between the isolation structure 12 and the second electrode 16 搭接 , the overlapping effect between the isolation structure 12 and the second electrode 16 in the display area AA can be determined.
[0199] In a possible implementation manner, based on the bridge resistance R between the isolation test structure 3 and the test electrode 11 搭接 The step of determining the overlapping effect between the isolation structure 12 and the second electrode 16 of the display area AA includes:
[0200] The bridging resistance R′ between the isolation structure 12 and the second electrode 16 is obtained by the following formula搭接 :
[0201] R' 搭接 =(R 量测1 / bR 量测2 / a) / ((1 / b-1 / a)*N)
[0202] In this embodiment, the shape of the test opening 4 in the test area AC is set to be the same as the shape of the isolation opening 13 located in the display area AA, and the size of the test opening 4 is enlarged by N compared with the isolation opening 13. In this way, the test opening 4 can imitate the isolation opening 13, and the lap resistance R between the isolation test structure 3 and the test electrode 11 finally tested is 搭接 , which can more easily and directly reflect the lap resistance between the isolation structure 12 and the cathode.
[0203] For example, the first test subgroup includes one output electrode 5 , the second test subgroup includes two output electrodes 5 , and the area of the orthographic projection of the test opening 4 on the substrate 6 is 5 times the area of the orthographic projection of the isolation opening 13 on the substrate 6 .
[0204] According to the above embodiment, the resistor R is connected between the isolation test structure 3 and the test electrode 11 of the test element group 1. 搭接 =2R 量测2 -R 量测1 Since the isolation structure 12 is made of the same material as the bridging resistor and the isolation test structure 3, and the test opening 4 is in the same shape as the isolation opening 13, the bridging resistor R′ between the isolation structure 12 and the second electrode 16 in the display area AA is 搭接 =(2R 量测2 -R 量测1 ) / 5. Since the lap resistance R′ between the isolation structure 12 and the second electrode 16 of the display area AA can be obtained more accurately and directly 搭接 , so the overlapping effect between the isolation structure 12 and the cathode can be evaluated more easily and accurately.
[0205] In one possible implementation, see Fig.19 The present application also provides another method for testing a display device, wherein the display device includes the display device in the present application, the first test subgroup includes a output electrodes 5, and the second test subgroup includes b output electrodes 5; the test method includes:
[0206] S30: Obtaining a first test resistance R of the first test subgroup 量测1 .
[0207] S31: Obtaining a second test resistance R of the second test subgroup 量测2 .
[0208] S32: Based on the first test resistor R量测1 and the second test resistor R 量测2 The internal resistance R between the output electrode 5 and the test electrode 11 is obtained by the following formula: 内阻 :
[0209] R 内阻 =(R 量测1 -R 量测2 )*ab / (ba)
[0210] Among them, R 量测1 =R 搭接 +R 内阻 / a,R 量测2 =R 搭接 +R 内阻 / b,b>a,R 搭接 It represents the lap resistance between the isolation test structure 3 and the test electrode 11 .
[0211] For example, the first test subgroup includes one output electrode 5, and the second test subgroup includes two output electrodes 5; the first test resistor R of the first test subgroup 量测1 =R 搭接 +R 内阻 , the second test resistor R of the second test subgroup 量测2 =R 搭接 +R 内阻 / 2; According to the first test resistance R 量测1 and the second test resistor R 量测2 It can be seen that the internal resistance R between the output electrode 5 and the test electrode 11 内阻 =(R 量测1 -R 量测2 )*2.
[0212] S33: Based on the internal resistance R between the output electrode 5 and the test electrode 11 内阻 , obtain the overlap resistance between the isolation test structure 3 and the test electrode 11.
[0213] According to the internal resistance R between the output electrode 5 and the test electrode 11 内阻 After testing and obtaining the test resistance of other test subgroups, it is easier to obtain the lap resistance R between the corresponding isolated test structure 3 and the test electrode 11. 搭接 For example, the pth test subgroup includes p bridge resistors, and the test resistor of the pth test subgroup is R 量测p =R 搭接 +R 内阻 / p, where R 量测p and R 内阻 are all known, so it is easier to obtain the bridging resistance R between the isolated test structure 3 and the test electrode 11 搭接 .
[0214] S34: Based on the bridging resistance R between the isolation test structure 3 and the test electrode 11 搭接 , determine the overlapping effect between the isolation structure 12 and the second electrode 16 in the display area AA.
[0215] For example, the overlap resistance per unit overlap area between the isolation test structure 3 and the test electrode 11 can be calculated based on the overlap resistance between the isolation test structure 3 and the test electrode 11. Since the material of the isolation test structure 3 is the same as that of the isolation structure 12, and the material of the test electrode 11 is the same as that of the second electrode 16, the overlap resistance per unit overlap area between the isolation test structure 3 and the test electrode 11 is equal to the overlap resistance per unit overlap area between the isolation structure 12 and the second electrode 16. It can be seen that this embodiment can be applicable to isolation openings 13 of different morphologies, that is, it can be applicable to light-emitting units 20 of different morphologies.
[0216] According to the overlap resistance R′ per unit overlap area between the isolation structure 12 and the second electrode 16 搭接 , the lap resistance R' between the isolation structure 12 and the second electrode 16 can be calculated 搭接 According to the overlapping resistance between the isolation structure 12 and the second electrode 16 , the overlapping effect between the isolation structure 12 and the second electrode 16 in the display area AA can be determined.
[0217] In this embodiment, the internal resistance R between the output electrode 5 and the test electrode 11 is first determined. 内阻 , due to the internal resistance R between an output electrode 5 and the test electrode 11 of different test subgroups 内阻 Therefore, it is easier to obtain the lap resistance R between the isolated test structure 3 and the test electrode 11 of the test subgroup. 搭接 , so that it is easier to evaluate the overlapping effect between the isolation structure 12 and the second electrode 16 in the display area AA.
[0218] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0219] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A display device, characterized in that: The display device comprises a display area and a non-display area at least partially surrounding the display area, wherein the non-display area comprises a test area, and the display device comprises: substrate; a test element group located at one side of the substrate, the test element group being located at the test area, the test element group comprising a first test subgroup and a second test subgroup, the orthographic projection of the first test subgroup on the substrate being outside the orthographic projection of the second test subgroup on the substrate; The test element group includes an isolation conductive layer located on one side of the substrate, the isolation conductive layer includes an isolation test structure and an output electrode, the isolation test structure and the output electrode are electrically connected, and the number of output electrodes of the first test subgroup is not equal to the number of output electrodes of the second test subgroup.
2. The display device according to claim 1, characterized in that The isolation test structure is provided with a test opening, the test element group further comprises a light emitting test portion and a test electrode which are located in the test opening and are sequentially stacked in a direction away from the substrate, the test electrode extending to be electrically connected to the isolation test structure and the output electrode; Preferably, the orthographic projection of the output electrode on the substrate is located within the orthographic projection of the test opening on the substrate.
3. The display device according to claim 2, characterized in that: The isolation conductive layer extends to the display area, the isolation conductive layer comprises an isolation structure, the isolation structure is located in the display area, and the isolation structure encloses an isolation opening; Preferably, the shape of the orthographic projection of the test opening on the substrate is the same as the shape of the orthographic projection of the isolation opening on the substrate; Preferably, an area of an orthographic projection of the test opening on the substrate is N times an area of an orthographic projection of the isolation opening on the substrate, wherein N is greater than 1.
4. The display device according to claim 3, characterized in that The display device further comprises a light emitting unit at least partially located within the isolation opening; Preferably, the light-emitting unit comprises a first electrode, a light-emitting portion and a second electrode which are sequentially stacked in a direction away from the substrate; Preferably, the light emitting part and the light emitting testing part are arranged on the same layer; Preferably, the second electrode and the test electrode are arranged in the same layer.
5. The display device according to claim 2, characterized in that: The isolation test structure and the output electrode both include a first test isolation portion and a second test isolation portion which are sequentially stacked in a direction away from the substrate, wherein the orthographic projection of a side of the first test isolation portion away from the substrate on the substrate is located within the orthographic projection of the second test isolation portion on the substrate; Preferably, the test electrode extends to be electrically connected to the first test isolation portion.
6. The display device according to claim 1, characterized in that: The display device further includes: A conductive layer located on one side of the substrate, the conductive layer comprising a plurality of test traces, and the test element group comprising the test traces; An insulating layer located on a side of the conductive layer away from the substrate, wherein a plurality of first test vias exposing at least a portion of the test traces are provided on the insulating layer in a direction perpendicular to the substrate, and the output electrode and the isolation test structure are electrically connected to the test traces through the first test vias respectively; Preferably, the test element group performs signal input via the test trace electrically connected to the isolation test structure; Preferably, the test element group outputs signals through the test traces electrically connected to the output electrodes; Preferably, the test trace electrically connected to the output electrode is electrically connected to at least two pins; Preferably, the test trace electrically connected to the isolation test structure is electrically connected to at least two pins.
7. The display device according to claim 6, characterized in that: The conductive layer comprises a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially stacked in a direction away from the substrate, and the fourth conductive layer comprises the test trace; Preferably, the fourth conductive layer is the conductive layer closest to the isolation conductive layer; Preferably, a first planarization layer is provided between the third conductive layer and the fourth conductive layer, a second planarization layer is provided on a side of the fourth conductive layer away from the substrate, the insulating layer includes the second planarization layer, and the first test via is arranged on the second planarization layer.
8. The display device according to claim 6, characterized in that: The display device further comprises a pixel defining layer located on a side of the insulating layer away from the substrate, wherein the pixel defining layer is provided with a plurality of second test via holes exposing at least a portion of the test traces in a direction perpendicular to the substrate, and the output electrode and the isolation test structure are electrically connected to the test traces through the second test via holes and the first test via holes in sequence, respectively; Preferably, at least a portion of the pixel defining layer extends to a side wall of the first test via hole; Preferably, the pixel defining layer wraps around a side wall of the first test via hole.
9. The display device according to claim 8, characterized in that: The orthographic projection of the second test via hole on the substrate is located within the orthographic projection of the first test via hole on the substrate; Preferably, the center of the orthographic projection of the first test via hole on the substrate coincides with the center of the orthographic projection of the second test via hole on the substrate; Preferably, the pixel defining layer extends to the display area, the pixel defining layer located in the display area includes a pixel opening, and the display device further includes a light emitting unit at least partially located in the pixel opening.
10. The display device according to claim 1, characterized in that The shape of the orthographic projection of the test opening of the first test subgroup on the substrate is the same as the shape of the orthographic projection of the test opening of the second test subgroup on the substrate; Preferably, the area of the orthographic projection of the test openings of the first test subgroup on the substrate is equal to the area of the orthographic projection of the test openings of the second test subgroup on the substrate; Preferably, an orthographic projection of the output electrode on the substrate does not overlap with an orthographic projection of the isolation test structure on the substrate.
11. The display device according to any one of claims 1 to 8, characterized in that: The display area of the display device further includes a pixel opening, and shapes of orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are at least partially identical to shapes of orthographic projections of the pixel opening on the substrate; Preferably, the areas of the orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are M times the areas of the orthographic projections of the pixel openings on the substrate, where M is greater than or equal to 1.
12. The display device according to claim 11, characterized in that: The areas of the orthographic projections of the output electrodes of the first test subgroup and the second test subgroup on the substrate are equal to the areas of the orthographic projections of the pixel openings on the substrate; Preferably, there are multiple test element groups, and the shapes of the orthographic projections of the output electrodes of at least two of the test element groups on the substrate are different.
13. The display device according to claim 4, characterized in that: The display device further comprises a first encapsulation layer located at a side of the light-emitting unit away from the substrate, the first encapsulation layer comprising a plurality of encapsulation units arranged at intervals; Preferably, at least part of the packaging unit extends from a side surface of the isolation structure to a side of the isolation structure away from the substrate, and the side surface of the isolation structure is a surface of the isolation structure facing the isolation opening; Preferably, at least part of the packaging unit extends from a side surface of the isolation test structure to a side of the isolation test structure away from the substrate; Preferably, adjacent packaging units are arranged at intervals on a side of the isolation structure away from the substrate; Preferably, a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and a side of the isolation structure away from the substrate.
14. The display device according to claim 4, characterized in that: The isolation structure comprises a first isolation portion and a second isolation portion which are sequentially stacked in a direction away from the substrate, wherein an orthographic projection of a side of the first isolation portion away from the substrate on the substrate is located within an orthographic projection of the second isolation portion on the substrate; Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further comprises a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes titanium metal.
15. A method for preparing a display device, characterized in that: The display device includes a display area and a non-display area at least partially surrounding the display area, the non-display area includes a test area, and the preparation method includes: providing a substrate; A test element group is formed on one side of the substrate, the test element group is located in the test area, the test element group includes a first test subgroup and a second test subgroup, the orthographic projection of the first test subgroup on the substrate is outside the orthographic projection of the second test subgroup on the substrate; the test element group includes an isolation conductive layer located on one side of the substrate, the isolation conductive layer includes an isolation test structure and an output electrode, the isolation test structure and the output electrode are electrically connected, and the number of output electrodes of the first test subgroup is not equal to the number of output electrodes of the second test subgroup.
16. The method for manufacturing a display device according to claim 15, characterized in that: The isolation test structure is provided with a test opening, the orthographic projection of the output electrode on the substrate is located within the orthographic projection of the test opening on the substrate, and the step of forming a test element group on one side of the substrate comprises: forming a conductive layer on one side of the substrate, the conductive layer comprising a plurality of test traces, and the test element group comprising the test traces; An insulating layer is formed on a side of the conductive layer away from the substrate, and a plurality of first test vias exposing at least a portion of the test traces are provided on the insulating layer in a direction perpendicular to the substrate; A pixel defining layer is formed on a side of the insulating layer away from the substrate, and a plurality of second test vias exposing at least a portion of the test wiring are provided on the pixel defining layer in a direction perpendicular to the substrate; An isolation conductive layer is formed on a side of the pixel defining layer away from the substrate, and the output electrode and the isolation test structure are electrically connected to the test trace through the second test via hole and the first test via hole respectively; A light emitting test portion and a test electrode are sequentially formed in the test opening in a direction away from the substrate, and the test electrode is extended to be electrically connected to both the isolation test structure and the output electrode.
17. The method for manufacturing a display device according to claim 15, characterized in that: After the step of forming a test element group on one side of the substrate, the method further includes: The test area is removed.
18. A method for testing a display device, characterized in that: The display device comprises the display device according to claim 8, the first test subgroup comprises a output electrodes, and the second test subgroup comprises b output electrodes; and the test method comprises: Obtaining a first test resistance R of the first test subgroup 量测1 ; Obtain the second test resistance R of the second test subgroup 量测2 ; Based on the first test resistor R 量测1 and the second test resistor R 量测2 , the lap resistance R between the isolation test structure and the test electrode is obtained by the following formula 搭接 : R 搭接 =(R 量测1 / b-R 量测2 / a) / (1 / b-1 / a) Among them, R 量测1 =R 搭接 +R 内阻 / a,R 量测2 =R 搭接 +R 内阻 / b,b>a,R 内阻 represents the lap resistance between the output electrode and the test electrode; Based on the lap resistance R between the isolation test structure and the test electrode 搭接 , determine the overlapping effect between the isolation structure of the display area and the second electrode.
19. The display device testing method according to claim 18, characterized in that: The display device also includes the display device according to claim 9, wherein the bridge resistance R between the isolation test structure and the test electrode 搭接 The step of determining the overlapping effect between the isolation structure of the display area and the second electrode comprises: The lap resistance R' between the isolation structure and the second electrode is obtained by the following formula 搭接 : R’ 搭接 =(R 量测1 / b-R 量测2 / a) / ((1 / b-1 / a)*N) Based on the bridging resistance R′ between the isolation structure and the second electrode 搭接 , determine the overlapping effect of the isolation structure and the second electrode.
20. A method for testing a display device, characterized in that: The display device comprises the display device according to claim 13, the first test subgroup comprises a output electrodes, and the second test subgroup comprises b output electrodes; and the test method comprises: Obtaining a first test resistance R of the first test subgroup 量测1 ; Obtain the second test resistance R of the second test subgroup 量测2 ; Based on the first test resistor R 量测1 and the second test resistor R 量测2 , the lap internal resistance R between the output electrode and the test electrode is obtained by the following formula 内阻 : R 内阻 =(R 量测1 -R 量测2 )*ab / (b-a) Among them, R 量测1 =R 搭接 +R 内阻 / a,R 量测2 =R 搭接 +R 内阻 / b,b>a,R 搭接 represents the lap resistance between the isolation test structure and the test electrode; Based on the internal resistance R between the output electrode and the test electrode 内阻 , obtaining a lap resistance between the isolation test structure and the test electrode; Based on the overlap resistance between the isolation test structure and the test electrode, the overlap effect between the isolation structure of the display area and the second electrode is determined.