DTCO process PEX method, device, equipment and product of graph convolutional neural network

Abstract

The invention discloses a DTCO process PEX method, device, equipment and product of a graph convolutional neural network, and the method introduces the graph convolutional neural network to carry out the modeling of the geometric structure and topological connection of a device, learns the distribution rule of parasitic parameters under a complex structure through the mode of adjacent matrix and node feature aggregation, and improves the performance of the device. And high-precision, high-speed and multi-target parameterized parasitic parameter extraction is realized. Meanwhile, the method supports self-adaptive collaborative optimization of design process parameters, and the applicability and reliability of PEX in the DTCO process are further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of parasitic parameter extraction in integrated circuit design, and in particular to a DTCO process PEX method, device, equipment and product for a graph convolutional neural network. Background Art

[0002] With the continuous evolution of integrated circuit manufacturing technology, the device structure at advanced process nodes is becoming increasingly complex, and the mutual influence between design and process is becoming more and more significant. In order to fully consider the limitations of process technology and the requirements of design performance in the early stages of design, Design Technology Co Optimization (DTCO) came into being. DTCO aims to balance chip performance, power consumption, area and manufacturing cost at a higher level by optimizing design parameters and process parameters at the same time, avoiding multiple large-scale modifications in the later stages of design, thereby improving design efficiency and reducing design costs.

[0003] Parasitic Extraction (PEX) is a key part of the integrated circuit manufacturing process. Accurately and efficiently extracting the parasitic resistance and capacitance parameters of interconnects and devices is the basis for subsequent timing analysis, signal integrity analysis and other steps, and directly affects the performance and reliability of chip design. Traditional PEX methods are mainly based on analytical modeling or numerical simulation. For complex device structures at advanced process nodes, the extraction efficiency is low and the accuracy is difficult to meet the requirements. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention provides a DTCO process PEX method, device, equipment and product of a graph convolutional neural network. The method introduces a graph convolutional neural network to model the geometric structure and topological connection of the device, and learns the distribution law of parasitic parameters under complex structures by means of adjacency matrix and node feature aggregation, so as to achieve high-precision, high-speed and multi-objective parametric parasitic parameter extraction. At the same time, the method supports the adaptive collaborative optimization of design process parameters, further improving the applicability and reliability of PEX in the DTCO process.

[0005] In a first aspect, a DTCO process PEX method of a graph convolutional neural network is provided, comprising:

[0006] The three-dimensional structure information of the device is preprocessed, and the topological connection relationship inside the device and the attribute parameters of each planing surface unit are obtained through feature extraction; the topological connection relationship inside the device is converted into an adjacency matrix of a graph, and the attribute parameters of the planing surface unit are converted into a node feature matrix of a graph; a graph convolutional neural network extracts a high-level feature representation of the device structure according to the input, and predicts multiple target parameters of each planing surface unit, wherein the input includes the adjacency matrix and the node feature matrix; the graph convolutional neural network outputs a prediction result, and the prediction result includes multiple target parameters of each planing surface unit; based on the multiple target parameters of each planing surface unit, an automated PEX parameter extraction and optimization closed loop is constructed.

[0007] In combination with the first aspect, in certain implementations of the first aspect, the three-dimensional structural information of the device is preprocessed, and the topological connection relationship inside the device and the attribute parameters of each planer surface unit are obtained through feature extraction, including: converting the three-dimensional structural information of the device into a graph data format, and discretizing it into multiple planer surface units using a voxelization method or a grid division method for feature extraction and parameterization.

[0008] In combination with the first aspect, in certain implementations of the first aspect, the graph convolutional neural network extracts high-level feature representations of the device structure based on the input, including: the graph convolutional neural network extracts high-level feature representations of the device structure based on the input through multi-layer graph convolution operations and / or pooling operations.

[0009] In combination with the first aspect, in some implementations of the first aspect, predicting multiple target parameters of each planing surface unit includes: predicting multiple target parameters of each planing surface unit through a multi-task learning framework.

[0010] In combination with the first aspect, in some implementations of the first aspect, the graph convolutional neural network adopts a structure of multi-layer graph convolutional layers and fully connected layers, wherein the structural features of the device are extracted through neighborhood feature aggregation and weight transformation.

[0011] In combination with the first aspect, in certain implementations of the first aspect, an automated PEX parameter optimization closed loop is constructed based on the multiple target parameters of the various planing surface units, including: taking the extracted values ​​of the multiple target parameters of the various planing surface units as optimization targets, and taking the design parameters and process parameters of the device as optimization variables, to construct an automated PEX parameter optimization closed loop.

[0012] In a second aspect, a DTCO process PEX device of a graph convolutional neural network is provided, the device comprising:

[0013] An acquisition module, the acquisition module is used to acquire the three-dimensional structural information of the device; a processing module, the processing module is used to pre-process the three-dimensional structural information of the device, and obtain the topological connection relationship inside the device and the attribute parameters of each planing surface unit through feature extraction; the processing module is also used to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planing surface unit into a node feature matrix of a graph; the processing module is also used to construct a graph convolutional neural network, the graph convolutional neural network extracts the high-level feature representation of the device structure according to the input, and predicts multiple target parameters of each planing surface unit, wherein the input includes the adjacency matrix and the node feature matrix; the processing module is also used to output the prediction result through the graph convolutional neural network, and the prediction result includes multiple target parameters of each planing surface unit; the processing module is also used to construct an automated PEX parameter extraction and optimization closed loop based on the multiple target parameters of each planing surface unit.

[0014] According to a third aspect, a computing device is provided, the computing device comprising a processor and a memory, the processor being configured to execute instructions stored in the memory so that the computing device performs the method as described in any one of the first aspects.

[0015] According to a fourth aspect, a computer program product comprising instructions is provided, and when the instructions are executed by a computing device, the computing device is caused to perform the method as described in any one of the first aspects.

[0016] The present invention has the following advantages:

[0017] (1) The topological connection characteristics of the complex structure of the device are modeled using a graph convolutional neural network, which overcomes the limitation of traditional machine learning methods that are difficult to handle irregular geometric shapes and significantly improves the accuracy and speed of PEX.

[0018] (2) A multi-task learning framework is introduced to realize multi-objective parametric parasitic parameter extraction, meeting the DTCO process requirements for PEX flexibility and scalability. It supports the automatic collaborative optimization of design and process parameters, expands the scope of application of PEX in the DTCO process, and improves the efficiency and effect of design and process collaborative optimization.

[0019] (3) Error back propagation and closed-loop iteration strategies are used to continuously improve the prediction accuracy and robustness of PEX and reduce the requirements on the quality and quantity of training data. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic diagram of the DTCO process PEX method of the graph convolutional neural network according to an embodiment of the present application.

[0021] Figure 2A schematic diagram of the adjacency matrix and node features of an input data set according to an embodiment of the present application.

[0022] Figure 3 This is a schematic diagram of the structure of a graph convolutional neural network model according to an embodiment of the present application.

[0023] Figure 4 This is a graph of PEX efficient extraction results based on a graph convolutional neural network according to an embodiment of the present application.

[0024] Figure 5 This is a flowchart of the DTCO process PEX of the graph convolutional neural network according to an embodiment of the present application. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] In recent years, machine learning methods have begun to be applied to the PEX field, but most existing methods regard devices as regular geometric shapes, ignoring the topological connection relationship between complex structures. It is difficult to replace existing field solvers and accurately model field effects in three-dimensional space.

[0027] In addition, in the DTCO process, PEX not only needs to extract parasitic parameters quickly and accurately, but also needs to support multi-objective parametric modeling to adapt to different design process requirements. However, existing PEX methods are difficult to strike a balance between extraction speed, accuracy and multi-objective optimization capabilities, and cannot meet the DTCO process's requirements for PEX flexibility and scalability.

[0028] Therefore, there is an urgent need for an innovative PEX method that can fully consider the topological connection characteristics of the complex structure of the device, while ensuring high-precision and high-speed extraction of parasitic parameters, support multi-objective parametric modeling, and flexibly adapt to different design process requirements.

[0029] This application provides a DTCO process PEX method based on a graph convolutional neural network, which introduces a graph convolutional neural network to model the geometric structure and topological connection of the device, and learns the distribution law of parasitic parameters under complex structures through adjacency matrix and node feature aggregation, so as to achieve high-precision, high-speed, multi-objective parametric parasitic parameter extraction. At the same time, this method supports adaptive collaborative optimization of design process parameters, further improving the applicability and reliability of PEX in the DTCO process.

[0030] An embodiment of the present application provides a DTCO process PEX method of a graph convolutional neural network, such as Figure 1 As shown, including:

[0031] S100, preprocessing the three-dimensional structure information of the device, and obtaining the topological connection relationship inside the device and the attribute parameters of each planing surface unit through feature extraction;

[0032] S200, converting the topological connection relationship inside the device into an adjacency matrix of a graph, and converting the attribute parameters of the planing surface unit into a node feature matrix of the graph;

[0033] S300, the graph convolutional neural network extracts a high-level feature representation of the device structure according to the input, and predicts a plurality of target parameters of each planing surface unit, wherein the input includes the adjacency matrix and the node feature matrix;

[0034] S400, the graph convolutional neural network outputs a prediction result, wherein the prediction result includes a plurality of target parameters of each planing surface unit;

[0035] S500, constructing an automated PEX parameter optimization closed loop according to the multiple target parameters of each planing surface unit.

[0036] The above method breaks through the limitations of traditional PEX methods by applying graph convolutional neural networks to PEX modeling and parameter extraction, opens up an intelligent and automated innovation path for parasitic parameter extraction of advanced processes, and constructs a self-learning and adaptive parasitic parameter extraction mechanism. Among them, closed-loop optimization enables the model to adapt to process changes, reduces the dependence on the amount and quality of training data, and has significant technological advancement and practical value. It will play an important role in promoting the development of DTCO technology and accelerating the upgrading of integrated circuit design and manufacturing.

[0037] It is understandable that the graph convolutional neural network can be pre-trained, for example, multiple target parameters of each planing unit can be predicted through a multi-task learning framework, and the network can be trained using simulation or test data. During the application process, measured parameter data can also be continuously collected and used to update the graph convolutional neural network model online, so that its prediction accuracy and robustness are continuously improved.

[0038] In step S100, the three-dimensional structural information of the device can be converted into a graph data format, and discretized into a plurality of planar units by a voxelization method or a meshing method for feature extraction and parameterization. For example, the voxelization method can be used to discretize into a plurality of planar units, and then the material, size, position and other attribute features of each unit can be extracted.

[0039] Specifically, the three-dimensional physical model of the device can be Ω, its material type distribution function is M(x, y, z), its geometric size function is G(x, y, z), and its spatial position function is P(x, y, z), where (x, y, z) is the three-dimensional space coordinate. Then the three-dimensional structure information of the device can be expressed as:

[0040] Ω={M(x,y,z),G(x,y,z),P(x,y,z)|(x,y,z)∈R 3}

[0041] For the voxelization method, the three-dimensional space can be divided into cubic unit voxels of equal size, and the side length of each voxel is δ. Then the device model Ω can be discretized into N x ×N y ×N z Voxel unit, where are the number of voxels in the x, V, and z directions, respectively, and L x , L y , L z is the size of the device in three directions. Each voxel can be represented by its center coordinate (x i ,y j , z k ) indicates that the corresponding material type, geometric size and spatial position attributes are:

[0042] m ijk =M(x i ,y j , z k ), g ijk =G(x i ,y j , z k ), p ijk =P(x i ,y j , z k )

[0043] Where i = 1, 2, ..., N x , j = 1, 2, ..., N y , k = 1, 2, ..., N z is the index number of the voxel.

[0044] For the meshing method, in the meshing method, the unit sizes are unequal. The device model Ω is divided into tetrahedral or hexahedral units of unequal sizes. Suppose there are K units in total, and each unit is represented by its node coordinates. Indicates that N k is the number of nodes of the kth unit. Then the material type, geometric dimensions and spatial position properties of the kth unit can be calculated by the interpolation function:

[0045]

[0046]

[0047]

[0048] in, is the interpolation basis function of the ith node in the kth element.

[0049] Through the above-mentioned voxelization or meshing, the continuous three-dimensional model of the device can be discretized into multiple units, and the property characteristics such as material, size, and position are extracted from each unit.

[0050] The topological connection relationship within the device and the attribute parameters of each planing surface unit obtained in step S100 can be specifically as follows: Figure 2 As shown in the device structure diagram section.

[0051] The adjacency matrix and node features in step S200 can be specifically as follows: Figure 2 It can be understood that the adjacency matrix can represent the topological connection relationship between the planing surface units. In some embodiments, for example Figure 2 In the embodiment shown, the matrix elements are binary values ​​0-1, 1 indicates that two units are connected, and 0 indicates that they are not connected; the node feature matrix can record the attribute information of each unit. In some embodiments, for example Figure 2 In the illustrated embodiment, each column corresponds to a type of unit, and each row corresponds to various attributes of the unit.

[0052] Specifically, the connection relationship between the internal planar units of the device can be represented by the adjacency matrix A of the graph. The matrix element A ij The value of is:

[0053]

[0054] Specifically, assuming that the device model is discretized into N plane units, the dimension of the adjacency matrix A is N×N. ij =1 means that the i-th unit and the j-th unit are physically connected, connected by conductive or insulating materials; A ij = 0 means that the two units are not directly connected. A is a symmetric matrix, that is, A ij =A ji .

[0055] In voxel discretization, each voxel is connected to the voxels with which it shares a face. Let the index of the (i, j, k)th voxel be n=i+(j-1)N x +(k-1)N x N y , then the adjacency matrix element A nn′ The relationship with voxel coordinates is:

[0056]

[0057] Wherein, n' is the index number of the (j', j', k')th voxel. |ii'|+|jj'|+|kk'|=1 indicates that two voxels have a common surface.

[0058] In tetrahedral meshing, each unit is connected to its adjacent units through common faces. Let the four node index numbers of unit k be The four node index numbers of unit k′ are Then the adjacency matrix element A kk′ The relationship with the node index is:

[0059]

[0060] That is, when two tetrahedral elements have three common nodes, there is a connection relationship between them.

[0061] In the hexahedral mesh division, each unit is connected to the units adjacent to its six faces at most. Similar to the tetrahedron case, the value of the adjacency matrix element is determined by judging whether two units have common faces.

[0062] In some embodiments, the adjacency matrix only reflects the topological connection relationship within the device, and does not include the physical properties of the connection. Attribute information such as material type and size can be reflected in the node features. The adjacency matrix and node features can together constitute the input of the graph convolutional neural network, which is used to learn the mapping relationship between device structure and parameters.

[0063] In the above step S300, the high-level feature representation of the device structure can be extracted through multi-layer graph convolution operations, pooling operations, etc.; and multiple target parameters of each planing unit can be predicted through a multi-task learning framework.

[0064] Among them, the mathematical expression of the graph convolution operation is:

[0065]

[0066] Among them, Z (l) is the output feature matrix of the first layer of graph convolution, Z (l-1) is the output feature matrix of the previous layer, is the adjacency matrix with self-connection added, I is the identity matrix, for The degree matrix of That is, the degree of the i-th node is equal to the number of edges connected to it, W (l)is the weight matrix of the first layer, σ is the activation function, and the commonly used ReLU function σ(x)=max(0,x).

[0067] The graph convolution operation can be understood as a local feature aggregation and transformation on graph structure data. Specifically:

[0068] The aggregation of neighborhood information is realized by weighting the features of each node with the features of its neighboring nodes, and the weight is given by The decision is called a graph convolution kernel. This convolution kernel normalizes the adjacency matrix A so that the amount of information received by each node is inversely proportional to its degree. The larger the degree of the node, the less information it obtains from each edge.

[0069] Aggregated feature matrix and weight matrix W (l) Multiply to achieve feature transformation and dimension adjustment. (l) The shape is C (l-1) ×C (l) , where C (l-1) and C (l) are the feature dimensions of the l-1th layer and the 1st layer respectively.

[0070] The transformed feature matrix is ​​nonlinearly mapped through the activation function σ to improve the model's expressiveness. The activation function can introduce nonlinear factors and enhance the network's ability to learn complex features.

[0071] Through multi-layer graph convolution operations, the receptive field of the convolution kernel gradually expands, and the structural information of nodes in a larger range can be extracted. The number of layers L of graph convolution depends on the complexity of the device structure and the required feature expression capability.

[0072] The output feature matrix Z of graph convolution (L) The input is sent to the fully connected layer for feature interpretation and parameter prediction. Let the weight matrix of the fully connected layer be W (fc) , the bias vector is b (fc) , then the predicted value of the kth parameter of the i-th planing surface unit is:

[0073]

[0074] in, is the feature vector of the ith node.

[0075] By training the graph convolutional neural network end-to-end, it can learn the intrinsic relationship between the device structure characteristics and electrical parameters, thereby achieving fast and accurate parameter extraction. Graph convolution makes full use of the topological structure information of the device and has stronger feature extraction and generalization capabilities than traditional parametric modeling methods.

[0076] like Figure 3As shown in the figure, the graph convolutional neural network can adopt a multi-layer graph convolutional layer and a fully connected layer structure to extract the structural features of the device through neighborhood feature aggregation and weight transformation. The graph convolution layer uses a normalized graph convolution kernel to weighted sum the node features, capture the local connection pattern, and introduce nonlinearity through the activation function. The fully connected layer maps the extracted features to parasitic capacitance parameter values. The network is trained through end-to-end supervised learning, with the error between the extracted parameters and the true parameters as the optimization goal.

[0077] In the above step S500, the automated PEX parameter extraction and optimization closed loop is constructed according to the multiple target parameters of the respective planing surface units, which may specifically include: using the extracted values ​​of the multiple target parameters of the respective planing surface units, which may also be referred to as multi-target parameter values, as optimization targets, and using the design parameters and process parameters of the device as optimization variables, to construct an automated PEX parameter extraction and optimization closed loop.

[0078] In some embodiments, the mathematical form of the PEX parameter optimization problem can be:

[0079]

[0080] in, are the T target parameter values ​​extracted by the graph convolutional neural network, is the true value of the parameter, and N α dimensional design parameter vector and N β dimensional process parameter vector, g i (α, β) = 0 is the i-th equality constraint, h j (α, β)≤0 is the jth inequality constraint, and there are p equality constraints and q inequality constraints in total.

[0081] The objective function for PEX parameter optimization is used to measure the error between the extracted parameters and the true parameters. Common objective function forms include mean square error, mean absolute error, etc. For example, the MSE (Mean Squared Error) loss is:

[0082]

[0083] Equality constraint g i (α, β)=0 is usually given by a device physical model, reflecting the physical laws and device equations that the design parameters and process parameters need to satisfy, such as the carrier continuity equation and Poisson's equation in semiconductor devices.

[0084] Inequality constraints h j(α, β)≤0 gives the range and boundary conditions of the parameter values, such as the upper and lower limits of the geometric size, the reasonable range of the doping concentration, etc. These constraints ensure that the optimized parameters are physically feasible.

[0085] like Figure 4 In the embodiment shown, the trained graph convolutional neural network is used to extract parasitic capacitance parameters of new device node features, and the extraction results are used as the initial solution of the optimization algorithm. Under the premise of satisfying physical constraints, further optimization and calibration are performed to obtain the final high-precision parasitic capacitance parameter extraction results with a mean relative error (MRE) of 1.9%.

[0086] Through the above embodiments, the present invention not only improves the efficiency and accuracy of parasitic parameter extraction, but also can be effectively integrated into the existing integrated circuit design process, thereby accelerating the design cycle, reducing design costs, and improving the performance and reliability of integrated circuit products.

[0087] In a second aspect, a DTCO process PEX device of a graph convolutional neural network is provided, the device comprising:

[0088] An acquisition module, the acquisition module is used to acquire the three-dimensional structural information of the device; a processing module, the processing module is used to pre-process the three-dimensional structural information of the device, and obtain the topological connection relationship inside the device and the attribute parameters of each planing surface unit through feature extraction; the processing module is also used to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planing surface unit into a node feature matrix of a graph; the processing module is also used to construct a graph convolutional neural network, the graph convolutional neural network extracts the high-level feature representation of the device structure according to the input, and predicts multiple target parameters of each planing surface unit, wherein the input includes the adjacency matrix and the node feature matrix; the processing module is also used to output the prediction result through the graph convolutional neural network, and the prediction result includes multiple target parameters of each planing surface unit; the processing module is also used to construct an automated PEX parameter extraction and optimization closed loop based on the multiple target parameters of each planing surface unit.

[0089] This application also provides a flowchart of the DTCO process PEX of a graph convolutional neural network, such as Figure 5 shown.

[0090] This aspect also provides a computing device, the computer device comprising a processor and a memory, the processor being configured to execute instructions stored in the memory so that the computing device executes the method as described in any one of the above embodiments.

[0091] This aspect also provides a computer program product comprising instructions, and when the instructions are executed by a computing device, the computing device executes the method as described in any one of the above embodiments.

[0092] It should be noted that, in this article, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or apparatus.

[0093] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A DTCO process PEX method based on a graph convolutional neural network, characterized in that: include: Preprocess the three-dimensional structure information of the device, and obtain the topological connection relationship inside the device and the attribute parameters of each planing surface unit through feature extraction; Converting the topological connection relationship inside the device into an adjacency matrix of a graph, and converting the attribute parameters of the planing surface unit into a node feature matrix of the graph; A graph convolutional neural network extracts a high-level feature representation of a device structure according to an input, and predicts a plurality of target parameters of each planing surface unit, wherein the input includes the adjacency matrix and the node feature matrix; The graph convolutional neural network outputs a prediction result, wherein the prediction result includes a plurality of target parameters of each planing surface unit; According to the multiple target parameters of each planing surface unit, an automated PEX parameter optimization closed loop is constructed.

2. The method according to claim 1, characterized in that The three-dimensional structure information of the device is preprocessed, and the topological connection relationship inside the device and the attribute parameters of each planing surface unit are obtained by feature extraction, including: The three-dimensional structural information of the device is converted into a graphic data format, and discretized into a plurality of planing surface units by a voxelization method or a meshing method for feature extraction and parameterization.

3. The method according to claim 1 or 2, characterized in that: The graph convolutional neural network extracts high-level feature representations of device structures based on input, including: The graph convolutional neural network extracts high-level feature representations of the device structure based on the input through multi-layer graph convolution operations and / or pooling operations.

4. The method according to claim 3, characterized in that The method of predicting multiple target parameters of each planing surface unit includes: A multi-task learning framework is used to predict multiple target parameters of each planing surface unit.

5. The method according to claim 3, characterized in that: The graph convolutional neural network adopts a structure of multi-layer graph convolutional layers and fully connected layers, wherein the structural features of the device are extracted through neighborhood feature aggregation and weight transformation.

6. The method according to claim 1 or 2, characterized in that: According to the multiple target parameters of each planing surface unit, an automated PEX parameter optimization closed loop is constructed, including: The extracted values ​​of multiple target parameters of each planing surface unit are used as optimization targets, and the design parameters and process parameters of the device are used as optimization variables to build an automated PEX parameter extraction optimization closed loop.

7. A DTCO process PEX device based on a graph convolutional neural network, characterized in that: The device comprises: An acquisition module, the acquisition module is used to acquire three-dimensional structure information of the device; A processing module, which is used to pre-process the three-dimensional structure information of the device and obtain the topological connection relationship inside the device and the attribute parameters of each planing surface unit through feature extraction; The processing module is also used to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planing surface unit into a node feature matrix of the graph; The processing module is also used to construct a graph convolutional neural network, which extracts high-level feature representations of the device structure based on inputs and predicts multiple target parameters of each planing surface unit, wherein the inputs include the adjacency matrix and the node feature matrix; The processing module is further used to output a prediction result through the graph convolutional neural network, wherein the prediction result includes a plurality of target parameters of each planing surface unit; The processing module is also used to construct an automated PEX parameter optimization closed loop based on multiple target parameters of each planing surface unit.

8. A computing device, characterized in that The computer device comprises a processor and a memory, wherein the processor is configured to execute instructions stored in the memory, so that the computing device performs the method according to any one of claims 1 to 6.

9. A computer program product comprising instructions, characterized in that When the instructions are executed by a computing device, the computing device is caused to perform the method according to any one of claims 1 to 6.

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