Method and apparatus for approximating target quantum state

Abstract

Methods, systems, and apparatus for approximating a target quantum state. In one aspect, a method for determining a target quantum state includes the actions of receiving data representative of a target quantum state of a quantum system as a result of applying a quantum circuit to an initial quantum state of the quantum system; determining an approximate quantum circuit that approximates the particular quantum circuit by adaptively adjusting the number of T gates available for the particular quantum circuit; and applying the determined approximated quantum circuit to the initial quantum state to obtain an approximation of the target quantum state.

Description

[0001] This application is a divisional application of the invention patent application with application date of September 25, 2018, application number 201880098064.6, and invention name “Error Correction Variational Algorithm”. Technical Field

[0002] This specification relates to quantum computing. Background Art

[0003] Quantum computing devices use quantum mechanical phenomena such as superposition and entanglement to perform operations on data. Quantum computing devices operate using two-level quantum mechanical systems known as qubits. For example, a circuit model for quantum computing performs quantum computations by applying a sequence of quantum logic gates on an n-qubit register. Summary of the invention

[0004] This specification describes systems and methods for applying variational algorithms in error correcting codes.

[0005] In general, one innovative aspect of the subject matter described in this specification can be implemented in a method for approximating a target quantum state, the method comprising: receiving data representing a target quantum state of a quantum system as a result of applying a quantum circuit to an initial quantum state of the quantum system; determining an approximate quantum circuit that approximates the specific quantum circuit by adaptively adjusting the number of T-gates available for the specific quantum circuit; and applying the determined approximate quantum circuit to the initial quantum state to obtain an approximation of the target quantum state.

[0006] Other implementations of this aspect include corresponding computer systems, devices, and computer programs recorded on one or more computer storage devices, each of which is configured to perform the actions of the method. The system of one or more computers can be configured to perform specific operations or actions by installing software, firmware, hardware, or a combination thereof on the system, which software, firmware, hardware, or a combination thereof causes or causes the system to perform actions in operation. One or more computer programs can be configured to perform specific operations or actions by including instructions, which, when executed by a data processing device, cause the device to perform an action.

[0007] Each of the foregoing and other implementations can optionally include one or more of the following features, alone or in combination. In some implementations, determining an approximate quantum circuit by adaptively adjusting the total number of T-gates available for the quantum circuit includes: allocating an initial number of T-gates to the quantum circuit; and iteratively increasing the initial number of T-gates allocated to the quantum circuit until a termination criterion is met.

[0008] In some implementations, iteratively increasing the number of T-gates assigned to a quantum circuit includes, for each iteration: determining a number of T-gates for the iteration, the number of T-gates for the iteration being greater than the number of T-gates for a previous iteration; using the determined number of T-gates for the iteration to generate one or more updated quantum circuits for the iteration, wherein each updated quantum circuit corresponds to a different assignment of the determined number of T-gates within the updated quantum circuit; for each updated quantum circuit, determining an energy expectation value of the quantum system for the iteration using the updated quantum circuit; identifying a lowest determined energy expectation value of the quantum system; determining whether a difference between the lowest determined energy expectation value for the iteration and the lowest determined energy expectation value for the previous iteration exceeds a predetermined threshold; and in response to determining that the difference exceeds the predetermined threshold, performing a subsequent iteration.

[0009] In some implementations, the method further includes, in response to determining that the difference does not exceed a predetermined threshold, approximating the quantum circuit using a T-gate allocation corresponding to a lowest energy expectation value for a previous iteration.

[0010] In some implementations, determining the approximated quantum circuit by adaptively adjusting the total number of T-gates available for the quantum circuit includes: allocating an initial number of T-gates to the quantum circuit; and iteratively reducing the initial number of T-gates allocated to the quantum circuit until a termination criterion is met.

[0011] In some implementations, iteratively reducing the number of T-gates assigned to a quantum circuit includes, for each iteration: determining a number of T-gates for the iteration, the number of T-gates for the iteration being less than the number of T-gates for a previous iteration; using the determined number of T-gates for the iteration to generate one or more updated quantum circuits for the iteration, wherein each updated quantum circuit corresponds to a different assignment of the determined number of T-gates within the updated quantum circuit; for each updated quantum circuit, determining an energy expectation value of the quantum system for the iteration using the updated quantum circuit; identifying a lowest determined energy expectation value of the quantum system; determining whether a difference between the lowest determined energy expectation value for the iteration and a lowest determined energy expectation value for a previous iteration exceeds a predetermined threshold; and in response to determining that the difference does not exceed the predetermined threshold, performing a subsequent iteration.

[0012] In some implementations, the method further includes, in response to determining that the difference exceeds a predetermined threshold, approximating the quantum circuit using a T-gate allocation corresponding to a lowest energy expectation value of a previous iteration.

[0013] In some implementations, the method further includes executing a variational algorithm to determine an adjusted quantum circuit, wherein the adjusted quantum circuit, when applied to the initial quantum state, approximates a ground state of the quantum system, and wherein determining the approximated quantum circuit by adaptively adjusting the total number of T-gates available for the quantum circuit includes: determining the approximated quantum circuit by adaptively adjusting the total number of T-gates available for the adjusted quantum circuit.

[0014] In some implementations, adaptively adjusting the number of T-gates available for use in the adjusted quantum circuit includes: determining respective distances between (i) values ​​of circuit parameters and (ii) variational adjusted values ​​of the circuit parameters; and determining a T-gate allocation that reduces one or more of the determined distances.

[0015] In some implementations, the distance comprises an L2 norm.

[0016] In some implementations, determining the approximate quantum circuit by adaptively adjusting the number of T-gates available for the quantum circuit includes: fixing a total number of T-gates available for the quantum circuit; and performing a discrete optimization routine to assign a specific configuration of the fixed total number of T-gates to the adjusted circuit parameters.

[0017] In some implementations, the discrete optimization routine includes simulated annealing.

[0018] In some implementations, the quantum circuit includes a T-factory storing physical qubits for implementing the T-gate.

[0019] In some implementations, applying the determined approximate quantum circuit to the initial quantum state to obtain an approximation of the target quantum state includes using a T-factory to implement a series of T-gates.

[0020] The disclosed subject matter can be implemented in a specific manner to realize one or more of the following advantages.

[0021] A system implementing an error-correcting variational algorithm as described in this specification can require a lower space (number of physical qubits per logical qubit) overhead. Specifically, since variational algorithms are typically low-depth, in many cases, quantum computations or operations can be performed in series by the described system, requiring only one or possibly several T factories. Since T factories typically contain a large number of qubits, on the order of half a million physical qubits, the system described in this specification can achieve a significant reduction in the computational resources required to perform quantum computations. In addition, a system implementing an error-correcting variational algorithm as described in this specification can perform quantum computations with a lower space overhead while maintaining a higher computational accuracy. Therefore, the system provides the possibility of practical and reliable error-corrected quantum computations using less than a million physical qubits.

[0022] The details of one or more implementations of the subject matter of this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A block diagram of an example system for performing quantum computing is shown.

[0024] Figure 2 is a flow chart of an example process for determining a target quantum state.

[0025] Figure 3 is a flow chart of an example iterative process for adaptively increasing the number of T-gates assigned to a quantum circuit.

[0026] Figure 4 is a flow chart of an example iterative process for adaptively reducing the number of T-gates assigned to a quantum circuit.

[0027] Figure 5 is a flow chart of an example process for adjusting T-gate configuration based on a variational algorithm.

[0028] Figure 6 is a flow chart of an example process for directly adjusting T-gate assignments using discrete optimization techniques.

[0029] Throughout the various drawings, similar reference numbers and designations indicate similar elements.

[0030] Specific implementation method

[0031] Quantum error correction codes are used in quantum computing to protect quantum computing from errors due to decoherence and other quantum noise, as well as errors associated with faulty quantum gates, faulty quantum state preparation, and faulty measurements. Typically, quantum error correction codes involve encoding a logical qubit into multiple physical qubits that are more robust to errors. For example, in some cases, hundreds of physical qubits may be required to encode one error-corrected logical qubit. Quantum computing is then performed by applying logical operations directly to the encoded physical qubits in a manner that does not require decoding.

[0032] For example, a given quantum computation may require applying a corresponding quantum circuit to, for example, a physical qubit prepared in a certain initial state. The quantum circuit may include multiple rotation operations, where each rotation operation includes a respective rotation angle (also referred to herein as a circuit parameter). Each rotation operation can be implemented using a set of universal quantum logic gates. An example of a universal gate set is the Clifford + T gate set. Subsets of this universal gate set include Clifford gate-Hadmard gate, CNOT gate, and The set of universal gates further includes non-Clifford gates − Door.

[0033] Conventional systems and methods for implementing quantum circuit rotation operations predefine a target accuracy for implementing the rotation operation, and based on the predefined accuracy, determine a corresponding sequence of quantum logic gates that implement the rotation operation, such as a sequence of Hadamard and T gates. The length of the sequence of Hadamard and T gates depends on the specific rotation operation and the predefined target accuracy.

[0034] The T-gate is a non-Clifford gate, for example, it is more expensive to implement than the Clifford quantum logic gate. For example, the implementation of the T-gate requires the generation and consumption of auxiliary quantum states. Therefore, additional physical qubits are required to implement the T-gate. Because of the need for additional physical qubits, quantum devices that use quantum error correction schemes that implement the above-mentioned universal gate set typically include a "T-factory" of physical qubits that can be used to implement the T-gate. Each T-factory can contain hundreds of thousands of physical qubits. Since quantum algorithms typically need to perform a large number of precise rotation operations, which in turn requires a large number of T-gates, the total number of physical qubits included in the quantum device that implements the error correction scheme can become impractical or infeasible.

[0035] This specification describes systems and methods for performing variational quantum algorithms within error-correcting codes to reduce the number of physical qubits required to perform quantum computations.

[0036] The presently disclosed systems and methods differ from conventional systems and methods for implementing costly error correction schemes by predefining a target accuracy for implementing quantum circuit rotation operations. The predefined target accuracy defines the gate sequence necessary to implement quantum circuit rotation operations with the target accuracy and produce, for example, a target quantum state encoding a solution to a computational task.

[0037] In contrast, the currently disclosed systems and methods predefine an initial total number of T-gates. This in turn defines a set of discrete rotations that can be accurately implemented and that produce a corresponding quantum state when applied to an initial quantum state. The initial total number of T-gates is then adaptively adjusted to determine a final T-gate allocation that defines a set of discrete rotations that can be accurately implemented to produce a final quantum state that is approximately (or equal to) a target quantum state.

[0038] Example operating environment

[0039] Figure 1Depicted is an example system 100 for performing quantum computing. Example system 100 is an example of a system implemented as a classical or quantum computer program on one or more classical computers or quantum computing devices in one or more locations in which the systems, components, and techniques described below can be implemented.

[0040] System 100 includes quantum hardware 102 in data communication with one or more classical processors 104 .

[0041] System 100 may receive input data representing a target state of a quantum system, e.g., input data 106. The target quantum state of the quantum system may be a quantum state that is the result of applying a particular quantum circuit to an initial quantum state of the quantum system. For example, the target quantum state may correspond to a ground state of a Hamiltonian, e.g., in machine learning and quantum simulation settings. In this example, the particular quantum circuit represents the overall evolution of the quantum system under the Hamiltonian. The data representing the target state may include data specifying properties of the target state and / or how to achieve the target state, e.g., data specifying a Hamiltonian and indicating which of a plurality of Hamiltonian eigenvalues ​​the target state corresponds to.

[0042] System 100 can generate output data representing an approximation of a target quantum state, e.g., output data 108. The generated output data can be provided for further processing and analysis. For example, where the target quantum state is a ground state of a Hamiltonian characterizing a physical system such as a material, e.g., a metal, the generated output data can be used to determine a property of the material, e.g., its conductivity, as part of a materials science process.

[0043] System 100 is configured to perform classical computations in conjunction with quantum computations using quantum hardware 102 and classical processors 104 .

[0044] The classical processor 104 may include components for performing classical computations. For example, the classical processor 104 may include a module, such as a circuit determination module 112 , configured to process input data representing a target quantum state of the quantum system 120 .

[0045] Processing input data 106 may include determining an approximate quantum circuit that, when applied to an initial state of the quantum system, produces a quantum state that is sufficiently close to the target quantum state. The determined quantum circuit may include a sequence of quantum logic gates that implement a specific rotation operation applied to the qubits in the quantum system, such as a sequence of Hadamard gates and T gates. The classical processor 104 may then send data representing the determined approximate quantum circuit to the quantum hardware 102.

[0046] To determine a quantum circuit that produces an approximation of a quantum state that is sufficiently close to a target quantum state, circuit determination module 112 may query quantum hardware to determine how many T gates are available for the quantum circuit. Circuit determination module 112 may then adaptively adjust the number of T gates to determine the approximate quantum circuit.

[0047] To adaptively adjust the number of available T-gates, the classical processor 104 may define an initial number of T-gates, e.g., a predetermined minimum number of T-gates that is less than the available number of T-gates, and iteratively generate quantum circuits including an increasing number of T-gates. This may include, in each iteration, determining the number of T-gates for that iteration and determining a particular allocated quantum circuit including the determined number of T-gates for that iteration, e.g., using quantum circuit design techniques and algorithms. The classical processor 104 may then send data representing the determined quantum circuit to the quantum hardware 102. As described in more detail below, the quantum hardware 102 may be configured to generate a determined quantum circuit, such as the quantum circuit 114, using the control device 116 and the T-factory 118. The quantum hardware 102 may further be configured to apply the determined quantum circuit to the quantum system 120 to evolve the state of the quantum system 120 from the initial state to the evolved state.

[0048] The quantum hardware 102 may be further configured to measure the quantum system 120 after applying the determined quantum circuit to obtain an energy expectation value of the quantum system for the iteration. The quantum hardware 102 may provide data representing the measurement result to the classical processor 104. The classical processor 104 may process the received data by comparing the measurement result for the iteration with the lowest determined energy expectation value for the quantum system. If the difference between the measurement result for the iteration and the lowest determined energy expectation value for the quantum system exceeds a predetermined threshold, the circuit determination module 112 may be configured to perform another iteration with an increased number of T gates. If the difference does not exceed a predetermined threshold, the circuit determination module 112 may select the determined quantum circuit for the iteration as the approximate quantum circuit.

[0049] Alternatively, adaptively adjusting the number of available T-gates may include defining an initial number of T-gates, for example, an available number of T-gates, and iteratively generating a quantum circuit including a reduced number of T-gates. Figures 2 to 4 A process for determining an approximate quantum circuit that produces a quantum state that is sufficiently close to a target quantum state by adaptively increasing or decreasing an initial number of T-gates is described in more detail.

[0050] Alternatively, the circuit determination module 112 can be configured to define an approximate quantum circuit by directly optimizing the total number of available T-gates, or by optimizing a specific configuration / allocation of the total number of T-gates available for the quantum circuit, for example, using an optimization routine such as simulated annealing. An example process for directly optimizing the allocation of T-gates will be described below with reference to Figure 5 and Figure 6 Give a description.

[0051] Alternatively or additionally, the classical processor 104 may be configured to determine a quantum circuit that approximates the ground state of a quantum system by executing a variational algorithm that uses quantum circuit parameters as variational assumptions. An example process for determining a quantum circuit using a variational technique is described below with reference to Figure 2 and Figure 5 Give a description.

[0052] Quantum hardware 102 may include components for performing quantum computations. For example, quantum hardware 102 may include quantum system 120 , control device 116 for implementing quantum circuits, such as quantum circuit 114 , and one or more T-factories 118 .

[0053] The quantum system 120 may include one or more multi-level quantum subsystems, such as two-level qubits (qubits) or d-level qubits (qudits). In some implementations, the multi-level quantum subsystem may be a superconducting qubit, such as a Gmon qubit. The type of multi-level quantum subsystem utilized by the system 100 depends on the physical system of interest. For example, in some cases, it may be convenient to include one or more resonators attached to one or more superconducting qubits such as a Gmon qubit or an Xmon qubit. In other cases, an ion trap, a photonic device, or a superconducting cavity (with a state that can be prepared without a qubit) may be used. Further examples of implementations of multi-level quantum subsystems include flux qubits, silicon quantum dots, or phosphorus impurity qubits.

[0054] The multi-level quantum subsystem can be operated via the application of quantum circuits 114. In these settings, the multi-level quantum subsystem can be referred to as a qubit register. The quantum circuit 114 can be defined by data received from the classical processor 104, such as data representing a specific sequence of quantum logic gates. The quantum circuit defined by the received data can be generated / implemented using one or more control devices 116.

[0055] The type of control device 116 included in quantum hardware 102 depends on the type of qubits included in quantum system 120. For example, in some cases, control device 116 may include a device that controls the frequency of qubits included in quantum system 120, such as an excitation pulse generator and a control line that couples the qubit to the excitation pulse generator. Control device 116 can then cause the frequency of each qubit to be adjusted toward or away from the quantum gate frequency of the excitation pulse on the corresponding control drive train. Control device 116 may further include a measurement device, such as a readout resonator. Measurements obtained via the measurement device may be provided to classical processor 104 for processing and analysis.

[0056] One or more T factories 118 store physical qubits used to implement T gates as part of quantum circuit 114. In some implementations, as described below with reference to Figure 2 As described, the T-factory can be used to implement series T-gates instead of parallel T-gates.

[0057] Hardware Programming

[0058] Figure 2 is a flow chart of an example process 200 for determining a quantum state. As described above, the example process 200 can be performed as part of an error-corrected quantum computation. For convenience, the process 200 will be described as being performed by a system of one or more classical or quantum computing devices located at one or more locations. For example, a quantum computing system appropriately programmed according to the present specification, such as Figure 1 The system 100 is capable of performing the process 200.

[0059] The system receives data representing a target quantum state of a quantum system (step 202). For example, the quantum system may include a system of logical qubits encoded as multiple physical qubits. The target state of the quantum system may be defined as the lowest energy quantum state resulting from applying a quantum circuit to the quantum system. For example, the target quantum state may correspond to a quantum state that minimizes a cost function, such as in machine learning and quantum simulation settings.

[0060] A quantum circuit may include a plurality of rotation operations specified by corresponding rotation angles, which together represent a specific quantum computation. Implementing error-correcting rotation operations may include using a corresponding sequence of Hadamard quantum logic gates and T gates to approximate each rotation operation. The number of T gates included in each sequence of Hadamard quantum logic gates and T gates depends on the total number of available T gates and the rotation operations included in the circuit. A fixed number of T gates defines a corresponding set of discrete rotation operations that can be accurately implemented and used to approximate quantum circuits. In some implementations, a fixed number of T gates may define multiple sets of discrete rotation operations, each set of discrete rotation operations approximates a quantum circuit and can be accurately implemented. That is, a fixed number of T gates can be arranged in a variety of configurations or distributions, each configuration or distribution approximates a quantum circuit. Different known techniques can be applied to determine the T gate configuration. For example, each rotation operation can be represented as a series of gates, including: a Hadamard gate H or nothing, followed by a string of TH gates or SH gates, where S represents an S gate and there are no consecutive SH pairs, ending with TH and an arbitrary Clifford gate.

[0061] As mentioned above, implementing a T-gate on a logical qubit may require a large number of additional physical qubits. Therefore, implementing a discrete rotation operation of an approximate quantum circuit may include accessing multiple T factories storing additional physical qubits, and using the logical qubits and the additional qubits to implement the discrete rotation operation. As a result, the total number of physical qubits operated by the system will be greatly increased.

[0062] To mitigate this problem, the system adaptively adjusts the number of T-gates available for a quantum circuit to determine a quantum circuit that produces an approximation of a quantum state that is sufficiently close to a target quantum state (step 204).

[0063] In some implementations, determining the approximate quantum circuit may include incrementally adjusting the number of T-gates available for the quantum circuit to determine an optimal or near-optimal allocation of T-gates. The optimal or near-optimal allocation of T-gates then defines the approximate quantum circuit. In this context, the allocation of T-gates may be considered optimal if the action of the approximate quantum circuit on the quantum system is as close as possible to the action of the original quantum circuit (given a fixed total number of T-gates).

[0064] For example, the system can iteratively define an updated circuit by progressively increasing the initial number of T-gates available for the quantum circuit. In each iteration, the energy expectation value of the quantum system after applying the updated circuit for that iteration to the initial state of the quantum system is determined. When the energy expectation value converges, the iterative process can end. Then, the final approximate quantum circuit can be defined by the T-gate allocation corresponding to the penultimate iteration.

[0065] As another example, the system can iteratively define an updated circuit by progressively reducing the initial number of T available for the quantum circuit. Figure 3 and Figure 4 An example process for incrementally adjusting the number of T-gates available for a quantum circuit is described in more detail.

[0066] As another example, the system can define an updated quantum circuit by directly optimizing the total number of T-gates allocated to the electronic circuit or by optimizing a specific configuration / allocation of the total number of T-gates available for the quantum circuit. Figure 5 and Figure 6 An example process for directly optimizing the allocation of T-gates is described.

[0067] In some implementations, the system can perform a variational algorithm to determine an adjusted quantum circuit that, when applied to an initial quantum state, approximates a ground state of the quantum system. That is, the system can apply the quantum circuit to the initial state of the quantum system to generate a variational hypothetical wave function. The variational hypothetical wave function is defined by the possibly negligible effects of the quantum circuit on the initial state of the quantum state. For example, the variational hypothetical wave function can be given by Given, where represents the initial state of the quantum system, represents a quantum circuit, and represents the (adjusted) circuit parameters (rotation angles) of the approximate quantum circuit.

[0068] The system can then perform a variational algorithm using the variational hypothesized wave function to determine adjusted values ​​of one or more circuit parameters that define an adjusted quantum circuit that approximates a ground state of the quantum system when the adjusted quantum circuit is applied to the initial quantum state.

[0069] In these implementations, adaptively adjusting the number of T-gates available for the quantum circuit may include determining an approximate quantum circuit by adaptively adjusting the number of T-gates available for the adjusted quantum circuit, as described in step 204. Executing a variational algorithm in conjunction with process 200 may further optimize the determined quantum circuit, i.e., determine an approximate quantum circuit that produces a quantum state with an improved energy expectation value with fewer T-gates.

[0070] The system applies the determined approximate quantum circuit to the initial quantum state of the quantum system to obtain an approximation of the target quantum state (step 206). The estimate of the target state can be used by the system to perform quantum computations, for example, as part of an error correction algorithm, or can be the result of a quantum computation. For example, process 200 can be applied in variational quantum simulations, for example, to prepare the ground state of a molecule.

[0071] Typically, if the computation is to be completed in a reasonable time, it is necessary to perform the computation using a large number of T-gates by implementing parallel T-gates. The process 200 for determining a target quantum state can be performed using a small number of T-factories. Therefore, the T-factories can be applied in series rather than in parallel.

[0072] Iteratively increase the number of T gates

[0073] Figure 3 is a flow chart of an example process 300 for increasing the number of T-gates available for a quantum circuit and testing when a sufficiently good energy estimate has been obtained to terminate the process. For convenience, process 300 will be described as being performed by a system of one or more classical or quantum computing devices located at one or more locations. For example, a quantum computing system appropriately programmed according to the present specification, such as Figure 1 The system 100 is capable of performing the process 300.

[0074] The system allocates an initial number of T-gates to the quantum circuit. The initial number of T-gates may be a minimum number or a predetermined number, which depends on the size and depth of the quantum circuit.

[0075] The system iteratively increases the initial number of T-gates assigned to the quantum circuit until a termination criterion is met, as described below with reference to step 310. In each iteration, the system determines the number of T-gates to use for that iteration (step 302).

[0076] The number of T-gates used for the current iteration is greater than the number of T-gates used for the previous iteration. For example, in each iteration, the number of T-gates can be increased by a predetermined fixed number of additional T-gates in steps of, for example, 1, 5, or 10. As another example, the system can increase the number of T-gates by selecting a predetermined percentage increase.

[0077] Alternatively or in addition, the system may increase the total number of T-gates by selecting a predetermined percentage increase in T-gates for circuit parameters corresponding to different types of quantum logic gates. In some implementations, the system may limit the number of T-gates that may be assigned to a particular circuit parameter, e.g., if the application of a predetermined percentage increase assigns a number of T-gates that exceeds a maximum number for a circuit parameter, the system may cap the number at the maximum and no further T-gates are assigned to the circuit parameter.

[0078] The system can generate one or more updated quantum circuits for the iteration using the determined number of T-gates for the iteration (step 304). As described above, the fixed number of T-gates defines a set (or multiple sets) of discrete rotations that can be accurately implemented, and the set of discrete rotations approximates the quantum circuit. Therefore, each updated quantum circuit corresponds to a different allocation of the determined number of T-gates within the updated quantum circuit, that is, a different set of discrete rotation operations that approximate the quantum circuit.

[0079] For each updated quantum circuit, the system determines an energy expectation value of the quantum system for that iteration using the updated quantum circuit (step 306).

[0080] The system identifies a lowest determined energy expectation value for the quantum system (step 308 ).

[0081] The system determines whether the difference between the lowest determined energy expectation value for this iteration and the lowest determined energy expectation value for the previous iteration exceeds a predetermined threshold (step 310). The value of the predetermined threshold may depend on a number of factors, such as target simulation accuracy, and may be considered a design parameter.

[0082] In response to determining that the difference exceeds the predetermined threshold, the system performs a subsequent iteration (step 312 ).

[0083] In response to determining that the difference does not exceed the predetermined threshold, the system approximates the quantum circuit using the T-gate allocation corresponding to the lowest energy expectation value for the previous iteration (step 314).

[0084] Iteratively reduce the number of T gates

[0085] Figure 4 is a flow chart of an example iteration 400 for reducing the number of T-gates available for a quantum circuit. For convenience, the process 400 will be described as being performed by a system of one or more classical or quantum computing devices located at one or more locations. For example, a quantum computing system appropriately programmed according to the present specification, such as Figure 1 The system 100 is capable of performing the process 400.

[0086] The system allocates an initial number of T-gates to the quantum circuit. The initial number of T-gates may be a minimum number or a predetermined number, which depends on the size and depth of the quantum circuit, the total number of T-gates available to the system, and a predetermined target time frame within which computations are to be performed by the system.

[0087] The system iteratively reduces the initial number of T-gates assigned to the quantum circuit until a termination criterion is met, as described below with reference to step 410. In each iteration, the system determines the number of T-gates to use for that iteration (step 402).

[0088] The number of T-gates used for the current iteration is less than the number of T-gates used for the previous iteration. For example, in each iteration, the number of T-gates can be reduced by a predetermined fixed number of additional T-gates in steps of, for example, 1, 5, or 10. As another example, the system can reduce the number of T-gates by selecting a predetermined percentage reduction. Alternatively or in addition, the system can reduce the total number of T-gates by selecting a predetermined percentage reduction of T-gates for circuit parameters corresponding to different types of quantum logic gates.

[0089] Alternatively or additionally, in some implementations, the system can reduce the number of T-gates assigned to a quantum circuit by identifying rotation operations in the quantum circuit that are each assigned a number of T-gates exceeding a predetermined threshold, and reducing the number of T-gates available for the identified circuit rotation operations. For example, the system can identify circuit parameters that are particularly high cost, e.g., will require more than a predetermined acceptable time to execute, and reduce the number of T-gates available for these high cost parameters.

[0090] The system generates one or more updated quantum circuits for the iteration using the determined number of T-gates for the iteration (step 404). As described above, the fixed number of T-gates defines a set (or multiple sets) of discrete rotations that can be accurately implemented, and the set of discrete rotations approximates the quantum circuit. Therefore, each updated quantum circuit corresponds to a different allocation of the determined number of T-gates within the updated quantum circuit, that is, a different set of discrete rotation operations that approximate the quantum circuit.

[0091] For each updated quantum circuit, the system determines an energy expectation value of the quantum system for that iteration using the updated quantum circuit (step 406).

[0092] The system identifies a lowest determined energy expectation value for the quantum system (step 408).

[0093] The system determines whether the difference between the lowest determined energy expectation value for this iteration and the lowest determined energy expectation value for the previous iteration exceeds a predetermined threshold (step 410). The value of the predetermined threshold may depend on a number of factors, such as target simulation accuracy, and may be considered a design parameter.

[0094] In response to determining that the difference does not exceed the predetermined threshold, i.e., the lowest determined energy expectation value for this iteration does not deviate significantly from the determined energy expectation value for the previous iteration calculated based on a higher number of T gates, the system performs a subsequent iteration (step 412).

[0095] In response to determining that the difference exceeds a predetermined threshold, the system approximates the quantum circuit using the T-gate allocation corresponding to the lowest energy expectation value for the previous iteration (step 414). In other words, in response to determining that reducing the total number of T-gates available for the quantum circuit causes the energy expectation value to significantly deviate (increase) from the determined energy expectation value for the previous iteration calculated based on a higher number of T-gates, the system determines that the total number of T-gates for the iteration is insufficient and approximates the quantum circuit using the T-gate allocation corresponding to the lowest energy expectation value for the previous iteration.

[0096] Adjusting T-gate configuration based on variational algorithm

[0097] Figure 5is a flow chart of an example process 500 for adjusting a T-gate configuration based on a variational algorithm. For convenience, process 500 will be described as being performed by a system of one or more classical or quantum computing devices located at one or more locations. For example, a quantum computing system appropriately programmed according to the present specification, such as Figure 1 The system 100 can perform the process 500.

[0098] The system determines an initial number of T-gates that can be used as circuit parameters in a quantum circuit (step 502 ).

[0099] As mentioned above Figure 2 As described, the system determines a corresponding distance between (i) an initial value of a quantum circuit parameter and (ii) a variational adjusted value of the circuit parameter after a variational algorithm has been executed. In some implementations, the determined distance may include an L2 norm.

[0100] The system determines an allocation or configuration of T-gates that reduce one or more determined distances. In some implementations, this can include fixing an initial number of T-gates and determining an allocation of the initial number of T-gates that reduce at least one determined distance. In other implementations, the initial number of T-gates can be adjusted, such as reduced or increased, and an allocation of an adjusted total number of T-gates that reduce at least one determined distance can be determined.

[0101] To determine the assignment or configuration of T-gates, the system can represent the circuit parameters as points on a Bloch sphere. The number of T-gates assigned to the parameter determines how many points there are on the Bloch sphere. In some implementations, the points may be located close to the target value (rotation angle). In this case, the system can determine that the parameter does not require many T-gates. In other implementations, the parameter may require more T-gates. For example, if the angle Can be T gates represent that, and after optimization, the optimized angle is close enough to the angle , it can be determined that no additional T-gates are needed (or that fewer T-gates are sufficient). However, if the optimized angle is not close enough to the angle , it can be determined that more T gates are needed.

[0102] Directly adjust T-gate assignment

[0103] Figure 6 is a flow chart of an example process 600 for directly adjusting T-gate assignments using discrete optimization techniques. For convenience, process 600 will be described as being performed by a system of one or more classical or quantum computing devices located at one or more locations. For example, a quantum computing system appropriately programmed according to the present specification, such as Figure 1 The system 100 can perform the process 600.

[0104] The system determines a fixed number of T-gates available for use in a quantum circuit (step 602). In some implementations, the total number of T-gates available for use in a circuit depends on hardware included in the system, for example, the number of T-factories accessible to the system. In other implementations, the total number of T-gates available for use in a quantum circuit can be a target total number of T-gates, for example, a target number of T-gates that is less than the total number of T-gates included in or available for use in quantum hardware used by the system.

[0105] The system performs a discrete optimization routine to assign a specific configuration of T-gates to the quantum circuit. For example, the system can apply a simulated annealing process to assign a specific configuration of T-gates to the circuit parameters. In some implementations, the specific configuration of T-gates assigned can include all available T-gates. In other implementations, the specific configuration of T-gates assigned can include a number of T-gates that is less than the total number of available T-gates.

[0106] The digital and / or quantum subject matter and implementations of digital functional operations and quantum operations described in this specification can be implemented in digital electronic circuits, in suitable quantum circuits, or more generally, in quantum computing systems, in tangibly embodied digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware, in structures disclosed in this specification and their structural equivalents, or in a combination of one or more of them. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptographic system, or a quantum simulator.

[0107] Embodiments of the digital and / or quantum subject matter described in this specification can be implemented as one or more digital modules and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by a data processing device or for controlling the operation of a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access storage device, one or more qubits, or a combination of one or more of them. Alternatively or in addition, the program instructions can be encoded on an artificially generated propagated signal capable of encoding digital and / or quantum information, e.g., a machine-generated electrical, optical, or electromagnetic signal, the signal being generated to encode the digital and / or quantum information for transmission to a suitable receiver device for execution by the data processing device.

[0108] The terms quantum information and quantum data refer to information or data carried by a Quantum system, held or stored in a quantum system, in which the smallest non-trivial system is a qubit, a system that defines a unit of quantum information. It should be understood that the term "qubit" includes all quantum systems, which can be appropriately approximated as a two-level system in the corresponding context. Such a quantum system may include a multi-level system, for example, having two or more levels. For example, such a system may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational ground state is identified by the ground and first excited states, however it should be understood that it is possible for the computational state to be identified by a higher level excited state in other settings.

[0109] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and includes various devices, apparatuses and machines for processing digital and / or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, multiple digital and quantum processors or computers and combinations thereof. The apparatus can also be, or further include, special purpose logic circuits, such as FPGAs (field programmable gate arrays), ASICs (application specific integrated circuits) or quantum simulators, i.e., quantum data processing devices that are already simulating or generating information about a specific quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the ability to perform general quantum calculations. In addition to the hardware, the apparatus can optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more thereof.

[0110] A digital computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, can be written in any form of programming language, including compiled or interpreted languages ​​or procedural languages, and can be deployed in any form, including as a stand-alone program or as a module, component, subroutine or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, can be written in any form of programming language, including compiled or interpreted languages ​​or declarative languages ​​or procedural languages, and can be translated into a suitable binary programming language, or can be written in a quantum programming language, such as QCL or Quipper.

[0111] A digital and / or quantum computer program can but need not correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data, such as one or more scripts stored in a markup language document, a single file dedicated to a related program, or in multiple coordinated files, such as a file storing a portion of one or more modules, subroutines, or codes. A digital and / or quantum computer program can be deployed to be executed on a digital or quantum computer located at a site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network or on multiple digital and / or multiple quantum computers. A quantum data communication network is understood to be a network that can use a quantum system such as a qubit to send quantum data. Typically, a digital data communication network cannot send quantum data, but a quantum data communication network can send quantum data and digital data.

[0112] The processes and logic flows described in this specification can be performed by one or more programmable digital and / or quantum computers, operating with one or more digital and / or quantum processors, as appropriate, executing one or more digital and / or quantum computer programs by operating on input digital and quantum data to perform functions and generate outputs. The processes and logic flows can also be performed by an apparatus, and can also be implemented as a special purpose logic circuit, such as an FPGA or ASIC, or a quantum simulator, or by a combination of a special purpose logic circuit or a quantum simulator and one or more programmed digital and / or quantum computers.

[0113] For a system of one or more digital and / or quantum computers to be "configured to" perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that, when run, causes the system to perform the operation or action. For one or more digital and / or quantum computer programs to be configured to perform a particular operation or action means that the one or more programs include instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer can receive instructions from a digital computer that, when executed by the quantum computing device, cause the device to perform the operation or action.

[0114] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on a general or special purpose digital and / or quantum processor or both or any other type of central digital and / or quantum processing unit. Typically, the central digital and / or quantum processing unit will receive instructions and digital and / or quantum data from a read-only memory, a random access memory or a quantum system suitable for sending quantum data such as photons or combinations thereof.

[0115] The essential elements of a digital and / or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and the memory can be supplemented or combined with special purpose logic circuits or quantum simulators. Typically, a digital and / or quantum computer will also include, or be operably coupled to receive digital and / or quantum data from or send digital and / or quantum data to or from one or more mass storage devices for storing digital and / or quantum data, such as magnetic, magneto-optical disks, optical plates, or quantum systems suitable for storing quantum information, or both. However, a digital and / or quantum computer need not have such devices.

[0116] Digital and / or quantum computer readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memory, media and memory devices, including, by way of example, semiconductor memory devices such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. It should be understood that quantum memory is a device capable of storing quantum data with high fidelity and efficiency, for example, a light-matter interface, where light is used for transmission and matter is used for storage and preservation of quantum features of quantum data such as superposition or quantum correlation.

[0117] The control of the various systems or portions thereof described in this specification can be implemented in a digital and / or quantum computer program product that includes instructions stored on one or more non-transitory machine-readable storage media and is executable on one or more digital and / or quantum processing devices. The systems or portions thereof described in this specification can each be implemented as an apparatus, method or system that can include one or more digital and / or quantum processing devices and a memory to store executable instructions to perform the operations described in this specification.

[0118] While this specification contains many specific implementation details, these methods should not be interpreted as limitations on the scope of what may be claimed, but rather as descriptions of features that are specific to a particular implementation. Certain features described in this specification in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented separately in multiple implementations or in any suitable subcombination. Moreover, while features may be described above as functioning in certain combinations and even initially claimed as such, in some cases one or more features in a declared combination may be excised from the combination, and a declared combination may be directed to a subcombination or variation of a subcombination.

[0119] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be understood as requiring that such operations be performed in the particular order shown or in a continuous order, or that all of the operations shown be performed to achieve the desired result. In some environments, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the above-mentioned implementations should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0120] Specific implementations of the subject matter have been described. Other implementations are within the scope of the appended claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. A computer-implemented method comprising: determining a plurality of T-gate configurations, each T-gate configuration comprising a number of T-gates less than or equal to a predefined total number of T-gates and representing a rotation operation that, when applied to an initial quantum state, produces an evolved quantum state that approximates a target quantum state, wherein the target quantum state is defined as a result of applying a particular rotation operation to the initial quantum state; selecting, from a plurality of T-gate configurations, a T-gate configuration representing a rotation operation having a rotation angle closest to a rotation angle of the specific rotation operation; and A rotation operation represented by the selected T-gate configuration is applied to the initial quantum state to obtain an approximation of the target quantum state.

2. The method according to claim 1, wherein: Each of the plurality of T-gate configurations includes a T-gate and a Hadamard gate.

3. The method according to claim 1, wherein: Each of the plurality of T-gate configurations includes a T-gate, a Hadamard gate, and an S-gate.

4. The method according to claim 3, wherein: Each of the multiple T-gate configurations includes a series of quantum gates, including: a Hadamard gate H, followed by a series of TH gates or SH gates, where TH represents a T gate followed by a Hadamard gate, SH represents an S gate followed by a Hadamard gate, followed by a TH gate, and any Clifford gate.

5. The method according to claim 4, wherein: The series of TH gates or SH gates does not include consecutive pairs of SH gates.

6. The method according to claim 1, wherein: The target quantum state comprises the lowest energy quantum state obtained by applying a particular rotation operation to the initial quantum state.

7. The method according to claim 6, wherein: The target quantum state comprises a quantum state that minimizes the cost function.

8. The method according to claim 1, wherein: The predefined total number of T-gates comprises the number of T-gates available to quantum hardware for applying a rotation operation represented by the selected T-gate configuration to the initial quantum state.

9. The method according to claim 8, wherein: The quantum hardware includes a T-factory storing physical qubits for implementing T-gates.

10. The method according to claim 9, wherein: Applying a rotation operation represented by a selected T-gate configuration to an initial quantum state to obtain an approximation of a target quantum state includes using a T-factory to implement a series of T-gates.

11. An apparatus comprising: Quantum hardware, including: Quantum systems; one or more control devices configured to generate quantum circuits and apply quantum circuits to the quantum system; and One or more classical processors; Wherein, the apparatus is configured to perform an operation for approximating a target quantum state, the operation comprising: determining a plurality of T-gate configurations, each T-gate configuration comprising a number of T-gates less than or equal to a predefined total number of T-gates and representing a rotation operation that, when applied to an initial quantum state, produces an evolved quantum state that approximates a target quantum state, wherein the target quantum state is defined as a result of applying a particular rotation operation to the initial quantum state; selecting, from a plurality of T-gate configurations, a T-gate configuration representing a rotation operation having a rotation angle closest to a rotation angle of the specific rotation operation; and A rotation operation represented by the selected T-gate configuration is applied to the initial quantum state to obtain an approximation of the target quantum state.

12. The device according to claim 11, wherein Each of the plurality of T-gate configurations includes a T-gate and a Hadamard gate.

13. The device according to claim 11, wherein: Each of the plurality of T-gate configurations includes a T-gate, a Hadamard gate, and an S-gate.

14. The device according to claim 13, wherein: Each of the multiple T-gate configurations includes a series of quantum gates, including: a Hadamard gate H, followed by a series of TH gates or SH gates, where TH represents a T gate followed by a Hadamard gate, SH represents an S gate followed by a Hadamard gate, followed by a TH gate, and any Clifford gate.

15. The device according to claim 14, wherein: The series of TH gates or SH gates does not include consecutive pairs of SH gates.

16. The device according to claim 11, wherein The target quantum state comprises the lowest energy quantum state obtained by applying a particular rotation operation to the initial quantum state.

17. The device according to claim 16, wherein: The target quantum state comprises a quantum state that minimizes the cost function.

18. The device according to claim 11, wherein The predefined total number of T-gates comprises the number of T-gates available to quantum hardware for applying a rotation operation represented by the selected T-gate configuration to the initial quantum state.

19. The device according to claim 18, wherein: The quantum hardware includes a T-factory storing physical qubits for implementing T-gates.

20. The device according to claim 19, wherein Applying a rotation operation represented by a selected T-gate configuration to an initial quantum state to obtain an approximation of a target quantum state includes using a T-factory to implement a series of T-gates.

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