Method of manufacturing a multilayer electronic component
By providing a downward-facing first inner electrode pattern and a upward-facing second inner electrode pattern in the inner electrode pattern of the multi-layer ceramic capacitor, and a separate dielectric sheet is provided between the two, the problem of step portion and short circuit risk is solved, and process simplification and cost reduction are achieved.
Patent Information
- Application Number
- CN202411529457.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-11-01
- Filing Date
- 2024-10-30
- Publication Date
- 2025-05-06
AI Technical Summary
When manufacturing multi-layer ceramic capacitors (MLCCs), as the number of stacking dielectric layers and inner electrodes increases, step portions are easily formed, resulting in deformation of the inner electrodes and dielectric layers and risk of short circuits. At the same time, the additional processes of the prior art are complex and costly.
By setting the first inner electrode pattern so as to face down in the stacking direction and setting the second inner electrode pattern so as to face up, the step portion is eliminated, and a separate dielectric green sheet is provided between the first inner electrode pattern and the second inner electrode pattern to prevent the dielectric green sheet deformation.
Effectively eliminates the step portion formed in the stacking and pressing process, prevents deformation of the inner electrode and the dielectric layer, reduces the risk of short circuit between the inner electrodes, and simplifies the process steps and reduces the cost.
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Figure CN119943577A_ABST
Abstract
Description
[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2023-0149359 filed in the Korean Intellectual Property Office on November 1, 2023, the disclosure of which is incorporated herein in its entirety by reference. Technical Field
[0002] The present disclosure relates to a method of manufacturing a multi-layer electronic assembly. Background Art
[0003] Multilayer ceramic capacitors (MLCCs), as one type of multilayer electronic components, are chip capacitors mounted on printed circuit boards of various types of electronic products, such as imaging devices (e.g., liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smart phones, mobile phones, on-board chargers (OBCs) DC-DC converters of electric vehicles, etc., for charging or discharging therefrom.
[0004] As multilayer electronic components are increasingly miniaturized and have higher capacitance, the thickness of the dielectric layer and the internal electrode is being reduced and the number of stacks is being increased. As the number of stacks of the dielectric layer and the internal electrode increases, unlike the capacitance forming portion including all portions of the internal electrode connected to the external electrode of different polarities, the region extending from the capacitance forming portion to the external electrode for connection to the external electrode includes only the internal electrode connected to the external electrode of the same polarity. Therefore, a step portion may be formed during the lamination process, and such a step portion may deform the internal electrode and the dielectric layer during the pressing process.
[0005] In the prior art, in order to reduce the height difference between the capacitor forming part and the area extending from the capacitor forming part to the external electrode, in the internal electrode printing process, the portion of the internal electrode pattern connected to the external electrode is formed as a thick portion, and the portion of the internal electrode pattern forming the capacitor forming part is formed as a thin portion to form a material sheet, which is then set on the ceramic green sheet. The ceramic green sheet is sandwiched between the material sheets and laminated. An attempt is made to eliminate the step portion by stacking the thick portion of the included internal electrode pattern with the thin portion of the adjacent internal electrode pattern to overlap in the stacking direction, and by applying equal pressure in the stacking direction. However, in this case, there is a risk of short circuit between the internal electrodes, and since an additional process of setting a separate ceramic green sheet is performed, there may be a problem in which the working conditions of sheet peeling and lamination are different, the process operation becomes complicated, and the cost increases. Summary of the invention
[0006] An aspect of the present disclosure is to eliminate a step portion and suppress occurrence of a short circuit between internal electrodes by disposing a first internal electrode pattern to face down in a stacking direction and disposing a second internal electrode pattern to face up in the stacking direction.
[0007] Another aspect of the present disclosure is to eliminate the step portion by disposing the first internal electrode pattern to face down in the stacking direction and disposing the second internal electrode pattern to face up in the stacking direction, and to suppress deformation of the dielectric green sheet by additionally disposing a separate dielectric green sheet between the first internal electrode pattern and the second internal electrode pattern.
[0008] According to one aspect of the present disclosure, a method for manufacturing a multilayer electronic component includes: arranging a first inner electrode pattern including a first main portion and a first convex portion having a thickness thicker than that of the first main portion at a first gap on a first dielectric green sheet; forming a first sheet by applying a first dielectric paste to the first gap and the first inner electrode pattern; arranging a second inner electrode pattern including a second main portion and a second convex portion having a thickness thicker than that of the second main portion at a second gap on a second dielectric green sheet; forming a second sheet by applying a second dielectric paste to the second gap and the second inner electrode pattern; forming a laminated strip by alternately arranging the first sheet and the second sheet; forming a laminated body by cutting the laminated strip; and forming an external electrode on the laminated body. The step of forming the laminated strip is performed by arranging the first sheet so that the first dielectric paste faces downward in a stacking direction and arranging the second sheet so that the second dielectric paste faces upward in the stacking direction. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which: Figure 1 is a perspective view showing a multilayer electronic component according to an embodiment; Figure 2 is along Figure 1 A cross-sectional view taken along line II'; Figure 3 is along Figure 1 A cross-sectional view taken along line II-II'; Figure 4 is a diagram schematically illustrating an operation of forming a laminated strip according to an embodiment; Figure 5 is a diagram schematically illustrating an operation of forming a laminate according to an embodiment; Figure 6 is a diagram schematically illustrating an operation of forming a laminated strip according to another embodiment; and Figure 7 is a diagram schematically illustrating an operation of forming a laminate according to another embodiment. DETAILED DESCRIPTION
[0010] Hereinafter, some embodiments will be described with reference to the accompanying drawings. However, the embodiments may be modified to have various other forms, and the scope of the present disclosure is not limited to the embodiments described below. In addition, embodiments are provided to more completely explain the present disclosure to those skilled in the art. Therefore, in order to explain more clearly, the shapes and sizes of the elements in the accompanying drawings may be exaggerated, and the elements represented by the same reference numerals in the accompanying drawings are the same elements.
[0011] In order to clearly explain the present disclosure in the drawings, parts not related to the description are omitted, and the size (e.g., thickness) of each component shown in the drawings is arbitrarily shown for ease of explanation, but the present disclosure is not necessarily limited to the contents shown. In addition, components with the same function within the scope of the same concept are described using the same reference numerals. In addition, throughout the specification, unless there is a clear statement to the contrary, when a particular part is referred to as "including" a particular element, it means that it may also include other elements without excluding other elements.
[0012] In the drawings, a first direction may be defined as a stacking direction or a thickness direction, a second direction may be defined as a length direction, and a third direction may be defined as a width direction.
[0013] Multilayer electronic components Before describing a method of manufacturing a multilayer electronic component according to an embodiment, a description of a multilayer electronic component according to an embodiment will be provided, which may be manufactured by the method of manufacturing a multilayer electronic component according to an embodiment of the present disclosure.
[0014] Figure 1 is a perspective view showing a multilayer electronic component according to an embodiment.
[0015] Figure 2 is along Figure 1 A cross-sectional view taken along line II'.
[0016] Figure 3 is along Figure 1 A cross-sectional view taken along line II-II'.
[0017] The multilayer electronic component 100 may include a body 110 including a dielectric layer 111 and first and second internal electrodes 121 and 122 alternately disposed with the dielectric layer 111 interposed therebetween, and external electrodes 130 and 140 disposed on the body 110 .
[0018] The body 110 may have dielectric layers 111 and internal electrodes 121 and 122 that are alternately stacked.
[0019] There is no particular limitation on the detailed shape of the body 110, but Figures 1 to 3As shown in FIG, the body 110 may have a hexahedral shape or a shape similar to the hexahedral shape. Due to shrinkage of the ceramic powder contained in the body 110 during the firing process, the body 110 may not have a hexahedral shape with completely straight lines but may generally have a hexahedral shape.
[0020] The body 110 may have a first surface 1 and a second surface 2 opposite to each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and opposite to each other in the second direction, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and opposite to each other in a third direction.
[0021] The plurality of dielectric layers 111 forming the body 110 are in a fired state, and adjacent dielectric layers 111 may be integrated to such an extent that it is difficult to identify a boundary therebetween without using a scanning electron microscope (SEM).
[0022] According to some embodiments, the raw material forming the dielectric layer 111 is not particularly limited as long as sufficient electrostatic capacitance can be obtained, and the specific composition will be described in detail together in the process of describing the dielectric green sheets 211 and 212 (to be described later).
[0023] The average thickness d of the dielectric layer 111 is not particularly limited.
[0024] In order to miniaturize the multilayer electronic component 100 and increase the capacitance of the multilayer electronic component 100, the average thickness d of the dielectric layer 111 may be less than or equal to 0.35 μm, and in order to improve the reliability of the multilayer electronic component 100 under high temperature and high voltage, the average thickness d of the dielectric layer 111 may be greater than or equal to 2 μm.
[0025] The average thickness d of the dielectric layer 111 may refer to an average thickness d of the dielectric layer 111 disposed between the first and second internal electrodes 121 and 122 .
[0026] The average thickness d of the dielectric layer 111 can be obtained by scanning a cross section of the body 110 in the length direction and the thickness direction with a scanning electron microscope (SEM) at a magnification of 10000 and obtaining an image. In more detail, the average thickness d of the dielectric layer 111 can be obtained by measuring the thickness of 30 points at equal intervals in the length direction of one dielectric layer in the scanned image and averaging the measured thickness. The 30 equally spaced points can be specified in the capacitor forming part Ac to be described later. In addition, by extending the average thickness measurement to 10 dielectric layers and obtaining the average value, the average thickness of the dielectric layer can be more generalized.
[0027] The body 110 may include: a capacitor forming portion Ac, which is arranged inside the body 110 and forms a capacitor by including first and second internal electrodes 121 and 122 alternately arranged with a dielectric layer 111 interposed therebetween; and covering portions 112 and 113, which are respectively formed above and below the capacitor forming portion Ac in the first direction.
[0028] In addition, the capacitance forming portion Ac is provided as a portion contributing to forming capacitance of the capacitor, and may refer to a region where the plurality of first internal electrodes 121 and the plurality of second internal electrodes 122 are stacked in the first direction with the dielectric layer 111 therebetween.
[0029] The cover portions 112 and 113 may include an upper cover portion 112 disposed on one surface of the capacitance forming portion Ac in the first direction and a lower cover portion 113 disposed on the other surface of the capacitance forming portion Ac in the first direction.
[0030] The covering parts 112 and 113 may be formed by stacking a single dielectric layer or two or more dielectric layers on the upper and lower surfaces of the capacitance forming part Ac in the thickness direction, respectively, and may mainly serve to prevent damage to the internal electrodes due to physical stress and / or chemical stress.
[0031] The cover parts 112 and 113 do not include an internal electrode, and may include the same material as the dielectric layer 111 .
[0032] The cover parts 112 and 113 may include a ceramic material, for example, a barium titanate (BaTiO 3 )-based ceramic material.
[0033] There is no need to specifically limit the average thickness T1 of the cover parts 112 and 113. However, in order to more easily obtain a miniaturized and high-capacitance multilayer electronic component 100, the average thickness T1 of the cover parts 112 and 113 may be equal to or less than 20 μm.
[0034] The edge portions 114 and 115 may be respectively disposed on one side surface and the other side surface of the capacitance forming portion Ac in the third direction.
[0035] like Figure 3 As shown in , the edge portions 114 and 115 may refer to regions between both ends of the first and second internal electrodes 121 and 122 in the width direction and the outer surface of the body 110 in the width direction in a cross section of the body 110 cut along the width direction-thickness direction.
[0036] The edge portions 114 and 115 may mainly serve to prevent damage to the inner electrodes due to physical stress and / or chemical stress.
[0037] The width of the edge portions 114 and 115 does not need to be particularly limited. However, in order to more easily obtain a miniaturized and high-capacitance multilayer electronic component 100, the average width of the edge portions 114 and 115 may be equal to or less than 20 μm.
[0038] The average width of edge portions 114 and 115 may refer to an average size of edge portions 114 and 115 in the third direction, and may be an average value of the third direction size of edge portions 114 and 115 measured at five equally spaced points on the side surface of the capacitance forming portion Ac.
[0039] The plurality of internal electrodes 121 and 122 may be alternately disposed with the dielectric layer 111 interposed therebetween.
[0040] The plurality of internal electrodes 121 and 122 may include first and second internal electrodes 121 and 122. The first and second internal electrodes 121 and 122 are alternately disposed to face each other with the dielectric layer 111 interposed therebetween and may be connected to the third and fourth surfaces 3 and 4 of the body 110, respectively.
[0041] In detail, one end of the first internal electrode 121 may be connected to the third surface 3 , and one end of the second internal electrode 122 may be connected to the fourth surface 4 .
[0042] The first inner electrode 121 is spaced apart from the fourth surface 4 and exposed to the third surface 3, and the second inner electrode 122 is spaced apart from the third surface 3 and exposed to the fourth surface 4. The first outer electrode 130 is disposed on the third surface 3 of the body 110 and connected to the first inner electrode 121, and the second outer electrode 140 may be disposed on the fourth surface 4 of the body 110 and connected to the second inner electrode 122.
[0043] For example, the first internal electrode 121 is not connected to the second external electrode 140 but is connected to the first external electrode 130, and the second internal electrode 122 is not connected to the first external electrode 130 but is connected to the second external electrode 140. Therefore, the first internal electrode 121 may be formed at a distance from the fourth surface 4, and the second internal electrode 122 may be formed at a distance from the third surface 3.
[0044] In this case, the first and second internal electrodes 121 and 122 may be electrically separated from each other by the dielectric layer 111 disposed therebetween.
[0045] Reference Figure 2 , it can be seen that, in the internal electrodes 121 and 122, the thickness of the region extending from the capacitance forming portion Ac to the external electrodes 130 and 140 is thicker than the thickness of the region included in the capacitance forming portion Ac. With this structure, the electrical connectivity between the internal electrodes 121 and 122 and the external electrodes 130 and 140 can be improved.
[0046] In addition, refer to Figure 2 , a thick region of the first inner electrode 121 is arranged to face one side in the first direction (downward), for example, to protrude downward, and a thick region of the second inner electrode 122 is arranged to face the other side in the first direction (upward), for example, to protrude upward. Therefore, a step portion formed in the stacking and pressing process of the multilayer electronic component can be eliminated.
[0047] There is no particular limitation on the average thickness e1 of the inner electrode in the area included in the capacitor forming portion Ac, but for miniaturization and high capacitance of the multilayer electronic component 100, the average thickness e1 of the inner electrode in the area included in the capacitor forming portion Ac may be less than or equal to 0.35 μm, and for improving the reliability of the multilayer electronic component 100 under high temperature and high voltage, the average thickness e1 of the inner electrode in the area included in the capacitor forming portion Ac may be greater than or equal to 2 μm.
[0048] For example, there is no particular limitation on the ratio of the average thickness e2 of the inner electrode in an area not included in the capacitor forming portion Ac to the average thickness e1 of the inner electrode in an area included in the capacitor forming portion Ac, but when the ratio is greater than or equal to 1.1 and less than or equal to 2.0, a short circuit between the inner electrodes 121 and 122 can be prevented while improving the electrical connectivity between the inner electrodes 121 and 122 and the outer electrodes 130 and 140.
[0049] The average thickness e1 of the region of the internal electrode included in the capacitance forming portion Ac may be obtained as follows. Among the internal electrodes extracted from an image of a cross section in the length direction and the thickness direction (the second direction and the first direction) cut from the central portion of the body 110 in the width direction (the third direction) scanned with a scanning electron microscope (SEM), for a total of 5 layers of internal electrodes including an internal electrode of one layer at a point where a center line in the length direction (the second direction) of the body intersects a center line in the thickness direction (the first direction) of the body, and two layers of internal electrodes located at an upper portion and two layers of internal electrodes located at a lower portion based on the internal electrode of the one layer, 5 points including the reference point and two points to the left and two points to the right are determined at equal intervals based on a reference point where the center line in the length direction (the second direction) of the body intersects the center line in the thickness direction (the first direction) of the body, and then the value of the average thickness e1 of the region of the internal electrode included in the capacitance forming portion Ac may be obtained by measuring the thickness of each point.
[0050] The average thickness e2 of the region of the internal electrode not included in the capacitance forming portion Ac may be obtained as follows. Among the internal electrodes extracted from an image of a cross section in the length direction and the thickness direction (second direction and first direction) cut from the central portion of the body 110 in the width direction (third direction) scanned with a scanning electron microscope (SEM), for a total of 5 layers of internal electrodes including an internal electrode of one layer at a point where a center line of the length direction (second direction) of an edge region of the body 110 intersects with a center line of the thickness direction (first direction) and two layers of internal electrodes located at an upper portion and two layers of internal electrodes located at a lower portion based on the internal electrode of the one layer, five points including the reference point and two points to the left and two points to the right are determined at equal intervals based on a reference point where a center line of the length direction (second direction) of the edge region of the body 110 intersects with a center line of the thickness direction (first direction), and then, the value of the average thickness e2 of the region of the internal electrode not included in the capacitance forming portion Ac may be obtained by measuring the thickness of each point.
[0051] The external electrodes 130 and 140 may be disposed on the third surface 3 and the fourth surface 4 of the body 110 , respectively, and the first external electrode 130 may be electrically connected to the first internal electrode 121 , and the second external electrode 140 may be electrically connected to the second internal electrode 122 .
[0052] The number or shape of the outer electrodes 130 and 140 may be changed according to the shape or other uses of the inner electrodes 121 and 122 .
[0053] On the other hand, the external electrodes 130 and 140 may be formed using any material such as metal as long as it has conductivity, and the detailed material may be determined in consideration of electrical characteristics, structural stability, etc. In addition, the external electrodes 130 and 140 may have a multi-layered structure.
[0054] For example, the external electrodes 130 and 140 may include: an electrode layer disposed on the surface of the body 110 and in direct contact with the internal electrodes 121 and 122 ; and a plating layer formed on the electrode layer.
[0055] For a more detailed example of the electrode layer, the electrode layer may be a fired electrode layer including a conductive metal and glass, or a resin-based electrode layer including a conductive metal and resin.
[0056] As the conductive metal included in the electrode layer, any material having excellent conductivity may be used without particular limitation. For example, the conductive metal may be at least one of nickel (Ni), copper (Cu), and alloys thereof.
[0057] The plating layer plays a role in improving mounting characteristics. The type of the plating layer is not particularly limited, and the plating layer may be a plating layer containing at least one of Ni, Sn, Pd, and alloys thereof, and may be formed using a plurality of layers.
[0058] For a more detailed example of the plating layer, the plating layer may be a Ni plating layer or a Sn plating layer, or may be a form in which a Ni plating layer and a Sn plating layer are sequentially formed on the electrode layer, or may be a form in which a Sn plating layer, a Ni plating layer and a Sn plating layer are sequentially formed on the electrode layer. In addition, the plating layer may include multiple Ni plating layers and / or multiple Sn plating layers.
[0059] Method for manufacturing a multi-layer electronic assembly Figure 4 is a diagram schematically illustrating an operation of forming a laminated strip according to an embodiment.
[0060] Figure 5 is a diagram schematically illustrating an operation of forming a laminate according to an embodiment.
[0061] Figure 6 is a diagram schematically illustrating an operation of forming a laminated strip according to another embodiment.
[0062] Figure 7 is a diagram schematically illustrating an operation of forming a laminate according to another embodiment.
[0063] In the following, reference will be made to Figures 4 to 7 A method of manufacturing a multilayer electronic component according to an embodiment and according to another embodiment are described in detail.
[0064] As an example of improving the unit volume capacitance of a multilayer electronic component, a method of thinning the dielectric layer and the inner electrode and increasing the number of stacks can be used. As the number of stacks increases, the height difference between the capacitance forming part and the length direction edge region of the main body caused by the increase in the number of inner electrode stacks also increases. Therefore, the formation of the step portion between the length direction edge region of the capacitance forming part and the main body may be aggravated. The step portion between the length direction edge region of the capacitance forming part and the main body may deform the inner electrode and the dielectric layer, thereby increasing the thickness deviation of the inner electrode and the thickness deviation of the dielectric layer, and therefore, when a voltage is applied to the multilayer electronic component, the electric field may be amplified in the relatively thin region of the dielectric layer, which may increase the frequency of the insulation breakdown phenomenon.
[0065] In the prior art, in order to reduce the height difference between the capacitor forming part and the region extending from the capacitor forming part to the external electrode, the portion of the internal electrode pattern connected to the external electrode is formed as a thick portion in the internal electrode printing process, and the portion of the internal electrode pattern forming the capacitor forming part is formed as a thin portion, thereby forming a material sheet, which is then placed on a ceramic green sheet. In addition, the ceramic green sheet is sandwiched between the material sheets and stacked so that the thick portion of the material sheet and the thin portion of the adjacent material sheet overlap in the stacking direction, and uniform pressure is applied in the stacking direction, thereby attempting to eliminate the step portion.
[0066] However, when lamination is performed so that the thick portion of the internal electrode pattern and the thin portion of the adjacent internal electrode pattern face each other and overlap, even if a separate ceramic green sheet is sandwiched therebetween, there is a risk of short circuits occurring between the internal electrodes due to the relatively narrow gap between the thick portion of the internal electrode pattern and the thin portion of the adjacent internal electrode pattern. In addition, since an additional process of setting a separate ceramic green sheet is performed, the working conditions for peeling and stacking the sheets may be changed, complicating the process steps and increasing costs. In addition, if the organic components contained in the material sheet and the ceramic green sheet sandwiched between the material sheets are the same, the organic components in the material sheet may dissolve (e.g., a phenomenon of "like dissolves like" occurs between the organic components in the material sheet and the organic components in the ceramic green sheet), and the material sheet may deform.
[0067] Therefore, in some embodiments of the present disclosure, it is intended to prevent damage to the dielectric green sheet while eliminating the above-mentioned height difference formed during the stacking operation.
[0068] The method of manufacturing a multilayer electronic component according to some embodiments of the present disclosure may include: arranging a first inner electrode pattern 221 including a first main portion 221a and a first convex portion 221b thicker than the first main portion 221a on a first dielectric green sheet 211 with a first gap g1, and coating a first dielectric paste 211' in the first gap g1 and on the first inner electrode pattern 221 to form a first sheet S1; arranging a second inner electrode pattern 222 including a second main portion 222a and a second convex portion 222b thicker than the second main portion 222a on a second dielectric green sheet 212 with a second gap g2, and coating a second dielectric paste 212' in the second gap g2 and on the second inner electrode pattern 222 to form a second sheet S2; forming a laminated bar 10 by alternately arranging the first sheet S1 and the second sheet S2; forming a laminated body 11 by cutting the laminated bar 10; and forming external electrodes 130 and 140 on the laminated body 11. The step of forming the laminated strip may be performed by disposing the first sheet S1 such that the first dielectric paste 211 ′ faces downward in the stacking direction and disposing the second sheet S2 such that the second dielectric paste 212 ′ faces upward in the stacking direction.
[0069] Forming the first sheet S1 The first sheet S1 can be formed in the following manner: on the first green dielectric sheet 211, a first internal electrode pattern 221 including a first main portion 221a and a first convex portion 221b thicker than the first main portion 221a is provided with a first gap g1, and a first dielectric paste 211' is coated in the first gap g1 and on the first internal electrode pattern 221.
[0070] The first green dielectric sheet 211 can be formed using a ceramic paste containing ceramic powder, an organic solvent, a dispersant, and a binder. The first dielectric paste 211' can be made of the same material as the first green dielectric sheet 211.
[0071] The ceramic powder is a raw material for forming the dielectric layer 111 of the multilayer electronic component 100, and a barium titanate-based material, a lead composite perovskite-based material, or a strontium titanate-based material can be used. The barium titanate-based material can include BaTiO3-based ceramic powder. Examples of the BaTiO3-based ceramic powder can include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), etc.
[0072] The organic components such as the organic solvent, the dispersant, and the binder included in the first green dielectric sheet 211 are not particularly limited, but may include organic components such as toluene ethanol.
[0073] When the first green dielectric sheet 211 is fired, the dielectric layer 111 can be formed.
[0074] As an example of the method for setting the first internal electrode pattern 221 on the first green dielectric sheet 211, a method of setting a conductive paste containing a conductive metal, glass, and an organic material on the first green dielectric sheet 211 by a screen printing method or a gravure printing method can be used, but is not limited thereto. For example, a thin film deposition method such as a sputtering method or a vacuum deposition method can be used to deposit a conductive metal on the first green dielectric sheet 211.
[0075] The first inner electrode pattern 221 may include a conductive metal. The conductive metal is not particularly limited, and any material having excellent conductivity may be used. For example, the conductive metal may include at least one selected from the group consisting of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.
[0076] The first internal electrode pattern 221 may be disposed on the first dielectric green sheet 211. The first internal electrode pattern 221 may be a region where the first internal electrode 121 is formed after firing.
[0077] Reference Figure 4 The first inner electrode pattern 221 may be disposed on the first dielectric green sheet 211 and may include a first main portion 221a and a first convex portion 221b thicker than the first main portion 221a, and may be disposed with a first gap g1.
[0078] The first main portion 221a may form a region of the first internal electrode 121 included in the capacitance forming portion Ac after firing, and the first convex portion 221b may form a region of the first internal electrode 121 extending from the region of the first internal electrode 121 included in the capacitance forming portion Ac to the first external electrode 130 after firing.
[0079] On the other hand, according to some embodiments, the thickness of the first convex portion 221 b as a region connected to the first external electrode 130 is formed thicker than the first main portion 221 a , and thus electrical connectivity between the first internal electrode 121 and the first external electrode 130 may be improved.
[0080] As an example of a method of forming the first inner electrode pattern 221 so that the thickness of the first convex portion 221b is thicker than that of the first main portion 221a, a method of printing the conductive paste once with the thickness of the first main portion 221a and then additionally printing the conductive paste on the region where the first convex portion 221b is to be formed may be used, but is not limited thereto. For example, when a deposition method is used, a method of making the deposition time of the region where the first convex portion 221b is formed longer than that of the region where the first main portion 221a is formed may be used.
[0081] The first inner electrode pattern 221 may be provided with a first gap g1. Specifically, the first inner electrode pattern 221 may be provided to be spaced apart by the first gap g1 in a direction perpendicular to the direction in which the first sheet S1 and a second sheet S2 to be described later are stacked. The first inner electrode pattern 221 is provided as a plurality of first inner electrode patterns 221 on the first green sheet 211, and the first gap g1 may be provided as a plurality of first gaps g1 having substantially the same interval. In addition, each first inner electrode pattern 221 may include one first convex portion 221b and two first main portions 221a, and the two first main portions 221a may be located in different laminates 11 after cutting.
[0082] Forming the second sheet S2 The second sheet S2 may be formed by providing a second inner electrode pattern 222 including a second main portion 222a and a second convex portion 222b thicker than the second main portion 222a with a second gap g2 on a second green sheet 212, and applying a second dielectric paste 212' in the second gap g2 and on the second inner electrode pattern 222.
[0083] The second green sheet 212 may be formed using a ceramic paste containing ceramic powder, an organic solvent, a dispersant, and a binder. The second dielectric paste 212' may be made of the same material as the second green sheet 212.
[0084] The ceramic powder is a raw material for forming the dielectric layer 111 of the multilayer electronic component 100, and a barium titanate-based material, a lead composite perovskite-based material, or a strontium titanate-based material may be used. The barium titanate-based material may include BaTiO3-based ceramic powder, and examples of the BaTiO3-based ceramic powder may include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), etc.
[0085] The organic components such as the organic solvent, the dispersant, and the binder included in the second green sheet 212 are not particularly limited, but organic components such as toluene ethanol may be used.
[0086] When the second green sheet 212 is fired, the dielectric layer 111 may be formed in the same manner as the first green sheet 211.
[0087] As an example of a method of providing the second inner electrode pattern 222 on the second dielectric green sheet 212, a method of screen printing or gravure printing a conductive paste containing a conductive metal, glass, and an organic material on the second dielectric green sheet 212 may be used, but is not limited thereto. The conductive metal may be deposited on the second dielectric green sheet 212 using a thin film deposition method such as a sputtering method or a vacuum deposition method.
[0088] The second inner electrode pattern 222 may include a conductive metal. The conductive metal is not particularly limited, and any material having excellent conductivity may be used. For example, the conductive metal may include at least one selected from the group consisting of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.
[0089] The second internal electrode pattern 222 may be disposed on the second dielectric green sheet 212. The second internal electrode pattern 222 may be a region where the second internal electrode 122 is formed after firing.
[0090] Reference Figure 4 The second inner electrode pattern 222 may be disposed on the second dielectric green sheet 212, include a second main portion 222a and a second convex portion 222b thicker than the second main portion 222a, and may be disposed with a second gap g2.
[0091] The second main portion 222a may form a region of the second inner electrode 122 included in the capacitance forming portion Ac after firing, and the second convex portion 222b may form a region of the second inner electrode 122 extending from the region of the second inner electrode 122 included in the capacitance forming portion Ac to the second outer electrode 140 after firing.
[0092] Furthermore, according to some embodiments, since the thickness of the second convex portion 222 b as a region connected to the second external electrode 140 is formed thicker than the second main portion 222 a , electrical connectivity between the second internal electrode 122 and the second external electrode 140 may be improved.
[0093] As an example of a method of forming the second inner electrode pattern 222 so that the thickness of the second convex portion 222b is thicker than that of the second main portion 222a, a method of printing the conductive paste once with the thickness of the second main portion 222a and then additionally printing the conductive paste in the region where the second convex portion 222b is to be formed may be used, but is not limited thereto. For example, when a deposition method is used, a method of making the deposition time of the region where the second convex portion 222b is formed longer than that of the region where the second main portion 222a is formed may be used.
[0094] The second inner electrode patterns 222 may be arranged with a second gap g2. In detail, the second inner electrode patterns 222 may be arranged to be spaced apart with a second gap g2 in a direction perpendicular to the direction in which the first sheet S1 and the second sheet S2 are stacked. When a plurality of second inner electrode patterns 222 are arranged on the second dielectric green sheet 212, a plurality of second gaps g2 may be formed, and the intervals of the plurality of second gaps g2 may be substantially the same. In addition, each second inner electrode pattern 222 may include one second convex portion 222b and two second main portions 222a, and the two second main portions 222a may be located in different laminates 11 after cutting.
[0095] The positions of the first convex portion 221b and the second convex portion 222b may be determined based on the first main portion 221a and the second main portion 222a, respectively. In detail, the first convex portion 221b may be disposed between the 1 / 4 point and the 3 / 4 point of the points dividing the first inner electrode pattern 221 into four parts in the direction perpendicular to the stacking direction, and the second convex portion 222b may be disposed between the 1 / 4 point and the 3 / 4 point of the points dividing the second inner electrode pattern 222 into four parts in the direction perpendicular to the stacking direction.
[0096] Although there is no need to specifically limit the relationship between the thickness d1' of the first dielectric green sheet 211 and the second dielectric green sheet 212 and the thickness d2' of the first dielectric paste 211' and the second dielectric paste 212', for example, when the thickness d1' of the first dielectric green sheet 211 and the second dielectric green sheet 212 is substantially the same as the thickness d2' of the first dielectric paste 211' and the second dielectric paste 212', deformation of the first sheet S1 and the second sheet S2 can be further suppressed during the lamination and pressing process.
[0097] On the other hand, when the step of forming the laminated strip is performed by further disposing the third dielectric green sheet 213 between the first sheet S1 and the second sheet S2, the thickness d2' of the first dielectric paste 211' and the second dielectric paste 212' may be thinner than the thickness of each of the first dielectric green sheet 211, the second dielectric green sheet 212 and the third dielectric green sheet 213.
[0098] The thickness e2' of the first convex portion 221b and the second convex portion 222b may be adjusted to 1.1 times or more of the thickness e1' of the first main portion 221a and the second main portion 222a to eliminate the step portion, and the thickness e2' of the first convex portion 221b and the second convex portion 222b may be adjusted to 2.0 times or less of the thickness e1' of the first main portion 221a and the second main portion 222a to suppress deformation of the first dielectric green sheet 211 and the second dielectric green sheet 212.
[0099] Forming a laminate strip 10 In some embodiments, a step of forming the laminate strip 10 by alternately arranging the first sheets S1 and the second sheets S2 may be included.
[0100] In some embodiments, reference Figure 5 , the laminated strip 10 may be formed by alternately arranging the first sheets S1 and the second sheets S2 and then pressing the first sheets S1 and the second sheets S2.
[0101] The positions of the first convex portion 221b and the second convex portion 222b may also be determined based on the second gap g2 and the first gap g1, respectively. In detail, the step of forming the laminated strip 10 may be performed by setting the first convex portion 221b to overlap with the second gap g2 in the stacking direction and setting the second convex portion 222b to overlap with the first gap g1 in the stacking direction. Therefore, the thickness of each of the internal electrodes 121 and 122 becomes thinner in the region where the first internal electrode 121 and the second internal electrode 122 overlap in the stacking direction, and the thickness of each of the internal electrodes 121 and 122 becomes thicker in the region where the first internal electrode 121 and the second internal electrode 122 do not overlap in the stacking direction. Therefore, the electrical connectivity between the internal electrodes 121 and 122 and the external electrodes 130 and 140 may be improved without reducing the unit volume capacitance of the multilayer electronic component.
[0102] The positions of the first convex portion 221b and the second convex portion 222b may also be determined based on the relationship between the first inner electrode pattern 221 and the second inner electrode pattern 222. In detail, the step of forming the laminated bar 10 may be performed so that the first convex portion 221b and the second inner electrode pattern 222 do not overlap in the stacking direction, and so that the second convex portion 222b and the first inner electrode pattern 221 do not overlap in the stacking direction. Therefore, the thickness of each of the inner electrodes 121 and 122 becomes thinner in the region where the first inner electrode 121 and the second inner electrode 122 overlap in the stacking direction, and the thickness of each of the inner electrodes 121 and 122 becomes thicker in the region where the first inner electrode 121 and the second inner electrode 122 do not overlap in the stacking direction. Therefore, the electrical connectivity between the inner electrodes 121 and 122 and the outer electrodes 130 and 140 may be improved without reducing the unit volume capacitance of the multilayer electronic component.
[0103] Forming a laminate 11 In some embodiments, a step of forming the laminate 11 by cutting the laminate strip 10 after forming the laminate strip 10 may be included.
[0104] In some embodiments, reference Figure 5, the step of forming the laminate 11 may be performed by cutting the laminate strip 10 along a virtual straight line C1-C1 passing through the first convex portion 221b and the second gap g2 and a virtual straight line C1'-C1' passing through the second convex portion 222b and the first gap g1, wherein the virtual straight line C1-C1 may be disposed at the center of the first convex portion 221b and the second gap g2 in a direction perpendicular to the stacking direction, and the virtual straight line C1'-C1' may be disposed at the center of the second convex portion 222b and the first gap g1 in a direction perpendicular to the stacking direction. Therefore, the first convex portion 221b of the first inner electrode pattern 221 may be exposed to one surface of the laminate 11, and the second convex portion 222b of the second inner electrode pattern 222 may be exposed to the other surface of the laminate 11.
[0105] External electrodes are formed on the laminate 11. In some embodiments, a step of forming the external electrodes 130 and 140 on the laminate 11 after forming the laminate 11 may be included. As an example of a method of forming the external electrodes 130 and 140, a method of transferring a sheet containing a conductive metal onto the laminate 11 or a method of sequentially forming a fired electrode layer and a conductive resin layer containing a conductive metal and a resin on the laminate 11 may be used.
[0106] According to some embodiments, the step of forming the laminated strip 10 may be performed by arranging the first sheet S1 such that the first dielectric paste 211' faces downward in the stacking direction and arranging the second sheet S2 such that the second dielectric paste 212' faces upward in the stacking direction. At this time, "upward" and "downward" in the stacking direction do not mean top and bottom relative to the ground, but may refer to the top and bottom according to the stacking direction. Figure 4 and Figure 5 One direction and another direction in the stacking direction of the first sheet S1 and the second sheet S2.
[0107] As in some embodiments of the present disclosure, when the first sheet S1 is arranged so that the first dielectric paste 211' faces downward in the stacking direction and the second sheet S2 is arranged so that the second dielectric paste 212' faces upward in the stacking direction to form the laminated strip 10, since the first protrusion 221b is arranged to overlap with the second gap g2 in the stacking direction and the second protrusion 222b is arranged to overlap with the first gap g1 in the stacking direction while being stacked on top of each other, the height difference formed in the stacking process can be eliminated.
[0108] In addition, since the first protrusion 221b and the second protrusion 222b are thicker than the first main portion 221a and the second main portion 222a, respectively, when the first internal electrode pattern 221 is set to protrude downward in the stacking direction and the second internal electrode pattern 222 is set to protrude upward in the stacking direction while being stacked on each other, there is a risk of short circuit because a sufficient gap cannot be ensured between the internal electrodes after firing.
[0109] In addition, in the case where stacking is performed by additionally disposing a separate ceramic green sheet between the first and second internal electrode patterns 221 and 222 as in the prior art, the process steps may become complicated and the cost may increase. In addition, if a separate ceramic green sheet is added, since the organic component of the ceramic green sheet is the same as that of the first and second sheets S1 and S2, deformation may be caused due to the dissolution of the organic components of the first and second sheets S1 and S2.
[0110] However, in some embodiments of the present disclosure, the step of forming the first sheet S1 may further include coating the first dielectric paste 211' in the first gap g1 and on the first inner electrode pattern 221, and the step of forming the second sheet S2 may further include coating the second dielectric paste 212' in the second gap g2 and on the second inner electrode pattern 222.
[0111] For example, according to some embodiments, a method for manufacturing a multilayer electronic component may include: disposing a first inner electrode pattern 221 including a first main portion 221a and a first convex portion 221b thicker than the first main portion 221a on a first dielectric raw sheet 211 with a first gap g1, and forming a first sheet S1 by coating a first dielectric paste 211' in the first gap g1 and on the first inner electrode pattern 221; and disposing a second inner electrode pattern 222 including a second main portion 222a and a second convex portion 222b thicker than the second main portion 222a on a second dielectric raw sheet 212 with a second gap g2, and forming a second sheet S2 by coating a second dielectric paste 212' in the second gap g2 and on the second inner electrode pattern 222.
[0112] Therefore, when the stacking operation is performed by setting the first sheet S1 so that the first dielectric paste 211' faces downward in the stacking direction and setting the second sheet S2 so that the second dielectric paste 212' faces upward in the stacking direction, deformation of the first sheet S1 and the second sheet S2 can be prevented, and short circuit can be prevented by ensuring a sufficient gap between the first internal electrode pattern 221 and the second internal electrode pattern 222.
[0113] In some embodiments, the first dielectric paste 211' and the second dielectric paste 212' may include the same material as the organic material included in the first and second internal electrode patterns 221 and 222. During the stacking process, the first dielectric paste 211' and the second dielectric paste 212' do not dissolve the organic components of the first and second dielectric green sheets 211 and 212, and thus, the effect of preventing the phenomenon of deforming the first and second dielectric green sheets 211 and 212 may be further improved. For this reason, preferably, the first dielectric paste 211' and the second dielectric paste 212' may not include the organic components (such as toluene ethanol) included in the first and second dielectric green sheets 211 and 212. That is, the first dielectric paste 211' and the second dielectric paste 212' may include an organic component different from the organic component included in the first and second dielectric green sheets 211 and 212.
[0114] An example of the same material as the organic material included in the first and second internal electrode patterns 221 and 222 that is included in the first and second dielectric pastes 211 ′ and 212 ′ may be dihydroterpinyl acetate (DHTA).
[0115] Reference Figure 5 , the step of forming the laminated bar 10 may be performed such that the first dielectric paste 211 ′ and the second dielectric paste 212 ′ are in contact, but the present disclosure is not limited thereto.
[0116] When the step of forming the laminated bar 10 is performed so that the first dielectric paste 211 ′ and the second dielectric paste 212 ′ contact each other, the interface resistance between the internal electrodes 121 and 122 and the dielectric layer 111 may deteriorate after firing, which may deteriorate insulation resistance characteristics such as a decrease in a breakdown voltage (BDV) value of the multilayer electronic component.
[0117] Therefore, in some embodiments, the Figure 6 As shown in FIG. 1 , a third dielectric green sheet 213 is further provided between the first sheet S1 and the second sheet S2 to form a dielectric layer. Figure 7 The step of laminating the strip 10' is performed to prevent the insulation resistance of the multilayer electronic component 100 from being deteriorated. This effect can be further improved when the insulation resistance of the third dielectric green sheet 213 is greater than the insulation resistance of each of the first dielectric paste 211' and the second dielectric paste 212'.
[0118] The reason why the insulation resistance of the third dielectric green sheet 213 is different from the insulation resistance of the first dielectric paste 211 ′ and the second dielectric paste 212 ′ may be due to the difference in composition, and the insulation resistance may be adjusted according to the amount of the contained elements.
[0119] After forming the laminate strip 10', the laminate strip 10' can be formed by Figure 7The imaginary straight line C1-C1 and the imaginary straight line C1'-C1' shown in the figure cut the laminate strip 10' to form a laminate 11'. The imaginary straight line C1-C1 and the imaginary straight line C1'-C1' have the same meaning as in the step of forming the laminate 11 described above.
[0120] In some embodiments, Figure 7 As shown in , since the third dielectric green sheet 213 is further disposed between the first sheet S1 and the second sheet S2, the first sheet S1 and the second sheet S2 may respectively contact the third dielectric green sheet 213 without directly contacting each other. More specifically, the third dielectric green sheet 213 may contact both the first dielectric paste 211' and the second dielectric paste 212'.
[0121] In addition, the method of manufacturing a multilayer electronic component according to some embodiments may include a firing operation. The operation of firing the laminate may be performed between the step of forming the laminate 11 and the step of forming the external electrodes 130 and 140, but is not limited thereto. For example, the firing operation may be a step of firing the laminate 11 and the external electrodes 130 and 140 after forming the external electrodes 130 and 140.
[0122] Reference Figures 4 to 7 In the step of stacking the first sheet S1 and the second sheet S2, cover sheets 312 and 313 may be provided on the outermost first sheet S1 and the second sheet S2, and the cover sheets 312 and 313 may be areas forming the cover parts 112 and 113 of the multilayer electronic component 100 after firing.
[0123] As described above, according to some embodiments, short circuits between internal electrodes and deformation of a dielectric green sheet may be prevented by coating a dielectric paste on internal electrode patterns disposed on a dielectric green sheet and a region of the dielectric green sheet on which the internal electrode patterns are not disposed.
[0124] Although the embodiments have been described in detail above, the present disclosure is not limited by the above embodiments and the accompanying drawings, but is intended to be limited by the appended claims. Therefore, those skilled in the art may make various forms of replacement, modification and change without departing from the technical spirit of the present disclosure set forth in the claims, and this will also be considered to fall within the scope of the present disclosure.
[0125] In addition, the expressions "embodiment" or "some embodiments" used in the present disclosure do not mean the same embodiment, but are provided to emphasize and explain different unique features. However, the embodiments presented above do not exclude implementation in combination with features of other embodiments. For example, even if a matter described in a specific embodiment is not explained in another embodiment, it can be understood as a description related to another embodiment unless there is a description contrary to or contradictory to the matter in another embodiment.
[0126] The terms used in the present disclosure are only used to describe the embodiments and are not intended to limit the present disclosure.At this time, unless the context clearly indicates otherwise, a singular expression includes a plural expression.
[0127] While example embodiments have been shown and described above, it will be readily apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the present disclosure as defined by the appended claims.
Claims
1. A method for manufacturing a multilayer electronic component, comprising: disposing a first inner electrode pattern including a first main portion and a first convex portion thicker than the first main portion at a first gap on the first dielectric green sheet; forming a first sheet by applying a first dielectric paste to the first gap and the first inner electrode pattern; disposing a second inner electrode pattern including a second main portion and a second protrusion thicker than the second main portion at a second gap on the second dielectric green sheet; forming a second sheet by applying a second dielectric paste to the second gap and the second inner electrode pattern; forming a laminate strip by alternately arranging the first sheets and the second sheets; forming a laminate by cutting the laminate strips; as well as forming external electrodes on the laminate, Wherein, the step of forming the laminated strip is performed by arranging the first sheet such that the first dielectric paste faces downward in a stacking direction and arranging the second sheet such that the second dielectric paste faces upward in the stacking direction.
2. The method according to claim 1, wherein: The first protrusion is arranged between a 1 / 4 point and a 3 / 4 point among the points obtained by dividing the first internal electrode pattern into four parts in a direction perpendicular to the stacking direction, and the second protrusion is arranged between a 1 / 4 point and a 3 / 4 point among the points obtained by dividing the second internal electrode pattern into four parts in a direction perpendicular to the stacking direction.
3. The method according to claim 1, wherein: The step of forming the laminated strip is performed by arranging the first protrusion to overlap with the second gap in the stacking direction and arranging the second protrusion to overlap with the first gap in the stacking direction.
4. The method according to claim 1, wherein: The step of forming the laminated bars is performed such that the first protrusions do not overlap the second internal electrode patterns in the stacking direction, and the second protrusions do not overlap the first internal electrode patterns in the stacking direction.
5. The method according to claim 1, wherein: In the step of forming the laminated strip, the first dielectric paste and the second dielectric paste are in contact with each other.
6. The method according to claim 1, wherein: The first and second dielectric pastes include the same material as an organic material included in the first and second internal electrode patterns.
7. The method according to claim 1, wherein: The first dielectric paste, the second dielectric paste, the first internal electrode pattern, and the second internal electrode pattern include dihydropinyl acetate.
8. The method according to claim 3, wherein: The step of forming the laminated body is performed by cutting the laminated strip along a virtual straight line passing through the first protrusion and the second gap and a virtual straight line passing through the second protrusion and the first gap.
9. The method according to claim 1, wherein: The step of forming the laminated strip includes disposing a third dielectric green sheet between the first sheet and the second sheet.
10. The method according to claim 9, wherein: The third dielectric green sheet contacts both the first dielectric paste and the second dielectric paste.
11. The method according to claim 10, wherein: The third dielectric green sheet has an insulation resistance greater than an insulation resistance of each of the first dielectric paste and the second dielectric paste. 12 . The method according to claim 1 , further comprising a step of firing the laminated body between the step of forming the laminated body and the step of forming the external electrodes. 13 . The method according to claim 1 , further comprising a step of firing the laminated body and the external electrodes after the step of forming the external electrodes.
14. The method according to claim 6, wherein: The first dielectric paste and the second dielectric paste include an organic component different from an organic component included in the first dielectric green sheet and the second dielectric green sheet.
Citation Information
Patent Citations
System and method for suspension adjustment using surround view monitor function, and vehicle having the same
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