Package substrate and semiconductor package

Abstract

The invention relates to a package substrate and a semiconductor package. A package substrate according to the present embodiment includes a glass core. The glass core comprises a through hole penetrating in the thickness direction of the glass core. The glass core has a surface. The package substrate includes an anti-cracking layer surrounding at least a portion of a surface of the glass core. In the package substrate, the ratio of the thickness of the anti-cracking layer to the thickness of the glass core is 0.0001 to 0.05. In this case, it is possible to provide a package substrate having excellent durability against thermal shock and mechanical shock.

Description

Technical Field

[0001] The present embodiment relates to a packaging substrate and a semiconductor package including the same. Background Art

[0002] When manufacturing electronic components, realizing circuits on semiconductor wafers is called the front-end process (FE), and assembling wafers in a state that can be used in actual products is called the back-end process (BE), which includes the packaging process.

[0003] As the four core technologies of the semiconductor industry that have recently achieved rapid development of electronic products, there are semiconductor technology, semiconductor packaging technology, manufacturing process technology and software technology. Semiconductor technology is developing in various forms, such as line width of nanometer units below microns, more than 10 million cells, high-speed operation and release of a large amount of heat, but it has not yet received relatively complete technical support for packaging the semiconductor. Therefore, the electrical performance of semiconductors sometimes depends on packaging technology and corresponding electrical connections, rather than on the performance of semiconductor technology itself.

[0004] As the material of the package substrate, ceramic or resin is used. In the case of a ceramic substrate, it is difficult to mount high-performance and high-frequency semiconductor devices due to high resistance or high dielectric constant. In the case of a resin substrate, although relatively high-performance and high-frequency semiconductor devices can be mounted, there are limitations in reducing the spacing of wiring.

[0005] Recently, research is being conducted on applying silicon or glass to high-end packaging substrates. By forming a through hole on a silicon or glass substrate and applying a conductive material to the through hole, the wiring length between the device and the motherboard can be shortened, and excellent electrical characteristics can also be obtained.

[0006] Prior art literature

[0007] Patent Literature

[0008] Korean Patent No. 10-1067109

[0009] Summary of the invention

[0010] Problem that the invention aims to solve

[0011] An object of the present embodiment is to provide a package substrate having excellent durability against thermal shock and mechanical shock, and a semiconductor package including the same.

[0012] Means used to solve problems

[0013] A package substrate according to an embodiment of the present disclosure includes a glass core.

[0014] The glass core includes a through hole penetrating along a thickness direction of the glass core.

[0015] The glass core has a surface.

[0016] The encapsulation substrate further includes a crack prevention layer surrounding at least a portion of a surface of the glass core.

[0017] In the packaging substrate, a ratio of a thickness of the crack prevention layer to a thickness of the glass core is 0.0001 to 0.05.

[0018] The tensile strength of the anti-cracking layer may be 1 MPa to 20 MPa.

[0019] The linear thermal expansion coefficient of the crack prevention layer may be 100 ppm / °C to 800 ppm / °C.

[0020] At a frequency of 100 Hz, the dielectric constant of the anti-crack layer may be 4 or less.

[0021] The package substrate may further include a first conductive layer disposed on the crack prevention layer.

[0022] The first conductive layer may have a peel strength of 300 gf or more with respect to the surface of the crack prevention layer.

[0023] The package substrate may further include an adhesion enhancing layer disposed between the crack prevention layer and the first conductive layer.

[0024] The anti-cracking layer may be roughened.

[0025] At least a portion of the crack preventing layer may be disposed in contact with a surface of the glass core.

[0026] The crack preventing layer may have a peel strength of 400 gf or more with respect to the surface of the glass core.

[0027] The anti-cracking layer may include a silicone elastomer.

[0028] The surface of the glass core may include: an upper surface; and a side surface connected to the upper surface and formed along a thickness direction of the glass core.

[0029] The crack prevention layer may surround a side surface of the glass core.

[0030] The through hole may include an inner space and a through hole inner diameter surface surrounding the inner space.

[0031] The anti-crack layer may be disposed between the inner space and an inner diameter surface of the through hole.

[0032] The minimum value of the diameter of the inner space may be greater than 50 μm.

[0033] A semiconductor package according to another embodiment of the present specification includes the package substrate and a semiconductor device mounted on the package substrate.

[0034] Effects of the Invention

[0035] The package substrate of the present embodiment can exhibit excellent durability against thermal shock and mechanical shock. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1A FIG. 1 is a cross-sectional view of a package substrate according to an example of the present embodiment.

[0037] Figure 1B FIG. 1 is a plan view of a package substrate according to an example of the present embodiment.

[0038] Figure 2 for Figure 1A Magnified view of part A.

[0039] Figure 3 FIG. 1 is a cross-sectional view of a package substrate according to another example of the present embodiment.

[0040] Figure 4 FIG. 1 is a cross-sectional view of a package substrate according to yet another example of the present embodiment.

[0041] Description of Reference Numerals

[0042] 100: Package substrate

[0043] 10: Glass core

[0044] 101: Through hole

[0045] 102: Interior Space

[0046] 103: Through hole inner diameter surface

[0047] 104: First opening

[0048] 105: Second opening

[0049] 106: Minimum inner diameter part

[0050] 20: Anti-cracking layer

[0051] 30: Rewiring layer

[0052] 31: Conductive layer

[0053] 32: Insulation layer DETAILED DESCRIPTION

[0054] Hereinafter, multiple embodiments are described in detail with reference to the accompanying drawings so that a person skilled in the art can easily implement the embodiments. However, the present invention can be implemented in a variety of different embodiments and is not limited to the embodiments described in this specification. Throughout the specification, the same or similar parts are given the same reference numerals.

[0055] Throughout this specification, the term "combination of..." included in the Markush-type description refers to a mixture or combination of one or more constituent elements selected from the group consisting of the constituent elements of the Markush-type description, thereby meaning that the present invention includes one or more constituent elements selected from the group consisting of the constituent elements.

[0056] Throughout this specification, unless otherwise specified, terms such as "first", "second" or "A", "B" etc. are used to distinguish the same terms from each other. In addition, unless otherwise specified, descriptions indicating the singular should be understood to include the plural.

[0057] In the present specification, the "~" group may mean that a compound equivalent to "~" or a derivative of "~" is included in the compound.

[0058] In the present specification, B being located on A means that B is located on A in direct contact or with another layer therebetween, and should not be limited to the meaning that B is located on the surface of A in contact.

[0059] In the present specification, the meaning of A being connected to B means that A and B are directly connected or are connected through other constituent elements between A and B, and unless otherwise specified, the interpretation is not limited to A and B being directly connected.

[0060] Unless otherwise specified, expressions in the singular in the present specification are interpreted as including the singular or plural meaning as explained in the context.

[0061] In the present specification, the shape, relative size, angle, etc. of each constituent in the drawings are exemplary and may be exaggerated for the purpose of explanation, but the scope of rights is not interpreted as being limited to the drawings.

[0062] In this specification, A and B being adjacent means that A and B are in contact, or means that A and B are not in contact but are close to each other. In this specification, unless otherwise specified, the expression that A and B are adjacent should not be interpreted as being limited to A and B being in contact.

[0063] In this specification, unless otherwise specified, a fine line refers to a line having a width of 5 μm or less, and illustratively, may refer to a line having a width of 1 μm to 4 μm or less.

[0064] Unless otherwise specified in this specification, the physical property values ​​of each structural element in the package substrate are interpreted as values ​​measured at room temperature, which is 20°C to 25°C.

[0065] In order to achieve high integration of the package substrate and optimize the signal transmission path, through holes can be formed in the glass core. However, due to the high hardness of the glass material, the glass core with such a complex structure is easily damaged by various impacts during the manufacturing process.

[0066] Specifically, during the process of forming the rewiring layer on the glass core, the glass core may be repeatedly exposed to high and low temperature environments. This may become a cause of increasing the internal stress of the glass core. In addition, the substrate having the glass core as a component is prone to cracking even when subjected to slight mechanical impact during movement and operation.

[0067] The inventors of this embodiment have experimentally confirmed that by applying a crack prevention layer to a packaging substrate, the packaging substrate can have stable durability against thermal shock and mechanical shock and can suppress cracks from widely spreading throughout the glass core, thereby completing this embodiment.

[0068] Hereinafter, the present embodiment will be described in detail.

[0069] Figure 1A FIG. 1 is a cross-sectional view of a package substrate according to an example of the present embodiment. Figure 1B FIG. 1 is a plan view of a package substrate according to an example of the present embodiment. Figure 2 for Figure 1A This is an enlarged view of part A of Figure 1A , Figure 1B and Figure 2 This embodiment is described.

[0070] Glass core

[0071] The package substrate 100 according to the present embodiment may include a glass core 10 .

[0072] The glass core 10 may have a shape of a glass substrate. The glass core 10 may be, for example, alkali borosilicate flat glass, alkali-free borosilicate flat glass, alkali-free alkaline earth borosilicate flat glass, etc., and any flat glass suitable for electronic components may be used. The glass core 10 may be a glass substrate for electronic devices, and illustratively, products manufactured by Schott, AGC, Corning, etc. may be used, but are not limited thereto.

[0073] The thickness of the glass core 10 may be 50 μm or more. The thickness may be 100 μm or more. The thickness may be 250 μm or more. The thickness may be 400 μm or more. The thickness may be 500 μm or more. The thickness may be 3000 μm or less. The thickness may be 2000 μm or less. The thickness may be 1000 μm or less. When the glass core 10 having the thickness is used, the semiconductor device may be stably fixed and protected.

[0074] The glass core 10 may include a through hole 101 penetrating along a thickness direction of the glass core 10 .

[0075] The through hole 101 is composed of an inner space 102 and a through hole inner diameter surface 103 surrounding the inner space 102. The inner space 102 refers to an empty space, and the through hole inner diameter surface 103 refers to a surface of the glass core 10 formed inside the through hole 101.

[0076] The through hole 101 may have a diameter that varies in a thickness direction of the glass core 10. The through hole 101 may have a substantially uniform diameter in a thickness direction of the glass core 10.

[0077] The cross section of the through hole 101 may have an hourglass shape. The cross section of the through hole 101 may have a rectangular, triangular, or trapezoidal shape other than the hourglass shape. The cross section of the through hole 101 refers to a cross section of the glass core 10 in the thickness direction.

[0078] The through hole 101 may include a first opening portion 104 connected to the upper surface of the glass core 10 and a second opening portion 105 connected to the lower surface of the glass core 10 .

[0079] The through hole 101 connects the first opening 104 and the second opening 105, and may further include a minimum inner diameter portion 106, which is a portion with the smallest inner diameter. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be smaller than the diameter of the through hole 101 in the first opening 104. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be smaller than the diameter of the through hole 101 in the second opening 105.

[0080] When the through hole 101 includes the minimum inner diameter portion 106, the cross section of the through hole 101 may have an hourglass shape. In the case where the through hole 101 has an hourglass-shaped cross section, it may be easier to form a thin film on the through hole inner diameter surface 103 by coating or sputtering, etc. Thus, when a conductive layer and / or a crack prevention layer 20 is formed inside the through hole 101, the reliability of the package substrate 100 may be further improved.

[0081] The diameter of the through hole 101 in the first opening 104 may be 40 μm to 200 μm. The diameter may be greater than 60 μm. The diameter may be greater than 80 μm. The diameter may be greater than 100 μm. The diameter may be less than 180 μm. The diameter may be less than 160 μm. The diameter may be less than 140 μm. The diameter may be less than 120 μm.

[0082] The diameter of the through hole 101 in the second opening 105 may be 40 μm to 200 μm. The diameter may be 60 μm or more. The diameter may be 80 μm or more. The diameter may be 100 μm or more. The diameter may be 180 μm or less. The diameter may be 160 μm or less. The diameter may be 140 μm or less. The diameter may be 120 μm or less.

[0083] In this case, the electrical reliability of the package substrate 100 may be stably controlled while further improving the integration degree of the package substrate 100 .

[0084] The diameter of the through hole 101 in the minimum inner diameter portion 106 may be 50% to 99% of the smaller diameter value of the diameter of the through hole 101 in the first opening portion 104 and the diameter of the through hole 101 in the second opening portion 105. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be 60% or more of the smaller diameter value of the diameter of the through hole 101 in the first opening portion 104 and the diameter of the through hole 101 in the second opening portion 105. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be 70% or more of the smaller diameter value of the diameter of the through hole 101 in the first opening portion 104 and the diameter of the through hole 101 in the second opening portion 105. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be 90% or less of the smaller diameter value of the diameter of the through hole 101 in the first opening portion 104 and the diameter of the through hole 101 in the second opening portion 105. The diameter of the through hole 101 in the minimum inner diameter portion 106 may be less than 80% of the smaller diameter value of the diameter of the through hole 101 in the first opening portion 104 and the diameter of the through hole 101 in the second opening portion 105. In this case, it may be helpful to form a uniform thickness of the crack prevention layer 20 and / or the conductive layer on the entire through hole inner diameter surface 103.

[0085] The surface of the glass core 10 may include an upper surface and a side surface connected to the upper surface and formed in a thickness direction of the glass core 10. The surface of the glass core 10 may include a lower surface opposite to the upper surface.

[0086] The side surface formed along the thickness direction of the glass core 10 not only means that the side surface is formed perpendicular to the upper surface of the glass core 10, but also means that at least a portion of the side surface forms an angle (inclination angle) other than 90 degrees with the upper surface.

[0087] The side surface may be a flat surface, or may be a curved surface.

[0088] The glass core 10 may include a hollow space inside, ie, a cavity.

[0089] The cavity may be formed by partially recessing the upper surface or the lower surface of the glass core 10 in the thickness direction of the glass core 10 , or may be formed by penetrating the glass core 10 in the thickness direction of the glass core 10 .

[0090] The packaging substrate 100 and the device can be electrically connected by installing the device in the cavity. The device can be not only a semiconductor device such as a CPU, a GPU, a memory chip, but also a capacitor device, a transistor device, an impedance device, and other modules. In other words, as long as it is a semiconductor device installed on a semiconductor device, it can be used as the device without restriction.

[0091] Structure of the anti-crack layer

[0092] The glass core 10 may have a surface. The encapsulation substrate 100 may include a crack prevention layer 20 surrounding at least a portion of the surface of the glass core 10 .

[0093] The anti-crack layer 20 stably supports the glass core 10 in a high temperature environment, prevents the glass core 10 from being bent and damaged due to the internal stress of the glass core 10, and can effectively inhibit the cracks generated in the glass core 10 from spreading to a larger range. In addition, the anti-crack layer 20 can impart controlled elasticity to a preset area of ​​the encapsulation substrate 100, thereby stably protecting the encapsulation substrate 100 from mechanical shocks that occur during the process of an operator handling the encapsulation substrate 100.

[0094] In the present embodiment, the ratio of the thickness of the glass core 10 to the thickness of the anti-crack layer 20 can be adjusted within a preset range. In this case, the durability of the package substrate 100 against external impact can be improved by more firmly supporting and protecting the glass core 10. At the same time, the heat treatment time required in the process of forming the anti-crack layer 20 by heat treatment can be adjusted to suppress excessive thermal deformation of the glass core 10.

[0095] The thickness of the crack prevention layer 20 is the thickness value of the crack prevention layer 20 located on the upper surface, side surface or lower surface of the glass core 10. That is, the thickness of the crack prevention layer 20 not formed in the through hole 101 is regarded as the thickness value of the crack prevention layer 20. When the thickness of the crack prevention layer 20 at different positions is uneven, the average thickness of the crack prevention layer 20 is the thickness of the crack prevention layer 20 according to the present embodiment.

[0096] The ratio of the thickness of the anti-crack layer 20 to the thickness of the glass core 10 may be 0.0001 to 0.05. The ratio may be 0.0005 or more. The ratio may be 0.001 or more. The ratio may be 0.003 or more. The ratio may be 0.005 or more. The ratio may be 0.03 or less. The ratio may be 0.02 or less. In this case, a package substrate 100 having improved durability without excessively damaging the glass core 10 may be provided.

[0097] The thickness of the anti-crack layer 20 may be 100 nm to 50 μm. The thickness may be 500 nm or more. The thickness may be 1 μm or more. The thickness may be 3 μm or more. The thickness may be 5 μm or more. The thickness may be 40 μm or less. The thickness may be 30 μm or less. The thickness may be 20 μm or less. In this case, the anti-crack layer 20 may firmly support the glass core 10 and effectively prevent cracks in the glass core 10 from forming and expanding. In addition, the anti-crack layer 20 may be formed within a controlled curing time.

[0098] The crack prevention layer 20 may surround the side surface of the glass core 10 .

[0099] The external force applied to the package substrate 100 during the handling by the operator may act mainly in the direction of the side surface of the glass core 10. The crack prevention layer 20 formed with the above structure may more effectively protect the glass core 10 from mechanical impact.

[0100] The crack prevention layer 20 surrounding the side surface of the glass core 10 may surround not only the side surface of the glass core 10 but also at least a portion of the upper and / or lower surfaces of the glass core 10. In this case, the crack prevention layer 20 may cover the edges of the upper and / or lower surfaces.

[0101] The anti-crack layer 20 surrounding the glass core 10 not only means the situation that the anti-crack layer 20 surrounds the glass core 10 in a manner connected to the glass core 10, but is also interpreted as including the situation that the anti-crack layer 20 surrounds the side surface of the glass core 10 in a state where other components are arranged between the anti-crack layer 20 and the glass core 10.

[0102] Figure 3 FIG. 1 is a cross-sectional view of a package substrate according to another embodiment of the present invention. Figure 3 This embodiment will be described.

[0103] The packaging substrate includes a glass core. The specific composition of the packaging substrate is as described above. Figure 1A , Figure 1B and Figure 2 The following description will focus on the differences.

[0104] The crack prevention layer 20 may be disposed between the inner space 102 and the through hole inner diameter surface 103. Since the through hole 101 has a fine and complex structure, the peripheral portion of the through hole 101 may correspond to a portion of the glass core 10 that is particularly susceptible to impact. When the crack prevention layer 20 has the above structure, the formation and expansion of cracks in the glass core 10 may be more effectively prevented.

[0105] When the crack prevention layer 20 has the above structure, the present embodiment can adjust the minimum value of the diameter of the internal space 102 within a preset range. In this case, it is relatively easy to form a conductive layer without gaps in the through hole 101, thereby improving the electrical reliability of the package substrate 100 to a certain level or more.

[0106] The minimum value of the diameter of the inner space 102 may be 50 μm or more. The minimum value may be 65 μm or more. The minimum value may be 80 μm or more. The minimum value may be 200 μm or less. The minimum value may be 180 μm or less. The minimum value may be 120 μm or less. In this case, a conductive layer may be easily formed in the through hole 101.

[0107] The crack prevention layer 20 may have a structure surrounding the entire surface of the glass core 10. That is, the crack prevention layer 20 may be provided not only on the side of the through hole 101 but also on the upper surface, lower surface, and side surface of the glass core 10. Thus, the glass core 10 may be protected from external impact and help prevent cracks from extending to the entire glass core 10.

[0108] Physical properties of anti-crack layer

[0109] This embodiment can control the tensile strength of the crack prevention layer 20. The crack prevention layer 20 has controlled strength and can stably fix the glass core 10 that can be deformed according to thermal stress. As a result, defects caused by bending of the glass core 10 during the manufacturing process, especially during the formation of the rewiring layer, can be suppressed. In addition, the crack prevention layer 20 can impart appropriate elasticity to at least a portion of the package substrate 100 and reduce the impact applied to the glass core 10 from the outside.

[0110] The tensile strength of the crack prevention layer 20 can be measured using a universal testing machine (UTM).

[0111] The tensile strength of the anti-crack layer 20 may be 1 MPa to 20 MPa. The tensile strength may be 2 MPa or more. The tensile strength may be 4 MPa or more. The tensile strength may be 15 MPa or less. The tensile strength may be 10 MPa or less. In this case, even if the glass core 10 has a structure that is susceptible to impact, the encapsulation substrate 100 may have stable durability.

[0112] The crack prevention layer 20 may have a linear thermal expansion coefficient within a preset range in the present embodiment. The crack prevention layer 20 having these characteristics can prevent the glass core 10 from being damaged by regulating the external force applied to the glass core 10 due to the thermal expansion of the crack prevention layer 20 itself during the formation of the rewiring layer. In addition, when the conductive layer is provided in contact with the crack prevention layer 20, damage to the electrical connection due to the expansion of the crack prevention layer 20 can be suppressed.

[0113] The linear thermal expansion coefficient is a value measured using dynamic mechanical analysis (DMA).

[0114] The linear thermal expansion coefficient of the anti-crack layer 20 is 100ppm / ℃ to 800ppm / ℃. The linear thermal expansion coefficient may be above 150ppm / ℃. The linear thermal expansion coefficient may be above 200ppm / ℃. The linear thermal expansion coefficient may be above 250ppm / ℃. The linear thermal expansion coefficient may be above 300ppm / ℃. The linear thermal expansion coefficient may be below 700ppm / ℃. The linear thermal expansion coefficient may be below 600ppm / ℃. The linear thermal expansion coefficient may be below 500ppm / ℃. The linear thermal expansion coefficient may be below 400ppm / ℃. In this case, the encapsulation substrate 100 may have stable durability and electrical reliability even after repeated heat treatment.

[0115] This embodiment can control the dielectric properties of the crack prevention layer 20. When a conductive layer is formed on the crack prevention layer 20, the crack prevention layer 20 can be used as an insulator. When a high-density fine pattern is implemented on the crack prevention layer 20 with controlled dielectric properties, signal confusion between wirings can be suppressed, and power consumption of the package substrate 100 due to the dielectric properties of the crack prevention layer 20 can also be reduced.

[0116] The dielectric constant of the crack prevention layer 20 is measured using a dielectric constant meter at room temperature.

[0117] At a frequency of 100 Hz, the dielectric constant of the crack prevention layer 20 may be 4 or less. The dielectric constant may be 3.5 or less. The dielectric constant may be 3 or less. The dielectric constant may be 2.8 or less. The dielectric constant may be 1.5 or more.

[0118] In this case, the conductive layer pattern formed on the crack prevention layer 20 may effectively transmit a signal.

[0119] The package substrate 100 may include a first conductive layer (not shown) disposed on the crack prevention layer 20. The peel strength of the first conductive layer relative to the crack prevention layer 20 may be greater than 300 gf.

[0120] The conductive layer is a conductor that transmits an electrical signal. The conductive layer may include a first conductive layer. The first conductive layer is the conductive layer that is disposed most adjacent to the anti-crack layer 20 in the conductive layer. At least a portion of the first conductive layer may be formed to be in contact with the anti-crack layer 20. The conductive layer may include a conductive material. Exemplarily, the conductive layer may include at least one of copper, nickel, aluminum, gold, and silver. The material of the conductive layer may be copper, etc.

[0121] When the first conductive layer is formed on the crack prevention layer 20, the crack prevention layer 20 can serve as a support and insulator of the first conductive layer. This embodiment can improve the bonding force between the crack prevention layer 20 and the first conductive layer, so that the crack prevention layer 20 can stably fix the first conductive layer.

[0122] The peel strength of the first conductive layer relative to the crack prevention layer 20 is measured using an adhesion tester according to a 180° peel test. The measuring speed (peeling speed) is set to 10 mm / s, the measuring distance (peeling distance) is set to 70 mm, and the measuring area is set to an area where no through-holes are formed in the upper surface / lower surface of the glass core. For example, the Condor Sigma adhesion tester from XYZ TEC can be used to measure the above peel strength value.

[0123] The average value of the measured peel strength values ​​is taken as the peel strength of the first conductive layer with respect to the crack prevention layer 20 .

[0124] The peel strength of the first conductive layer relative to the crack prevention layer 20 may be 300 gf or more. The peel strength may be 350 gf or more. The peel strength may be 400 gf or more. The peel strength may be 450 gf or more. The peel strength may be 500 gf or more. The peel strength may be 1200 gf or less. In this case, the crack prevention layer 20 may help form a fine micro pattern on the upper surface of the glass core 10, etc., by stably supporting and fixing the first conductive layer.

[0125] In this embodiment, in order to further increase the bonding force between the anti-crack layer 20 and the first conductive layer, an adhesion enhancement layer (not shown in the figure) may be provided between the anti-crack layer 20 and the first conductive layer (or conductive layer).

[0126] The adhesion enhancement layer can further improve the bonding force between the crack prevention layer 20 as an organic material and the first conductive layer (or conductive layer), thereby more stably maintaining the electrical reliability of the first conductive layer (or conductive layer).

[0127] The adhesion enhancing layer may be any one selected from the group consisting of azole compounds, silane compounds, silanized azole compounds and combinations thereof. The adhesion enhancing layer having the above composition can effectively improve the bonding strength of the conductive layer without excessively etching the conductive layer.

[0128] In order to further improve the peel strength of the first conductive layer relative to the anti-crack layer 20, the anti-crack layer 20de may be roughened. By increasing the roughness of the surface of the anti-crack layer 20, the contact area between the anti-crack layer 20 and the first conductive layer is increased, so that an anchoring effect occurs at the interface between the anti-crack layer 20 and the first conductive layer, thereby further improving the peel strength.

[0129] At least a portion of the crack prevention layer 20 may be provided in contact with the surface of the glass core 10. The crack prevention layer 20 may have a peel strength of 400 gf or more with respect to the surface of the glass core 10.

[0130] The bonding force between the anti-crack layer 20 and the glass core 10 at the portion where the anti-crack layer 20 and the glass core 10 meet can be controlled within the range of the present embodiment. Thus, the anti-crack layer 20 will not be easily separated from the glass core 10, and the anti-crack layer 20 can stably support and protect the glass core 10. In addition, the electrical connection between the conductive layer pattern formed on the anti-crack layer 20 and the conductive layer pattern formed in another area of ​​the package substrate 100 can be made less likely to be disconnected.

[0131] The peel strength of the crack preventing layer 20 with respect to the surface of the glass core 10 is measured under the same conditions as the method of measuring the peel strength of the first conductive layer with respect to the crack preventing layer 20 .

[0132] The peel strength of the anti-crack layer 20 relative to the surface of the glass core 10 may be 400 gf or more. The peel strength may be 450 gf or more. The peel strength may be 500 gf or more. The peel strength may be 550 gf or more. The peel strength may be 600 gf or more. The peel strength may be 1200 gf or less. In this case, the anti-crack layer 20 is not easy to fall off from the surface of the glass core 10, thereby helping to stably maintain the durability and electrical reliability of the package substrate 100.

[0133] Composition of anti-crack layer

[0134] The anti-cracking layer 20 may include silicone elastomer.

[0135] The silicone elastomer can impart the mechanical properties required in the present embodiment to the anti-crack layer 20, thereby stably fixing the glass core 10 in a high temperature atmosphere and working environment. In addition, the silicone elastomer can be cured by heat treatment in a relatively short time after light treatment. Thus, the hardness is enhanced by increasing the crosslinking density of the anti-crack layer 20, and the time for which the glass core 10 is exposed to high temperature during the formation of the anti-crack layer 20 is adjusted, so that deformation of the glass core 10 caused by thermal stress can be suppressed.

[0136] The anti-crack layer 20 may include more than 70% by weight of an organic silicon elastomer. The anti-crack layer 20 may include more than 80% by weight of an organic silicon elastomer. The anti-crack layer 20 may include more than 90% by weight of an organic silicon elastomer. The anti-crack layer 20 may include less than 100% by weight of an organic silicon elastomer. The anti-crack layer 20 may be an organic silicon elastomer. In this case, the anti-crack layer 20 is given an increased hardness, so that the glass core 10 can be stably fixed, and the degree of bending of the glass core 10 can be reduced to below a certain level during the substrate manufacturing process.

[0137] The silicone elastomer can be obtained by cross-linking a main component, which is a silicone resin, and a curing agent.

[0138] The main agent may contain an alkenyl group at one or more ends. The main agent may have a structure of the following Chemical Formula 1.

[0139] [Chemical formula 1]

[0140]

[0141] In the chemical formula 1, n is an integer of 20 to 60.

[0142] The curing agent may have a structure of Chemical Formula 2 below.

[0143] [Chemical formula 2]

[0144]

[0145] In the Chemical Formula 2, x and y are each independently an integer of 2 to 10.

[0146] During the curing process, the alkenyl group contained in the main agent can form a cross-linking bond with the curing agent, thereby increasing the cross-linking density in the blended resin and imparting controlled hardness to the anti-cracking layer 20 .

[0147] When forming the anti-crack layer 20, 3 to 20 parts by weight of curing agent can be used relative to 100 parts by weight of the main agent. When forming the anti-crack layer 20, 5 parts by weight or more of curing agent can be used relative to 100 parts by weight of the main agent. When forming the anti-crack layer 20, 8 parts by weight or more of curing agent can be used relative to 100 parts by weight of the main agent. When forming the anti-crack layer 20, 15 parts by weight or less of curing agent can be used relative to 100 parts by weight of the main agent. In this case, it can help to give the anti-crack layer 20 the hardness and elasticity desired in this embodiment.

[0148] The anti-crack layer 20 may further include a metal catalyst. The metal catalyst may help the silicone elastomer to cross-link in a short time. For example, a platinum catalyst may be used as the metal catalyst.

[0149] The anti-cracking layer 20 may further include other additives in addition to the above-mentioned blended resins. The additives are not limited as long as they are commonly used in the film field.

[0150] Other components of package substrates

[0151] Figure 4 FIG. 1 is a schematic diagram of a packaging substrate according to another embodiment of the present invention. Figure 4 This embodiment will be described.

[0152] The packaging substrate includes a glass core. The specific composition of the packaging substrate is as described above. Figure 1A , Figure 1B , Figure 2 and Figure 3 The following description will focus on the differences.

[0153] The rewiring layer 30 may include an insulating layer 32 and a conductive layer 31 disposed within the insulating layer 32 .

[0154] The encapsulation substrate 100 may include a rewiring layer 30 disposed on the glass core 10. The encapsulation substrate 100 may include a rewiring layer 30 disposed below the glass core 10. The encapsulation substrate 100 may include a rewiring layer 30 disposed above and below the glass core 10.

[0155] The rewiring layer 30 may be disposed in the through hole 101. The conductive layer 31 may be disposed in the through hole 101. When only the conductive layer 31 is present in the through hole 101, the conductive layer 31 may be formed by filling the internal space 102 of the through hole 101. When both the conductive layer 31 and the insulating layer 32 are present in the through hole 101, the conductive layer 31 may be disposed adjacent to the through hole inner diameter surface 103, and the insulating layer 32 may be disposed in the region surrounded by the conductive layer 31.

[0156] The rewiring layer 30 may be provided in contact with the surface of the glass core 10. Other components may be provided between the rewiring layer 30 and the surface of the glass core 10. The crack prevention layer 20 may be provided between the rewiring layer 30 and the surface of the glass core 10.

[0157] In the rewiring layer 30, the insulating layer 32 and the conductive layer 31 may be provided in a mixed manner. The rewiring layer 30 may be formed by embedding the conductive layer 31 having a predetermined position and form into the insulating layer 32. The conductive layer 31 may be formed as a thin line on at least a portion of the rewiring layer 30. The rewiring layer 30 may be electrically connected to the upper and / or lower terminals, devices, etc. of the package substrate 100.

[0158] The rewiring layer 30 may be formed by repeating the process of forming and removing the insulating layer 32 and the conductive layer 31 .

[0159] For example, the insulating layer 32 may be formed using a build-up layer material such as Ajinomoto Build-up Film (ABF) of Ajinomoto Corporation of Japan, a primer material, etc., but is not limited thereto.

[0160] The description about the material of the conductive layer 31 overlaps with the previous content, so the description will be omitted.

[0161] The package substrate 100 may further include a redistribution layer 30 and / or a bump (not shown) disposed below the glass core 10 .

[0162] The bump may be provided in a predetermined form below the glass core 10. Exemplarily, the bump may be provided on a portion of the lower surface of the package substrate 100 to interface with a main board or the like.

[0163] Semiconductor Package

[0164] A semiconductor package according to still another example of the present embodiment includes a package substrate and a device electrically connected to the package substrate.

[0165] The package substrate may be mounted on the main board and electrically connected to the main board.

[0166] The description about the packaging substrate and the device overlaps with the previous content, so the description will be omitted.

[0167] Method for manufacturing packaging substrate

[0168] According to another embodiment of the present embodiment, a method for manufacturing a packaging substrate includes: a through hole forming step, forming a glass core by forming a through hole in a glass substrate that penetrates the glass substrate in a thickness direction; and an anti-crack layer manufacturing step, manufacturing the packaging substrate by forming an anti-crack layer around at least a portion of the surface of the glass core.

[0169] In the through-hole forming step, the glass substrate may be, for example, alkali borosilicate flat glass, alkali-free borosilicate flat glass, alkali-free alkaline earth borosilicate flat glass, etc., and any flat glass suitable for electronic components may be used. As the glass core, a glass substrate for electronic devices may be used, and illustratively, products manufactured by Schott, AGC, Corning, etc. may be used, but are not limited thereto.

[0170] In the through hole forming step, the glass core may be formed by etching the glass substrate. Specifically, a defect may be formed at a predetermined position within the surface of the glass substrate. Methods for forming the defect may include mechanical etching and laser irradiation.

[0171] After forming the defect, the through hole can be formed by physical or chemical etching. When chemical etching is adopted, wet etching can be performed by using an etching solution. The etching solution is not limited as long as it is an etching solution generally suitable for etching a glass substrate. Exemplarily, the etching solution can be a sulfuric acid solution, a nitric acid solution, a hydrofluoric acid solution, etc.

[0172] During the etching process, the remaining surface of the glass substrate except for the region where the defect is formed may be masked, or the etching may be performed without masking.

[0173] A defect may be formed at one point on the upper surface of the glass substrate, a defect may be formed at another point in the lower surface of the glass substrate opposite to the one point, and etching may be performed to form a through hole having an hourglass-shaped cross section.

[0174] The opening portion on the upper surface side of the formed through hole is referred to as a first opening portion, the opening portion on the lower surface side is referred to as a second opening portion, and the portion with the smallest diameter in the through hole is referred to as a minimum inner diameter portion.

[0175] The description of the first opening, the second opening, and the minimum inner diameter portion overlaps with the previous content, and thus the description will be omitted.

[0176] In the crack prevention layer manufacturing step, the crack prevention layer may be formed at a predetermined position on the glass core. The description of the setting position of the crack prevention layer overlaps with the previous content, so the description will be omitted.

[0177] The anti-cracking layer can be formed by lamination or wet coating.

[0178] In the lamination process, the package substrate may be manufactured by stacking a film-shaped crack prevention layer at a predetermined position on a glass core.

[0179] In the wet coating method, the composition for manufacturing the crack preventing layer may be coated on a predetermined position of the glass core, and the coated composition for manufacturing the crack preventing layer may be cured to form the crack preventing layer.

[0180] The composition for manufacturing the anti-cracking layer may include a main agent of an organic silicone elastomer and a curing agent. The description of the composition of the main agent and the curing agent of the organic silicone elastomer overlaps with the previous content, so the description will be omitted.

[0181] Relative to 100 parts by weight of the main agent, the composition for making the anti-cracking layer may include 3 to 20 parts by weight of a curing agent. Relative to 100 parts by weight of the main agent, the composition for making the anti-cracking layer may include 5 or more parts by weight of a curing agent. Relative to 100 parts by weight of the main agent, the composition for making the anti-cracking layer may include 8 or more parts by weight of a curing agent. Relative to 100 parts by weight of the main agent, the composition for making the anti-cracking layer may include less than 15 parts by weight of a curing agent. In this case, it may be helpful to impart the desired mechanical properties of the present embodiment to the anti-cracking layer.

[0182] The composition for manufacturing the crack prevention layer may be coated by a method such as spin coating or slit coating, but is not limited thereto.

[0183] The crack preventing layer may be formed by thermally curing the applied composition for manufacturing the crack preventing layer.

[0184] The composition for making the anti-crack layer can be cured at a relatively low heat treatment temperature. The relatively low heat treatment temperature can be 70°C to 120°C. The temperature can be above 80°C. The temperature can be above 90°C. The temperature can be below 110°C.

[0185] When the composition for making the anti-crack layer is cured at a relatively low heat treatment temperature, the heat treatment can be performed for a relatively long time. In this case, the heat treatment time of the composition for making the anti-crack layer can be 30 minutes to 90 minutes. The heat treatment time can be more than 40 minutes. The heat treatment time can be more than 50 minutes. The heat treatment time can be less than 80 minutes.

[0186] In this case, it is possible to suppress excessive thermal stress from being formed in the glass core during the process of forming the crack preventing layer.

[0187] The composition for making the anti-crack layer can be cured at a relatively high heat treatment temperature. The relatively high heat treatment temperature can be 120°C to 180°C. The temperature can be above 130°C. The temperature can be above 140°C. The temperature can be below 170°C.

[0188] When the composition for making the anti-crack layer is cured at a relatively high heat treatment temperature, the heat treatment can be performed for a relatively short time. In this case, the heat treatment time of the composition for making the anti-crack layer can be 5 minutes to 30 minutes. The heat treatment time can be more than 10 minutes. The heat treatment time can be more than 15 minutes. The heat treatment time can be less than 25 minutes.

[0189] In this case, thermal deformation of the glass core can be suppressed by reducing the time the glass core is exposed to high temperature.

[0190] The description about the thickness of the formed crack prevention layer overlaps with the previous content, so the description will be omitted.

[0191] In order to improve the bonding strength of the conductive layer to the anti-crack layer, the surface of the anti-crack layer may be roughened. In the process of forming the anti-crack layer, the bonding strength between the conductive layer and the anti-crack layer may be adjusted by adjusting the heat treatment time and the heat treatment temperature.

[0192] As another method of improving the bonding force of the conductive layer with respect to the crack prevention layer, an adhesion enhancement layer may be formed on the surface of the crack prevention layer. The description of the adhesion enhancement layer overlaps with the previous content, so the description will be omitted.

[0193] A rewiring layer may be formed on the package substrate on which the crack prevention layer is formed. After a conductive layer is formed on the glass core or the crack prevention layer, the rewiring layer may be formed by forming an insulating layer surrounding the conductive layer.

[0194] The conductive layer can be formed by a dry method or a wet method.

[0195] The dry method is a method of forming a seed layer by sputtering the area where the conductive layer is to be provided, and electroplating the area where the seed layer is formed to form the conductive layer. When forming the seed layer, metals such as titanium, chromium, and nickel can be sputtered, or the metals can be sputtered together with copper. Sputtering generates an anchoring effect of the interaction between the surface of the glass core, the anti-crack layer, or the insulating layer and the metal particles, thereby improving the adhesion of the conductive layer.

[0196] The wet process is a method of performing metal electroplating after the portion where the conductive layer is to be formed is primed. The primer may include a compound having a functional group such as an amine group. Depending on the intended degree of adhesion, the primer may include a compound having a functional group such as an amine group and a silane coupling agent at the same time. When a silane coupling agent is used, the primer layer can be formed by pre-treating the surface of the primer treatment object with the silane coupling agent and then applying the compound having an amine group to the pre-treated area.

[0197] After forming the seed layer or the primer layer, the conductive layer can be formed by electroplating the metal. Copper plating can be used when forming the conductive layer, but is not limited to this. Before metal electroplating, the portion of the seed layer or the primer layer that does not need to form the conductive layer is passivated, or the portion that needs to form the conductive layer is activated, and then electroplating can be performed. The activation or passivation treatment method can use a light irradiation treatment using a laser of a specific wavelength, a chemical treatment, etc. However, it is also possible to perform metal electroplating without performing activation or passivation treatment, and then etch and pattern the conductive layer according to a pre-designed shape.

[0198] After forming the conductive layer, an insulating layer surrounding the conductive layer may be formed. The insulating layer may be a film-shaped insulating layer. Specifically, the insulating layer may be formed by decompressing and laminating the film-shaped insulating layer. In this case, the insulating layer is formed to surround the conductive layer without gaps, so that the package substrate can have excellent electrical reliability.

[0199] The description about the setting position of the rewiring layer overlaps with the previous content, so the description will be omitted.

[0200] If necessary, a process of forming connection terminals, bumps, a cover layer, etc. on the upper surface and / or the lower surface of the package substrate or mounting a device on the substrate may be further performed.

[0201] The present embodiment will be described in more detail below through specific examples. The following examples are only examples for helping to understand the present embodiment, and the scope of the present embodiment is not limited thereto.

[0202] Manufacturing example: Manufacturing of package substrate

[0203] Example 1: After defects were formed on the surface of a glass plate SG7.8 (thickness 0.7 mm) from Corning Inc. by laser irradiation, wet etching was performed to form a plurality of through holes, thereby manufacturing a glass core. The diameter of the core through hole was adjusted to 100 μm.

[0204] The Sylgard 184 composition of DOW, which is a composition for making an anti-crack layer, is applied on the upper surface of the glass core. The main agent and curing agent of Sylgard 184 are mixed in a ratio of 10:1 (by weight) and applied to the glass plate. The applied composition is heat-treated at 100°C for 60 minutes and cured to form an anti-crack layer with a thickness of 8 μm. A nickel target is used to sputter on the anti-crack layer to form a nickel layer, and a copper target is used to sputter on the nickel layer to form a copper layer, thereby completing the seed layer. Copper is plated on the seed layer to form a first conductive layer with a total thickness of 1 μm, thereby preparing a packaging substrate.

[0205] Example 2: A package substrate was manufactured under the same conditions as in Manufacturing Example 1 except that the thickness of the crack prevention layer was set to 7 μm.

[0206] Example 3: A package substrate was manufactured under the same conditions as in Manufacturing Example 1 except that the thickness of the crack prevention layer was set to 10 μm.

[0207] Example 4: A package substrate was manufactured under the same conditions as in Manufacturing Example 1 except that the thickness of the crack prevention layer was set to 11 μm.

[0208] Comparative Example 1: A package substrate was manufactured under the same conditions as in Example 1, except that Scotchgard Film Protector FX-1000 from 3M Company was used as a composition for manufacturing the crack prevention layer to form the crack prevention layer without performing a heat treatment.

[0209] Evaluation Example: Measurement of the Peel Strength of the Conductive Layer to the Crack Prevention Layer

[0210] On the package substrate of each embodiment, according to the 180° peel test, the Condor Sigma adhesion tester of XYZ TEC was used to measure the peel strength of the first conductive layer relative to the anti-crack layer. The measuring speed (peeling speed) was set to 10 mm / s, the measuring distance (peeling distance) was set to 70 mm, and the measuring area was set to an area where no through-holes were formed. The average value of the peel strength measured during the peeling process of the anti-crack layer of each manufacturing example was taken as the peel strength of each manufacturing example.

[0211] The measured values ​​of each example are recorded in Table 1 below.

[0212] Evaluation example: Heat resistance evaluation

[0213] The package substrate of each embodiment and manufacturing example was exposed to 100° C. for 10 minutes. Then, the package substrate of each embodiment and manufacturing example was visually observed, and if the package substrate warped or the anti-crack layer deformed, it was evaluated as unqualified, and if the package substrate warped or the anti-crack layer deformed, it was evaluated as qualified.

[0214] The evaluation results of each example and comparative example are shown in Table 1 below.

[0215] Evaluation example: Evaluation of various physical properties of the crack prevention layer

[0216] The tensile strength of the crack prevention layer in the package substrate of Example 1 was measured at room temperature using a universal testing machine (UTM).

[0217] The linear thermal expansion coefficient of the crack prevention layer was measured using dynamic mechanical analysis (DMA).

[0218] The dielectric constant of the crack prevention layer at a frequency of 100 Hz and the dielectric constant at a frequency of 100 kHz were measured using a dielectric constant meter.

[0219] The measured values ​​of Example 1 are shown in Table 2 below.

[0220] Table 1

[0221]

[0222] Table 2

[0223]

[0224] In Table 1, the average value of the peel strength of each manufacturing example is 600 gf or more, which means that the bonding strength of the conductive layer to the crack prevention layer is excellent in all manufacturing examples.

[0225] In the heat resistance evaluation, Examples 1 to 4 were all evaluated as acceptable, whereas Comparative Example 1 was evaluated as unacceptable.

[0226] The preferred embodiments of the present invention are described in detail above, but the scope of the present invention is not limited thereto. Various modifications and improvements by ordinary technicians in the technical field of the present invention using the basic concepts of the present invention defined in the attached claims also fall within the scope of the present invention.

Claims

1. A packaging substrate, wherein: Including glass core, The glass core includes a through hole penetrating along the thickness direction of the glass core, The glass core has a surface, The packaging substrate further includes a crack prevention layer surrounding at least a portion of the surface, A ratio of a thickness of the crack prevention layer to a thickness of the glass core is 0.0001 to 0.

05.

2. The packaging substrate according to claim 1, wherein: The tensile strength of the anti-cracking layer is 1 MPa to 20 MPa.

3. The packaging substrate according to claim 1, wherein: The linear thermal expansion coefficient of the anti-cracking layer is 100 ppm / °C to 800 ppm / °C.

4. The packaging substrate according to claim 1, wherein: At a frequency of 100 Hz, the dielectric constant of the anti-crack layer is less than 4.

5. The packaging substrate according to claim 1, wherein: It also includes a first conductive layer disposed on the anti-crack layer, The peel strength of the first conductive layer with respect to the crack prevention layer is 300 gf or more.

6. The packaging substrate according to claim 5, wherein: Also included is an adhesion enhancement layer disposed between the crack prevention layer and the first conductive layer.

7. The packaging substrate according to claim 5, wherein: The anti-cracking layer is roughened.

8. The packaging substrate according to claim 1, wherein: At least a portion of the anti-crack layer is disposed in contact with the surface of the glass core, The crack preventing layer has a peel strength of 400 gf or more with respect to the surface of the glass core.

9. The packaging substrate according to claim 1, wherein: The anti-cracking layer includes silicone elastomer.

10. The packaging substrate according to claim 1, wherein: The surface of the glass core comprises: upper surface; and A side surface is connected to the upper surface and is formed along the thickness direction of the glass core, and the anti-crack layer surrounds the side surface of the glass core.

11. The packaging substrate according to claim 1, wherein: The through hole comprises an inner space and a through hole inner diameter surface surrounding the inner space, The anti-crack layer is arranged between the inner space and the inner diameter surface of the through hole, The minimum value of the diameter of the internal space is 50 μm or more.

12. A semiconductor package, wherein: The invention comprises the package substrate according to claim 1 and a semiconductor device mounted on the package substrate.

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