Semiconductor laser chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor lasers, in particular to a semiconductor laser chip which comprises a substrate, a growth buffer layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding and a cover layer which are sequentially stacked from bottom to top in the longitudinal direction. A plurality of current injection regions with different widths and a plurality of ion injection regions with different widths are arranged in the transverse direction of the semiconductor laser chip; a plurality of current injection regions are distributed between the two ion injection regions on the two sides; the ion implantation region penetrates through the cover layer and a part of the upper cladding layer in the longitudinal direction; forming a ridge waveguide structure on the cover layer; processing the ridge waveguide structure through ion implantation to form a lateral chirp electric injection modulation ridge waveguide structure; the chirp electric injection structure formed by the invention can regulate and control each order mode from the aspects of gain and loss, so that the loss of a high-order mode is greater than that of a fundamental mode, and finally, the effects of reducing the output of the high-order mode, reducing the divergence angle and improving the beam quality of a far field are achieved.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor lasers, and in particular relates to a semiconductor laser chip and a preparation method thereof. Background Art

[0002] High-power wide-area semiconductor lasers are currently the most important power-type semiconductor lasers, which are in great demand in various fields, and all require high laser power and high beam quality to obtain high brightness. The high-order side modes of semiconductor lasers have larger light mode sizes and far-field divergence angles, so the more lasing mode orders, the worse the beam quality. Wide-area semiconductor lasers have many lasing modes under high currents, so the far-field width rapidly widens with increasing current, which ultimately leads to the deterioration of the lateral beam quality.

[0003] There are several traditional ways to achieve high beam quality: external cavity, using external cavity feedback to filter high-order modes, thereby achieving lateral single-mode (or few-mode) lasing to improve lateral beam quality; refractive index engineering, using lateral refractive index modulation structure, enhancing mode resolution and mode selection through refractive index engineering, controlling mode field characteristics to improve output beam brightness, etc. Traditional methods are generally effective for lateral mode control, but they also have their own limitations and problems, such as: external cavity requires a larger system volume and more precise optical path adjustment, the system is complex and the cost is rising; refractive index engineering can currently achieve near-diffraction limit beam quality and narrow divergence (<1°) laser emission, but it must use higher precision and complex processing technology, the manufacturing cost is high, and the current device output power is low. Summary of the invention

[0004] In view of this, the present invention aims to provide a method for preparing a semiconductor laser chip and a semiconductor laser chip with a relatively simple process, which can improve the lateral beam quality of the semiconductor laser as much as possible without affecting performance parameters such as efficiency and threshold.

[0005] To achieve the above object, the technical solution created by the present invention is implemented as follows: A semiconductor laser chip, the semiconductor laser chip is a planar chip, and the semiconductor laser chip comprises a substrate, a growth buffer layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a cap layer stacked in sequence from bottom to top in a longitudinal direction; The semiconductor laser chip comprises a plurality of current injection regions with different widths distributed in the center and on both sides in the lateral direction, and a plurality of ion injection regions with different widths distributed in the center and on both sides; a plurality of current injection regions are arranged between the ion injection regions on both sides; the ion injection regions penetrate the cap layer and part of the upper cladding layer in the longitudinal direction; A ridge waveguide structure is formed on the cover layer; and the ridge waveguide structure is processed by ion implantation to form a lateral chirp electric injection modulated ridge waveguide structure.

[0006] Furthermore, the width of the central ion injection region is smaller than the width of the ion injection regions on both sides; the width of the central current injection region is larger than the width of the current injection regions on both sides.

[0007] Furthermore, with the symmetry axis at the center of the semiconductor laser structure as the coordinate zero point, a plurality of ion implantation regions with different widths are arranged symmetrically relative to the symmetry axis.

[0008] Furthermore, two ion implantation regions with a width of 5 μm are located at 110 μm on both sides of the symmetry axis; two ion implantation regions with a width of 10 μm are located at 195 μm on both sides of the symmetry axis; two ion implantation regions with a width of 15 μm are located at 255 μm on both sides of the symmetry axis; two ion implantation regions with a width of 20 μm are located at 345 μm on both sides of the symmetry axis; and an ion implantation region with a width of 25 μm is located at 375 μm on both sides.

[0009] Furthermore, the energy of the ion implantation is 50KeV to 500KeV, and the implantation dose of the ion implantation is 2e12cm -2 ~5e15cm -2 The ions implanted are one of hydrogen ions, helium ions, nitrogen ions or argon ions.

[0010] Further, the thickness of the substrate is in the range of 100 μm to 200 μm, the thickness of the buffer layer is in the range of 0.5 μm to 1.5 μm, the thickness of the lower waveguide layer is in the range of 0.5 μm to 1.5 μm, the thickness of the active layer is in the range of 0.08 μm to 0.2 μm, the thickness of the upper waveguide layer is in the range of 0.2 μm to 1 μm, the thickness of the upper cladding layer is in the range of 0.5 μm to 2 μm, and the thickness of the cap layer is in the range of 0.1 μm to 0.3 μm; The material of the substrate is InP or GaAs; the material of the buffer layer is one of AlGaAs, InGaAs or InP; the material of the upper waveguide layer is one of AlGaAs, AlInAs or InGaAsP; the material of the upper cladding layer is one of AlGaAs, InGaAs or InP; the material of the lower waveguide layer is one of AlGaAs, GaAsSb or InP; and the material of the cap layer is InP or GaAs.

[0011] Furthermore, the thickness of the buffer layer is 1 μm, the thickness of the lower waveguide layer is 870 nm, the thickness of the active layer is 8 nm, the thickness of the upper waveguide layer is 400 nm, the thickness of the upper cladding layer is 700 nm, and the thickness of the cap layer is 200 nm. Furthermore, the width of the ion injection region ranges from 5 μm to 25 μm; the width of the current injection region ranges from 10 μm to 200 μm.

[0012] The present invention also provides a method for preparing the semiconductor laser chip, the method comprising the steps of: S1. epitaxially growing the buffer layer, the lower waveguide layer, the active layer, the upper waveguide layer, the upper cladding layer and the cap layer on the substrate in sequence; S2. Photolithography on the cover layer to form the ridge waveguide structure; S3. Performing photolithography on the ridge waveguide structure to form a pattern for ion implantation; forming a lateral chirp electric injection modulated ridge waveguide structure through the ion implantation; the ion implantation region penetrates the cap layer and part of the upper cladding layer in the longitudinal direction; S4. Growing an electrical insulating layer on the cap layer, fabricating a P-side metal electrode on the electrical insulating layer, and fabricating an N-side metal electrode on the back side of the substrate.

[0013] Further, the electrical insulating layer is a silicon oxide electrical insulating film or a silicon nitride electrical insulating film; The thickness of the electrical insulating layer ranges from 50 nm to 500 nm; the thickness of the electrical insulating layer is 500 nm.

[0014] Compared with the prior art, the invention can achieve the following beneficial effects: Compared with the carrier modulation structure formed by etching in the traditional chip, the semiconductor laser chip with the novel structure proposed by the present invention does not require etching during ion implantation, thus reducing the corresponding process steps and making the process simpler; moreover, ion implantation does not require etching and does not change the surface morphology, so that the heat dissipation capacity of the ion-implanted carrier modulation structure is higher than that of the etched carrier modulation structure, and the higher heat dissipation capacity can weaken the refractive index change caused by heat, reduce the thermal lens effect, and further improve the far-field beam quality.

[0015] In addition, the semiconductor laser chip with a novel structure proposed in the present invention can regulate each order mode in terms of gain and loss through the design of a chirped electric injection structure. The current injection zone in the middle region is set to be wider than the current injection zones on both sides, so that the fundamental mode will obtain a greater gain than the high-order mode. The ion injection zones on both sides are set to be larger in area than the ion injection zones in the middle part, so that the loss of the high-order mode will be greater than that of the fundamental mode, ultimately achieving the effect of reducing the output of the high-order mode, reducing the divergence angle, and improving the beam quality in the far field. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments and descriptions of the present invention are used to explain the present invention and do not constitute an improper limitation on the present invention. In the drawings: Figure 1 This is a schematic diagram of the structure of a laser semiconductor chip in an embodiment of the present invention; Figure 2 A schematic diagram of the structure of the current injection area in the laser semiconductor chip in the embodiment of the present invention; Figure 3 A schematic flow chart of a method for preparing a laser semiconductor chip in an embodiment of the present invention; Figure 4 A schematic diagram of the structure of a laser semiconductor chip in a comparative example of the present invention; Figure 5 A schematic diagram showing the divergence angle comparison between the embodiment of the present invention and the comparative example; Figure 6 Schematic diagram of laser power comparison between the embodiment of the present invention and the comparative example.

[0017] Description of reference numerals: 1. Non-current injection area for ion implantation; 2. P-side metal electrode, 3: silicon oxide electrical insulation film; 4. cap layer; 5. P-type cladding layer; 6. P-type waveguide; 7. active layer; 8. N-type waveguide; 9. buffer layer; 10. substrate; 11. N-side metal electrode; 12. current injection area. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the invention more clear, the invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the invention and do not constitute a limitation of the invention.

[0019] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0020] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0021] In the description of the invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the invention can be understood according to specific circumstances.

[0022] A semiconductor laser chip is provided in a specific embodiment of the present invention. The semiconductor laser chip is a planar chip. The semiconductor laser chip includes a substrate, a growth buffer layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a cap layer stacked in sequence from bottom to top in the longitudinal direction. The semiconductor laser chip includes a plurality of current injection regions with different widths distributed in the center and on both sides, and a plurality of ion injection regions with different widths distributed in the center and on both sides in the lateral direction. A plurality of current injection regions are arranged between the ion injection regions on both sides. The ion injection regions penetrate the cap layer and part of the upper cladding layer in the longitudinal direction. A ridge waveguide structure is formed on the cap layer. The ridge waveguide structure is processed by ion implantation to form a lateral chirp electric injection modulated ridge waveguide structure, where the lateral direction refers to the lateral strip width direction of the semiconductor laser, i.e., the light emitting direction. Specifically, the energy of the ion implantation is 50KeV to 500KeV, and the implantation dose of the ion implantation is 2e12cm -2 ~5e15cm -2The ions implanted are one of hydrogen ions, helium ions, nitrogen ions or argon ions; the concentration and depth of the implanted ions can be precisely controlled by controlling the energy and beam density of the ion implantation, which can reduce the problem that the ion implantation may cause damage to each layer; specifically, the ion implantation concentration can be selected according to the doping concentration of the semiconductor material, for example, the doping concentration of the semiconductor material is greater than 1e18cm -3 When the ion implantation dose is preferably greater than 1e15 cm -2 The ion implantation depth of the present invention is controlled above the upper waveguide layer, that is, the ion implantation area only penetrates the cover layer and part of the upper cladding layer in the longitudinal direction, and no longer penetrates the upper waveguide layer, thereby avoiding internal loss.

[0023] In a specific implementation, the width of the central ion injection zone is smaller than the width of the ion injection zones on both sides; the width of the central current injection zone is larger than the width of the current injection zones on both sides; the widths of the ion injection zone and the current injection zone can be determined according to the mode distribution in the specific semiconductor laser. In the scheme provided by the specific implementation of the present invention, by setting the central ion injection zone narrower and the ion injection zones on both sides wider, the current injection zone is still in the center of the fundamental mode, and the ion injection is on both sides of the fundamental film, reducing the impact on the fundamental mode gain; at the same time, the ion injection zones on both sides should be located at the peak of the high-order mode, and the width should be widened as much as possible to cover, thereby reducing the gain of the high-order mode, and finally achieving normal output of the fundamental mode, while the output of the high-order mode is reduced to achieve the effect of reducing the divergence angle. Therefore, the semiconductor laser chip with a novel structure proposed in the present invention can regulate each order mode in terms of gain and loss through the design of a chirped electric injection structure. The current injection zone in the middle region is set to be wider than the current injection zones on both sides, so that the fundamental mode will obtain a greater gain than the high-order mode. The ion injection zones on both sides are set to be larger in area than the ion injection zones in the middle part, so that the loss of the high-order mode will be greater than that of the fundamental mode, ultimately achieving the effect of reducing the output of the high-order mode, reducing the divergence angle, and improving the beam quality in the far field.

[0024] In a specific embodiment, the thickness of the substrate is in the range of 100 μm to 200 μm, the thickness of the buffer layer is in the range of 0.5 μm to 1.5 μm, the thickness of the lower waveguide layer is in the range of 0.5 μm to 1.5 μm, the thickness of the active layer is in the range of 0.08 μm to 0.2 μm, the thickness of the upper waveguide layer is in the range of 0.2 μm to 1 μm, the thickness of the upper cladding layer is in the range of 0.5 μm to 2 μm, and the thickness of the cap layer is in the range of 0.1 μm to 0.3 μm; preferably, the thickness of the buffer layer is The thickness of the lower waveguide layer is 1 μm, the thickness of the active layer is 8 nm, the thickness of the upper waveguide layer is 400 nm, the thickness of the upper cladding layer is 700 nm, and the thickness of the cap layer is 200 nm. Specifically, different ridge widths correspond to different mode distribution positions, and the ion injection area and the current injection area need to be changed accordingly. In the case of a stripe width of 740 μm, the width range of the ion injection area is 5 μm to 25 μm; the width range of the current injection area is 10 μm to 200 μm.

[0025] In a specific embodiment, the material of the substrate is InP or GaAs; the material of the buffer layer is one of AlGaAs, InGaAs or InP; the material of the upper waveguide layer is one of AlGaAs, AlInAs or InGaAsP; the material of the upper cladding layer is one of AlGaAs, InGaAs or InP; the material of the lower waveguide layer is one of AlGaAs, GaAsSb or InP; and the material of the cap layer is InP or GaAs.

[0026] The semiconductor laser chip structure provided by the present invention is suitable for various semiconductor laser epitaxy. In other specific embodiments, when the epitaxy types are different, the specific materials and thicknesses of the substrate, growth buffer layer, lower waveguide layer, active layer, upper waveguide layer, upper cladding layer, cap layer and other layers in the semiconductor laser chip are also different.

[0027] The present invention also provides a method for preparing the semiconductor laser chip, the method comprising the steps of: S1. epitaxially growing the buffer layer, the lower waveguide layer, the active layer, the upper waveguide layer, the upper cladding layer and the cap layer on the substrate in sequence; S2. Photolithography on the cover layer to form the ridge waveguide structure; S3. Performing photolithography on the ridge waveguide structure to form a pattern for ion implantation; forming a lateral chirp electric injection modulated ridge waveguide structure through the ion implantation; the ion implantation region penetrates the cap layer and part of the upper cladding layer in the longitudinal direction; S4. Grow an electrical insulating layer on the capping layer, make a P-side metal electrode on the electrical insulating layer, and make an N-side metal electrode on the back side of the substrate; the electrical insulating layer is a silicon oxide electrical insulating film or a silicon nitride electrical insulating film; the thickness of the electrical insulating layer ranges from 50nm to 500nm; the thickness of the electrical insulating layer is 500nm.

[0028] Compared with the carrier modulation structure formed by etching in the traditional chip, the semiconductor laser chip with a novel structure proposed in the specific embodiment of the present invention does not require etching during ion implantation, and the corresponding process steps are reduced, making the process simpler. Moreover, ion implantation does not require etching and does not change the surface morphology, so that the heat dissipation capacity of the ion-implanted carrier modulation structure is higher than that of the etched carrier modulation structure. The higher heat dissipation capacity will weaken the refractive index change caused by heat, reduce the thermal lens effect, and further improve the far-field beam quality.

[0029] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.

[0030] Example This embodiment provides a semiconductor laser chip having a structure as follows Figure 1 As shown, from top to bottom it includes a 300nm thick P-side metal electrode 2, a 500nm thick SiO2 electrical insulation layer 3, a 200nm thick GaAs cap layer 4, a 700nm thick P-type GaAs upper cladding layer 5, a 400nm thick P-type AlGaAs upper waveguide layer 6, an 8nm thick undoped InGaAs active region 7, an 870nm thick N-type AlGaAs lower waveguide layer 8, a 1μm grown buffer layer 9, and a GaAs substrate 10 stacked in sequence.

[0031] The method for preparing the semiconductor laser chip provided in this example is as follows Figure 3As shown: first, a buffer layer 9, a lower waveguide layer 8, an active layer 7, an upper waveguide layer 6, an upper cladding layer 5, and a cap layer 4 are epitaxially grown on a substrate 10 in sequence; then, photolithography is performed on the cap layer 4 to vertically etch away the cap layer 4 and part of the upper cladding layer 5 to form a ridge waveguide structure. The deep groove position shown in the black frame in the figure is the ridge waveguide channel formed by etching before ion implantation, which is used to standardize the width of the ridge waveguide structure; then, photolithography is performed on the ridge waveguide structure to form a pattern for ion implantation. The ion implantation energy is 90KeV, the ion type is helium ions, and the implantation depth is 800nm ​​to form an ion implantation area 1. The central symmetry axis of the laser structure is taken as the coordinate zero point, and the ion implantation areas are symmetrically arranged relative to the symmetry axis: the ion implantation areas with a width of 5μm are located on both sides of the symmetry axis. 110μm; the ion implantation area with a width of 10μm is located at 195μm on both sides of the symmetry axis; the ion implantation area with a width of 15μm is located at 255μm on both sides of the symmetry axis; the ion implantation area with a width of 20μm is located at 345μm on both sides of the symmetry axis; the ion implantation area with a width of 25μm is located at 375μm on both sides of the symmetry axis, and the ion implantation area 1 penetrates the cap layer 4 to part of the P-type upper cladding layer 5; then, an electrical insulating layer 3 is grown on the cap layer 4, and the electrical insulating layer on the ridge waveguide structure is etched to open a window; finally, a P-side metal electrode 2 is grown, and after thinning the substrate 10, an N-side metal electrode 11 is grown on the back. Specifically, in the semiconductor laser chip provided in this example, the structure of the current injection area is as follows Figure 2 shown.

[0032] Comparative Example First, a buffer layer 9, a lower waveguide layer, i.e., an N-type waveguide 8, an active layer 7, an upper waveguide layer, i.e., a P-type waveguide 6, an upper cladding layer 5, and a cap layer 4 are epitaxially grown on a substrate 10 in sequence; then, photolithography is performed on the cap layer 3, and the cap layer and part of the cladding layer are vertically etched away to form a ridge waveguide structure; then, an upper electrical insulating layer, i.e., a silicon oxide electrical insulating film 3 is grown on the cap layer 4, and photolithography is performed to etch away the upper electrical insulating layer of the ridge waveguide structure to open a window; finally, a P-side metal electrode 2 is grown, and after thinning the substrate 10, an N-side metal electrode 11 is grown on the back side. Specifically, the semiconductor laser chip structure of the control group provided in this example is as follows Figure 4 shown.

[0033] like Figure 5 and Figure 6 As shown, there are respectively a schematic diagram of the divergence angle comparison between the embodiment of the invention and the comparative example and a schematic diagram of the laser power comparison. It can be seen from the figure that the divergence angle of the semiconductor laser chip prepared by the preparation method of the invention is reduced from the original 13.58° containing 95% of the light power to 10.71°, a decrease of 21%; and the efficacy power is reduced from 34.9W to 33.4W, only a decrease of 4%, which fully demonstrates that while the divergence angle is reduced, the laser power efficiency has not decreased significantly.

[0034] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the disclosure of the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in the present invention can be achieved, and this document does not limit this.

[0035] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A semiconductor laser chip, characterized in that: The semiconductor laser chip is a planar chip, and includes a substrate, a growth buffer layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a cap layer stacked in sequence from bottom to top in the longitudinal direction; The semiconductor laser chip comprises a plurality of current injection regions with different widths distributed in the center and on both sides in the lateral direction, and a plurality of ion injection regions with different widths distributed in the center and on both sides; a plurality of current injection regions are arranged between the ion injection regions on both sides; the ion injection regions penetrate the cap layer and part of the upper cladding layer in the longitudinal direction; A ridge waveguide structure is formed on the cover layer; and the ridge waveguide structure is processed by ion implantation to form a lateral chirp electric injection modulated ridge waveguide structure.

2. The semiconductor laser chip according to claim 1, characterized in that: The width of the central ion injection region is smaller than the width of the ion injection regions on both sides; the width of the central current injection region is larger than the width of the current injection regions on both sides.

3. The semiconductor laser chip according to claim 1, characterized in that: The symmetry axis at the center of the semiconductor laser structure is taken as the coordinate zero point, and a plurality of ion implantation regions with different widths are arranged symmetrically relative to the symmetry axis.

4. The semiconductor laser chip according to claim 3, characterized in that: Two ion implantation regions with a width of 5 μm are located at a distance of 110 μm on both sides of the symmetry axis; two ion implantation regions with a width of 10 μm are located at a distance of 195 μm on both sides of the symmetry axis; two ion implantation regions with a width of 15 μm are located at a distance of 255 μm on both sides of the symmetry axis; two ion implantation regions with a width of 20 μm are located at a distance of 345 μm on both sides of the symmetry axis; and an ion implantation region with a width of 25 μm is located at 375 μm on both sides.

5. The semiconductor laser chip according to claim 1, characterized in that: The energy of the ion implantation is 50KeV to 500KeV, and the implantation dose of the ion implantation is 2e12cm -2 ~5e15cm -2 The ions implanted are one of hydrogen ions, helium ions, nitrogen ions or argon ions.

6. The semiconductor laser chip according to claim 1, characterized in that: The thickness of the substrate is in the range of 100 μm to 200 μm, the thickness of the buffer layer is in the range of 0.5 μm to 1.5 μm, the thickness of the lower waveguide layer is in the range of 0.5 μm to 1.5 μm, the thickness of the active layer is in the range of 0.08 μm to 0.2 μm, the thickness of the upper waveguide layer is in the range of 0.2 μm to 1 μm, the thickness of the upper cladding layer is in the range of 0.5 μm to 2 μm, and the thickness of the cap layer is in the range of 0.1 μm to 0.3 μm; The material of the substrate is InP or GaAs; the material of the buffer layer is one of AlGaAs, InGaAs or InP; the material of the upper waveguide layer is one of AlGaAs, AlInAs or InGaAsP; the material of the upper cladding layer is one of AlGaAs, InGaAs or InP; the material of the lower waveguide layer is one of AlGaAs, GaAsSb or InP; and the material of the cap layer is InP or GaAs.

7. The semiconductor laser chip according to claim 1, characterized in that: The thickness of the buffer layer is 1 μm, the thickness of the lower waveguide layer is 870 nm, the thickness of the active layer is 8 nm, the thickness of the upper waveguide layer is 400 nm, the thickness of the upper cladding layer is 700 nm, and the thickness of the cap layer is 200 nm.

8. The semiconductor laser chip according to claim 1, characterized in that: The width of the ion injection region is in the range of 5 μm to 25 μm; the width of the current injection region is in the range of 10 μm to 200 μm.

9. A method for preparing a semiconductor laser chip, characterized in that: The semiconductor laser chip is the semiconductor laser chip according to any one of claims 1 to 8; the preparation method comprises the steps of: S1. epitaxially growing the buffer layer, the lower waveguide layer, the active layer, the upper waveguide layer, the upper cladding layer and the cap layer on the substrate in sequence; S2. Photolithography on the cover layer to form the ridge waveguide structure; S3. Performing photolithography on the ridge waveguide structure to form a pattern for ion implantation; forming a lateral chirp electric injection modulated ridge waveguide structure through the ion implantation; the ion implantation region penetrates the cap layer and part of the upper cladding layer in the longitudinal direction; S4. Growing an electrical insulating layer on the cap layer, fabricating a P-side metal electrode on the electrical insulating layer, and fabricating an N-side metal electrode on the back side of the substrate.

10. The method for preparing a semiconductor laser chip according to claim 9, characterized in that: The electrical insulating layer is a silicon oxide electrical insulating film or a silicon nitride electrical insulating film; The thickness of the electrical insulating layer ranges from 50 nm to 500 nm; the thickness of the electrical insulating layer is 500 nm.

Images