Time adjustment method, electronic equipment and storage medium
By obtaining the time and frequency difference between the device to be adjusted and the reference clock source and adjusting the local time of the device, the problem of time synchronization error accumulation is solved and the accuracy of time calibration is improved.
Patent Information
- Application Number
- CN202411940798.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-05-06
AI Technical Summary
During the time synchronization process, there may be time error and frequency difference between the reference clock source and the device to be adjusted, resulting in low time calibration accuracy, especially after the device is running for a long time, synchronization errors may accumulate.
By obtaining the time difference between the local time of the device to be adjusted and the reference clock source, as well as the frequency difference between the timing frequency of the device to be adjusted and the reference clock source, the local time of the device to be adjusted in combination with the time of the reference clock source is adjusted to improve the time calibration accuracy.
By combining time difference and frequency difference, this method can more accurately adjust the local time of the device to be adjusted, improve the accuracy of time calibration, and reduce the accumulation of time synchronization errors.
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Figure CN119945601A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of computer technology, and more specifically, to a time adjustment method, an electronic device and a storage medium. Background Art
[0002] With the development of computer technology, devices with computing functions can be applied to many occasions. For example, in the power system, each device can be configured with a module for executing software tasks. During the operation of the power system, the modules of each device execute the software tasks to realize the normal operation of the power system. In electronic systems, a stable clock signal is the basis for ensuring data synchronization and transmission accuracy. In order to ensure the normal operation of devices with computing functions, different devices need to maintain signal synchronization. Therefore, a reference clock source may be set up, and each device refers to the reference clock source for time synchronization. However, there may be deviations between time synchronization, and some devices with special purposes have higher accuracy requirements for time synchronization to achieve normal operation of the equipment. Summary of the invention
[0003] The purpose of the embodiments of the present application is to provide a time adjustment method, an electronic device and a storage medium, which can improve the accuracy of time calibration.
[0004] In a first aspect, an embodiment of the present application provides a time adjustment method, comprising: obtaining the local time of a device to be adjusted, and the time difference between a reference clock source and the device to be adjusted; obtaining the timing frequency of the device to be adjusted, and the frequency difference between the reference timing frequency of the reference clock source; the timing frequency of the device to be adjusted is used to determine the local time of the device to be adjusted, and the timing frequency of the device to be adjusted is used to determine the time of the device to be adjusted; adjusting the local time of the device to be adjusted according to the time difference, the frequency difference, and the time of the reference clock source.
[0005] In one embodiment, obtaining the time difference between the reference clock source and the device to be adjusted includes: latching the local time of the device to be adjusted at the reference time of the reference clock source to obtain the latching time of the device to be adjusted; and determining the time difference based on the latching time and the reference time.
[0006] In one embodiment, determining the time difference based on the latch time and the reference time includes: determining the decimal time other than the integer digit of the latch time; determining the system minimum time of the device to be adjusted based on the decimal time and the timing frequency of the device to be adjusted; and using the system minimum time as the time difference.
[0007] In one embodiment, determining the system minimum time based on the decimal time and the timing frequency of the device to be adjusted includes: when the decimal time is less than half of the time interval, using the decimal time as the system minimum time; when the decimal time is greater than half of the time interval, using the difference between the time interval and the decimal time as the system minimum time.
[0008] In one embodiment, obtaining the timing frequency of the device to be adjusted and the frequency difference between the reference timing frequency of the reference clock source includes: repeatedly counting the first timing times of the local clock of the device to be adjusted within a unit time, and the second timing times of the reference clock source within a unit time; determining the average value of the first timing times and the second timing times counted multiple times according to the first timing times, the second timing times and the empirical difference of the timing frequency; and determining the frequency difference according to the average value.
[0009] In one embodiment, adjusting the local time of the device to be adjusted based on the time difference, the frequency difference, and the time of the reference clock source includes: when the frequency difference includes an integer part and a decimal part, evenly classifying the decimal part of the frequency difference into multiple unit times of the device to be adjusted; allocating the integer part of the frequency difference to each unit time; and adjusting the local time of the device to be adjusted based on the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time.
[0010] In one embodiment, the decimal part of the frequency difference is evenly classified into multiple unit times of the device to be adjusted, including: for the Nth decimal part, the frequency difference is adjusted to the Mth unit time in every N unit times, N is a positive integer power of 10, and M is not an integer multiple of 10.
[0011] In one embodiment, adjusting the local time of the device to be adjusted based on the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time includes: determining the compensated tasks based on the integer part, the decimal part and the number of executions of the tasks per unit time; the number of compensated tasks is less than the number of executions of the tasks per unit time; and adjusting the local time of the device to be adjusted when the compensated tasks are executed.
[0012] In a second aspect, an embodiment of the present application provides an electronic device, including a processor, wherein the processor is coupled to a memory, and the processor is used to execute a computer program or instruction stored in the memory so that the electronic device implements a method provided in any embodiment of the present application.
[0013] In a third aspect, an embodiment of the present application further provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to execute a method provided by any embodiment of the present application.
[0014] In order to ensure the normal operation of the device to be adjusted, it is usually necessary to perform time calibration on the device to be adjusted based on a reference clock source. However, due to the synchronization time error when the reference clock source is synchronized with the device to be adjusted, this synchronization time error may accumulate and increase during the longer operation time of the device to be adjusted. The time adjustment method, electronic device and storage medium provided in the embodiment of the present application, when adjusting the local time of the device to be adjusted according to the time of the reference clock source, also combines the time difference between the reference time and the local time, and the frequency difference between the reference timing frequency and the local timing frequency, thereby improving the time calibration accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0016] Figure 1 A schematic diagram of a time adjustment method flow chart provided in an embodiment of the present application;
[0017] Figure 2 This is a flowchart of the time adjustment method provided in the example of this application;
[0018] Figure 3 A schematic diagram of the device structure provided in an embodiment of the present application. DETAILED DESCRIPTION
[0019] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0020] The embodiment of the present application provides a time adjustment method, such as Figure 1 As shown, the process includes the following steps S11 to S13.
[0021] Step S11: obtaining the local time of the device to be adjusted and the time difference between the reference clock source and the device to be adjusted.
[0022] In a possible implementation, the device to be adjusted may refer to a device whose time needs to be adjusted. The device to be adjusted may have a software task execution function. At the same time, the device to be adjusted can perform timing locally and generate a local clock signal. In other words, the device to be adjusted itself can generate local time.
[0023] A reference clock source may be a device or component that can generate a stable frequency signal, which can be used as a benchmark or reference for generating a local clock signal of the device to be adjusted. In other words, the reference clock source is used to provide a reference time to the device to be adjusted.
[0024] In possible implementations, the reference clock source may include a passive clock, an active clock, a quartz crystal oscillator, etc. Among them, the passive clock may be a crystal, and the passive clock combined with an external circuit can generate an oscillation signal. The active clock may rely on an external power supply to generate an oscillation signal. The quartz crystal oscillator may be a high-precision and high-stability oscillator, which uses the piezoelectric effect of a quartz crystal to generate a stable oscillation signal.
[0025] In a possible implementation, the local time of the device to be adjusted can be obtained through a local timing module of the device to be adjusted. When executing timing, the local timing module of the device to be adjusted generates a timing signal and provides timing information to other modules inside the device to be adjusted. The local time of the device to be adjusted can be obtained through the timing signal generated by the local timing module.
[0026] If both the reference clock source and the device to be adjusted support GPS (global positioning system) or other satellite signals, GPS or satellite signals can be used to calibrate the time and calculate the time difference. GPS satellites send accurate time signals, and the reference clock source and the device to be adjusted can determine the time difference by receiving the time signals.
[0027] In step S11, the time difference between the local time of the device to be adjusted and the reference time of the reference clock source is obtained. This time difference can be the time difference between the local time and the reference time in a unit timing cycle. For example, the time difference obtained in step S11 can be the time difference between the time when the local time reaches the single time synchronization cycle and the time when the reference time reaches the single time synchronization cycle.
[0028] Step S12: Obtain the timing frequency of the device to be adjusted and the frequency difference between the reference timing frequency of the reference clock source; the timing frequency of the device to be adjusted is used to determine the local time of the device to be adjusted, and the timing frequency of the device to be adjusted is used to determine the time of the device to be adjusted.
[0029] The timing frequency of the device to be adjusted may refer to the number of counts generated by the timer (timing module) in the device to be adjusted within one second, usually expressed in Hertz (Hz). The timing frequency of the reference clock source may refer to the frequency used by the clock source to generate a time reference signal.
[0030] In the embodiment of the present application, the reference clock source may be of different types, and different methods may be used to obtain the frequency of the reference clock source for different types of reference clock sources. At the same time, different types of reference clock sources may also have different standard frequencies.
[0031] For example, for low-frequency crystal oscillators of the crystal oscillator (crystal oscillator) type, the timing frequency range may be between a few hertz and hundreds of kilohertz, such as 32.768kHz (kilohertz). For high-frequency crystal oscillators of the crystal oscillator (crystal oscillator) type, the timing frequency range is between a few megahertz and hundreds of megahertz.
[0032] For example, for a cesium atomic clock, which is a type of atomic clock, the timing frequency may be between a few megahertz and tens of megahertz.
[0033] The frequency difference obtained in step S12 may be the frequency difference between the reference timing times of the reference clock source and the local timing times of the device to be adjusted within a unit timing period.
[0034] Step S13: adjusting the local time of the device to be adjusted according to the time difference, the frequency difference, and the time of the reference clock source.
[0035] In a possible implementation, in order to ensure the normal operation of the device to be adjusted, it is usually necessary to perform time calibration on the device to be adjusted based on a reference clock source. However, due to the synchronization time error when the reference clock source and the device to be adjusted are synchronized, this synchronization time error may accumulate and increase during the long operation time of the device to be adjusted. Therefore, in an embodiment of the present application, when adjusting the local time of the device to be adjusted based on the time of the reference clock source, the time difference between the reference time and the local time, and the frequency difference between the reference timing frequency and the local timing frequency are also combined to improve the time calibration accuracy.
[0036] In one implementation, obtaining the time difference between the reference clock source and the device to be adjusted includes:
[0037] At the reference time of the reference clock source, latching the local time of the device to be adjusted to obtain the latching time of the device to be adjusted;
[0038] The time difference is determined according to the latch time and the reference time.
[0039] In the embodiment of the present application, the reference clock source may be a B-code timing device. The B-code may refer to an IRIG-B code, which is an Inter-Range Instrumentation Group-B (IRIG-B) time synchronization standard. The IRIG-B code loads the time synchronization signal and time code information such as seconds, minutes, hours, and days into a signal carrier with a frequency of 1kHz.
[0040] The reference time of the above-mentioned reference clock source may refer to the time when the device to be adjusted is synchronized with the reference clock source. When the reference clock source is a B-code timing device, the IRIG-B code is a time string code with one frame per second, and one frame of the string code contains 100 code elements. One position code element is configured for every 10 code elements, and there are 10 in total. The 10 position code elements can be defined as P1, P2, ..., P9, P0 in sequence. Two consecutive P code elements indicate the beginning of a whole second. Among the two consecutive P code elements, the pulse leading edge of the second P code element is the "punctual" reference point. At the two consecutive special P code element reference points of the B code of the B-code timing device, the device to be adjusted can latch the local time T0 (i.e., latch time) of the whole second. At this time, due to the existence of time synchronization error, the latch time of the device to be adjusted may not be 0, but a decimal around 0, such as 0.001 seconds.
[0041] In one implementation, determining the time difference according to the latch time and the reference time includes:
[0042] Determine the decimal place time other than the integer place of the latch time;
[0043] Determine the minimum system time according to the decimal time and the timing frequency of the device to be adjusted;
[0044] The system minimum time is taken as the time difference.
[0045] In a possible implementation, for the latch time, the second and above parts can be directly synchronized with the time information in the B code. The part below the second of T0 is taken as the clock difference (ie, the time difference), which is converted into the minimum time of the system and recorded as △T_tick.
[0046] In one implementation, determining the system minimum time according to the decimal time and the timing frequency of the device to be adjusted includes:
[0047] When the decimal time is less than half of the time interval, the decimal time is used as the system minimum time; when the decimal time is greater than half of the time interval, the difference (negative value) between the time interval and the decimal time is used as the system minimum time.
[0048] Taking into account the problem of whole second reversal of the clock error, it is necessary to consider processing the clock error as positive and negative values: that is, when the clock error △T_tick (system minimum time)>1S_tick / 2, △T_tick=△T_tick-1S_tick, at this time, the negative value is taken as the clock error.
[0049] In one implementation, obtaining the frequency difference between the timing frequency of the device to be adjusted and the timing frequency of the reference clock source includes:
[0050] Multiple counting of the first timing times of the local clock of the device to be adjusted within a unit time and the second timing times of the reference clock source within a unit time;
[0051] Determine an average value of the first timing times and the second timing times that are counted multiple times according to the first timing times, the second timing times and an empirical difference of the timing frequency;
[0052] Based on the average value, the frequency difference is determined.
[0053] In a possible implementation, the above-mentioned unit time may refer to 1 second (or 0.5 second, or other whole second time). In other possible implementations, the unit time may be determined according to the timing characteristics of the reference clock source. For example, when the reference clock source is a B-code timing source, the unit time may refer to the time interval between two B-codes, or the time interval between two adjacent P-codes.
[0054] In a possible implementation, the first timing times of the local clock of the device to be adjusted in a unit time and the second timing times of the reference clock source in a unit time are counted multiple times, which may include: setting a register that is not affected by an external time source, recording the walking interval between every two B terminals, and recording the corresponding time source for 1 second, and the timing times of the crystal oscillator (timing module) of the device to be adjusted corresponding to Tick_1S, and the timing times of the nominal frequency of the crystal oscillator is Tick_L; calculating the frequency difference between the device to be adjusted and the reference clock source: △Tick_frq=Tick_1S-Tick_L; setting the frequency difference threshold △Tick_frq_high (empirical value) according to the crystal oscillator rule, if the frequency difference △Tick_frq>ΔTick_ frq_high, the statistics are considered abnormal and the data is discarded; a dynamic window storage window is designed (store △Tick_frq), which stores the frequency difference △Tick_frq1-ΔTick_frqn counted for multiple times in a row, updates the latest frequency difference value every second and removes the oldest frequency difference value, thereby achieving the effect of dynamic update; when the average frequency difference is calculated: remove the maximum value △Tick_frq_Max and the minimum value △Tick_frq_Min of the frequency difference window statistical sample to calculate the average value, △Tick_frq_Eq=(Sum(ΔTick_frq1-ΔTick_frqn)-ΔTick_frq_Max-ΔTick_frq_Min) / n-2. The frequency difference counted using this method does not have the problem of related coupling.
[0055] In one implementation, adjusting the local time of the device to be adjusted according to the time difference, the frequency difference, and the time of the reference clock source includes:
[0056] In the case where the frequency difference includes an integer part and a decimal part, evenly classifying the decimal part of the frequency difference into a plurality of unit times of the device to be adjusted;
[0057] Allocating the integer part of the frequency difference to each unit time;
[0058] The local time of the device to be adjusted is adjusted according to the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time.
[0059] In a possible implementation, the calculated average value of the frequency difference is a non-integer value. Considering the timekeeping accuracy requirement, the decimal places of the frequency difference can be compensated.
[0060] In one embodiment, the step of evenly classifying the fractional part of the frequency difference into a plurality of unit times of the device to be adjusted includes:
[0061] For the decimal part of the Nth quantile, the frequency difference is adjusted to the Mth unit time in every N unit time, where N is a positive integer power of 10 and M is not an integer multiple of 10.
[0062] In a possible implementation, the integer digit of the frequency difference △Tick_frq_Eq calculated in the above embodiment is set as the number of compensations to be made per second FrqAdd_1S; the tenth digit is set as the number of compensations to be made per 10 seconds FrqAdd_10S; the percentile digit is set as the number of compensations to be made per 100 seconds FrqAdd_100S. And so on, the minimum compensation digit is determined according to the maximum demand.
[0063] At the same time, in order to avoid the superposition of multiple compensations, which may cause the compensation number in a certain second to be too large and cause a small jump in the clock, M is not an integer multiple of 10. The decimal FrqAdd can be assigned to each second in units of 10S for compensation: for example, FrqAdd_10S is assigned to the 2nd compensation, FrqAdd_100S is assigned to the 3rd compensation, and so on.
[0064] In one implementation, adjusting the local time of the device to be adjusted according to the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time includes:
[0065] Determine the tasks to be compensated according to the integer part, the decimal part and the number of times the tasks are executed per unit time; the number of the tasks to be compensated is less than the number of times the tasks are executed per unit time;
[0066] When the task to be compensated is executed, the local time of the device to be adjusted is adjusted.
[0067] Calculate the local time Tick_Add = ΔT_tick + FrqAdd that needs to be compensated for the current second (one second can be a timing cycle), where FrqAdd is the compensation corresponding to the decimal part of FrqAdd_1S superimposed on the current second; distribute the compensation corresponding to the decimal part within 1S for multiple average compensation. For example, if the task is executed about 100 times per second, then average Tick_Add to 80 times for compensation (retain a certain margin to ensure that the current compensation value can be executed). When the device to be adjusted executes the task, the compensation operation is performed according to the Tick_Add value. In possible implementations, considering the lag in the effectiveness of the operation, the relevant operations are only added and subtracted.
[0068] In one example of this application, Figure 2 As shown, the time adjustment method includes the following steps S21 to S24.
[0069] Step S21: The clock difference between the local clock of the device to be adjusted and the B-code timing source is obtained.
[0070] In the present application example, the B code timing source may refer to the reference clock source in the aforementioned embodiment, which may generate the B code, and the B code is used to synchronize the time of the device to be adjusted. The clock difference may refer to the time difference in the aforementioned embodiment.
[0071] Further, step S21 may include the following steps S1-1 to S1-5.
[0072] Step S1-1: When the system crystal frequency of the device to be adjusted is 25 MHz, the frequency is multiplied to 100 MHZ (megahertz) through FPGA (Field-Programmable Gate Array). The frequency of 100 MHZ corresponds to the minimum local time 1Tick=20ns. The minimum local time can refer to the time between two adjacent timings.
[0073] Step S1-2, set the system format of the local time of the system operation of the device to be adjusted. The local time can be composed of the part above the second and the tick count below the second. The time is maintained by the FPGA through self-increment count and can be changed by the application software.
[0074] Step S1-3, FPGA latches the local time of the arrival moment of the terminal of the external B code.
[0075] Step S1-4: The device to be adjusted reads the B-code time information (including seconds and above) currently parsed by the FPGA to synchronize the system's own time (seconds and above).
[0076] Step S1-5: In the B-code time information read by the device to be adjusted, the clock error ΔT_tick below the current second (i.e., the reference time in the above embodiment) is the tick below the latched time second in step S1-2. Considering the clock error reversal problem, if ΔT_tick>50M, ΔT_tick=100M-ΔT_tick takes a negative value.
[0077] Step S22: Acquire the frequency difference between the timing frequency of the device to be adjusted and the reference timing frequency.
[0078] Step S22 may further include the following steps S2-1 to S2-5.
[0079] Step S2-1, FPGA sets a register that is not affected by the external time source, records the interval between every two B terminals in the B code, and is used to record the corresponding time source 1 second device crystal oscillator running number Tick_1S, and the nominal frequency running number of the crystal oscillator is Tick_L.
[0080] Step S2-2: Calculate the frequency difference ΔTick_frq between the crystal oscillator of the device to be adjusted and the reference clock source.
[0081] Tick_1S-100M. The frequency difference calculated using this method has no related coupling problem.
[0082] Step S2-3: set the frequency difference threshold to 1000 ticks (20 us) according to the crystal oscillator rule. If the frequency difference Tick_frq>1000, it is considered that the statistics are abnormal and the data is discarded.
[0083] Step S2-4: design a 1000S dynamic window storage window, and use the pointer offset method to update the oldest frequency difference value to the latest one, thereby achieving the effect of dynamic update.
[0084] Step S2-5: Calculate the average frequency difference and use the average frequency difference as the frequency difference.
[0085] When the 1000S dynamic window storage window is not filled, ΔTick_frq_Eq=(Sum(ΔTick_frq1-ΔTick_frqn) / n-2; when the 1000S dynamic window storage window is filled, ΔTick_frq_Eq=(Sum(ΔTick_frq1-ΔTick_frq100)-ΔTick_frq_Max-ΔTick_frq_Min) / (100-2).
[0086] Wherein, ΔTick_frq_Max is the maximum value of the frequency difference stored in the 1000S dynamic window storage window. ΔTick_frq_Min is the minimum value of the frequency difference stored in the 1000S dynamic window storage window.
[0087] Step S23: Data processing of frequency difference.
[0088] The average frequency difference calculated in step 22 is a non-integer value. Considering the timekeeping accuracy requirement, a decimal place compensation method needs to be designed. Step S23 further includes the following steps S3-1 to S3-3.
[0089] Step S3-1, the integer digit of ΔTick_frq_Eq is set to the number of compensations required per second FrqAdd_1S; the tenth digit is set to the number of compensations required per 10 seconds FrqAdd_10S; the percentile digit is set to the number of compensations required per 100 seconds FrqAdd_100S. And so on, the minimum compensation digit can be considered according to the maximum demand.
[0090] Step S3-2: To avoid the overlap of multiple compensations, which may cause the compensation number in a certain second to be too large and cause a small jump in the clock, the decimal FrqAdd should be assigned to each second in units of 10S for compensation: for example, FrqAdd_10S is assigned to the 2nd second compensation, FrqAdd_100S is assigned to the 3rd second compensation, and so on. If a certain digit is greater than 5, it needs to be carried and then negative.
[0091] Step S3-3, for S3-1, S3-2, an example is given as follows: for example, the frequency difference is 2.346 ticks, then FrqAdd_1S=2, FrqAdd_10S=3, FrqAdd_100S=5, FrqAdd_100S=-4; the corresponding device compensates 2 ticks per second, and at the 1st second, 11th second, 21st second, 31st second..., a superimposed compensation of 3 ticks is applied; at the 2nd second, 102nd second, 202nd second..., a superimposed compensation of 5 ticks is applied; at the 5th second, 1005th second, 2005th second..., a superimposed compensation of -4 ticks is applied.
[0092] Step S24: the device to be adjusted adjusts the local time.
[0093] Step S24 may further include the following steps S4-1 to S4-3.
[0094] Step S4-1, calculate the local time Tick_Add=ΔT_tick+FrqAdd that needs to be compensated for the current second, where FrqAdd is FrqAdd_1S plus the decimal place compensation allocated for the current second.
[0095] Step S4-2: distribute the compensation to multiple average compensations within 1 second. For example, if the task is executed about 100 times per second, then Tick_Add is averaged to 80 times for compensation (keeping a certain margin to ensure that the current compensation value can be executed).
[0096] Step S4-3: When the current task is executed, a compensation operation is performed according to the Tick_Add value.
[0097] The time is adjusted by writing the current plus / minus tick to the FPGA.
[0098] The present application also provides a time adjustment device, such as Figure 3 As shown, it includes: a time difference module, a frequency difference module and an adjustment module.
[0099] The time difference module is used to obtain the local time of the device to be adjusted and the time difference between the reference clock source and the device to be adjusted.
[0100] The frequency difference module is used to obtain the frequency difference between the timing frequency of the device to be adjusted and the reference timing frequency of the reference clock source; the timing frequency of the device to be adjusted is used to determine the local time of the device to be adjusted, and the timing frequency of the device to be adjusted is used to determine the time of the device to be adjusted.
[0101] The adjustment module is used to adjust the local time of the device to be adjusted according to the time difference, the frequency difference, and the time of the reference clock source.
[0102] The time adjustment device provided in the embodiment of the present application can implement the steps of the time adjustment method provided in any embodiment of the present application.
[0103] The method and device provided in the embodiments of the present application can be applied to the power system. The device to be adjusted can be a secondary protection device in the power system. In the power system, the secondary protection devices are all synchronized by the B code sent by the time source device (reference clock source). The more common indicators for judging the quality of time calibration are the device time calibration and timekeeping accuracy: that is, the actual deviation between the device to be adjusted when the B code timing device is connected and the clock is the device time calibration accuracy; the actual deviation between the device to be adjusted when the B code timing device is lost and the clock is the device timekeeping accuracy. During calibration, the clock difference between the local clock of the device to be adjusted and the clock source (i.e., the reference clock source) can be latched every second for compensation; for the timekeeping accuracy, the frequency difference between the number of steps per second corresponding to the local timing frequency of the device to be adjusted and the reference timing frequency of the external time is obtained by calculation. After losing the time synchronization of the external reference clock source, the device to be adjusted can be compensated according to the above frequency deviation to achieve the timekeeping function.
[0104] If the time difference △T_diff = initial clock difference △T_ini + clock frequency difference per second △T_frq×t is followed, and the time calibration compensation is performed according to △T_diff, and the timekeeping compensation is performed according to △T_frq, then when the device to be adjusted uses a crystal oscillator with a large running error for timing, there will be a problem of a large relative error with the reference clock source. For example, if the crystal oscillator frequency of the device to be adjusted is nominally 10MHz and the actual crystal oscillator frequency is 9.9999MHz, a running error of 10us will be introduced per second, and there will be a staged cumulative error within 1S. If the frequency difference △T_frq is calculated by a large number of statistics on △T_diff, there may be a problem of compensating and counting at the same time, and decoupling is required in the algorithm. If the decoupling is not measured to the bottom, it will cause deviations in the calculation of △T_frq, thus affecting the timekeeping accuracy.
[0105] The embodiments of the present application can be applied to the time calibration and time keeping of electronic devices. When the device to be adjusted is in the time calibration (real-time time adjustment during operation), the network recording and analysis device can record the message time stamp with an accuracy of 100ns. In the time keeping (re-adjustment after time loss) state, the system can meet the 12-hour deviation within 12us. The time synchronization accuracy is improved, and the decoupling between the calibration information and time synchronization is achieved.
[0106] The implementation of the above-mentioned embodiment of the present application is a combination of elements and features of the embodiment of the present application. Unless otherwise mentioned, elements or features may be considered as optional. Each element or feature may be put into practice without being combined with other elements or features. In addition, the implementation of the present application may be constructed by combining some elements and / or features. The order of operations described in the implementation of the present application may be rearranged. Some constructions of any one embodiment may be included in another embodiment, and may be replaced by the corresponding construction of another embodiment. It is obvious to those skilled in the art that claims that do not have a clear reference relationship to each other in the attached claims may be combined with the implementation of this application, or may be included as new claims in the amendment after submitting this application.
[0107] In a firmware or software configuration, the embodiments of the present application may be implemented in the form of modules, processes, functions, etc. The software code may be stored in a memory unit and executed by a processor. The memory unit is located inside or outside the processor and may send data to and receive data from the processor via various known means.
[0108] Various aspects of the systems and methods described herein may be implemented as functions programmed into any of a variety of circuits, including programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), programmable array logic (PAL) devices, electronic programmable logic and storage devices, standard cell-based devices, and application-specific integrated circuits (ASICs). Some other possibilities for implementing these aspects of the system include: microcontrollers with memory, such as electronically erasable programmable read-only memory (EEPROM), embedded microprocessors, firmware, software, etc. In addition, these aspects of the system may be embodied in microprocessors with software-based circuit simulation, discrete logic (sequential and combinational), custom devices, fuzzy (neural) logic, quantum devices, and combinations of any of the above various device types. Of course, the underlying device technology may be provided in a variety of component types, such as metal oxide semiconductor field effect transistor (MOSFET) technology such as complementary metal oxide semiconductor (CMOS), bipolar technology such as emitter coupled logic (ECL), polymer technology (e.g., silicon conjugated polymer and metal conjugated polymer metal structure), hybrid analog and digital, etc.
[0109] The various functions or processes disclosed herein may be described as data and / or instructions embodied in various computer-readable media in terms of their behavior, register transfers, logic components, transistors, geometric layouts, and / or other characteristics. Computer-readable media that may contain such formatted data and / or instructions include, but are not limited to, various forms of non-volatile storage media (e.g., optical, magnetic, or semiconductor storage media) and carrier waves, which may be used to transmit such formatted data and / or instructions via wireless, optical, or wired signal media, or any combination thereof. When received in any of a variety of circuits (e.g., computers), such data and / or instructions may be processed by a processing entity (e.g., one or more processors).
[0110] The above description of the illustrated embodiments of the systems and methods is not intended to be exhaustive or to limit the systems and methods to the precise forms disclosed. Although specific embodiments and examples of the system components and methods are described herein for illustrative purposes, it will be appreciated by those skilled in the art that various equivalent modifications may be made within the scope of the systems, components, and methods. The teachings of the systems and methods provided herein may be applied to other processing systems and methods, not just to the above-described systems and methods.
[0111] Those skilled in the art will appreciate that, without departing from the spirit or scope of the broad description of the present application, various changes and / or modifications may be made to the present application shown in the specific embodiments. Therefore, the present embodiment will be considered in all respects to be illustrative and not restrictive. In addition, the present application includes any combination of features described for different embodiments (including features in the abstract section), even if the feature or combination of features is not clearly defined in the claims or the detailed description of the present embodiment.
[0112] Generally, in the following claims, the terms used should not be construed to limit the systems and methods to the specific embodiments disclosed in the specification and the claims, but should be construed to include all processing systems that operate under the claims. Therefore, the systems and methods are not limited by the present disclosure, but rather the scope of the systems and methods is determined entirely by the claims.
[0113] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include", "including", "comprising", etc. should be interpreted in an inclusive sense and not in an exclusive or exhaustive sense; that is, in the sense of "including but not limited to". Words using the singular or plural number also include the singular or plural number, respectively. In addition, "herein", "herein below", "above", "hereafter" and words of similar meaning refer to this application as a whole and not to any particular part of this application. When the word "or" is used in a list involving two or more items, the word "or" includes all of the following interpretations of the word: any item in the list, all items in the list, and any combination of items in the list.
[0114] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is more than two, unless otherwise clearly and specifically defined.
[0115] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.
Claims
1. A time adjustment method, characterized in that: include: Obtaining the local time of the device to be adjusted, and the time difference between the reference clock source and the device to be adjusted; Obtaining a frequency difference between a timing frequency of the device to be adjusted and a reference timing frequency of a reference clock source; The timing frequency of the device to be adjusted is used to determine the local time of the device to be adjusted, and the timing frequency of the device to be adjusted is used to determine the time of the device to be adjusted; The local time of the device to be adjusted is adjusted according to the time difference, the frequency difference, and the time of the reference clock source.
2. The method according to claim 1, characterized in that The obtaining of the time difference between the reference clock source and the device to be adjusted includes: At the reference time of the reference clock source, latching the local time of the device to be adjusted to obtain the latching time of the device to be adjusted; The time difference is determined according to the latch time and the reference time.
3. The method according to claim 2, characterized in that The determining the time difference according to the latch time and the reference time includes: Determine the decimal place time other than the integer place of the latch time; Determine the system minimum time of the device to be adjusted according to the decimal time and the timing frequency of the device to be adjusted; and use the system minimum time as the time difference.
4. The method according to claim 3, characterized in that The determining the system minimum time according to the decimal time and the timing frequency of the device to be adjusted includes: When the decimal time is less than half of the time interval, the decimal time is used as the system minimum time; when the decimal time is greater than half of the time interval, the difference between the time interval and the decimal time is used as the system minimum time.
5. The method according to claim 1, characterized in that The obtaining of the timing frequency of the device to be adjusted and the frequency difference between the reference timing frequency of the reference clock source comprises: Multiple counting of the first timing times of the local clock of the device to be adjusted within a unit time and the second timing times of the reference clock source within a unit time; Determine an average value of the first timing times and the second timing times that are counted multiple times according to the first timing times, the second timing times and an empirical difference of the timing frequency; Based on the average value, the frequency difference is determined.
6. The method according to claim 1, characterized in that The adjusting the local time of the device to be adjusted according to the time difference, the frequency difference, and the time of the reference clock source includes: In the case where the frequency difference includes an integer part and a decimal part, evenly classifying the decimal part of the frequency difference into a plurality of unit times of the device to be adjusted; Allocating the integer part of the frequency difference to each unit time; The local time of the device to be adjusted is adjusted according to the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time.
7. The method according to claim 6, characterized in that The step of evenly classifying the fractional part of the frequency difference into a plurality of unit times of the device to be adjusted comprises: For the decimal part of the Nth quantile, the frequency difference is adjusted to the Mth unit time in every N unit time, where N is a positive integer power of 10 and M is not an integer multiple of 10.
8. The method according to claim 6 or 7, characterized in that: The adjusting the local time of the device to be adjusted according to the integer part of the frequency difference and the decimal part of the frequency difference allocated to each unit time includes: Determine the tasks to be compensated according to the integer part, the decimal part and the number of times the tasks are executed per unit time; the number of the tasks to be compensated is less than the number of times the tasks are executed per unit time; When the task to be compensated is executed, the local time of the device to be adjusted is adjusted.
9. An electronic device, characterized in that: The electronic device comprises a processor coupled to a memory, wherein the processor is configured to execute a computer program or instruction stored in the memory, so that the electronic device implements the method according to any one of claims 1 to 8.
10. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1-8.