Image processing apparatus, image processing method, and electronic device
The image processing device interpolates the input low-resolution video source horizontally and vertically, solving the blur and serration problems of low-resolution video source when displayed on high-resolution displays, achieving efficient image resolution improvement.
Patent Information
- Application Number
- CN202510024842.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-07
- Publication Date
- 2025-05-09
AI Technical Summary
How to improve image resolution to avoid display problems such as blur and jagged when the monitor enters a low-resolution video source.
Through the image processing device, the line cache module, the read-write control module and the interpolation module are used to output and interpolate the image data according to the horizontal magnification, increasing the number of pixels per row and the number of rows per frame, thereby improving the resolution of the image.
Efficient horizontal and vertical interpolation of video sources is achieved, the resolution of the image is improved, the display effect is significantly improved, and blur and jagged problems are avoided.
Smart Images
Figure CN119963400A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to an image processing device, an image processing method and an electronic device. Background Art
[0002] In the field of display technology, resolution is one of the important indicators for measuring display effects. Display resolution refers to the physical resolution of a display, for example, display resolution refers to the number of pixels on a display panel. Image resolution refers to the number of dots in length and width of a video image. For the same video image, the higher the image resolution, the more pixels make up the video image, and the clearer and more realistic the image.
[0003] When different video sources are input to the monitor, different video sources may provide different image resolutions. If the image resolution of the video source is lower than the display resolution, then directly displaying the low-resolution video source on a high-resolution monitor may cause display problems such as blurring and jagged edges. In this scenario, how to improve the image resolution when the monitor outputs the video source is an urgent problem to be solved. Summary of the invention
[0004] The present application provides an image processing device, an image processing method and an electronic device for improving video resolution. The technical solution is as follows:
[0005] On the one hand, an image processing device is provided, which includes: a row cache module, a read-write control module and an interpolation module; the row cache module is used to cache the first image data of the input video in units of rows; the read-write control module is used to control the row cache module to output the first image data according to a horizontal magnification ratio, so that each output row includes the position of a newly added pixel and the original pixel in the first image data, and the horizontal magnification ratio indicates the number of newly added pixels in each row; the interpolation module is used to determine the pixel value of the newly added pixel according to the pixel value of the original pixel in each row output by the row cache module to obtain second image data, so that a display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data.
[0006] In a possible implementation, the read / write control module is configured to determine a first clock cycle of pixels to be added according to the horizontal magnification; and control the line buffer module to output the first image data based on the first clock cycle.
[0007] In a possible implementation, the read-write control module is used to control the row cache module to output the first image data in sequence in the horizontal direction in each second clock cycle, and to control the row cache module to output the data output in the previous clock cycle in each first clock cycle, and the second clock cycle is a clock cycle other than the first clock cycle.
[0008] In a possible implementation, the horizontal magnification is the ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data; the read-write control module is used to assign a corresponding magnification count value to each clock cycle according to the step size of the horizontal magnification, and take the latter clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle.
[0009] In a possible implementation, the read-write control module is used to control the row cache module to output the first image data according to N channels according to the horizontal magnification, where one channel corresponds to one pixel and N is a positive integer; the image processing device also includes: a channel expansion module, used to expand the N-channel data output by the row cache module into M-channel data, where M is a positive integer greater than N; and the interpolation module is used to determine the pixel value of the newly added pixel based on the horizontal magnification and the M-channel data.
[0010] In one possible implementation, the N-channel data includes N pixels output in each clock cycle, and M is twice of N; the channel extension module is used to delay the N pixels output in the previous clock cycle by one clock cycle, so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and the M pixels in each clock cycle are used as the M-channel data.
[0011] In a possible implementation, the interpolation module is used to determine the amplified N pixels of each clock cycle among the M pixels of each clock cycle according to the horizontal magnification, and the amplified N pixels include original pixels and newly added pixels; based on the pixel values of the original pixels among the amplified N pixels, determine the pixel values of the newly added pixels among the amplified N pixels.
[0012] In a possible implementation, the interpolation module is further used to vertically enlarge each frame output by the row cache module according to a vertical magnification ratio to obtain the second image data, wherein the vertical magnification ratio indicates the number of newly added rows in each frame, and the vertical resolution of the second image data is higher than the vertical resolution of the first image data.
[0013] In a possible implementation, the read-write control module is also used to control the row cache module to cache at least two rows of pixel values simultaneously; the interpolation module is used to determine the row position of the newly added row in each frame according to the vertical magnification ratio, and determine the pixel value of the newly added row based on the pixel values of at least two rows cached in the row cache module.
[0014] On the other hand, an image processing method is provided, which includes: caching input first image data in units of lines; outputting the cached first image data according to a horizontal magnification ratio so that each output line includes the position of a newly added pixel and original pixels in the first image data, and the horizontal magnification ratio indicates the number of newly added pixels in each line; determining the pixel value of the newly added pixel based on the pixel value of the original pixel in each output line to obtain second image data, so that a display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data.
[0015] In a possible implementation, outputting the cached first image data according to the horizontal magnification includes: outputting the cached first image data according to N channels according to the horizontal magnification, one channel corresponding to one pixel, and N is a positive integer; determining the pixel value of the newly added pixel according to the pixel value of the original pixel in each row of the output includes: expanding the output N-channel data to M-channel data, where M is a positive integer greater than N; and determining the pixel value of the newly added pixel based on the horizontal magnification and the M-channel data.
[0016] In a possible implementation, the N-channel data includes N pixels output in each clock cycle, and M is twice of N; expanding the output N-channel data to M-channel data includes: delaying the N pixels output in a previous clock cycle by one clock cycle, so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and using the M pixels in each clock cycle as the M-channel data.
[0017] In a possible implementation, based on the horizontal magnification and the M-channel data, the pixel value of the newly added pixel is determined, including: determining the amplified N pixels of each clock cycle among the M pixels of each clock cycle according to the horizontal magnification, the amplified N pixels including original pixels and newly added pixels; based on the pixel values of the original pixels among the amplified N pixels, determining the pixel values of the newly added pixels among the amplified N pixels.
[0018] In a possible implementation, outputting the cached first image data according to the horizontal magnification includes: determining a first clock cycle of pixels to be added according to the horizontal magnification; and outputting the first image data based on the first clock cycle.
[0019] In a possible implementation, the outputting of the first image data based on the first clock cycle includes: in each second clock cycle, outputting the first image data sequentially along the horizontal direction, in each first clock cycle, outputting the data output in the previous clock cycle, and the second clock cycle is a clock cycle other than the first clock cycle.
[0020] In a possible implementation, the horizontal magnification is the ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data; determining the first clock cycle of the to-be-added pixel based on the horizontal magnification includes: allocating a corresponding magnification count value to each clock cycle according to the step size of the horizontal magnification, and taking the second clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle.
[0021] In a possible embodiment, the method further includes: vertically enlarging each output frame according to a vertical magnification ratio to obtain the second image data, wherein the vertical magnification ratio indicates the number of newly added rows in each frame, and the vertical resolution of the second image data is higher than the vertical resolution of the first image data.
[0022] In a possible implementation, the cached first image data includes at least two rows of pixel values; and vertically enlarging each output frame according to the vertical magnification ratio includes: determining the row position of a newly added row in each frame according to the vertical magnification ratio, and determining the pixel value of the newly added row based on the pixel values of at least two cached rows.
[0023] Optionally, the method may be executed by the image processing device described in one aspect.
[0024] In yet another aspect, a display panel is provided, comprising the image processing device as described in the above aspect.
[0025] In another aspect, an electronic device is provided, the electronic device comprising the image processing device as described in the above aspect. For example, the electronic device comprises the display panel as described in the above aspect.
[0026] In summary, the technical solution provided by this application can at least bring the following beneficial effects:
[0027] The technical solution provided in the embodiment of the present application can control the output of image data according to the horizontal magnification ratio, so that the number of pixels in each row of the output is the number of pixels after magnification, that is, the position of the newly added pixels is reserved in advance, thereby making the subsequent interpolation of the newly added pixels more convenient. The interpolation of the newly added pixels is to determine the pixel values of the newly added pixels, which improves the execution efficiency of the horizontal interpolation and achieves an efficient improvement in the horizontal resolution. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0029] Figure 1 is a structural schematic diagram of an image processing device provided in an embodiment of the present application;
[0030] Figure 2 is a structural schematic diagram of another image processing device provided in an embodiment of the present application;
[0031] Figure 3 is a schematic diagram of a channel expansion provided by an embodiment of the present application;
[0032] Figure 4 is a schematic diagram of horizontal interpolation provided by an embodiment of the present application;
[0033] Figure 5 is a structural schematic diagram of another image processing device provided in an embodiment of the present application;
[0034] Figure 6 is a timing diagram of image data input and output provided by an embodiment of the present application;
[0035] Figure 7 It is a flowchart of an image processing method provided in an embodiment of the present application. DETAILED DESCRIPTION
[0036] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0037] In the scenario where a high-resolution display inputs a low-resolution video source, the low-resolution video source needs to be enlarged to a higher resolution. For example, when the video source is input to the display, the resolution of the video source is increased by increasing the number of pixels to achieve a clearer and smoother display effect.
[0038] The resolution of a video source may refer to the resolution of a frame of an image in the video source. The resolution of a frame of an image includes length and width. The length represents the number of pixels included in each row in the horizontal direction, and the width represents the number of pixels included in each column in the vertical direction, that is, the width represents the number of rows included in a frame of an image. For example, if the resolution is 1280*720, it means that there are 1280 pixels in each row in the horizontal direction and 720 pixels in each column in the vertical direction. Since the video source is scanned and displayed for each frame of an image, each frame of an image is scanned and displayed line by line. Therefore, improving the resolution may be to increase the number of pixels included in each row in the horizontal direction and to increase the number of rows included in each frame in the vertical direction.
[0039] The present application embodiment provides an image processing device, see Figure 1 As shown in the structural diagram, the image processing device 00 includes a row cache module 11, a read-write control module 12 and an interpolation module 13. The row cache module 11 is used to cache the input first image data in units of rows, that is, cache pixel values row by row. The first image data may correspond to image data of a frame of an image in a video source, and the image data includes pixel values of each pixel for displaying a frame of an image. Exemplarily, the row cache module 11 may be a static random access memory (SRAM).
[0040] The read / write control module 12 is used to control the row buffer module 11 to output the first image data according to the horizontal magnification ratio, so that each output row includes the position of the newly added pixel and the original pixel in the first image data, and the horizontal magnification ratio indicates the number of newly added pixels in each row. Thus, the number of pixels in each output row is the number of pixels after magnification, that is, the position of the newly added pixel is reserved in advance, so that the subsequent interpolation of the newly added pixel is more convenient, and the execution efficiency of the horizontal interpolation is improved.
[0041] The interpolation module 13 is used to determine the pixel value of the newly added pixel according to the pixel value of the original pixel in each row output by the row buffer module 11, and obtain the second image data, so that the display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data. In this way, the horizontal interpolation of the video source is realized, the horizontal resolution is improved, and the display effect of the second image data is better.
[0042] Among them, interpolation refers to using the pixel values of known neighboring pixels to generate the pixel values of newly added pixels so as to regenerate an image with higher resolution from the original image. The pixel value may refer to the grayscale value in a grayscale image or the three-color value in an RGB image, where RGB represents the three colors red, green, and blue, respectively. Optionally, the pixel value of the newly added pixel is determined by interpolation, and the interpolation method includes but is not limited to: nearest neighbor interpolation, bilinear interpolation, bisquare interpolation, or bicubic interpolation, etc., which is not limited in the embodiments of the present application.
[0043] In a possible implementation, the read / write control module 12 is configured to determine a first clock cycle of pixels to be added according to a horizontal magnification; and control the line buffer module 11 to output the first image data based on the first clock cycle.
[0044] The embodiment of the present application does not limit the method for determining the horizontal magnification, and it is sufficient to indicate the number of newly added pixels in each row. Optionally, the horizontal magnification is the ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data. For example, the horizontal magnification is represented by hor_ratio, hor_ratio = (reg_in_hor_size-1) / (reg_out_hor_size-1), where reg_in_hor_seize is the horizontal resolution of the input video source, that is, the number of pixels included in each row in the horizontal direction, and reg_out_hor_size is the horizontal resolution of the target display, for example, the length of the display resolution of the display module 14.
[0045] It should be noted that in the embodiment of the present application, considering that the horizontal magnification is usually a decimal, the calculation of the decimal part by the computer needs to be expanded to an integer. For example, the horizontal magnification is multiplied by 4095 to expand it to 12 bits, or the horizontal magnification is multiplied by 65536 to expand it to 16 bits. If the horizontal magnification is represented by the ratio of the horizontal resolution of the input video source to the horizontal resolution of the target display, the horizontal magnification is a decimal less than 1, and the maximum value will not exceed 16 bits after multiplying by 65536; if the horizontal magnification is represented by the ratio of the horizontal resolution of the target display to the horizontal resolution of the input video source, the horizontal magnification is a decimal greater than 1, and the maximum value will exceed the representation range of 16 bits after multiplying by 65536, requiring more 17 bits. Therefore, the embodiment of the present application uses the ratio of the horizontal resolution of the input video source to the horizontal resolution of the target display to represent the horizontal magnification, saving the number of bits occupied by the horizontal magnification during the calculation process.
[0046] In the case where the horizontal magnification is the ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data, the read-write control module 12 is used to allocate a corresponding magnification count value to each clock cycle according to the step length of the horizontal magnification, and take the latter clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle. Since the horizontal magnification is the ratio of the horizontal resolution before magnification to the resolution after magnification, the horizontal magnification is a decimal value, and therefore, the magnification count value determined according to the step length of the horizontal magnification is also a decimal value.
[0047] For example, taking hor_ratio=0.875 as an example, the result of allocating the corresponding magnification count value to each clock cycle according to the step length of the horizontal magnification is shown in Table 1 below. In which, the magnification count value of the first clock cycle is initially set to 1, and starting from the second clock cycle, the step length of the horizontal magnification is increased one by one, for example, the magnification count value of the second clock cycle is 1.857, the magnification count value of the third clock cycle is 2.714, and so on.
[0048] Table 1
[0049]
[0050] In Table 1, one address in the row buffer module 11 stores 8 pixels, and 4 pixels are read in each clock cycle, that is, 4-channel output data, pix_ch represents the channel. Since the multiplication count value of the 7th clock cycle is 6.142, the multiplication count value of the 8th clock cycle is 6.999, and the integer part of the multiplication count value of the two clock cycles before and after does not change, the value read in the 8th clock cycle is the same as the value read in the 7th clock cycle, except for address 0. Therefore, the read operation of the row buffer module 11 is controlled according to the hor_ratio change rule, so that the horizontal pixel expansion is completed at address 3.
[0051] After determining the first clock cycle, the read / write control module 12 is used to control the line buffer module 11 to sequentially output the first image data in the horizontal direction in each second clock cycle, and control the line buffer module 11 to output the data output in the previous clock cycle in each first clock cycle. The second clock cycle is a clock cycle other than the first clock cycle. Thus, when the first image data is sequentially output according to the clock cycle, the pixels to be added indicated by the horizontal magnification are evenly added to the first image data according to the clock cycle.
[0052] In a possible implementation, the read / write control module 12 is used to control the row buffer module 11 to output the first image data according to N channels according to the horizontal magnification, where one channel corresponds to one pixel and N is a positive integer. Exemplarily, outputting according to N channels means outputting N pixels per clock cycle. Therefore, when N is greater than 1, the efficiency of data output can be improved by multi-channel data output.
[0053] In the case of multi-channel data output, the embodiment of the present application first expands the multi-channel data to more channel data, interpolates based on the more channel data, and then outputs the original multi-channel data after interpolation. This ensures that the horizontal magnification is not limited by the number of channels. For example, the horizontal magnification may not be a multiple of the number of channels, and because the multi-channel data includes the pixel values of the original pixels required for the difference, no additional register is required to temporarily store the pixel values of the original pixels, which can reduce power consumption and chip area.
[0054] In this case, see Figure 2 A schematic diagram of the structure of another image processing device is shown. The image processing device 00 also includes a display module 14, which is used to make the display panel display according to the second image data. Optionally, the image processing device 00 also includes a channel expansion module 15, which is used to expand the N-channel data output by the row cache module 11 into M-channel data, where M is a positive integer greater than N. Then the interpolation module 13 is used to determine the pixel value of the newly added pixel based on the horizontal magnification and the M-channel data. In this way, the interpolation of the newly added pixels in each row is achieved. Since the M-channel data is expanded, it contains more original pixels than before the expansion, so that more pixel values of the original pixels can be used during interpolation, thereby improving the accuracy of interpolation.
[0055] In one possible implementation, N-channel data includes N pixels output in each clock cycle, where M is twice N; the channel expansion module 15 is used to delay the N pixels output in the previous clock cycle by one clock cycle, so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and the M pixels in each clock cycle are used as M-channel data.
[0056] Exemplarily, when N is 4, M is 8, and the 4-channel data includes 4 pixels output in each clock cycle. The channel expansion module 15 is used to delay the 4 pixels output in the previous clock cycle by one clock cycle, so that the next clock cycle includes both the 4 pixels output in the previous clock cycle and the 4 pixels output in the next clock cycle, and the 8 pixels in each clock cycle are used as the 8-channel data.
[0057] In a possible implementation, the interpolation module 13 is used to determine the amplified N pixels in each clock cycle among the M pixels in each clock cycle according to the horizontal magnification, and the amplified N pixels include original pixels and newly added pixels; based on the pixel values of the original pixels in the amplified N pixels, determine the pixel values of the newly added pixels in the amplified N pixels.
[0058] Take N as 4 and M as 8 as an example, see Figure 3 The schematic diagram of channel expansion is shown in FIG. 1 . The expanded 8-channel data can be Figure 3 As shown in the first table in . Among them, pix_ch1_dly represents the channel obtained by expanding channel 1. Since the 8 pixels corresponding to the 7th clock cycle are repeated after the channel is expanded, the pixel value to be calculated may not be included in the 7th clock cycle during the interpolation process. Therefore, in addition to using the 8 pixels in each clock cycle as 8-channel data, the 8 pixels in each clock cycle can be smoothed to obtain more uniform 8-channel data.
[0059] like Figure 3 As shown, the 7th clock cycle and the 14th clock cycle with repeated pixels in the first table can be deleted, and the 8 pixels in each clock cycle can be extended by one clock cycle to obtain Figure 3 The 8-channel data shown in the second table in the figure is then extended by one clock cycle to obtain Figure 3 The 8-channel data shown in the third table in Figure 3 The 8-channel data shown in the second table in the figure is used as the reference. Figure 3 The 8-channel data shown in the first table and the 8-channel data shown in the third table are integrated into the 8-channel data shown in the second table to fill the blank positions of the 8-channel data shown in the second table, and the obtained Figure 3 The 8-channel data shown in the 4th table is used as the 8-channel data for horizontal interpolation.
[0060] For the 8-channel data obtained by expansion, the interpolation module 13 is used to determine the 4 pixels after amplification in each clock cycle among the 8 pixels in each clock cycle according to the horizontal magnification, and the 4 pixels after amplification include original pixels and newly added pixels; interpolate the newly added pixels based on the pixel values of the original pixels, that is, calculate the pixel values of the newly added pixels based on the pixel values of the original pixels to obtain the interpolated 4-channel data.
[0061] Optionally, the interpolation module 13 is used to filter the original pixels required for interpolation and the positions of the newly added pixels from the 8-channel data by using the change rule of hor_ratio. For example, hor_ratio is counted in a 4-channel manner to obtain the multiplication count value of each channel corresponding to each clock cycle; the pixel value of the original pixel corresponding to the value of the integer part of each multiplication count value is taken, and the position where the integer part of the multiplication count value does not change before and after is taken as the position of the newly added pixel; then the newly added pixel is interpolated according to the pixel value of the original pixel, for example, the decimal part of hor_ratio is used as the weight to calculate the interpolation.
[0062] For example, the result of counting hor_ratio in a 4-channel manner can be as follows: Figure 4 As shown in the first table hor_ratio_cnt in , the value of hor_ratio is increased from top to bottom and from left to right. According to the integer part of the multiplier count value, the following can be obtained: Figure 4 The result of the second table ratio_cnt_integer shown is the 4 pixels corresponding to the 4 channels in each clock cycle after the new pixel is added. For example, the 4 pixels corresponding to the 4 channels in the first clock cycle are: original pixel 1, original pixel 1, original pixel 2 and original pixel 3.
[0063] exist Figure 4 In the second table shown, the repeated positions of the original pixels represent the positions of the newly added pixels. For example, the original pixel 1 of the first channel among the four channels in the first clock cycle repeats the original pixel 1 of the second channel, and the original pixel 1 of the second channel is the newly added pixel. Then, the positions of the original pixels and the newly added pixels corresponding to each clock cycle can be obtained. Among them, the pixel value of the original pixel can be obtained from the extended 8-channel data in a manner of taking the pixel value of the original pixel corresponding to the value of the integer part of each multiplication count value. For example, the original pixel selected from the 8-channel data can be as follows Figure 4 As shown in the third table select pixel in , the pixels in the dark area represent the selected original pixels.
[0064] Take the first column corresponding to the first clock cycle as an example, Figure 4 The integer part of the ratio count value in the first column of the second table ratio_cnt_integer in the table is 1, 1, 2, and 3, which means that the four pixels corresponding to the four channels in the first clock cycle are: pixel 1, pixel 1, pixel 2, and pixel 3. Therefore, Figure 4The three original pixels selected in the first column of the third table select pixel are pixel 1, pixel 2 and pixel 3. The second channel pix_ch 2 is repeated with the first channel pix_ch 1, so the second channel pix_ch 2 is the position of the newly added pixel. Exemplarily, the pixel value of the newly added pixel P1`=P1*β+P2*(1-β), where P1 is the pixel value of pixel 1, P2 is the pixel value of pixel 2, and β is the weight. Alternatively, P1`=P1*(1-β)+P2*β.
[0065] In a possible implementation, the interpolation module 13 is further configured to vertically magnify each frame output by the line buffer module 11 according to the vertical magnification ratio to obtain second image data. In this case, the vertical resolution of the obtained second image data is higher than the vertical resolution of the first image data.
[0066] The embodiment of the present application does not limit the method for determining the vertical magnification ratio, and it is sufficient to indicate the number of newly added rows in each frame. Optionally, the vertical magnification ratio is the ratio of the vertical resolution of the first image data to the vertical resolution of the second image data. For example, the vertical magnification ratio is represented by ver_ratio, ver_ratio = (reg_in_ver_size-1) / (reg_out_ver_size-1), where reg_in_ver_seize is the vertical resolution of the input video source, that is, the number of rows included in each frame in the vertical direction, and reg_out_ver_size is the vertical resolution of the target display, for example, the width of the display resolution of the display module 14.
[0067] In the case where the interpolation module 13 is also used for vertical interpolation, the read / write control module 12 is also used to control the row cache module 11 to cache at least two rows of pixel values at the same time. For example, the row cache module 11 performs a delay operation on each row of the first image data to ensure that the previous row and the current row are aligned so as to perform interpolation in the vertical direction. Then the interpolation module 13 is used to determine the row position of the newly added row in each frame according to the vertical magnification, and determine the pixel value of the newly added row based on the pixel values of at least two rows cached in the row cache module 11, that is, calculate the pixel value of each pixel of the newly added row based on the pixel value of each pixel of at least two rows.
[0068] Optionally, for the implementation method of determining the row position of the newly added row in each frame according to the vertical magnification, reference may be made to the implementation method of determining the position of the newly added pixel in each row according to the horizontal magnification, which will not be described in detail here. For example, a corresponding magnification count value is assigned to each row according to the step length of the vertical magnification, and a new row is inserted between two rows with the same integer part of the magnification count value as the newly added row.
[0069] In the embodiment of the present application, the execution order of vertical interpolation and horizontal interpolation is not limited. For example, for a frame of image, vertical interpolation can be performed first and then horizontal interpolation can be performed on the data after vertical interpolation, or horizontal interpolation can be performed first and then vertical interpolation can be performed on the data after horizontal interpolation, or vertical interpolation and horizontal interpolation can be performed simultaneously.
[0070] In a possible case, the interpolation module 13 includes a horizontal interpolation module 131 and a vertical interpolation module 132. For example, vertical interpolation is performed first and then horizontal interpolation is performed. Figure 5 In the image processing device shown, the read-write control module 12 controls the row buffer module 11 to output data according to 4 channels according to the horizontal magnification; the row buffer module 11 outputs the 4-channel data to the vertical interpolation module 132; the vertical interpolation module 132 performs vertical interpolation according to the vertical magnification, and outputs the 4-channel data after vertical interpolation to the channel expansion module 15; the channel expansion module 15 expands the 4-channel data into 8-channel data; the horizontal interpolation module 131 performs horizontal interpolation on the 8-channel data according to the horizontal magnification, and outputs the horizontal interpolation according to 4 channels, and finally the display panel displays the image with high resolution.
[0071] In the embodiment of the present application, the frequency of the line field of the low-resolution input and the high-resolution output of the video source is the same, and the timing diagram of the input and output can be as follows: Figure 6 As shown. in_vs represents the time axis of the input vertical synchronization signal, in_hs represents the time axis of the input horizontal synchronization signal, and in_de represents the time axis of the input valid data. out_vs represents the time axis of the output vertical synchronization signal, out_hs represents the time axis of the output horizontal synchronization signal, and out_de represents the time axis of the output valid data.
[0072] Among them, in_htotal is the total horizontal synchronization time of the input video, in_hact is the effective horizontal synchronization time of the input video, in_hbp is the horizontal back shoulder of the input video, in_hfp is the horizontal front shoulder of the input video, in_vtotal is the total vertical synchronization time of the input video, in_vact is the effective vertical synchronization time of the input video, in_vbp is the vertical back shoulder of the input video, and in_vfp is the vertical front shoulder of the input video.
[0073] Correspondingly, out_htotal is the total horizontal synchronization time of the output video, out_hact is the effective horizontal synchronization time of the output video, out_hbp is the horizontal back shoulder of the output video, in_hfp is the horizontal front shoulder of the output video, out_vtotal is the total vertical synchronization time of the output video, out_vact is the effective vertical synchronization time of the output video, out_vbp is the vertical back shoulder of the output video, and out_vfp is the vertical front shoulder of the output video.
[0074] Among them, in_htotal=in_hbp+in_hact+in_hfp=in_hbp+reg_in_hor_size / 4+in_hfp,in_vtotal=in_vbp+in_vact+in_vfp=in_vbp+reg_in_ver_size+in_vfp。 The parameters of the input video are all known parameters, and the parameters of the output video can be calculated as follows. out_vbp=in_vbp*(out_vact / in_vact), out_vtotal=(in_vtotal*out_vact+in_vact-1) / in_vact,out_htotal=(in_htotal*in_vtotal) / out_vtotal,out_hbp=in_hbp。 The values of out_vfp and out_hfp are variable to ensure that the frequency of the input and output lines is the same.
[0075] In summary, in the image processing device provided by the embodiment of the present application, the read-write control module can control the data output according to the magnification in the horizontal direction, so that the number of pixels output is the number of pixels after magnification, that is, the position of the newly added pixels is reserved in advance, so that the subsequent interpolation of the newly added pixels is more convenient, and the interpolation of the newly added pixels is to determine the pixel value of the newly added pixels, which improves the execution efficiency of the horizontal interpolation. And in the horizontal interpolation, the amplification of any magnification can be achieved by channel expansion. Since no additional registers are required, the circuit hardware consumption is small and the power consumption is low. In addition, the position of the newly added pixels or the newly added rows is obtained by counting the magnification, so that the positions of the newly added pixels or the newly added rows are evenly distributed according to the proportion of the magnification, so that the interpolation effect is smoother and the loss of video details is small.
[0076] See also Figure 7 , Figure 7 This is a flow chart of an image processing method provided in an embodiment of the present application. Figure 7 As shown, the image processing method includes but is not limited to the following steps 701-703.
[0077] Step 701: Cache the input first image data in units of lines.
[0078] Step 702, outputting the cached first image data according to the horizontal magnification so that each output line includes the position of the newly added pixels and the original pixels in the first image data, and the horizontal magnification indicates the number of newly added pixels in each line.
[0079] Step 703, determining the pixel value of the newly added pixel according to the pixel value of the original pixel in each output row, and obtaining the second image data, so that the display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data.
[0080] In a possible implementation, outputting the cached first image data according to the horizontal magnification includes: outputting the first image data according to N channels according to the horizontal magnification, one channel corresponding to one pixel, and N is a positive integer; determining the pixel value of the newly added pixel according to the pixel value of the original pixel in each row of the output includes: expanding the output N-channel data to M-channel data, where M is a positive integer greater than N; and determining the pixel value of the newly added pixel based on the horizontal magnification and the M-channel data.
[0081] In a possible implementation, the N-channel data includes N pixels output in each clock cycle, and M is twice of N; expanding the output N-channel data to M-channel data includes: delaying the N pixels output in a previous clock cycle by one clock cycle, so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and using the M pixels in each clock cycle as the M-channel data.
[0082] In a possible implementation, based on the horizontal magnification and the M-channel data, the pixel value of the newly added pixel is determined, including: determining the amplified N pixels of each clock cycle among the M pixels of each clock cycle according to the horizontal magnification, the amplified N pixels including original pixels and newly added pixels; based on the pixel values of the original pixels among the amplified N pixels, determining the pixel values of the newly added pixels among the amplified N pixels.
[0083] In a possible implementation, outputting the cached first image data according to the horizontal magnification includes: determining a first clock cycle of pixels to be added according to the horizontal magnification; and outputting the first image data based on the first clock cycle.
[0084] In a possible implementation, the outputting of the first image data based on the first clock cycle includes: in each second clock cycle, outputting the first image data sequentially along the horizontal direction, in each first clock cycle, outputting the data output in the previous clock cycle, and the second clock cycle is a clock cycle other than the first clock cycle.
[0085] In a possible implementation, the horizontal magnification is the ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data; determining the first clock cycle of the to-be-added pixel based on the horizontal magnification includes: allocating a corresponding magnification count value to each clock cycle according to the step size of the horizontal magnification, and taking the second clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle.
[0086] In a possible embodiment, the method further includes: vertically enlarging each output frame according to a vertical magnification ratio to obtain the second image data, wherein the vertical magnification ratio indicates the number of newly added rows in each frame, and the vertical resolution of the second image data is higher than the vertical resolution of the first image data.
[0087] In a possible implementation, the cached first image data includes at least two rows of pixel values; and vertically enlarging each output frame according to the vertical magnification ratio includes: determining the row position of a newly added row in each frame according to the vertical magnification ratio, and determining the pixel value of the newly added row based on the pixel values of at least two cached rows.
[0088] Optionally, the image processing method may be executed by any of the above-mentioned image processing devices. Other implementations of the image processing method may refer to the implementations of the above-mentioned image processing devices, which will not be described in detail here.
[0089] The embodiment of the present application provides a display panel, which includes an image processing device 00 as shown above. For example, the image processing device 00 is a display driver chip, which is used to execute Figure 7 Thus, when the image resolution of the video source input to the display panel is lower than the display resolution of the display panel, the image processing device 00 can improve the image resolution of the video source during the process of the video source inputting the display, that is, enhance the image details by increasing the number of pixels of the image, so that the resolution of the image finally output by the display is higher than the image resolution of the video source, achieving a clearer and smoother display effect, and meeting the market demand for high-quality visual experience.
[0090] An electronic device provided in an embodiment of the present application includes any of the above-mentioned image processing devices 00, for example, the above-mentioned display panel. Thus, the electronic device can display high-resolution video images through the image processing device 00.
[0091] It should be understood that the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure, and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be the common meanings understood by people with ordinary skills in the field to which the present disclosure belongs.
[0092] For example, the words "first", "second" or "third" and similar words used in the patent application specification and claims of this disclosure do not indicate any order, quantity or importance, but are merely used to distinguish different components.
[0093] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.
[0094] Words such as “include” or “comprising” and the like mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.
[0095] "Up", "down", "left" or "right" etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly. "Connected" or "coupled" refers to electrical connection.
[0096] "And / or" indicates that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship.
[0097] Technicians in the relevant field can clearly understand that for the convenience and simplicity of description, the specific working processes of the gate drive circuit, shift register unit, each circuit and each sub-circuit described above can refer to the corresponding processes in the method embodiment and will not be repeated here.
[0098] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. An image processing device, characterized in that: The image processing device comprises: a line buffer module, a read-write control module and an interpolation module; The line buffer module is used to buffer the input first image data in units of lines; The read / write control module is used to control the row buffer module to output the first image data according to the horizontal magnification ratio, so that each row of the output includes the position of the newly added pixels and the original pixels in the first image data, and the horizontal magnification ratio indicates the number of the newly added pixels in each row; The interpolation module is used to determine the pixel value of the newly added pixel according to the pixel value of the original pixel in each row output by the row cache module, and obtain the second image data, so that the display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data.
2. The image processing device according to claim 1, characterized in that The read / write control module is used to control the line buffer module to output the first image data according to N channels according to the horizontal magnification, where one channel corresponds to one pixel, and N is a positive integer; The image processing device further includes: a channel expansion module, used to expand the N-channel data output by the line buffer module into M-channel data, where M is a positive integer greater than N; The interpolation module is used to determine the pixel value of the newly added pixel based on the horizontal magnification and the M channel data.
3. The image processing device according to claim 2, characterized in that: The N-channel data includes N pixels output in each clock cycle, where M is twice of N; the channel extension module is used to delay the N pixels output in the previous clock cycle by one clock cycle, so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and the M pixels in each clock cycle are used as the M-channel data.
4. The image processing device according to claim 2, characterized in that: The interpolation module is used to determine the N pixels after amplification in each clock cycle among the M pixels in each clock cycle according to the horizontal magnification, and the N pixels after amplification include original pixels and newly added pixels; based on the pixel values of the original pixels in the amplified N pixels, determine the pixel values of the newly added pixels in the amplified N pixels.
5. The image processing device according to any one of claims 1 to 4, characterized in that: The read / write control module is used to determine a first clock cycle of pixels to be added according to the horizontal magnification; and control the line buffer module to output the first image data based on the first clock cycle.
6. The image processing device according to claim 5, characterized in that: The read-write control module is used to control the row cache module to output the first image data in sequence in the horizontal direction in each second clock cycle, and to control the row cache module to output the data output in the previous clock cycle in each first clock cycle, and the second clock cycle is a clock cycle other than the first clock cycle.
7. The image processing device according to claim 5, characterized in that: The horizontal magnification is a ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data; The read-write control module is used to allocate a corresponding magnification count value to each clock cycle according to the step size of the horizontal magnification, and use the latter clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle.
8. The image processing device according to any one of claims 1 to 4, characterized in that: The interpolation module is further used to vertically enlarge each frame output by the line buffer module according to a vertical magnification ratio to obtain the second image data, wherein the vertical magnification ratio indicates the number of newly added lines in each frame, and the vertical resolution of the second image data is higher than the vertical resolution of the first image data.
9. The image processing device according to claim 8, characterized in that: The read / write control module is further used to control the row buffer module to buffer pixel values of at least two rows simultaneously; The interpolation module is used to determine the row position of the newly added row in each frame according to the vertical magnification, and determine the pixel value of the newly added row based on the pixel values of at least two rows cached in the row cache module.
10. An image processing method, characterized in that: The method comprises: Buffering the input first image data in units of lines; Outputting the cached first image data according to a horizontal magnification ratio so that each output line includes positions of newly added pixels and original pixels in the first image data, wherein the horizontal magnification ratio indicates the number of newly added pixels in each line; The pixel values of the newly added pixels are determined according to the pixel values of the original pixels in each output row to obtain second image data so that the display panel displays according to the second image data, and the horizontal resolution of the second image data is higher than the horizontal resolution of the first image data.
11. The image processing method according to claim 10, characterized in that: The step of outputting the cached first image data according to the horizontal magnification ratio includes: Outputting the cached first image data according to the horizontal magnification in N channels, one channel corresponds to one pixel, and N is a positive integer; The step of determining the pixel value of the newly added pixel according to the pixel value of the original pixel in each row of the output includes: Expand the output N-channel data to M-channel data, where M is a positive integer greater than N; Based on the horizontal magnification and the M channel data, the pixel value of the newly added pixel is determined.
12. The image processing method according to claim 11, characterized in that: The N-channel data includes N pixels output in each clock cycle, and M is twice of N; The method of expanding the output N-channel data into M-channel data includes: delaying the N pixels output in the previous clock cycle by one clock cycle so that the next clock cycle includes both the N pixels output in the previous clock cycle and the N pixels output in the next clock cycle, and using the M pixels in each clock cycle as the M-channel data.
13. The image processing method according to claim 11, characterized in that: The method of determining the pixel value of the newly added pixel based on the horizontal magnification and the M channel data includes: determining the amplified N pixels of each clock cycle among the M pixels of each clock cycle according to the horizontal magnification, wherein the amplified N pixels include original pixels and newly added pixels; and determining the pixel value of the newly added pixel among the amplified N pixels based on the pixel value of the original pixel among the amplified N pixels.
14. The image processing method according to claim 10, characterized in that: The outputting of the cached first image data according to the horizontal magnification includes: determining a first clock cycle of pixels to be added according to the horizontal magnification; and outputting the first image data based on the first clock cycle.
15. The image processing method according to claim 14, characterized in that: The outputting of the first image data based on the first clock cycle includes: in each second clock cycle, outputting the first image data in sequence along the horizontal direction, in each first clock cycle, outputting the data output in the previous clock cycle, and the second clock cycle is a clock cycle other than the first clock cycle.
16. The image processing method according to claim 14, characterized in that: The horizontal magnification is a ratio of the horizontal resolution of the first image data to the horizontal resolution of the second image data; The method of determining the first clock cycle of the newly added pixels according to the horizontal magnification includes: allocating a corresponding magnification count value to each clock cycle according to the step size of the horizontal magnification, and taking the latter clock cycle of two adjacent clock cycles with the same integer part of the magnification count value as the first clock cycle.
17. An electronic device, comprising the image processing device according to any one of claims 1 to 9.