Integrated circuit electric energy state detection circuit

Abstract

The invention discloses an integrated circuit electric energy state detection circuit, which relates to the technical field of integrated circuits, and comprises a micro-control module which drives an integrated circuit module to work and detects response time of the integrated circuit module from starting to stable output through a change detection module and a state judgment module. The micro-control module controls the timing module to perform timing according to the response time according to the response time, then when the integrated circuit module is driven again to start, the abnormal state of output signals of the change detection module and the state judgment module is judged according to the cooperation of the abnormal judgment module and the timing module, the response duration is detected, and after the output of the integrated circuit module is stable, the timing module performs timing. And whether the output electric energy of the integrated circuit has unstable change is detected. The integrated circuit electric energy state detection circuit can detect and judge the electric energy state and the response state of the integrated circuit module in time, and human resource requirements are reduced.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to an integrated circuit power state detection circuit. Background Art

[0002] Integrated Circuit (IC) is a kind of microelectronic device or component. It is made by interconnecting the required transistors, resistors, capacitors, inductors and other components and wiring using a certain process, and then fabricated on a semiconductor wafer or dielectric substrate and packaged in a tube shell to form a microstructure with the required circuit function. In the prior art, in order to detect the working state of the integrated circuit, relevant voltage detection devices and oscilloscopes are generally used to detect the power state of the integrated circuit when it is started and stabilized. To detect the response time of the integrated circuit, relevant detection personnel are required to monitor in real time, which makes it impossible to detect the power change state of the integrated circuit in time. When the response time of the integrated circuit cannot be known, it is impossible to automatically determine whether the response time of the integrated circuit is normal, so it needs to be improved. Summary of the invention

[0003] The embodiment of the present invention provides an integrated circuit power state detection circuit to solve the problems raised in the above background technology.

[0004] According to an embodiment of the present invention, there is provided an integrated circuit power state detection circuit, comprising: a power module, configured to perform voltage stabilization and filtering processing on the connected direct current power and output a first power; The integrated circuit module is connected to the power module, the microcontroller module and the abnormality judgment module, and is used to receive the first electric energy and start and provide DC voltage regulation when receiving the driving signal output by the microcontroller module, and stop working when receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module; A microcontroller module is connected to the timing module, the state judgment module and the abnormality judgment module, and is used to provide a driving signal and perform rectification and filtering processing on the driving signal, output a trigger signal, start timing when providing the driving signal for the first time, and when receiving the first state signal output by the state judgment module, stop timing and set the response time and output the first adjustment signal according to the timing time, set the timing duration of the timing module to the timing time, and receive the first abnormality signal and the second abnormality signal; The change detection module is connected to the integrated circuit module and the microcontroller module, and is used to perform voltage sampling on the DC voltage regulator, and upon receiving a trigger signal, perform voltage change detection on the sampled signal and output a detection signal; A state judgment module, connected to the change detection module, is used to set a comparison level and output a first state signal when the potential of the received detection signal is zero; The processing module is connected to the microcontroller module and is used to perform self-locking processing on the trigger signal and output a first control signal when the trigger signal is received again during the signal self-locking period; A timing module, connected to the processing module and the power module, for receiving the first electric energy and starting the timing operation and setting the response time when receiving the first control signal and the first adjustment signal, and outputting the second control signal after the timing ends; The abnormality judgment module is connected to the timing module and the state judgment module, and is used to judge that the response time of the integrated circuit module exceeds the set response time when the second control signal is received and the first state signal is not received, and output the first abnormality signal. When the first state signal is not received during the DC voltage stabilization period output by the integrated circuit module, a second abnormality signal will be output.

[0005] As a further solution of the present invention: the power module includes a power interface, a voltage regulating device and a first capacitor; the integrated circuit module includes an integrated circuit device, a first logic chip and a first trigger; the microcontroller module includes a first controller; Preferably, the first end and the second end of the power supply interface are respectively connected to the first end and the second end of the voltage regulating device, the third end of the voltage regulating device is connected to the VCC end of the integrated circuit device and is connected to the fourth end of the voltage regulating device, the GND end of the integrated circuit device, the D end of the first trigger and the ground end through the first capacitor, the PWM end of the integrated circuit device is connected to the Y end of the first logic chip, the B end of the first logic chip is connected to the IO2 end of the first controller and the anode of the third diode, the cathode of the third diode is connected to the change detection module and is grounded through the fifth capacitor, the A end of the first logic chip is connected to the Q1 end of the first trigger, and the CLK end of the first trigger is connected to the abnormality judgment module.

[0006] As a further solution of the present invention: the change detection module includes a first resistor, a second resistor, a first analog switch, a first diode, a second diode, a first comparator and a second capacitor; Preferably, one end of the first resistor is connected to the IN end of the first analog switch and is connected to one end of the second capacitor and the ground end through the second resistor, the other end of the first resistor is connected to the OUT end of the integrated circuit device, the other end of the second capacitor is connected to the inverting end of the first comparator and the cathode of the second diode, the anode of the second diode is connected to the anode of the first diode and the OUT end of the first analog switch, the CTRL end of the first analog switch is connected to the cathode of the third diode, the cathode of the first diode is connected to the non-inverting end of the first comparator, and the output end of the first comparator is connected to the status judgment module.

[0007] As a further solution of the present invention: the state judgment module includes a second comparator, a first battery, a third capacitor, a first potentiometer, a third comparator, a fourth capacitor, a second potentiometer, a second battery and a second logic chip; Preferably, the in-phase end of the second comparator is connected to the inverting end of the third comparator, the inverting end of the second comparator is connected to the slider end of the first potentiometer and is connected to one end of the first potentiometer, the cathode of the first battery and the ground through the third capacitor, the anode of the first battery is connected to the other end of the first potentiometer, the in-phase end of the third comparator is connected to the slider end of the second potentiometer and is connected to one end of the second potentiometer, the anode of the second battery and the ground through the fourth capacitor, the cathode of the second battery is connected to the other end of the second potentiometer, the output end of the second comparator and the output end of the third comparator are respectively connected to the A end and the B end of the second logic chip, and the Y end of the second logic chip is connected to the IO1 end of the first controller and the abnormality judgment module.

[0008] As a further solution of the present invention: the abnormality judgment module includes a fourth diode, a fifth diode, a sixth diode, a seventh diode, an eighth diode, a ninth diode, a third logic chip, a fourth logic chip, a fifth logic chip and a first inverter; Preferably, the cathode of the fourth diode is connected to the cathode of the fifth diode and the CLK terminal of the first trigger, the anode of the fourth diode is connected to the Y terminal of the third logic chip, the anode of the sixth diode and the IO3 terminal of the first controller, the anode of the fifth diode is connected to the Y terminal of the fifth logic chip and the IO4 terminal of the first controller, the A terminal of the third logic chip is connected to the A terminal of the fourth logic chip and the timing module, the B terminal of the third logic chip is connected to the cathode of the sixth diode and the cathode of the seventh diode, the anode of the seventh diode is connected to the output terminal of the first inverter and the A terminal of the fifth logic chip, the Y terminal of the fourth logic chip is connected to the B terminal of the fifth logic chip and the anode of the eighth diode, the cathode of the eighth diode is connected to the cathode of the ninth diode and the B terminal of the fourth logic chip, and the anode of the ninth diode is connected to the input terminal of the first inverter and the Y terminal of the second logic chip.

[0009] As a further solution of the present invention: the timing module includes a first power tube, a third resistor, a second power tube, a sixth capacitor, a fourth resistor, a first timer and a seventh capacitor; Preferably, the drain of the first power tube is connected to the third end of the voltage regulating device, the source of the first power tube is connected to the fourth end and the eighth end of the first timer and is connected to the drain of the second power tube through the third resistor, the source of the second power tube is connected to one end of the fourth resistor, the sixth end and the second end of the first timer through the sixth capacitor, the fifth end of the first timer is connected to the first end of the first timer, the other end of the fourth resistor and the ground through the seventh capacitor, the third end of the first timer is connected to the A end of the third logic chip, the gate of the second power tube is connected to the IO5 end of the first controller, and the gate of the first power tube is connected to the processing module.

[0010] As a further solution of the present invention: the processing module includes a self-locking device and a sixth logic chip; Preferably, the input end of the self-locking device is connected to the B end of the sixth logic chip and the cathode of the third diode, the output end of the self-locking device is connected to the A end of the sixth logic chip, and the Y end of the sixth logic chip is connected to the gate of the first power tube.

[0011] Compared with the prior art, the beneficial effects of the present invention are as follows: the integrated circuit power state detection circuit of the present invention can drive the operation of the integrated circuit module through the microcontrol module, and the response time of the integrated circuit module from the start to stable output can be detected by the change detection module and the state judgment module, and the microcontrol module adjusts the timing time of the timing module according to the response time, so that the timing module is timed according to the response time, so that when the microcontrol module drives the integrated circuit module to start working again, the abnormal state of the output signal of the change detection module and the state judgment module can be judged according to the abnormal judgment module in cooperation with the timing module, that is, when the duration of the stable output of the integrated circuit module exceeds the response time, the first abnormal signal is output, and after the integrated circuit module outputs stably, it will detect whether the output power of the integrated circuit changes unstably and output the second abnormal signal when it changes, and the signal is received by the microcontrol module, so that the power state and response state of the integrated circuit module can be detected and judged in time, thereby reducing the demand for human resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0013] Figure 1 A schematic block diagram of a principle of an integrated circuit power state detection circuit provided by an embodiment of the present invention.

[0014] Figure 2 A circuit diagram of an integrated circuit power state detection circuit provided by an embodiment of the present invention.

[0015] Figure 3 A circuit diagram of a timing module provided in an embodiment of the present invention.

[0016] Figure 4 A circuit diagram of a processing module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] In one embodiment, see Figure 1 , an integrated circuit power state detection circuit, comprising: a power module 1, for performing voltage stabilization and filtering processing on the connected direct current power and outputting the first power; Power module 1, integrated circuit module 2, microcontroller module 3, change detection module 4, state judgment module 5, processing module 6, timing module 7 and abnormality judgment module 8 Specifically, the integrated circuit module 2 is connected to the power module 1, the micro-control module 3 and the abnormality judgment module 8, and is used to receive the first electric energy and start and provide DC voltage regulation when receiving the driving signal output by the micro-control module 3, and stop working when receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module 8; The microcontroller module 3 is connected to the timing module 7, the state judgment module 5 and the abnormality judgment module 8, and is used to provide a driving signal and perform rectification and filtering processing on the driving signal, output a trigger signal, start timing when providing the driving signal for the first time, and when receiving the first state signal output by the state judgment module 5, stop timing and set the response time and output the first adjustment signal according to the timing time, set the timing duration of the timing module 7 to the timing time, and receive the first abnormality signal and the second abnormality signal; The change detection module 4 is connected to the integrated circuit module 2 and the microcontroller module 3, and is used to perform voltage sampling on the DC voltage regulator, and upon receiving a trigger signal, perform voltage change detection on the sampled signal and output a detection signal; The state judgment module 5 is connected to the change detection module 4 and is used to set the comparison level and output a first state signal when the potential of the received detection signal is zero; The processing module 6 is connected to the microcontroller module 3 and is used to perform self-locking processing on the trigger signal and output a first control signal when the trigger signal is received again during the signal self-locking period; The timing module 7 is connected to the processing module 6 and the power module 1, and is used to receive the first electric energy and start the timing operation and set the response time when receiving the first control signal and the first adjustment signal, and output the second control signal after the timing ends; The abnormality judgment module 8 is connected to the timing module 7 and the state judgment module 5, and is used to judge that the response time of the integrated circuit module 2 exceeds the set response time when the second control signal is received and the first state signal is not received, and output the first abnormality signal. When the first state signal is not received during the DC voltage stabilization period output by the integrated circuit module 2, a second abnormality signal will be output.

[0019] In a specific embodiment, the power supply module 1 can adopt a power supply circuit composed of a power supply interface, a voltage regulating device and a capacitor, can access DC power and perform voltage stabilization and filtering processing; the integrated circuit module 2 can adopt an integrated circuit composed of an integrated chip that can perform voltage stabilization and provide DC voltage stabilization upon receiving a driving signal, and can perform voltage stabilization when receiving a signal; the micro-control module 3 can adopt a micro-control circuit composed of a single-chip microcomputer, a diode and a capacitor, which integrates many components such as an arithmetic unit, a controller, a memory, and an input and output device to realize signal processing, data storage, module control, timing control and other functions, and also performs rectification and filtering processing on the input signal; the change detection module 4 can adopt a change detection circuit composed of a resistor, an analog switch, a comparator, a capacitor, etc., which can perform voltage sampling, signal transmission and voltage change detection; the state judgment module 5 can adopt a state judgment circuit composed of a comparator, a battery, a capacitor, a logic chip, etc. The circuit is disconnected, and the comparison level can be set. By reasonably selecting the comparison level, the sensitivity of the voltage change detection of the integrated circuit module 2 can be set, and when the signal potential output by the change detection module 4 is zero, a high-level state signal is output; the above-mentioned processing module 6 can adopt a processing circuit composed of a self-locking device and a logic chip, which can perform signal self-locking and output a high-level state signal when receiving the signal output by the micro-control module 3 for the second time; the above-mentioned timing module 7 can adopt a timing circuit composed of a field effect tube, a capacitor, a timer, etc., and the micro-control module 3 can adjust the timing time and perform timing work, output a low-level state signal during the timing period, and output a high-level state signal after the timing ends; the above-mentioned abnormal judgment module 8 can adopt an abnormal judgment circuit composed of a logic chip, an inverter and a diode, which can detect whether the response time of the integrated circuit exceeds the response time under normal operation, and detect whether the output voltage floats after the output of the integrated circuit module 2 is stable.

[0020] In another embodiment, see Figure 1 , Figure 2 , Figure 3 and Figure 4, the power module 1 includes a power interface, a voltage regulating device and a first capacitor C1; the integrated circuit module 2 includes an integrated circuit device IC1, a first logic chip J1 and a first trigger U2; the micro control module 3 includes a first controller U1; Specifically, the first end and the second end of the power supply interface are respectively connected to the first end and the second end of the voltage regulator, the third end of the voltage regulator is connected to the VCC end of the integrated circuit device IC1 and is connected to the fourth end of the voltage regulator, the GND end of the integrated circuit device IC1, the D end and the ground end of the first trigger U2 through the first capacitor C1, the PWM end of the integrated circuit device IC1 is connected to the Y end of the first logic chip J1, the B end of the first logic chip J1 is connected to the IO2 end of the first controller U1 and the anode of the third diode, the cathode of the third diode is connected to the change detection module 4 and is grounded through the fifth capacitor, the A end of the first logic chip J1 is connected to the Q1 end of the first trigger U2, and the CLK end of the first trigger U2 is connected to the abnormality judgment module 8.

[0021] In a specific embodiment, the above-mentioned voltage stabilization and adjustment device can be composed of a 7812 voltage regulator; the above-mentioned integrated circuit device IC1 can be an integrated chip that can perform voltage stabilization and adjustment upon receiving a driving signal and provide DC voltage stabilization; the above-mentioned first trigger U2 can be a D trigger; the above-mentioned first logic chip J1 can be an AND gate chip; the above-mentioned first controller U1 can be an STM32 microcontroller.

[0022] Further, the change detection module 4 includes a first resistor R1, a second resistor R2, a first analog switch U3, a first diode D1, a second diode D2, a first comparator A1 and a second capacitor C2; Specifically, one end of the first resistor R1 is connected to the IN end of the first analog switch U3 and is connected to one end of the second capacitor C2 and the ground end through the second resistor R2, the other end of the first resistor is connected to the OUT end of the integrated circuit device IC1, the other end of the second capacitor C2 is connected to the inverting end of the first comparator A1 and the cathode of the second diode D2, the anode of the second diode D2 is connected to the anode of the first diode D1 and the OUT end of the first analog switch U3, the CTRL end of the first analog switch U3 is connected to the cathode of the third diode, the cathode of the first diode D1 is connected to the non-inverting end of the first comparator A1, and the output end of the first comparator A1 is connected to the state judgment module 5.

[0023] In a specific embodiment, the first resistor R1 and the second resistor R2 perform voltage sampling; the first analog switch U3 may use a CD4066 chip; the first comparator A1 may use an LM358 comparator, the first comparator A1 is powered by positive and negative power supplies, and cooperates with the first diode D1, the second diode D2 and the second capacitor C2 to detect signal voltage changes.

[0024] Further, the state judgment module 5 includes a second comparator A2, a first battery BT1, a third capacitor C3, a first potentiometer RP1, a third comparator A3, a fourth capacitor C4, a second potentiometer RP2, a second battery BT2 and a second logic chip J2; Specifically, the in-phase end of the second comparator A2 is connected to the inverting end of the third comparator A3, the inverting end of the second comparator A2 is connected to the slider end of the first potentiometer RP1 and is connected to one end of the first potentiometer RP1, the cathode of the first battery BT1 and the ground end through the third capacitor C3, the anode of the first battery BT1 is connected to the other end of the first potentiometer RP1, the in-phase end of the third comparator A3 is connected to the slider end of the second potentiometer RP2 and is connected to one end of the second potentiometer RP2, the anode of the second battery BT2 and the ground end through the fourth capacitor C4, the cathode of the second battery BT2 is connected to the other end of the second potentiometer RP2, the output end of the second comparator A2 and the output end of the third comparator A3 are respectively connected to the A end and the B end of the second logic chip J2, and the Y end of the second logic chip J2 is connected to the IO1 end of the first controller U1 and the abnormality judgment module 8.

[0025] In a specific embodiment, the third capacitor C3, the first potentiometer RP1 and the first battery BT1 provide a positive voltage, the fourth capacitor C4, the second potentiometer RP2 and the second battery BT2 provide a negative voltage, and the absolute value of the negative voltage is equal to the positive voltage; the second comparator A2 and the third comparator A3 can both use LM358 comparators; the second logic chip J2 can use a NOR gate chip.

[0026] Further, the abnormality judgment module 8 includes a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, an eighth diode D8, a ninth diode D9, a third logic chip J3, a fourth logic chip J4, a fifth logic chip J5 and a first inverter INV1; Specifically, the cathode of the fourth diode D4 is connected to the cathode of the fifth diode D5 and the CLK terminal of the first trigger U2, the anode of the fourth diode D4 is connected to the Y terminal of the third logic chip J3, the anode of the sixth diode D6 and the IO3 terminal of the first controller U1, the anode of the fifth diode D5 is connected to the Y terminal of the fifth logic chip J5 and the IO4 terminal of the first controller U1, the A terminal of the third logic chip J3 is connected to the A terminal of the fourth logic chip J4 and the timing module 7, the B terminal of the third logic chip J3 is connected to the cathode of the sixth diode D6 and the cathode of the seventh diode D7, the anode of the seventh diode D7 is connected to the output terminal of the first inverter INV1 and the A terminal of the fifth logic chip J5, the Y terminal of the fourth logic chip J4 is connected to the B terminal of the fifth logic chip J5 and the anode of the eighth diode D8, the cathode of the eighth diode D8 is connected to the cathode of the ninth diode D9 and the B terminal of the fourth logic chip J4, and the anode of the ninth diode D9 is connected to the input terminal of the first inverter INV1 and the Y terminal of the second logic chip J2.

[0027] In a specific embodiment, the third logic chip J3 can be used as an AND gate chip, and cooperate with the seventh diode D7 and the sixth diode D6 for self-locking to detect whether the response time of the integrated circuit module 2 is abnormal; the fourth logic chip J4 and the fifth logic chip J5 can both be used as AND gate chips, and the first inverter INV1 can be used as a NOT gate chip. The fourth logic chip J4 cooperates with the ninth diode D9 and the eighth diode D8 for self-locking, and cooperates with the first inverter INV1 and the fifth logic chip J5 to detect voltage changes.

[0028] Further, the timing module 7 includes a first power tube Q1, a third resistor R3, a second power tube Q2, a sixth capacitor C6, a fourth resistor R4, a first timer U4 and a seventh capacitor C7; Specifically, the drain of the first power tube Q1 is connected to the third end of the voltage regulating device, the source of the first power tube Q1 is connected to the fourth end and the eighth end of the first timer U4 and is connected to the drain of the second power tube Q2 through the third resistor R3, the source of the second power tube Q2 is connected to one end of the fourth resistor R4, the sixth end and the second end of the first timer U4 through the sixth capacitor C6, the fifth end of the first timer U4 is connected to the first end of the first timer U4, the other end of the fourth resistor R4 and the ground end through the seventh capacitor C7, the third end of the first timer U4 is connected to the A end of the third logic chip J3, the gate of the second power tube Q2 is connected to the IO5 end of the first controller U1, and the gate of the first power tube Q1 is connected to the processing module 6.

[0029] In a specific embodiment, the first power tube Q1 and the second power tube Q2 can both be N-channel field effect tubes. The first power tube Q1 transmits electric energy, and the second power tube Q2 cooperates with the third resistor R3, the sixth capacitor C6 and the fourth resistor R4 to set the timing time; the first timer U4 can use the NE555 chip.

[0030] Further, the processing module 6 includes a self-locking device and a sixth logic chip J6; Specifically, the input end of the self-locking device is connected to the B end of the sixth logic chip J6 and the cathode of the third diode, the output end of the self-locking device is connected to the A end of the sixth logic chip J6, and the Y end of the sixth logic chip J6 is connected to the gate of the first power tube Q1.

[0031] In a specific embodiment, the self-locking device may be composed of a transistor and a resistor, which self-locks the input high-level signal and continuously outputs a signal in a high-level state; the sixth logic chip J6 may be an AND gate chip.

[0032] In an integrated circuit power state detection circuit of the present embodiment, direct current power is connected by a power interface, and is regulated and filtered by a voltage regulating device and a first capacitor C1 to output first power. When the first controller U1 outputs a driving signal for the first time, the third diode and the fifth capacitor perform rectification and filtering and output a trigger signal, triggering the IN terminal and the OUT terminal of the first analog switch U3 to be turned on, and the self-locking device performs self-locking, and starts timing at the same time. Since Q1 of the first trigger U2 outputs a high level, the first logic chip J1 is triggered to receive the driving signal and drive the integrated circuit device IC1 to work through the Y terminal, thereby causing the integrated circuit device IC1 to perform voltage regulation and output power through its output terminal. The power is output to the integrated circuit device I When C1 starts, it increases slowly until it reaches DC stabilization. The electric energy output from the output end of the integrated circuit device IC1 is divided by the first resistor R1 and the second resistor R2, and then transmitted through the first analog switch U3. The first diode D1, the second diode D2, the first comparator A1 and the second capacitor C2 detect the voltage change. Since the voltage is in a rising state at this time, the potential of the detection signal output by the first comparator A1 is not zero. The Y end of the second logic chip J2 does not output the first state signal, and the output is a low level. Until the Y end of the second logic chip J2 outputs the first state signal, it means that the electric energy provided by the integrated circuit device IC1 reaches DC stabilization and works normally. The first controller U1 will stop timing and set the timing time to the integrated circuit. The first controller U1 provides a driving signal for the second time, and the sixth logic chip J6 can output the first control signal and control the first power tube Q1 to be turned on, so that the third resistor R3, the second power tube Q2, the sixth capacitor C6, the fourth resistor R4, the first timer U4 and the seventh capacitor C7 start to be timed according to the response time. After the timing reception, that is, after the response time is reached, if the electric energy output by the integrated circuit device IC1 does not reach the DC voltage regulation, the third logic chip J 3 cooperates with the seventh diode D7 and the sixth diode D6 to self-lock and output the first abnormal signal, which means that the response time increases and the integrated circuit device IC1 may have a component abnormality. After the power output by the integrated circuit device IC1 reaches the DC voltage regulation, the fourth logic chip J4 cooperates with the eighth diode D8 and the ninth diode D9 to self-lock and detect whether the power output by the integrated circuit device IC1 will have voltage fluctuations. If voltage fluctuations occur, the second abnormal signal is output by the Y terminal of the fifth logic chip J5. The first abnormal signal and the second abnormal signal are received by the IO3 terminal and the IO4 terminal of the first controller U1 respectively and control the first trigger U2 to flip. The Q1 terminal of the first trigger U2 becomes a low level, and the first logic chip J1 stops working.The integrated circuit device IC1 stops working.

[0033] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0034] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. An integrated circuit power state detection circuit, characterized in that: The circuit includes: A power module, used for performing voltage stabilization and filtering processing on the input direct current power and outputting the first power; The integrated circuit module is connected to the power module, the microcontroller module and the abnormality judgment module, and is used to receive the first electric energy and start and provide DC voltage regulation when receiving the driving signal output by the microcontroller module, and stop working when receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module; A microcontroller module is connected to the timing module, the state judgment module and the abnormality judgment module, and is used to provide a driving signal and perform rectification and filtering processing on the driving signal, output a trigger signal, start timing when providing the driving signal for the first time, and when receiving the first state signal output by the state judgment module, stop timing and set the response time and output the first adjustment signal according to the timing time, set the timing duration of the timing module to the timing time, and receive the first abnormality signal and the second abnormality signal; The change detection module is connected to the integrated circuit module and the microcontroller module, and is used to perform voltage sampling on the DC voltage regulator, and upon receiving a trigger signal, perform voltage change detection on the sampled signal and output a detection signal; A state judgment module, connected to the change detection module, is used to set a comparison level and output a first state signal when the potential of the received detection signal is zero; The processing module is connected to the microcontroller module and is used to perform self-locking processing on the trigger signal and output a first control signal when the trigger signal is received again during the signal self-locking period; A timing module, connected to the processing module and the power module, for receiving the first electric energy and starting the timing operation and setting the response time when receiving the first control signal and the first adjustment signal, and outputting the second control signal after the timing ends; The abnormality judgment module is connected to the timing module and the state judgment module, and is used to judge that the response time of the integrated circuit module exceeds the set response time when the second control signal is received and the first state signal is not received, and output the first abnormality signal. When the first state signal is not received during the DC voltage stabilization period output by the integrated circuit module, a second abnormality signal will be output.

2. The integrated circuit power state detection circuit according to claim 1, characterized in that: The power module includes a power interface, a voltage regulating device and a first capacitor; the integrated circuit module includes an integrated circuit device, a first logic chip and a first trigger; the microcontroller module includes a first controller; The first end and the second end of the power interface are respectively connected to the first end and the second end of the voltage regulating device, the third end of the voltage regulating device is connected to the VCC end of the integrated circuit device and is connected to the fourth end of the voltage regulating device, the GND end of the integrated circuit device, the D end of the first trigger and the ground end through the first capacitor, the PWM end of the integrated circuit device is connected to the Y end of the first logic chip, the B end of the first logic chip is connected to the IO2 end of the first controller and the anode of the third diode, the cathode of the third diode is connected to the change detection module and is grounded through the fifth capacitor, the A end of the first logic chip is connected to the Q1 end of the first trigger, and the CLK end of the first trigger is connected to the abnormality judgment module.

3. The integrated circuit power state detection circuit according to claim 2, characterized in that: The change detection module includes a first resistor, a second resistor, a first analog switch, a first diode, a second diode, a first comparator and a second capacitor; One end of the first resistor is connected to the IN end of the first analog switch and is connected to one end of the second capacitor and the ground end through the second resistor. The other end of the first resistor is connected to the OUT end of the integrated circuit device. The other end of the second capacitor is connected to the inverting end of the first comparator and the cathode of the second diode. The anode of the second diode is connected to the anode of the first diode and the OUT end of the first analog switch. The CTRL end of the first analog switch is connected to the cathode of the third diode. The cathode of the first diode is connected to the non-inverting end of the first comparator. The output end of the first comparator is connected to the state judgment module.

4. The integrated circuit power state detection circuit according to claim 3, characterized in that: The state judgment module includes a second comparator, a first battery, a third capacitor, a first potentiometer, a third comparator, a fourth capacitor, a second potentiometer, a second battery and a second logic chip; The non-inverting end of the second comparator is connected to the inverting end of the third comparator, the inverting end of the second comparator is connected to the slider end of the first potentiometer and is connected to one end of the first potentiometer, the cathode of the first battery and the ground end through the third capacitor, the anode of the first battery is connected to the other end of the first potentiometer, the non-inverting end of the third comparator is connected to the slider end of the second potentiometer and is connected to one end of the second potentiometer, the anode of the second battery and the ground end through the fourth capacitor, the cathode of the second battery is connected to the other end of the second potentiometer, the output end of the second comparator and the output end of the third comparator are respectively connected to the A end and the B end of the second logic chip, and the Y end of the second logic chip is connected to the IO1 end of the first controller and the abnormality judgment module.

5. The integrated circuit power state detection circuit according to claim 4, characterized in that: The abnormality judgment module includes a fourth diode, a fifth diode, a sixth diode, a seventh diode, an eighth diode, a ninth diode, a third logic chip, a fourth logic chip, a fifth logic chip and a first inverter; The cathode of the fourth diode is connected to the cathode of the fifth diode and the CLK terminal of the first trigger, the anode of the fourth diode is connected to the Y terminal of the third logic chip, the anode of the sixth diode and the IO3 terminal of the first controller, the anode of the fifth diode is connected to the Y terminal of the fifth logic chip and the IO4 terminal of the first controller, the A terminal of the third logic chip is connected to the A terminal of the fourth logic chip and the timing module, the B terminal of the third logic chip is connected to the cathode of the sixth diode and the cathode of the seventh diode, the anode of the seventh diode is connected to the output terminal of the first inverter and the A terminal of the fifth logic chip, the Y terminal of the fourth logic chip is connected to the B terminal of the fifth logic chip and the anode of the eighth diode, the cathode of the eighth diode is connected to the cathode of the ninth diode and the B terminal of the fourth logic chip, and the anode of the ninth diode is connected to the input terminal of the first inverter and the Y terminal of the second logic chip.

6. The integrated circuit power state detection circuit according to claim 5, characterized in that: The timing module includes a first power tube, a third resistor, a second power tube, a sixth capacitor, a fourth resistor, a first timer and a seventh capacitor; The drain of the first power tube is connected to the third end of the voltage regulating device, the source of the first power tube is connected to the fourth end and the eighth end of the first timer and is connected to the drain of the second power tube through the third resistor, the source of the second power tube is connected to one end of the fourth resistor, the sixth end and the second end of the first timer through the sixth capacitor, the fifth end of the first timer is connected to the first end of the first timer, the other end of the fourth resistor and the ground through the seventh capacitor, the third end of the first timer is connected to the A end of the third logic chip, the gate of the second power tube is connected to the IO5 end of the first controller, and the gate of the first power tube is connected to the processing module.

7. The integrated circuit power state detection circuit according to claim 6, characterized in that: The processing module includes a self-locking device and a sixth logic chip; The input end of the self-locking device is connected to the B end of the sixth logic chip and the cathode of the third diode, the output end of the self-locking device is connected to the A end of the sixth logic chip, and the Y end of the sixth logic chip is connected to the gate of the first power tube.

Images