Image processor state monitoring method and device, equipment and storage medium

Abstract

The invention discloses an image processor state monitoring method and device, equipment and a storage medium, relates to the technical field of data processing, is applied to a host end, and comprises the following steps: applying for a target memory space in a memory of an equipment end through an application programming interface; the equipment end comprises a memory and an image processor; determining each calculation thread of the image processor, and constructing a mapping relationship between each calculation thread and each memory block of the target memory space, so that the image processor records state information of the calculation thread of the image processor to the corresponding memory block based on the mapping relationship when the calculation task is executed; and obtaining target state information which is transmitted by the image processor and recorded in the target memory space, so as to complete monitoring operation on the image processor. Therefore, the state information of each thread when the image processor executes the calculation task can be recorded through the pre-applied memory space, the host end can obtain the state information in time, management is convenient, and the stability and reliability of the image processor can be improved.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to an image processor state monitoring method, device, equipment and storage medium. Background Art

[0002] In current computing systems, graphics processing units (GPUs) play an increasingly important role. They are not only used for graphics rendering, but are also widely used in general computing tasks. However, GPUs may encounter various abnormal situations when performing these tasks, such as memory access errors, arithmetic errors, synchronization problems, resource allocation problems, hardware defects, and software defects. These abnormal information is crucial for system stability, performance optimization, and fault diagnosis.

[0003] Therefore, how to quickly and accurately capture GPU status information is a problem to be solved in the art. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide an image processor status monitoring method, device, equipment and storage medium, which can record the status information of each thread of the image processor when executing a computing task through the pre-applied memory space, so that the host side can obtain the status information in time, which is convenient for management and can improve the stability and reliability of the image processor. The specific scheme is as follows:

[0005] In a first aspect, the present application provides an image processor status monitoring method, which is applied to a host side, comprising:

[0006] Applying for target memory space in the memory of a device through an application programming interface; the device includes a memory and an image processor;

[0007] Determine each computing thread of the image processor, and construct a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor records the state information of its own computing thread when executing the computing task into the corresponding memory block based on the mapping relationship;

[0008] The target state information recorded in the target memory space transmitted by the image processor is obtained to complete the monitoring operation on the image processor.

[0009] Optionally, applying for a target memory space in a memory on the device side through an application programming interface includes:

[0010] The memory management interface module in the heterogeneous programming framework is called to apply for a target memory space in the memory of the device through the memory application programming interface of the memory management interface module.

[0011] Optionally, applying for a target memory space in a memory on the device side through an application programming interface includes:

[0012] Determine the number of global threads required for each computational task to be performed;

[0013] According to the number of global threads, a target memory space containing a corresponding number of memory blocks is applied for in the memory of the device through an application programming interface.

[0014] Optionally, the acquiring the target state information recorded in the target memory space transmitted by the image processor includes:

[0015] A preset monitoring process is used to monitor in real time a preset data bus connected to the device end to obtain target state information recorded in the target memory space and transmitted by the image processor through the data bus.

[0016] Optionally, after acquiring the target state information recorded in the target memory space transmitted by the image processor, the method further includes:

[0017] Uploading the target state information to a preset cloud server to obtain analysis results and related solutions returned by the preset cloud server for the target state information;

[0018] The analysis results and the solution are displayed in a preset terminal window for relevant personnel to view.

[0019] In a second aspect, the present application provides an image processor status monitoring method, which is applied to a device, and includes:

[0020] Based on the mapping relationship, the state information of the computing thread of the image processor when executing the computing task is recorded in the memory block of the target memory space; the target memory space is the memory space applied for by the host end in the memory of the device end through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor and each memory block of the target memory space constructed by the host end;

[0021] The target state information recorded in the target memory space is transmitted to the host end to complete the monitoring operation on the image processor.

[0022] In a third aspect, the present application provides an image processor status monitoring device, which is applied to a host side, and includes:

[0023] A memory space application module, used to apply for a target memory space in the memory of a device end through an application programming interface; the device end includes a memory and an image processor;

[0024] a mapping relationship building module, used to determine each computing thread of the image processor, and build a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor can record the state information of its own computing thread when executing the computing task into the corresponding memory block based on the mapping relationship;

[0025] The state information acquisition module is used to acquire the target state information recorded in the target memory space transmitted by the image processor to complete the monitoring operation on the image processor.

[0026] In a fourth aspect, the present application provides an image processor status monitoring device, which is applied to a device end, and includes:

[0027] A state information recording module, used for recording the state information of the computing thread of the image processor when executing the computing task into the memory block of the target memory space based on the mapping relationship; the target memory space is the memory space applied for by the host end in the memory of the device end through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor and each memory block of the target memory space constructed by the host end;

[0028] The state information transmission module is used to transmit the target state information recorded in the target memory space to the host end to complete the monitoring operation on the image processor.

[0029] In a fifth aspect, the present application provides an electronic device, including:

[0030] Memory, used to store computer programs;

[0031] The processor is used to execute the computer program to implement the above-mentioned image processor state monitoring method.

[0032] In a sixth aspect, the present application provides a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the above-mentioned image processor status monitoring method.

[0033] It can be seen that the host side in this application can apply for the target memory space in the memory of the device side through the application programming interface; the device side includes a memory and an image processor; then determine the various computing threads of the image processor, and construct a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor records the state information of its own computing thread when executing the computing task to the corresponding memory block based on the mapping relationship; then obtain the target state information recorded in the target memory space transmitted by the image processor to complete the monitoring operation of the image processor. In this way, the present application can record the state information of each thread of the image processor when executing the computing task through the pre-applied memory space, and the host side can obtain the state information of the image processor in time, which is convenient for managing the working state of the image processor, can handle the abnormal situation of the image processor in time, improve the processing efficiency, and can improve the stability and reliability of the image processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0035] Figure 1 A flow chart of an image processor state monitoring method disclosed in this application;

[0036] Figure 2 A flowchart of a specific image processor state monitoring method disclosed in this application;

[0037] Figure 3 This is another specific flow chart of the image processor state monitoring method disclosed in this application;

[0038] Figure 4 A schematic diagram of a specific host-side and device-side hardware architecture disclosed in this application;

[0039] Figure 5 A flowchart of another specific image processor state monitoring method disclosed in this application;

[0040] Figure 6 This is a structural schematic diagram of an image processor status monitoring device disclosed in this application;

[0041] Figure 7 This is a schematic diagram of the structure of another image processor status monitoring device disclosed in this application;

[0042] Figure 8This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] See also Figure 1 As shown, an embodiment of the present invention discloses an image processor status monitoring method, which is applied to a host side and includes:

[0045] Step S11, applying for target memory space in the memory of the device side through the application programming interface; the device side includes a memory and an image processor.

[0046] In an embodiment of the present application, the device side may include an image processor and a corresponding memory device. In order to record the status information of the image processor, the host side may apply for a target memory space in the memory of the device side through an application programming interface, and then the target memory space may be used to record the status information of the image processor when processing computing tasks.

[0047] In a specific embodiment, the application of the target memory space in the device-side memory through the application programming interface may include: calling the memory management interface module in the heterogeneous programming framework to apply for the target memory space in the device-side memory through the memory application application programming interface of the memory management interface module. Specifically, in the process of applying for the target memory space in the device-side memory, the host side may call the memory management interface module in the heterogeneous programming framework, and the memory management interface module includes a memory application programming interface; then apply for the target memory space in the device-side memory through the memory application application programming interface; it can be understood that the applied target memory space can be used to store the state information of the image processor when executing the computing task, or only record the corresponding exception information when an abnormal situation occurs.

[0048] In another specific embodiment, the application of the target memory space in the memory of the device side through the application programming interface may include: determining the number of global threads required for each computing task to be executed; and applying for a target memory space containing a corresponding number of memory blocks in the memory of the device side through the application programming interface according to the number of global threads. Specifically, in the process of applying for memory space, the computing tasks to be executed may be considered. The scale of each computing task to be executed and the number of threads required determine the scale of memory allocation. According to the number of global threads required for each computing task, a corresponding number of memory blocks are allocated to obtain the final target memory space.

[0049] Step S12: determine the computing threads of the image processor, and construct a mapping relationship between the computing threads and the memory blocks of the target memory space, so that the image processor can record the status information of its own computing threads when executing computing tasks into the corresponding memory blocks based on the mapping relationship.

[0050] In the embodiment of the present application, after applying for the target memory space in the memory of the device side through the above steps, a mapping relationship between each memory block of the target memory space can be established according to each computing thread in the image processor, and the mapping relationship can be written into the specified memory space of the device side. The image processor can subsequently record the state information of its own computing thread when executing the computing task to the corresponding memory block based on the mapping relationship. Among them, the computing thread of the image processor refers to the smallest execution unit for executing computing tasks. The thread is the basic unit of parallel computing and completes a minimum logical operation; the thread bundle in the image processor is the basic execution unit; a thread block contains multiple thread bundles; the stream multiprocessor is responsible for the execution of the thread bundle; and the stream processor is responsible for executing the thread, and the structure is relatively simple. The image processor improves computing performance through the parallel execution of a large number of (computing) threads; each thread independently executes the same task, and can hide memory access delays through parallel processing, thereby improving overall computing efficiency.

[0051] In a specific embodiment, the mapping relationship between computing threads and memory blocks is shown in the following table:

[0052] Table 1

[0053] ;

[0054] It can be understood that when the device performs computing tasks through the image processor, it can obtain the information of the computing thread, that is, the thread number, in the corresponding kernel function. Combined with the established mapping relationship, the corresponding memory block number can be found, that is, each thread can record its own status information in the corresponding memory block.

[0055] Step S13: acquiring the target state information recorded in the target memory space transmitted by the image processor to complete the monitoring operation on the image processor.

[0056] In an embodiment of the present application, after the image processor on the device side has completed the computing task, that is, after the status information corresponding to the thread has been recorded in the corresponding memory block, the image processor can transmit the target status information of the relevant thread recorded in the target memory space to the host side, so as to enable the host side to monitor the image processor.

[0057] In a specific embodiment, the acquisition of the target state information recorded in the target memory space transmitted by the image processor may include: monitoring a preset data bus connected to the device end in real time through a preset monitoring process to obtain the target state information recorded in the target memory space transmitted by the image processor through the data bus. Specifically, the host end may pre-set a monitoring process, start the monitoring process to monitor the data transmission status of the data bus connected to the device end in real time; it is understandable that the monitoring process can communicate with the device end where the image processor is located through a preset data transmission protocol to obtain relevant target state information.

[0058] In another specific embodiment, after obtaining the target state information recorded in the target memory space transmitted by the image processor, it may also include: uploading the target state information to a preset cloud server to obtain the analysis results and related solutions returned by the preset cloud server for the target state information; displaying the analysis results and the solutions through a preset terminal window for relevant personnel to view. Specifically, after the host side obtains the target state information of the image processor from the device side, the target state information can be uploaded to the preset cloud server, and the target state information can be analyzed through the cloud server, and a corresponding solution can be obtained; further, the cloud server can return the analysis results and related solutions corresponding to the target state information to the host side, and the host side can further display them through the terminal window, which is convenient for relevant personnel to view and adjust the device side in time.

[0059] It can be seen that the present application can record the status information of each thread of the image processor when executing a computing task through the pre-applied memory space, and the device side can send the status information recorded in the memory space to the host side in time, and the host side can obtain the status information of the image processor in time, which is convenient for managing the working status of the image processor; and the host side can upload the obtained status information of the image processor to the cloud server, and obtain the corresponding processing plan fed back by the cloud server. Through this processing plan, the abnormal situation of the image processor can be handled in time, the processing efficiency can be improved, and the stability and reliability of the image processor can be further improved.

[0060] like Figure 2 As shown, the embodiment of the present application discloses a method for monitoring the state of an image processor, which is applied to a device end and includes:

[0061] Step S21, based on the mapping relationship, recording the status information of the computing thread of the image processor when executing the computing task into the memory block of the target memory space; the target memory space is the memory space applied for by the host side in the memory of the device side through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor constructed by the host side and each memory block of the target memory space.

[0062] In an embodiment of the present application, the host side applies for a target memory space in the memory of the device side in advance through an application programming interface, and constructs a mapping relationship between each memory block in the target memory space and each computing thread of the image processor; and in the process of processing related computing tasks through each computing thread of the image processor, the device side can record the status information corresponding to each computing thread into the corresponding memory block based on the mapping relationship, that is, write the status information of the corresponding thread into the corresponding memory block during the execution of the kernel function.

[0063] Step S22: transmitting the target state information recorded in the target memory space to the host end to complete the monitoring operation on the image processor.

[0064] Furthermore, after the device writes the thread status information into the corresponding memory block, that is, after the kernel function call returns, it can read the status information recorded in the target memory space and transmit the status information to the host through the data bus based on the pre-set data transmission protocol. In this way, the host can monitor the image processor and handle the situation of the image processor in a timely manner.

[0065] It can be seen that in this application, the host side can apply for a certain amount of memory space in the memory of the device side in advance, so as to record the status information of each thread of the image processor when executing the computing task through the applied memory space. The host side can obtain the status information of the image processor in time, which is convenient for managing the working status of the image processor, can handle the abnormal situation of the image processor in time, improve the processing efficiency, and can improve the stability and reliability of the image processor.

[0066] like Figure 3 As shown, the embodiment of the present application discloses a method for monitoring the state of an image processor, including:

[0067] In this embodiment, the hardware architecture of the host and the device is as follows: Figure 4As shown, the host side and the device side are connected through a PCIe (peripheral component interconnect express, a high-speed serial computer expansion bus standard) bus, and the device side includes a memory part and an image processor part. In order to monitor the abnormal state information of the image processor when it is working, the host side can dynamically apply for a piece of memory space in the DDR (Double Data Rate) memory of the device side through the memory management API (Application Programming Interface). According to the processing scale of the computing task, the size of the memory space to be applied for is determined. The memory space is organized in the form of pages and blocks. Each block corresponds to a computing thread and is used to store the value of the abnormal state register corresponding to the thread. In addition, a mapping relationship between the corresponding memory block and the thread can be constructed. Specifically, the ID (Identity document) of each thread is obtained in the kernel function of the device side, and a memory block number applied for each ID is bound. Each thread corresponds to a memory block. The abnormal information generated during the execution of the kernel function is written into the corresponding memory block. After that, after the kernel function call returns, the device-side program reads all the abnormal information recorded in the applied memory area and sends it to the host side through the PCIe bus based on the predetermined abnormal information transmission protocol. It is understandable that the host side can start a process to monitor GPU abnormal information, and monitor the data of the PCIe bus in real time based on a predetermined abnormal information transmission protocol. When the monitoring process receives abnormal data, the abnormal information is printed in the front-end terminal window. The abnormal data is synchronously transmitted to the cloud server. The abnormal information analysis module in the cloud server can analyze the problem and return the solution to the monitoring process, and further display the relevant processing solution in the front-end terminal window.

[0068] Further, such as Figure 5As shown, the host side can call the memory management interface module in the heterogeneous programming framework through the program, and use the memory application API interface to dynamically apply for the device-side DDR memory space. This memory space is used to store the exception information of the entire computing task during the calculation process. The memory is organized in pages and blocks, and each memory block records the exception information of a computing thread, such as memory errors, arithmetic errors, synchronization problems, etc. The scale of the computing task and the number of threads determine the memory allocation scale. According to the number of global threads of the computing task, the corresponding number of memory blocks are allocated. And a one-to-one mapping relationship between thread ID and memory block is established. It can be understood that the ID of the computing thread can be obtained in the device-side kernel function program, and a memory block number is bound to each thread ID according to the pre-built mapping relationship table. When the GPU executes the kernel function, each thread will be assigned a unique ID during the execution process. According to the one-to-one mapping relationship, the kernel function binds the pre-applied memory block number to each thread so that each thread can record its own exception information in the corresponding memory block. The specific implementation process is as follows: In the kernel function, each thread first obtains its own unique identification through the thread ID provided by the hardware. Then, the kernel function can query the memory mapping table provided by the host side and bind the thread ID with the pre-applied memory block number. The exception information of each thread will be stored in the corresponding memory block. During the execution of the kernel function, the kernel function monitors the execution status of the thread. Once an exception occurs, the value of the exception status register is immediately written to the corresponding memory block. Further, after the kernel function call returns (after the status information is written to the corresponding memory block), the device-side program can read all the exception information in the applied memory area, and send these data to the host side through the PCIe bus based on the predetermined exception information transmission protocol; the specific process can be as follows: After the GPU completes the computing task, it executes the memory access code to implement the reading operation of the exception information. This code will take out all the exception information written in the device-side memory. The GPU transmits the exception information to the host side through the PCIe bus, and the predetermined exception information transmission protocol is used during the transmission process to ensure the integrity and accuracy of the data transmission. The host side can pre-set a process for monitoring GPU exception information, monitor the data of the PCIe bus in real time based on the predetermined exception information transmission protocol, and can also monitor the exception information processing scheme transmitted from the cloud server. On the host side, a monitoring process is started to monitor the abnormal data transmitted from the GPU via the PCIe bus in real time. The monitoring process uses a predetermined abnormal information transmission protocol to communicate with the GPU device, receive abnormal data and parse it.The specific process is as follows: the host starts a monitoring process, which monitors the data flow on the PCIe bus in real time through the driver interface provided by the operating system; after receiving the abnormal data transmitted by the GPU, the monitoring process parses the abnormal information of each thread in the data packet (such as abnormal type, thread ID, error occurrence time, etc.); in order to ensure real-time performance, the monitoring process can adopt multi-threading and asynchronous I / O (Input / Output) mechanism to minimize the delay of data transmission and processing. If the host-side monitoring process monitors the abnormal data, the abnormal information can be printed to the terminal window of the host for user viewing. At the same time, the abnormal information can be synchronously transmitted to the cloud server through the network for further analysis and processing. The specific process is as follows: the monitoring process formats the parsed abnormal data and prints out the abnormal information of each thread through the terminal window (such as the command line interface), including the abnormal type, the affected thread ID, the timestamp of occurrence, etc. At the same time, the monitoring process uploads the abnormal data to the cloud server through a network connection (such as the Hypertext Transfer Protocol or the Message Queue Telemetry Transport Protocol), and the cloud server can receive the data through WebSocket (a protocol that can perform full-duplex communication). To ensure the integrity and security of data during the upload process, encrypted transmission and verification mechanisms can be used to ensure the accuracy of data. It is understandable that after receiving abnormal data, the cloud server can use data analysis algorithms to process the abnormal information, generate solutions and return them to the host. After the monitoring process receives the solution, it will be displayed to the user through the terminal window. The specific process is as follows: The cloud server analyzes the cause of the abnormality based on the received abnormal data through artificial intelligence algorithms, fault diagnosis models or expert systems. The cloud service can analyze historical fault data, hardware performance monitoring data, etc., identify common fault modes and provide solutions. The solutions generated by the cloud server may include suggestions for hardware detection, driver updates, memory optimization, etc. The solution is returned to the monitoring process on the host through the network. The monitoring process parses and displays the processing method in the terminal window for the user to refer to and take corresponding measures.

[0069] It can be seen that the present application can record the status information of each thread of the image processor when executing a computing task through the pre-applied memory space, and the device side can send the status information recorded in the memory space to the host side in time, and the host side can obtain the status information of the image processor in time, which is convenient for managing the working status of the image processor; and the host side can upload the obtained status information of the image processor to the cloud server, and obtain the corresponding processing plan fed back by the cloud server. Through this processing plan, the abnormal situation of the image processor can be handled in time, the processing efficiency can be improved, and the stability and reliability of the image processor can be further improved.

[0070] like Figure 6As shown, the embodiment of the present application discloses an image processor status monitoring device, which is applied to a host side, including:

[0071] A memory space application module 11, used to apply for a target memory space in the memory of a device end through an application programming interface; the device end includes a memory and an image processor;

[0072] A mapping relationship building module 12, used for determining each computing thread of the image processor, and building a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor can record the state information of its own computing thread when executing the computing task into the corresponding memory block based on the mapping relationship;

[0073] The state information acquisition module 13 is used to acquire the target state information recorded in the target memory space transmitted by the image processor to complete the monitoring operation on the image processor.

[0074] It can be seen that the present application can record the status information of each thread of the image processor when executing computing tasks through the pre-applied memory space, and the host side can obtain the status information of the image processor in a timely manner, which is convenient for managing the working status of the image processor, and can handle abnormal situations of the image processor in a timely manner, improve processing efficiency, and improve the stability and reliability of the image processor.

[0075] In a specific embodiment, the memory space application module 11 may include:

[0076] The first memory space application unit is used to call the memory management interface module in the heterogeneous programming framework to apply for a target memory space in the memory of the device through the memory application application programming interface of the memory management interface module.

[0077] In another specific embodiment, the memory space application module 11 may include:

[0078] A thread number determination unit, used to determine the global number of threads required for each computing task to be executed;

[0079] The second memory space application unit is used to apply for a target memory space containing a corresponding number of memory blocks in the memory of the device through an application programming interface according to the number of global threads.

[0080] In a specific embodiment, the state information acquisition module 13 may include:

[0081] The monitoring unit is used to monitor the preset data bus connected to the device end in real time through a preset monitoring process to obtain the target state information recorded in the target memory space transmitted by the image processor through the data bus.

[0082] In a specific embodiment, the device may further include:

[0083] A data acquisition module, used to upload the target state information to a preset cloud server to obtain the analysis results and related solutions returned by the preset cloud server for the target state information;

[0084] The data display module is used to display the analysis results and the solution through a preset terminal window so that relevant personnel can view them.

[0085] like Figure 7 As shown, the embodiment of the present application discloses an image processor status monitoring device, which is applied to a device end, and includes:

[0086] The state information recording module 21 is used to record the state information of the computing thread of the image processor when executing the computing task into the memory block of the target memory space based on the mapping relationship; the target memory space is the memory space applied by the host end in the memory of the device end through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor and each memory block of the target memory space constructed by the host end;

[0087] The state information transmission module 22 is used to transmit the target state information recorded in the target memory space to the host end to complete the monitoring operation on the image processor.

[0088] It can be seen that the present application can record the status information of each thread of the image processor when executing computing tasks through the pre-applied memory space, and the host side can obtain the status information of the image processor in a timely manner, which is convenient for managing the working status of the image processor, and can handle abnormal situations of the image processor in a timely manner, improve processing efficiency, and improve the stability and reliability of the image processor.

[0089] Furthermore, the present application also discloses an electronic device. Figure 8 This is a structural diagram of an electronic device 30 according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0090] Figure 8The present invention provides a schematic diagram of the structure of an electronic device 30 provided in an embodiment of the present application. The electronic device 30 may specifically include: at least one processor 31, at least one memory 32, a power supply 33, a communication interface 34, an input / output interface 35, and a communication bus 36. The memory 32 is used to store a computer program, which is loaded and executed by the processor 31 to implement the relevant steps in the image processor state monitoring method disclosed in any of the above embodiments. In addition, the electronic device 30 in this embodiment may specifically be an electronic computer.

[0091] In this embodiment, the power supply 33 is used to provide working voltage for each hardware device on the electronic device 30; the communication interface 34 can create a data transmission channel between the electronic device 30 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 35 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0092] In addition, the memory 32, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon can include an operating system 321, a computer program 322, etc., and the storage method can be temporary storage or permanent storage.

[0093] The operating system 321 is used to manage and control the hardware devices and computer programs 322 on the electronic device 30, and may be Windows Server, Netware, Unix, Linux, etc. In addition to the computer program that can be used to complete the image processor state monitoring method performed by the electronic device 30 disclosed in any of the aforementioned embodiments, the computer program 322 may further include computer programs that can be used to complete other specific tasks.

[0094] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the aforementioned disclosed image processor state monitoring method is implemented. The specific steps of the method can refer to the corresponding contents disclosed in the aforementioned embodiments, and will not be repeated here.

[0095] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0096] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0097] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0098] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0099] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for monitoring the state of an image processor, characterized in that: Applied to the host side, including: Applying for target memory space in the memory of a device through an application programming interface; the device includes a memory and an image processor; Determine each computing thread of the image processor, and construct a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor records the state information of its own computing thread when executing the computing task into the corresponding memory block based on the mapping relationship; The target state information recorded in the target memory space transmitted by the image processor is obtained to complete the monitoring operation on the image processor.

2. The image processor status monitoring method according to claim 1, characterized in that: The step of applying for a target memory space in the memory of the device through the application programming interface includes: The memory management interface module in the heterogeneous programming framework is called to apply for a target memory space in the memory of the device through the memory application programming interface of the memory management interface module.

3. The image processor status monitoring method according to claim 1, characterized in that: The step of applying for a target memory space in the memory of the device through the application programming interface includes: Determine the number of global threads required for each computational task to be performed; According to the number of global threads, a target memory space containing a corresponding number of memory blocks is applied for in the memory of the device through an application programming interface.

4. The image processor status monitoring method according to claim 1, characterized in that: The acquiring the target state information recorded in the target memory space transmitted by the image processor includes: A preset monitoring process is used to monitor in real time a preset data bus connected to the device end to obtain target state information recorded in the target memory space and transmitted by the image processor through the data bus.

5. The image processor status monitoring method according to any one of claims 1 to 4, characterized in that: After acquiring the target state information recorded in the target memory space transmitted by the image processor, the method further includes: Uploading the target state information to a preset cloud server to obtain analysis results and related solutions returned by the preset cloud server for the target state information; The analysis results and the solution are displayed in a preset terminal window for relevant personnel to view.

6. A method for monitoring the state of an image processor, characterized in that: Applied to the device side, including: Based on the mapping relationship, the state information of the computing thread of the image processor when executing the computing task is recorded in the memory block of the target memory space; the target memory space is the memory space applied for by the host end in the memory of the device end through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor and each memory block of the target memory space constructed by the host end; The target state information recorded in the target memory space is transmitted to the host end to complete the monitoring operation on the image processor.

7. An image processor status monitoring device, characterized in that: Applied to the host side, including: A memory space application module, used to apply for a target memory space in the memory of a device end through an application programming interface; the device end includes a memory and an image processor; a mapping relationship building module, used to determine each computing thread of the image processor, and build a mapping relationship between each computing thread and each memory block of the target memory space, so that the image processor can record the state information of its own computing thread when executing the computing task into the corresponding memory block based on the mapping relationship; The state information acquisition module is used to acquire the target state information recorded in the target memory space transmitted by the image processor to complete the monitoring operation on the image processor.

8. An image processor status monitoring device, characterized in that: Applied to the device side, including: A state information recording module, used for recording the state information of the computing thread of the image processor when executing the computing task into the memory block of the target memory space based on the mapping relationship; the target memory space is the memory space applied for by the host end in the memory of the device end through the application programming interface, and the mapping relationship is the mapping relationship between each computing thread of the image processor and each memory block of the target memory space constructed by the host end; The state information transmission module is used to transmit the target state information recorded in the target memory space to the host end to complete the monitoring operation on the image processor.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the image processor state monitoring method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, implements the image processor state monitoring method according to any one of claims 1 to 6.

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