An on-chip inter-core communication system and method

Abstract

The present application relates to a kind of on-chip inter-core communication system and method, the system of the present application includes multiple processor cores, shared memory and interrupt control unit, shared memory is connected with multiple processor cores, multiple processor cores are connected with interrupt control unit respectively, multiple processor cores are divided into data sending core and data receiving core, responsible for executing task and inter-core communication;Shared memory is divided into data frame lookup table and ring buffer inside;Interrupt control unit is used to process inter-core interrupt.The present application utilizes the advantage of fast access of processor core in multi-core processor to on-chip shared memory, reduces the delay of data writing / read.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, and in particular to a core-to-core communication system and method of a multi-core chip. BACKGROUND

[0002] In modern computer architecture, especially in the field of high-performance computing, server applications and mobile devices, multi-core processors have gradually become mainstream. As the performance improvement of a single processor core gradually encounters physical limits, integrating multiple processing cores to improve computing power has become an effective strategy. However, one of the core advantages of a multi-core system is that it can execute multiple tasks or threads in parallel, which requires efficient data exchange and communication mechanisms between different cores to ensure the overall performance and efficiency of the system.

[0003] Existing core-to-core communication solutions mostly use shared memory, message queues, or dedicated communication buses or network (Noc) integrated inside the chip. Although the shared memory method is simple to implement, it can lead to performance degradation under high load conditions. The real-time performance of the message queue is relatively low, which is not suitable for applications with high real-time requirements, and the space utilization rate of storage resources is low. Although the dedicated communication bus or network (Noc) integrated inside the chip can provide higher bandwidth and lower response delay, this method requires higher complexity and cost for chip design, and the general multi-core chip may not have such hardware support. SUMMARY

[0004] To solve the above technical problems in the background art, the present application provides an on-chip core-to-core communication system and method, which takes advantage of the fast access of processor cores in a multi-core processor to on-chip shared memory to reduce the delay of data writing / reading.

[0005] The technical solution of this invention is as follows: This invention is an on-chip inter-core communication system, characterized in that: the on-chip inter-core communication system includes multiple processor cores, shared memory, and an interrupt control unit. The shared memory is connected to the multiple processor cores, and the multiple processor cores are respectively connected to the interrupt control unit. The multiple processor cores are divided into data sending cores and data receiving cores, responsible for executing tasks and inter-core communication. The shared memory is internally divided into a data frame lookup table and a circular buffer. The data frame lookup table records data frame number, data storage address, data update status, current available status of the circular buffer, and data lock status information, wherein the data frame number is a unique identifier for the data frame; the data storage address is used to point to a specific location in the circular buffer; the data update status is used to indicate whether the data is valid; the circular buffer space status pointer, including a head pointer and a tail pointer, is used to calculate and indicate the current available space of the circular buffer; the data lock status is used to prevent conflicts during data transmission; the circular buffer is used for circular storage of data frames, and its length is designed according to the actual needs of the system to ensure that there is enough space to store data, and memory space is not pre-divided; the interrupt control unit is used to handle inter-core interrupts.

[0006] Furthermore, each processor core has its own dedicated data frame lookup table and a circular buffer.

[0007] A communication method for the above-mentioned on-chip inter-core communication system is characterized by the following steps:

[0008] 1) Establish a data frame lookup table between processor cores. This lookup table records the data frame number, data storage address, data update status, current availability of the circular buffer, and data lock status information. The data lock status information is used to prevent conflicts during data transmission.

[0009] 2) Create a circular buffer to store data frames, which are stored cyclically with the first and last frames connected. In the circular buffer, the data storage area is not pre-divided into memory, but is stored continuously in a circular manner according to the actual size of the data frames.

[0010] 3) Before writing data, the data sending core first checks the available space in the circular buffer and confirms that there is enough space to store the data to be sent; if the space is insufficient, it returns and waits; if the space is sufficient, it proceeds to step 4).

[0011] 4) Create a data frame lookup table in shared memory for this data frame;

[0012] 5) The data sending core writes the data to be sent into the circular buffer and updates the relevant information in the data frame lookup table, including the data frame number, data storage address, data update status, and update tail pointer;

[0013] 6) The data sending core notifies the data receiving core that the data is ready through inter-core interrupt, or the data receiving core actively queries the data update status in the circular buffer;

[0014] 7) The data receiving core obtains information about new data by accessing the data frame lookup table, including the data frame number, data storage address, and data length, and reads the corresponding data from the circular buffer.

[0015] Furthermore, the method for determining whether there is sufficient available space in the circular buffer in step 3) is as follows: the number of bytes of remaining space in the circular buffer = head pointer - tail pointer. When the amount of data to be written is less than or equal to the number of bytes of remaining space in the circular buffer, the space is considered sufficient; otherwise, the space is considered insufficient.

[0016] Furthermore, step 4) involves creating a data frame lookup table for that data frame as follows:

[0017] Frame number + 1

[0018] Frame start address = current tail pointer

[0019] Frame length = number of bytes of data to be written

[0020] Define the frame locking state as locked.

[0021] The frame state is defined as "data updated".

[0022] Further, the specific steps of step 5) are as follows: according to the data frame lookup table information definition of the data frame, write the data to be sent into the address recorded in the frame start address in the circular buffer according to the frame length, change the frame lock status to unlock, and update the tail pointer.

[0023] Further, the specific steps of step 6) are as follows: the data receiving core checks whether the corresponding data sending core has issued an interrupt, or the data receiving core queries whether a new frame number has been generated, and the data status is updated and the frame is in an unlocked state. If not, it returns and waits; if so, it proceeds to step 7).

[0024] Further, the specific steps of step 7) are as follows: search the data frame lookup table belonging to the data frame in the shared memory, find the frame start address, frame length, define the frame lock state, read the frame length data from the frame start address according to the information defined in the data lookup table, change the frame state to "processed", and update the head pointer.

[0025] This invention provides an on-chip inter-core communication system and method based on shared memory design. Inter-core data synchronization is achieved through inter-core interrupts or flag-based lookup. Data frame storage and indexing are primarily implemented using a data frame lookup table and a circular buffer. Unlike ordinary shared memory methods that divide data storage space into several identical memory blocks, this invention uses a circular buffer to store data. Data frames are stored sequentially, maximizing the utilization of the shared memory's data storage space. The shared memory space is allocated in two main ways: a data frame lookup table and a circular buffer. Each core has its own dedicated data frame lookup table and a circular buffer. The data frame lookup table has a fixed format, recording processor core write / read data behavior, data frame number, data storage address, data update status, current availability of the circular buffer (head pointer, tail pointer), and data lock status. Multiple lookup table queues (which can be changed according to actual usage and chip conditions) are pre-set and used cyclically, with each lookup table corresponding to one data frame. The circular buffer is not pre-divided; it stores data continuously in a circular manner according to the actual data frame size. Before writing data to the corresponding circular buffer, the sending core first checks the availability of space in the circular buffer. Only after confirming sufficient space to store the data sent by the sending core does it proceed with subsequent operations. Once the sending core has written the data to the circular buffer, it can notify the receiving core that the data is ready using an inter-core interrupt. Alternatively, in applications where interrupts are unnecessary or unavailable, the receiving core can proactively query the circular buffer to check for new data in an update-ready state. If the receiving core detects that there is update-ready data in the circular buffer, it can retrieve the data information written by the sending core, including the data frame number, data frame start address, data frame length, lock status, and update status, by accessing the data frame lookup table. Based on this information, the receiving core can then read the data from the circular buffer and update its status to the old data, achieving inter-core communication.

[0026] This invention does not rely on a dedicated communication bus integrated inside the chip or Noc hardware support, nor does it require dividing the shared memory into several memory blocks of fixed length. This avoids the problem of reduced storage space utilization and inability to handle large data volume communication between cores. While making full use of the shared memory space, this invention ensures data synchronization quality and improves the response speed of inter-core communication to a certain extent.

[0027] This invention is applicable to multi-core processor systems in the fields of high-performance computing, server applications, and mobile devices. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the on-chip inter-core communication system architecture of the present invention;

[0029] Figure 2 This is a schematic diagram of the data frame lookup table frame structure and circular buffer of the present invention;

[0030] Figure 3 This is a flowchart illustrating the implementation of the on-chip inter-core communication method of the present invention;

[0031] Figure 4 This is a flowchart illustrating the data transmission process of the data transmission core in this invention.

[0032] Figure 5 This is a flowchart illustrating the data receiving process of the data receiving core in this invention. Detailed Implementation

[0033] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0034] See Figure 1 The specific embodiment of the on-chip inter-core communication system of the present invention aims to improve the data transmission efficiency and reliability between cores in a multi-core processor system. It optimizes the data read / write process by employing shared memory and a circular buffer.

[0035] The system of this invention mainly includes multiple processor cores (such as core 1, core 2, core 3, core 4... core n), shared memory, and an interrupt control unit. The multiple processor cores are respectively divided into data sending cores and data receiving cores, responsible for executing tasks and inter-core communication; the shared memory is internally divided into a data frame lookup table and a circular buffer; the interrupt control unit is used to handle inter-core interrupts to ensure timely data transmission. The shared memory structure of this invention comprises two main parts: a data frame lookup table and a circular buffer.

[0036] See Figure 2 The data frame lookup table and circular buffer of the present invention are each described as follows:

[0037] The data frame number in the data frame lookup table serves as a unique identifier for the data frame; the data storage address points to a specific location within the circular buffer; the data update status indicates whether the data is valid; the circular buffer space status pointer, including a head pointer and a tail pointer, is used to calculate and indicate the current available space in the circular buffer; and the data lock status is used to prevent collisions during data transmission.

[0038] A circular buffer is used for circular storage of data frames. Its length is designed according to the actual needs of the system to ensure that there is enough space to store data. It does not perform memory space partitioning in advance, which ensures the flexibility of memory use and avoids the waste of storage resources caused by pre-partitioning space.

[0039] See Figure 3 The specific method flow of the present invention is as follows:

[0040] 1) Establish a data frame lookup table 5 between processor cores. This data lookup table 5 records the data frame number, data storage address, data update status, current availability status of the circular buffer, and data lock status information. The data lock status information is used to prevent conflicts during data transmission.

[0041] 2) Create a circular buffer 8 to store data frames. The data frames are stored cyclically with the first frame connected to the last frame. In the circular buffer 8, the data storage area is not pre-divided into memory, but is stored continuously in a circular manner according to the actual size of the data frames.

[0042] 3) Before writing data, data sending core 1 (such as core 1) first checks the available space of the circular buffer 8 and confirms that there is enough space to store the data to be sent; if the space is insufficient, it returns and waits; if the space is sufficient, it proceeds to step 4).

[0043] 4) Create a data frame lookup table 5 belonging to this data frame in shared memory 3;

[0044] 5) Data sending core 1 writes the data to be sent into the circular buffer 8 and updates the relevant information in the data frame lookup table 5, including the data frame number, data storage address, data update status and update tail pointer;

[0045] 6) Data sending core 1 notifies data receiving core 2 (such as core 2) that the data is ready via inter-core interrupt, or data receiving core 2 actively queries the data update status in the circular buffer;

[0046] 7) Data receiving core 2 obtains information about new data by accessing data frame lookup table 5, including data frame number, data storage address and data length, and reads the corresponding data from circular buffer 8.

[0047] After writing data into the circular buffer 8, the data sending core 1 can actively or passively notify the data receiving core 2 to receive new data.

[0048] The specific implementation process of this invention includes two parts: a data sending core process and a data receiving core process. The specific process is as follows:

[0049] See Figure 4 The data transmission core process of this invention is as follows:

[0050] Data sending core 1 (e.g., core 1) first checks if there is sufficient available space in the circular buffer 8. If space is insufficient, it returns and waits; if space is sufficient, it creates a data frame lookup table 5 for the data frame in shared memory 3. The method for determining if there is sufficient available space in the circular buffer 8 is as follows: the number of bytes remaining in the circular buffer = head pointer 6 - tail pointer 7. When the amount of data to be written is less than or equal to the number of bytes remaining in the circular buffer, the space is considered sufficient; otherwise, the space is considered insufficient. Creating the data frame lookup table 5 for the data frame involves: frame number + 1, frame start address = current tail pointer, frame length = number of bytes to be written, defining the frame lock state as locked, and defining the frame status as "data updated". Data sending core 1 writes the data to be sent into the circular buffer 8 in shared memory 3 and updates the relevant information in the data frame lookup table 5. Specific operations include recording the data frame number, data storage address, and data update status in the data frame lookup table 5, and updating the tail pointer 7 to point to the new data position.

[0051] Then, data sending core 1 sends an interrupt signal to data receiving core 2 (e.g., core 2) through interrupt control unit 4, notifying it that new data is available to read. Data receiving core 2 can also determine whether the data frame to be received is ready by querying whether the data frame number has been updated and by querying the data update status to determine whether it is new data. If data receiving core 2 detects the interrupt signal initiated by data sending core 1 or actively queries to find that the data is ready, it can enter the data receiving process.

[0052] See Figure 5 The data receiving core process of this invention is as follows:

[0053] Data receiving core 2 (core 2) checks if the corresponding data sending core 1 has issued an interrupt, or if data receiving core 2 has generated a new frame number, and if the data status is updated and the frame is in an unlocked state. If not, it returns and waits. If so, data receiving core 2 searches for the data frame lookup table 5 belonging to the data frame in shared memory 3, looks up the frame start address, frame length, and defined frame lock status. According to the information defined in data lookup table 5, it reads the frame length data from the frame start address, changes the frame status to "processed", and updates the header pointer 6. Based on the information obtained from data frame lookup table 5, data receiving core 2 reads the corresponding data (including data frame number, storage address, data frame length, data update status, etc.) from the circular buffer 8 in shared memory 3. After completing the data reading, data receiving core 2 updates the data status in data frame lookup table 5, marking the data as "processed". Then, data receiving core 2 executes the data processing task, completing the entire process of inter-core data transmission.

[0054] The above are merely specific embodiments disclosed in this invention, but the scope of protection disclosed in this invention is not limited thereto. The scope of protection disclosed in this invention should be determined by the scope of the claims.

[0055] The technical contents of this invention and those not specifically described in the above embodiments are the same as those in the prior art.

[0056] The present invention is not limited to the above embodiments; all embodiments described herein can be implemented and have the aforementioned good effects.

Claims

1. A communication method for an on-chip inter-core communication system, characterized in that: The on-chip inter-core communication system includes multiple processor cores, shared memory, and an interrupt control unit. The shared memory is connected to the multiple processor cores, and the multiple processor cores are respectively connected to the interrupt control unit. The multiple processor cores are divided into data sending cores and data receiving cores, which are responsible for executing tasks and inter-core communication. The shared memory is internally divided into a data frame lookup table and a circular buffer. The data frame lookup table records the data frame number, data storage address, data update status, current availability status of the circular buffer, and data lock status information, wherein the data frame number is a unique identifier for the data frame; The data storage address is used to point to a specific location in the circular buffer; the data update status is used to indicate whether the data is valid; the current availability status of the circular buffer, including the head pointer and the tail pointer, is used to calculate and indicate the current available space of the circular buffer. The data locking state is used to prevent collisions during data transmission; the circular buffer is used for cyclic storage of data frames, and its length is designed according to the actual needs of the system to ensure that there is enough space to store data, and memory space is not pre-divided. The interrupt control unit is used to handle inter-core interrupts. Each processor core has its own dedicated data frame lookup table and a circular buffer. The method includes the following steps: 1) Establish a data frame lookup table between processor cores. This data frame lookup table records the data frame number, data storage address, data update status, current availability status of the circular buffer, and data lock status information. The data lock status information is used to prevent conflicts during data transmission. 2) Create a circular buffer to store data frames, which are stored cyclically with the first and last frames connected. In the circular buffer, the data storage area is not pre-divided into memory, but is stored continuously in a circular manner according to the actual size of the data frames. 3) Before writing data, the data sending core first checks the available space in the circular buffer and confirms that there is enough space to store the data to be sent; if the space is insufficient, it returns and waits; if the space is sufficient, it proceeds to step 4). 4) Create a data frame lookup table in shared memory for this data frame; 5) The data sending core writes the data to be sent into the circular buffer and updates the relevant information in the data frame lookup table, including the data frame number, data storage address, data update status, and update tail pointer; 6) The data sending core notifies the data receiving core that the data is ready through inter-core interrupt, or the data receiving core actively queries the data update status in the circular buffer; 7) The data receiving core obtains information about new data by accessing the data frame lookup table, including the data frame number, data storage address, and data length, and reads the corresponding data from the circular buffer.

2. The communication method of the on-chip inter-core communication system according to claim 1, characterized in that: The method for determining whether the available space in the circular buffer is sufficient in step 3) is as follows: the number of bytes of remaining space in the circular buffer = head pointer - tail pointer. When the amount of data to be written is less than or equal to the number of bytes of remaining space in the circular buffer, the space is considered sufficient; otherwise, the space is considered insufficient.

3. The communication method of the on-chip inter-core communication system according to claim 2, characterized in that: The specific steps in step 4) of creating a data frame lookup table belonging to this data frame are as follows: Frame number + 1 Frame start address = current tail pointer Frame length = number of bytes of data to be written Define the frame locking state as locked. The frame state is defined as "data updated".

4. The communication method of the on-chip inter-core communication system according to claim 3, characterized in that: The specific steps of step 5) are as follows: according to the data frame lookup table information definition of the data frame, write the data to be sent into the address recorded in the frame start address in the circular buffer according to the frame length, change the frame lock status to unlock, and update the tail pointer.

5. The communication method of the on-chip inter-core communication system according to claim 4, characterized in that: The specific steps of step 6) are as follows: the data receiving core checks whether the corresponding data sending core has issued an interruption, or the data receiving core queries whether a new frame number has been generated, and the data status is updated and the frame is in an unlocked state. If not, it returns and waits; if so, it proceeds to step 7).

6. The communication method of the on-chip inter-core communication system according to claim 5, characterized in that: The specific steps of step 7) are as follows: search the data frame lookup table belonging to the data frame in the shared memory, find the frame start address, frame length, define the frame lock state, read the frame length data from the frame start address according to the information defined in the data frame lookup table, change the frame state to "processed", and update the head pointer.

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