Chip test parameter temperature compensation and quality evaluation method

Abstract

The invention provides a chip test parameter temperature compensation and quality evaluation method, and relates to the technical field of chip testing. According to the method, the relation between the temperature and other factors and the to-be-measured parameters is determined through correlation operation, the influence of the temperature on the to-be-measured parameters is accurately compensated through a fitting regression data processing method, accurate data is provided for training of a subsequent quality evaluation prediction model, and therefore the accuracy, reliability and efficiency of quality evaluation are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular to a chip testing parameter temperature compensation method and a chip quality evaluation method. Background Art

[0002] With the development of integrated circuit technology, more and more modules are integrated inside the chip, and the failure modes in the production process have also increased accordingly, and the importance of chip testing has become increasingly prominent. In the era of high-performance CPU, GPU, NPU, DSP and SoC, the integrated packaging and testing structure can no longer meet the testing needs, and the trend of packaging and testing separation is gradually increasing. Chip testing is mainly divided into three stages: design verification, wafer testing and finished product testing. Design verification verifies whether the design meets the required specifications before the chip is produced, releases risks, and discovers and corrects defects. Among them, FT testing (finished product testing, Final Test) is the last interception before the chip leaves the factory, which has an important impact on chip quality control and yield improvement.

[0003] In FT testing, some high-specification chips such as automotive-grade, military-grade, and aerospace-grade chips have strict requirements on the performance of various aspects of the chip under three temperatures (high, low, and normal temperature). However, when the FT testing department evaluates the chip quality based on the chip test results, they will refer to the parameter manual provided by the chip manufacturer and the engineer's own experience. However, when the test results are unstable or offset, these methods are difficult to provide a reliable reference, resulting in inaccurate evaluation results. In actual operation, temperature differences are the main reason for the instability of test results, so engineers hope to find out whether there is a specific relationship between temperature and chip parameters. In the existing technology, direct fitting or least squares method is generally used to directly obtain a relationship curve between temperature and test parameters.

[0004] However, the above relationship curve does not take into account the impact of other potential test parameters, has a large error, and cannot accurately reflect the actual performance of the chip under different working conditions. Summary of the invention

[0005] 1. Technical issues to be solved

[0006] In view of the deficiencies in the prior art, the present invention provides a chip test parameter temperature compensation method and a chip quality assessment method, which solve the technical problem that the relationship curve between temperature and test parameters obtained by the prior method has a large error.

[0007] (II) Technical solution

[0008] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0009] In a first aspect, the present invention provides a chip test parameter temperature compensation method, comprising:

[0010] Obtain the chip data set collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain the highly correlated parameter with the strongest correlation with the parameter to be tested;

[0011] Perform fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtain the first ideal value of the parameter to be measured corresponding to the highly correlated parameter;

[0012] Perform fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtain an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0013] A compensation difference is obtained according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and the compensated parameter to be measured is determined according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

[0014] Preferably, the chip test parameter temperature compensation method according to claim 1 is characterized in that the fitting regression of the highly correlated parameter and the original parameter value to be measured comprises:

[0015] Linear fitting is used to perform fitting regression on the highly correlated parameters and the original measured parameter values.

[0016] Preferably, performing fitting regression on the temperature and the original parameter value to be measured includes:

[0017] A first-order exponential fit is used to fit and regress the temperature and the original measured parameter value.

[0018] In a second aspect, the present invention provides a chip test parameter temperature compensation system, comprising:

[0019] The data acquisition module is used to acquire the chip data set collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain the highly correlated parameter with the strongest correlation with the parameter to be tested;

[0020] A first fitting regression module is used to perform fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtain an ideal value of the first parameter to be measured corresponding to the highly correlated parameter;

[0021] A second fitting regression module performs fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtains an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0022] The compensation module is used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

[0023] In a third aspect, the present invention provides a chip quality assessment method, comprising:

[0024] S21, obtaining a chip data set including several chips collected by the test program, performing feature screening and sorting on each parameter in the data set to obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameter to be tested;

[0025] S22, performing fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured to obtain a first fitting curve; and obtaining an ideal value of the first parameter to be measured corresponding to the highly correlated parameters;

[0026] S23, performing fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtaining an ideal value of the second parameter to be measured and an ideal value of the highly correlated parameter corresponding to the temperature from the fitting curve;

[0027] S24, obtaining a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determining the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured;

[0028] S25, performing fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve;

[0029] S26, dividing a number of chips corresponding to each data in the feature set into “excellent class” and “ordinary class” by a high-precision fitting curve, and obtaining a labeled data set;

[0030] S27. Train the pre-built GBDT model with the labeled data set to obtain a chip quality assessment prediction model, where the chip quality assessment prediction model is used to classify the chips into “excellent class” and “ordinary class”.

[0031] Preferably, the feature screening and sorting of each parameter in the data set to obtain a feature set includes:

[0032] Preprocess the data set and perform Z-score standardization on the preprocessed data set;

[0033] Through the recursive feature elimination algorithm, a multi-dimensional feature subset is dynamically generated through an iterative strategy combining forward selection and backward elimination;

[0034] Under the premise of maintaining the consistency of data distribution, the five-fold cross-validation method is used to train the gradient boosting tree model for each feature subset, and the classification accuracy is used as the core indicator to evaluate the effectiveness of the feature combination;

[0035] Based on the Pareto optimal principle, the feature subset with the best comprehensive performance is selected, and the top n key feature parameters are output in descending order of feature importance to construct the final feature set.

[0036] Preferably, performing fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured includes:

[0037] Linear fitting is used to perform fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured.

[0038] Preferably, performing fitting regression on the temperature and the original parameter value to be measured includes:

[0039] A first-order exponential fit is used to fit and regress the temperature and the original measured parameter value.

[0040] In a fourth aspect, the present invention provides a chip quality assessment system, characterized in that it includes:

[0041] The data set acquisition module is used to acquire a chip data set including several chips collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameters to be tested;

[0042] A first fitting module is used to perform fitting regression on the highly correlated parameters in the feature set and the original parameter value to be measured to obtain a first fitting curve; and to obtain an ideal value of the first parameter to be measured corresponding to the highly correlated parameter;

[0043] A second fitting module is used to perform fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtain an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0044] A compensation module, used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured;

[0045] The third fitting module is used to perform fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve;

[0046] The label module is used to classify the chips corresponding to each data in the feature set into "excellent class" and "ordinary class" through a high-precision fitting curve to obtain a labeled data set;

[0047] The model training module is used to train the pre-built GBDT model through a data set with a labeled data set to obtain a chip quality assessment prediction model, and the chip quality assessment prediction model is used to classify the chip into an "excellent class" and a "normal class".

[0048] In a fifth aspect, the present invention provides a computer-readable storage medium, characterized in that it stores a computer program for chip quality assessment, wherein the computer program enables a computer to execute the chip quality assessment method as described above.

[0049] (III) Beneficial effects

[0050] The present invention provides a chip test parameter temperature compensation method and a chip quality assessment method. Compared with the prior art, the present invention has the following beneficial effects:

[0051] The present invention determines the relationship between temperature and other factors and the measured parameters through correlation calculations, and uses the fitting regression data processing method to accurately compensate for the influence of temperature on the measured parameters, providing accurate data for the subsequent training of the chip quality assessment prediction model, thereby improving the accuracy, reliability and efficiency of chip quality assessment. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0053] Figure 1 is a block diagram of the chip test parameter temperature compensation method in Example 1;

[0054] Figure 2 is a block diagram of the chip quality assessment method in Example 3;

[0055] Figure 3 is the scatter plot model before temperature compensation;

[0056] Figure 4 It is the scatter plot model after temperature compensation;

[0057] Figure 5 Schematic diagram for comparing the results of different classification models. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0059] The embodiments of the present application provide a chip test parameter temperature compensation method and a chip quality assessment method, thereby solving the technical problem that the temperature and test parameter relationship curve obtained by the existing method has a large error, and accurately determining the relationship between the chip test parameters and the temperature.

[0060] The technical solution in the embodiment of the present application is to solve the above technical problems, and the overall idea is as follows:

[0061] Due to the technical problem that the temperature and test parameter relationship curve obtained by the existing method has a large error, the following defects will occur when evaluating the quality of the chip in the FT test:

[0062] 1. Defects in determining evaluation indicators: Traditional chip test quality evaluation indicators are usually static fixed values ​​set based on engineers' experience and statistical principles (such as the 6σ theorem). This method has obvious limitations. First, this experience-based threshold setting is often too conservative and cannot accurately reflect the actual performance of the chip under different working conditions, resulting in some potential defects that cannot be effectively identified. For example, in an environment with large temperature changes, the performance of the chip may change significantly, but the static threshold cannot adapt to such changes, thereby increasing the risk of misjudgment and missed judgment. Secondly, although the 6σ theorem can guarantee product quality to a certain extent, it cannot accurately reflect the performance of the chip in actual applications, especially when faced with complex chip structures and changing working conditions, its applicability is limited.

[0063] 2. Defects in technical methods: Traditional chip testing technology mainly focuses on the testing of a single parameter, ignoring the mutual influence between parameters. In actual chip work, various parameters are often interrelated, and changes in one parameter may affect other parameters, thereby affecting the overall performance of the chip. However, traditional testing methods fail to fully consider the correlation between such parameters, resulting in inaccurate and incomplete test results. In addition, traditional testing methods also have shortcomings when dealing with complex chip structures and changing working conditions. With the continuous improvement of chip integration, the internal structure of the chip is becoming more and more complex. Traditional testing methods are difficult to fully cover all possible defects and failure modes, and are prone to test blind spots. At the same time, when faced with different working conditions, such as high and low temperatures, different voltages, etc., traditional testing methods lack effective adaptability and flexibility, and cannot accurately evaluate the performance of chips under various conditions.

[0064] 3. The impact of the evolutionary background of integrated circuit products on integrated circuit testing: With the continuous development of integrated circuit technology, the integration and performance of chips are constantly improving, which puts higher requirements on chip testing. First, the complexity of the internal structure of the chip makes it more difficult to detect and locate defects. Traditional testing methods are difficult to meet the comprehensive detection needs of complex chip structures, and are prone to inaccurate or missed tests. Secondly, the improvement of chip performance also poses challenges to testing technology. In order to ensure the stability and reliability of chips under high-performance conditions, more accurate and efficient testing methods are needed to evaluate the performance of chips. However, traditional testing methods have deficiencies in test accuracy and efficiency, and it is difficult to meet the needs of modern chip testing. In addition, with the continuous expansion of chip application fields, chips need to operate stably under a variety of different working conditions, which puts higher requirements on the adaptability and reliability of chip testing. Traditional testing methods often fail to provide accurate and reliable test results when faced with changing working conditions, which affects the quality and performance evaluation of chips.

[0065] In order to solve the above problems, the embodiments of the present invention propose a chip test parameter temperature compensation method and a chip quality assessment method to solve the following problems:

[0066] 1. Traditional chip test quality evaluation indicators are usually static fixed values ​​set based on engineer experience and statistical principles, which cannot accurately reflect the actual performance of the chip under different working conditions. The embodiment of the present invention determines the relationship between temperature and other factors and the parameters to be measured through correlation calculation, and uses the data processing method of fitting regression to accurately compensate for the influence of temperature on the parameters to be measured, thereby more accurately determining the quality evaluation indicators and improving the accuracy and reliability of chip testing.

[0067] 2. Traditional testing technology ignores the mutual influence between parameters, resulting in inaccurate and incomplete test results. The embodiment of the present invention compensates for the influence of other highly correlated parameters on the parameters to be measured by fitting and regressing the highly correlated parameters and the parameters to be measured, thus highlighting the true relationship between temperature and the parameters to be measured, and making the test results more accurate and comprehensive.

[0068] 3. With the development of integrated circuit technology, the internal structure of chips is becoming more and more complex, and the performance is constantly improving, which puts higher requirements on testing technology. The method of the present invention can adapt to complex chip structures and variable working conditions, effectively detect and locate defects, and ensure the stability and reliability of chips under high-performance conditions. For example, in high and low temperature environments, the performance of the chip may change significantly. The method of the present invention can accurately evaluate the performance of the chip under different temperature conditions through temperature compensation, meeting the needs of modern chip testing.

[0069] 4. When dealing with complex chip structures and variable working conditions, traditional testing methods often have inaccurate tests or omissions, resulting in low test efficiency and increased costs. The embodiments of the present invention improve the accuracy and efficiency of the test, reduce test time and resource consumption, and reduce test costs by accurately compensating the test data for temperature.

[0070] 5. The method of the embodiment of the present invention is not only applicable to traditional chip testing, but also can adapt to emerging chip technologies and application requirements, such as chip testing in the fields of the Internet of Things and artificial intelligence. By optimizing and improving the temperature compensation technology, the method of the embodiment of the present invention can better meet the chip testing requirements in different application scenarios and improve the adaptability and flexibility of the testing technology.

[0071] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0072] Embodiment 1:

[0073] This embodiment provides a chip test parameter temperature compensation method, such as Figure 1 As shown, including:

[0074] S11, obtaining a chip data set collected by the test program, performing feature screening and sorting on each parameter in the data set, and obtaining a highly correlated parameter with the strongest correlation with the parameter to be tested;

[0075] S12, performing fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtaining an ideal value of the first parameter to be measured corresponding to the highly correlated parameter;

[0076] S13, performing fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtaining an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0077] S14, obtaining a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determining the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

[0078] The compensated parameter to be measured is the compensation difference + the original test value to be measured, wherein the compensation difference is equal to the ideal value of the second parameter to be measured minus the ideal value of the first parameter to be measured.

[0079] The embodiment of the present invention determines the relationship between temperature and other factors and the parameters to be measured through correlation calculations, and uses a fitting regression data processing method to accurately compensate for the influence of temperature on the parameters to be measured, thereby providing accurate data for the training of subsequent chip quality evaluation prediction models, thereby improving the accuracy, reliability and efficiency of chip evaluation.

[0080] In one embodiment, S11, obtain a chip data set collected by a test program, perform feature screening and sorting on each parameter in the data set, and obtain a highly correlated parameter with the strongest correlation with the parameter to be tested. Specifically, it includes:

[0081] The features in the chip data set include the DC parameters of each module of the chip, as well as the results of chip quality tests (such as DFT-design for test), etc.

[0082] The feature screening process adopts a wrapper-based feature selection method, which specifically includes the following steps: first, the data set is preprocessed, missing values ​​are filled with the mean, and the data is Z-score standardized; then the gradient boosting tree (GBDT) model is selected as the evaluator, and the recursive feature elimination (RFE) method is used to generate feature subsets; then each feature subset is trained and evaluated, and the feature subset with the best performance is selected as the final screening result, and the highly correlated parameters with the strongest correlation with the parameters to be tested are output.

[0083] In one embodiment, S12, performing fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtaining a first ideal value of the parameter to be measured corresponding to the highly correlated parameter.

[0084] Specifically include:

[0085] The characteristic parameters with the highest correlation ranking in the screened data set are fitted and regressed with the parameters to be tested, and the fitting method is linear fitting. The ideal value 1 of the parameter to be tested corresponding to the highest correlation parameter value of each chip is obtained through the fitted relationship, which is temporarily called the first ideal value of the parameter to be tested.

[0086] In one embodiment, S13, fitting regression is performed on the temperature and the original parameter value to be measured to obtain a second fitting curve, and the ideal value of the second parameter to be measured and the ideal value of the highly correlated parameter corresponding to the temperature are obtained from the fitting curve. Specifically, it includes:

[0087] The chip temperature and the parameter value to be measured are fitted. The fitting method uses a single exponential fitting, which is determined by the temperature dependence of the physical properties of semiconductor materials and leakage current (IDDQ test mainly tests the leakage current of each circuit of the chip) in a high temperature environment. The ideal value 2 of the parameter to be measured at the corresponding internal temperature of each chip is obtained through the fitted relationship, which is temporarily called the second ideal value of the parameter to be measured.

[0088] Embodiment 2:

[0089] An embodiment of the present invention provides a chip test parameter temperature compensation system, comprising:

[0090] The data acquisition module is used to acquire the chip data set collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain the highly correlated parameter with the strongest correlation with the parameter to be tested;

[0091] A first fitting regression module is used to perform fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtain an ideal value of the first parameter to be measured corresponding to the highly correlated parameter;

[0092] A second fitting regression module performs fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtains an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0093] The compensation module is used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

[0094] It can be understood that the chip test parameter temperature compensation system provided in the embodiment of the present invention corresponds to the above-mentioned chip test parameter temperature compensation method. The explanations, examples, beneficial effects and other parts of the relevant contents can refer to the corresponding contents in the chip test parameter temperature compensation method, and will not be repeated here.

[0095] Embodiment 3:

[0096] This embodiment provides a chip quality assessment method, such as Figure 2 As shown, including:

[0097] S21, obtaining a chip data set including several chips collected by the test program, performing feature screening and sorting on each parameter in the data set to obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameter to be tested;

[0098] S22, performing fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured to obtain a first fitting curve; and obtaining an ideal value of the first parameter to be measured corresponding to the highly correlated parameters;

[0099] S23, performing fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtaining an ideal value of the second parameter to be measured and an ideal value of the highly correlated parameter corresponding to the temperature from the fitting curve;

[0100] S24, obtaining a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determining the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured;

[0101] S25, performing fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve;

[0102] S26, dividing a number of chips corresponding to each data in the feature set into “excellent class” and “ordinary class” by a high-precision fitting curve, and obtaining a labeled data set;

[0103] S27. Train the pre-built GBDT model with the labeled data set to obtain a chip quality assessment prediction model, where the chip quality assessment prediction model is used to classify the chips into “excellent class” and “ordinary class”.

[0104] In one embodiment, S21 obtains a chip data set including several chips collected by the test program, performs feature screening and sorting on each parameter in the data set to obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameter to be tested, specifically including:

[0105] The feature screening process adopts a wrapper feature selection strategy and is implemented through an iterative feature subset optimization mechanism, which specifically includes the following steps:

[0106] (1) Data preprocessing: The mean interpolation method was used to process missing data to ensure sample integrity, and the Z-score standardization method was used to eliminate the impact of dimensional differences on the model;

[0107] (2) Feature evaluation architecture construction: Gradient boosting tree (GBDT) is selected as the core evaluation model. Its high prediction accuracy and feature importance quantification ability can provide a reliable benchmark for feature evaluation;

[0108] (3) Recursive feature selection: Combined with the recursive feature elimination (RFE) algorithm, a multi-dimensional feature subset is dynamically generated through an iterative strategy combining forward selection and backward elimination;

[0109] (4) Subset performance verification: Under the premise of maintaining the consistency of data distribution, the five-fold cross-validation method is used to train the model for each feature subset, and the classification accuracy is used as the core indicator to evaluate the effectiveness of the feature combination;

[0110] (5) Optimal feature output: Based on the Pareto optimal principle, the feature subset with the best comprehensive performance is selected, and the top 10 key feature parameters are output in descending order of feature importance to construct the final feature set.

[0111] It should be noted that, in this embodiment, the pre-built GBDT model consists of a decision tree base model, a loss function, a learning rate, regularization, the number of decision trees, feature selection and classification.

[0112] This embodiment is described in detail below by performing chip quality evaluation based on the test results of static leakage current (IDDQ, Integrated Circuit Quiescent Current).

[0113] Static leakage current test technology is an important method in integrated circuit manufacturing and testing, which is specifically used to detect leakage current and manufacturing defects in chips. It determines whether the chip has defects based on the leakage current of low-power CMOS circuits in a static state. IDDQ testing can detect defects in the chip manufacturing process that are difficult to capture through functional testing, and also has good detection capabilities for physical defects such as bridging and short circuits. IDDQ testing also does not require complex functional excitation, which can simplify the design and testing process. However, with the improvement of process technology, the process size of new products is constantly shrinking, the normal leakage current is increasing, and the static current of CMOS devices themselves may be high, making it more difficult to distinguish defects from normal currents.

[0114] The above chip quality assessment method is used to pre-classify the chips through IDDQ test to distinguish "high-rated chips" from "normal-rated chips". The specific process is as follows:

[0115] S31, feature screening and sorting the chip data set collected by the test program to obtain a parameter x that has a high correlation with the parameter to be tested IDDQ. In the embodiment, test data of 3,000 chips of an advanced driver assistance system are collected, and the DC parameters and static leakage current data of the chip are used as data sets. Each chip is tested independently and successively without interfering with each other.

[0116] S32 , performing fitting regression on the parameter x and IDDQ to obtain a first fitting curve, and obtaining an ideal value IDDQ1 of IDDQ corresponding to the parameter x.

[0117] S33, performing fitting regression on the temperature and the parameter x to obtain a second fitting curve, and obtaining an ideal value x1 of the parameter x corresponding to the temperature.

[0118] S34, bring the ideal value x1 into the first fitting curve to obtain the ideal IDDQ2. The compensation difference is the difference between IDDQ2 and IDDQ1, and the compensated IDDQ is the original IDDQ value plus the compensation difference. At this time, the scatter plot model composed of the two data of "temperature" and "compensated IDDQ value" is more convergent. The scatter plot model before temperature compensation (i.e., the scatter plot model composed of the two data of "temperature" and "original IDDQ value") is as follows: Figure 3 As shown, the scatter plot model after temperature supplementation is as follows Figure 4 shown.

[0119] S35. Use the temperature and compensated IDDQ model (i.e., the scatter plot model composed of the two data of "temperature" and "compensated IDDQ value") to perform fitting regression to obtain a high-precision fitting curve with higher accuracy.

[0120] S36, performing feature screening based on the wrapper feature selection method on the chip test data set to obtain a more streamlined data set, labeling the chip IDDQ parameter data, and dividing the chips into "high evaluation chips" and "ordinary evaluation chips" according to the high-precision fitting curve;

[0121] S37. Train the pre-built GBDT model using the labeled data set to obtain a chip quality assessment prediction model.

[0122] During the specific implementation process, it also includes evaluating the classification results of the GBDT model for the chip.

[0123] In this embodiment, the pre-built GBDT model consists of a decision tree base model, a loss function, a learning rate, regularization, the number of decision trees, feature selection and classification. GBDT is an algorithm based on gradient boosting, the core of which is to gradually stack multiple decision trees, each tree is based on the residual of the previous tree to learn, and finally obtain a powerful integrated model. The loss function is used to measure the gap between the predicted value and the true value of the model and guide the learning process of the model. Different tasks require different loss functions. The learning rate is an important hyperparameter in GBDT, which controls the amplitude of the model update in each round of iteration. It determines the contribution of the newly added base learner to the overall model. Choosing a suitable learning rate has a significant impact on the convergence speed and final performance of the model. The main purpose of regularization is to balance the accuracy of the model on the training set and the generalization ability on the test set. Overly complex models may overfit the training data, while simple models may be underfitting and cannot capture the patterns in the data well. Regularization helps the model find a balance between the two. The number of decision trees, that is, the number of iterations, is a key hyperparameter. The number of decision trees affects the performance and training efficiency of the model. It is usually necessary to find a balance between model complexity and computational overhead. Feature selection refers to selecting the features that can best improve model performance from all candidate features for building decision trees. It can speed up training, reduce computational complexity, and improve the generalization ability of the model. In the classification task of GBDT, the model continuously improves the classification effect through additive iteration.

[0124] In the specific implementation process, the chip can be tested using an ATE machine to obtain the test data of the chip, and then the package feature selection method can be used to screen out the appropriate data set, and then divide it into training set and validation set for GBDT model training.

[0125] Furthermore, the GBDT model training process is as follows: separate the features of the chip dataset from the target classification labels, and prepare the feature matrix and label vector. The data contains 3,000 sets of test parameters of automotive-grade chips, of which the IDDQ parameters are the basis for classification.

[0126] The 15 parameters with the highest importance to the chip test results, such as chip temperature and current parameters, are selected as feature columns, and the chip classification labels are "highly evaluated chip (1)" and "normally evaluated chip (0)". The data set is divided into a training set and a test set in a ratio of 8:2.

[0127] Use the GradientBoostingClassifier of the GBDT model for classification.

[0128] Use the trained GBDT model to predict the test set and evaluate the model performance. In order to achieve the best training effect, in the specific implementation process, it is necessary to adjust the parameters of each part of the GBDT model: the number of decision trees, learning rate, maximum depth of each tree, row sampling ratio, and column sampling strategy. Increasing the number of decision trees can improve model accuracy, but the training time will increase accordingly. Appropriately reducing the learning rate and the number of decision trees can also enhance the generalization ability of the model. Increasing the depth of the decision tree can enhance the fitting ability of the model, but it may also cause overfitting. Appropriately adjusting the sampling can reduce overfitting, thereby increasing the robustness of the model.

[0129] This embodiment uses several key evaluation indicators to measure the quality of the segmentation result, including accuracy, precision, and recall.

[0130] Next, a comparative experiment was conducted between the traditional static numerical determination index and the dynamic numerical determination index based on IDDQ and temperature compensation to evaluate their advantages and disadvantages in the determination effect under chip dynamic test conditions.

[0131] Taking the commonly used static fixed IDDQ value as the classification standard, the threshold value is set to 2500mA for this embodiment, and the chip is input into the GBDT classification model according to its current and temperature data, and the prediction results of the superior class and the ordinary class are output. According to this embodiment, the threshold value of IDDQ is dynamically associated with the temperature change of the chip so that IDDQ changes with temperature. The sequence forward selection method of package feature selection is used to screen out 15 feature parameters for 3000 automotive chips, and the parameter x with the strongest correlation is obtained. Fitting regression is performed on the parameter x-IDDQ to obtain a fitting curve, and the ideal IDDQ value IDDQ1 corresponding to the parameter x is obtained. Fitting regression is performed on the temperature-parameter x to obtain a fitting curve, and the ideal value x1 of the parameter x corresponding to the temperature is obtained. Substitute x1 into the second fitting curve to obtain the ideal IDDQ2. The compensation difference is the difference between IDDQ2 and IDDQ1, and the compensated IDDQ is the original IDDQ value plus the compensation difference. At this time, the scatter plot model composed of the two data "temperature" and "compensated IDDQ value" is more convergent. The model at this time is used for fitting regression to obtain the temperature-based IDDQ dynamic index.

[0132] Through dynamic indicators, the model can adapt to the impact of temperature on IDDQ, thereby classifying chips more accurately. The classification effects of the two experimental methods are compared through the accuracy, precision and recall of model predictions to observe whether dynamic indicators can improve the adaptability and classification effect of the model under temperature changes.

[0133] Under static indicators, the accuracy, precision, and recall of the model for classification prediction are 84.94%, 84.91%, and 84.92% respectively. Under dynamic indicators, the accuracy, precision, and recall of the model for classification prediction are 92.95%, 92.92%, and 92.92% respectively. By comparison, it can be seen that the model has better prediction ability under dynamic indicators.

[0134] Under dynamic indicators, the accuracy, precision and recall of the model for classification prediction are 92.95%, 92.92% and 92.92% respectively. The comparison shows that the model has better prediction ability under dynamic indicators.

[0135] In the study of the embodiments of the present invention, an in-depth comparative analysis was conducted to evaluate the performance of different machine learning models on specific tasks. For this purpose, three widely recognized ensemble learning classification algorithms were selected: Random Forest, Adaboost, and XGBoost, and their performance was compared with that of GradientBoostingClassifier (e.g. Figure 5 As shown in the figure, it can be found that the overall effect of XGBoost and GradientBoostingClassifier is better than Random Forest and Adaboost. In XGBoost and GradientBoostingClassifier, GradientBoostingClassifier has a 2.98% improvement in accuracy compared to XGBoost. The accuracy of GradientBoostingClassifier in identifying Class 1 chips has reached 0.938, and the accuracy in identifying Class 2 chips has reached a high level of 0.902. This result shows that GradientBoostingClassifier has the advantage of high accuracy in numerical classification tasks.

[0136] Embodiment 4:

[0137] This embodiment provides a chip quality assessment system, including:

[0138] The data set acquisition module is used to acquire a chip data set including several chips collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameters to be tested;

[0139] A first fitting module is used to perform fitting regression on the highly correlated parameters in the feature set and the original parameter value to be measured to obtain a first fitting curve; and to obtain an ideal value of the first parameter to be measured corresponding to the highly correlated parameter;

[0140] A second fitting module is used to perform fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtain an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve;

[0141] A compensation module, used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured;

[0142] The third fitting module is used to perform fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve;

[0143] The label module is used to classify the chips corresponding to each data in the feature set into "excellent class" and "ordinary class" through a high-precision fitting curve to obtain a labeled data set;

[0144] The model training module is used to train the pre-built GBDT model through a data set with a labeled data set to obtain a chip quality assessment prediction model, and the chip quality assessment prediction model is used to classify the chip into an "excellent class" and a "normal class".

[0145] It is understandable that the chip quality assessment system provided in the embodiment of the present invention corresponds to the above-mentioned chip quality assessment method, and the explanations, examples, beneficial effects and other parts of its relevant contents can refer to the corresponding contents in the chip quality assessment method, which will not be repeated here.

[0146] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program for chip quality assessment, wherein the computer program enables a computer to execute the chip quality assessment method as described above.

[0147] In summary, compared with the prior art, the present invention has the following beneficial effects:

[0148] 1. The embodiment of the present invention determines the relationship between temperature and other factors and the measured parameters through correlation calculation, and uses the data processing method of fitting regression to accurately compensate for the influence of temperature on the measured parameters, thereby providing accurate data for the training of subsequent chip quality assessment prediction model, thereby improving the accuracy, reliability and efficiency of chip quality assessment.

[0149] 2. The dynamic indicator determination method enables chip testing to adapt to different temperature conditions, improves reliability in various working environments, ensures more accurate performance evaluation of the chip within different temperature ranges, and is suitable for real-time data detection in laboratory testing and actual mass production.

[0150] 3. After compensating for the influence of other related parameters, the relationship between temperature and the measured parameters is clearer, making the detection more sensitive to temperature changes, and being able to promptly detect chip performance abnormalities caused by temperature changes, optimize detection sensitivity, and discover potential chip quality problems in advance.

[0151] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0152] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A temperature compensation method for chip test parameters, characterized in that: include: Obtain the chip data set collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain the highly correlated parameter with the strongest correlation with the parameter to be tested; Perform fitting regression on the highly correlated parameters and the original measured parameter values ​​to obtain a first fitting curve; and obtaining an ideal value of a first parameter to be measured corresponding to a highly correlated parameter; Perform fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtain an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve; A compensation difference is obtained according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and the compensated parameter to be measured is determined according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

2. The temperature compensation method for chip test parameters according to claim 1, characterized in that: The fitting regression of the highly correlated parameter and the original parameter value to be measured includes: Linear fitting is used to perform fitting regression on the highly correlated parameters and the original measured parameter values.

3. The temperature compensation method for chip test parameters according to claim 1, characterized in that: The step of fitting and regressing the temperature and the original parameter value to be measured includes: A first-order exponential fit is used to fit and regress the temperature and the original measured parameter value.

4. A temperature compensation system for chip test parameters, characterized in that: include: The data acquisition module is used to acquire the chip data set collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain the highly correlated parameter with the strongest correlation with the parameter to be tested; A first fitting regression module is used to perform fitting regression on the highly correlated parameter and the original parameter value to be measured to obtain a first fitting curve; and obtaining an ideal value of a first parameter to be measured corresponding to a highly correlated parameter; A second fitting regression module performs fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtains an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve; The compensation module is used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured.

5. A chip quality assessment method, characterized in that: include: S21, obtaining a chip data set including several chips collected by the test program, performing feature screening and sorting on each parameter in the data set to obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameter to be tested; S22, performing fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured to obtain a first fitting curve; and obtaining an ideal value of the first parameter to be measured corresponding to the highly correlated parameters; S23, performing fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtaining an ideal value of the second parameter to be measured and an ideal value of the highly correlated parameter corresponding to the temperature from the fitting curve; S24, obtaining a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determining the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; and the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured; S25, performing fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve; S26, dividing a number of chips corresponding to each data in the feature set into "excellent class" and "ordinary class" by a high-precision fitting curve, and obtaining a labeled data set; S27. Train the pre-built GBDT model with the labeled data set to obtain a chip quality assessment prediction model, where the chip quality assessment prediction model is used to classify the chips into "excellent class" and "ordinary class".

6. The chip quality assessment method according to claim 5, characterized in that: The feature screening and sorting of each parameter in the data set is performed to obtain a feature set, including: Preprocess the data set and perform Z-score standardization on the preprocessed data set; Through the recursive feature elimination algorithm, a multi-dimensional feature subset is dynamically generated through an iterative strategy combining forward selection and backward elimination; Under the premise of maintaining the consistency of data distribution, the five-fold cross-validation method is used to train the gradient boosting tree model for each feature subset, and the classification accuracy is used as the core indicator to evaluate the effectiveness of the feature combination; Based on the Pareto optimal principle, the feature subset with the best comprehensive performance is selected, and the top n key feature parameters are output in descending order of feature importance to construct the final feature set.

7. The chip quality assessment method according to claim 5, characterized in that: The fitting regression of the highly correlated parameters in the feature set and the original parameter values ​​to be measured includes: Linear fitting is used to perform fitting regression on the highly correlated parameters in the feature set and the original parameter values ​​to be measured.

8. The chip quality assessment method according to claim 5, characterized in that: The step of fitting and regressing the temperature and the original parameter value to be measured includes: A first-order exponential fit is used to fit and regress the temperature and the original measured parameter value.

9. A chip quality assessment system, characterized in that: include: The data set acquisition module is used to acquire a chip data set including several chips collected by the test program, perform feature screening and sorting on each parameter in the data set, and obtain a feature set, wherein the feature set includes the top n highly correlated parameters with the strongest correlation with the parameters to be tested; A first fitting module is used to perform fitting regression on the highly correlated parameters in the feature set and the original parameter value to be measured to obtain a first fitting curve; and to obtain an ideal value of the first parameter to be measured corresponding to the highly correlated parameter; A second fitting module is used to perform fitting regression on the temperature and the original parameter value to be measured to obtain a second fitting curve, and obtain an ideal value of the second parameter to be measured and an ideal value of a highly correlated parameter corresponding to the temperature from the fitting curve; A compensation module, used to obtain a compensation difference according to the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured, and determine the compensated parameter to be measured according to the supplementary difference; wherein the compensation difference is the difference between the ideal value of the second parameter to be measured and the ideal value of the first parameter to be measured; the compensated parameter to be measured is the sum of the compensation difference and the original test value to be measured; The third fitting module is used to perform fitting regression using the temperature and the measured parameter after compensation to obtain a high-precision fitting curve; The label module is used to classify the chips corresponding to each data in the feature set into "excellent class" and "ordinary class" through a high-precision fitting curve to obtain a labeled data set; The model training module is used to train the pre-built GBDT model through the data set of the labeled data set to obtain the chip quality assessment prediction model, and the chip quality assessment prediction model is used to classify the chip into "excellent class" and "ordinary class".

10. A computer-readable storage medium, characterized in that: It stores a computer program for chip quality assessment, wherein the computer program enables a computer to execute the chip quality assessment method according to any one of claims 5 to 8.

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