FPGA-based low-pass filter design method

Abstract

The invention belongs to the technical field of laser radars, and provides a low-pass filter design method based on an FPGA (Field Programmable Gate Array), which comprises the following steps of: 1, designing an FIR (Finite Impulse Response) filter by utilizing a Filter Designer toolbox in Matlab, setting the sampling frequency to be 500MHZ, and setting the pass band frequency to be 50MHZ and the stop band frequency to be 55MHZ due to the need of filtering high-frequency noise; 2, setting a filter algorithm as a fixed point, and exporting a quantized filter coefficient in a coe file format; and 3, importing the filter coefficient obtained in the step 2 into the FPGA, and realizing a low-pass filter function in the FPGA through logical operation. According to the technical scheme, the low-pass filter module is added to the FPGA end, the input digital signals are filtered, high-frequency noise is remarkably attenuated or blocked, and low-frequency signals are allowed to pass smoothly.

Description

Technical Field

[0001] The present invention belongs to the technical field of laser radar, and in particular relates to a low-pass filter design method based on FPGA. Background Art

[0002] At present, the hardware architecture of high-speed analog-to-digital converter (ADC) + field programmable gate array (FPGA) is usually used in the signal processing module of laser wind measurement radar. ADC converts analog signals into digital signals to realize data acquisition, and FPGA performs algorithm processing on digital signals. In the wind measurement project, the signal source is a low-frequency signal, and the information processing board has inherent high-frequency noise generated by circuit components. The existence of high-frequency noise has a serious impact on the stability of the information processing module, which not only causes signal distortion but also greatly weakens the circuit performance. Summary of the invention

[0003] 1. Technical issues to be resolved

[0004] The technical problem to be solved by the present invention is: in the wind measurement project, the signal source is a low-frequency signal, and the information processing board has inherent high-frequency noise generated by circuit components. The existence of high-frequency noise has a serious impact on the stability of the information processing module, which not only causes signal distortion but also greatly weakens the circuit performance.

[0005] (II) Technical solution

[0006] To solve the above technical problems, the present invention provides a low-pass filter design method based on FPGA, comprising the following steps:

[0007] Step 1: Use the FilterDesigner toolbox in Matlab to design a FIR filter with a sampling frequency of 500 MHZ. Since high-frequency noise needs to be filtered, the passband frequency is set to 50 MHZ and the stopband frequency is set to 55 MHZ.

[0008] Step 2: Set the filter algorithm to fixed point and export the quantized filter coefficients in coe file format;

[0009] Step 3: Import the filter coefficients obtained in step 2 into the FPGA, and implement the low-pass filter function in the FPGA through logical operations.

[0010] (III) Beneficial effects

[0011] Compared with the prior art, the present invention has the following beneficial effects: a low-pass filter module is added to the FPGA end to filter the input digital signal, significantly attenuate or block high-frequency noise and allow low-frequency signals to pass smoothly. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a FIR filter designed in Matlab Filter Designer toolbox.

[0013] Figure 2 It is the spectrum characteristic diagram obtained by performing FFT on the 10MHZ signal and 80MHZ noise before and after they are combined and input into the filter.

[0014] Figure 3 It is the spectrum characteristic diagram obtained by performing FFT on the 20MHZ signal and 80MHZ noise before and after they are combined and input into the filter.

[0015] Figure 4 It is the spectrum characteristic diagram obtained by performing FFT on the 30MHZ signal and 80MHZ noise before and after they are combined and input into the filter.

[0016] Figure 5 It is the spectrum characteristic diagram obtained by performing FFT before and after inputting the combination of 40MHZ signal and 80MHZ noise into the filter. DETAILED DESCRIPTION

[0017] In order to make the purpose, content, and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the accompanying drawings and examples.

[0018] The current information processing board has inherent high-frequency noise generated by circuit components, and the data source is a low-frequency signal. In order to effectively suppress the high-frequency noise in the circuit and improve the signal quality and signal-to-noise ratio, it is necessary to design a low-pass filter module in the FPGA.

[0019] Firstly, a test signal with high-frequency noise is simulated in Matlab (the test signal consists of a low-frequency sinusoidal signal with different frequency weights of 0.5 and a high-frequency noise signal), and the generated test signal is input into the FPGA low-pass filter module. The filter input signal and output signal are respectively calculated by FFT to obtain the signal spectrum characteristic diagram. The filtering performance of the filter is analyzed by comparing the spectrum characteristics of the signal before and after filtering.

[0020] Secondly, different filter algorithms and parameter combinations are selected to iteratively optimize the filter. By statistically analyzing the filtering effect and FPGA resource consumption, the best filter that takes both performance and resource consumption into consideration is screened out.

[0021] Figure 1 The low-pass filter designed for this article attenuates signals with frequencies greater than 55 MHZ by at least 40 dB, which meets the filtering characteristics.

[0022] Figures 2 to 5As the frequency of the original signal increases, the time domain waveform of the signal to be tested gradually deviates from the sinusoidal characteristics, and the spectrum characteristics of the signal to be tested before filtering have two peaks with similar amplitudes, indicating that there are two frequency components in the signal to be tested (the low-frequency original signal is on the left in the spectrum diagram, and the high-frequency noise is on the right); after filtering, the spectrum characteristics of the signal to be tested have only one peak on the left, which shows that the high-frequency noise has been completely filtered out under different original signal frequency combinations.

[0023] After comparative analysis, the FPGA-based low-pass filter can meet the requirements of filtering high-frequency noise in the circuit.

[0024] The advantages of this embodiment are:

[0025] First: FPGA is highly flexible and programmable, and can customize low-pass filter characteristics such as filter order, passband frequency and stopband frequency according to actual needs. In addition, FPGA has a rich built-in digital signal processing unit, which can perform multiple multiplication operations in parallel and realize the "pipeline" operation of the algorithm, so that the low-pass filter has the ability to process high-speed data streams in real time.

[0026] Second: Compared with general-purpose processors, implementing low-pass filters on FPGAs can reduce power consumption. FPGAs support dynamic power management. When less computing power is required, some logic resources are shut down to reduce power consumption. FPGAs’ precise clock control is also conducive to optimizing filter performance, ensuring filtering effects while reducing power consumption.

[0027] Third: The low-pass filter can remove high-frequency noise and glitches in the signal source, improve the signal-to-noise ratio of the signal, and provide clear, accurate, and high-quality signal input for the FPGA end to carry out algorithm processing.

[0028] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A low-pass filter design method based on FPGA, characterized in that: The steps include: Step 1: Use the Filter Designer toolbox in Matlab to design a FIR filter with a sampling frequency of 500 MHZ. Since high-frequency noise needs to be filtered, the passband frequency is set to 50 MHZ and the stopband frequency is set to 55 MHZ. Step 2: Set the filter algorithm to fixed point and export the quantized filter coefficients in coe file format; Step 3: Import the filter coefficients obtained in step 2 into the FPGA, and implement the low-pass filter function in the FPGA through logical operations.

2. The FPGA-based low-pass filter design method according to claim 1, wherein: FPGA has a built-in digital signal processing unit that can perform multiple multiplication operations in parallel.

Images