Low complexity real-time nonlinear compensation method for short reach fiber link systems

Abstract

The application belongs to the technical field of optical fiber communication, and particularly relates to a low-complexity real-time nonlinear compensation method for a short-distance optical fiber link system. The application adopts Volterra algorithm to realize nonlinear damage compensation. The algorithm is regarded as an adaptive updating tap filter, and is divided into a linear term finite impulse response filter calculation module, a nonlinear term finite impulse response filter calculation module, an error calculation module and a tap coefficient updating module. Further, the low-complexity processing of the nonlinear compensation is realized through pruning and non-uniform quantization. The application solves the nonlinear distortion problem caused by devices and transmission in the intensity modulation direct detection system, and is simpler to realize and has greatly reduced complexity, thereby saving power consumption more. The application has been verified on an FPGA development board, and provides a basis for the hardware implementation of the nonlinear compensation and lays a foundation for the further development of future optical fiber communication systems.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of optical fiber communication, and particularly relates to a low-complexity real-time nonlinear compensation method. BACKGROUND

[0002] With the society entering a new information age, the global network traffic is growing explosively, which brings great challenges to the existing communication network. Therefore, it has become an important task for the communication industry to realize large-capacity data transmission under limited bandwidth. In recent research, it is shown that the intensity modulation direct detection (IM / DD) system plays an important role in supporting high-speed signal transmission.

[0003] Generally, due to the bandwidth limitation and nonlinearity in optical links, high-speed signal transmission will be seriously affected, in addition, there are nonlinear distortions caused by devices and transmission in the IM / DD system. However, the compensation of nonlinear loss is usually very complex, and due to the limited hardware resources, in order to realize the deployment of real-time nonlinear compensation, the problem of too large calculation complexity needs to be solved. If the low-complexity real-time nonlinear compensation technology can be successfully implemented, it can play a key role in future communication. SUMMARY

[0004] The purpose of the application is to provide a low-complexity real-time nonlinear compensation method which can be implemented on a hardware platform, for single-carrier pulse amplitude modulation signals in an intensity modulation direct detection short-distance optical fiber link system, to solve the problem of nonlinear distortion caused by devices and transmission.

[0005] The real-time nonlinear compensation method for a short-distance optical fiber link system provided by the application specifically comprises two parts of nonlinear damage compensation and complexity reduction processing; the following is explained:

[0006] (I) Nonlinear damage compensation:

[0007] The nonlinear compensation algorithm is used to realize nonlinear damage compensation, and the nonlinear compensation algorithm is specifically a Volterra algorithm (Jia Jun, Lei Lei, Li Ying, etc. Design and research of Volterra hybrid equalizer based on memory polynomial [J]. Optical communication research, 2024, (03): 40-48. DOI:10.13756 / j.gtxyj.2024.230077.), which can be regarded as a filter with adaptive tap update. The algorithm is divided into a linear term finite impulse response filter calculation module, a nonlinear term finite impulse response filter calculation module, an error calculation module and a tap coefficient update module. Among them:

[0008] The sum of the output of the linear term FIR filter and the output of the non-linear term FIR filter is a complete output linear part and non-linear part, and the two calculation modules calculate the expression as follows:

[0009]

[0010] wherein w l1 (k) and w l1,l2 (k) represent the tap coefficients of the linear part and the non-linear part respectively, N1 and N2 represent the memory lengths of the linear part and the non-linear part. Parameter k represents the current time point, in the discrete signal processing, k is a discrete time index, representing the current sampling time. The left side y(k) of the formula is the output signal at the current time. x(k) represents the input signal, and l1, l2 represent the time delay index of the input signal x(k). x(k-l1) represents the value of the input signal delayed by l1 at the current time k. Similarly, x(k-l2) represents the value of the input signal delayed by l2.

[0011] The error calculation module, wherein a decision maker is arranged, the decision maker is realized by a conditional decision statement, three threshold values of 0.5, 0, -0.5 are specifically set, and the output signal is decided to four levels of -0.75, -0.25, 0.25 and 0.75. The sum of the outputs of the two filters is subtracted from the standard constellation point output by the decision maker, to obtain the error, and the calculation expression is as follows:

[0012] e(k)=d(k)-y(k) , (2)

[0013] d(k) is the standard constellation point output by the decision maker, y(k) is the output signal of the two filters, and e(k) is the error.

[0014] The tap coefficient update module is used to update the tap values required in the FIR filter calculation module, and the required inputs are the output of the filter and the error calculated by the error calculation module, and the calculation expression is as follows:

[0015] w(k+1)=w(k)+μe(k)x * (k) , (3)

[0016] w(k) is the coefficient before updating, w(k+1) is the coefficient after updating, μ is the iteration step, e(k) is the error calculated by the error module, and x(k) is the input signal.

[0017] The Volterra algorithm is implemented by a hardware description language and deployed in a field programmable gate array development board, which is arranged in an intensity modulation direct detection communication system and used for processing a signal received by a receiving end in real time.

[0018] The Volterra algorithm adopted in the application can be equivalent to an equalizer with nonlinear compensation capability and adaptive tap update after being implemented on the field programmable gate array platform.

[0019] (II) Reducing complexity processing

[0020] The main difficulty of implementing real-time nonlinear compensation on a hardware platform is that too many multiplication calculations bring about great calculation complexity.

[0021] In a short-distance optical link system, by sorting the converged tap coefficients, it is found that the tap coefficients corresponding to the linear term part are exponentially distributed, and the tap weights at the same position of different power points are relatively stable, so quantizing the tap at some positions by the non-uniform quantization method can save the multipliers consumed by updating the tap at the position. This scheme is very suitable for deployment in the linear part of the algorithm. On the field programmable gate array development board, by taking the non-uniform quantization based on the exponential of two, the multipliers consumed by multiplying the input signal and the tap can also be saved, because in the hardware description language (Verilog), the multiplication of the exponential of two can be realized by arithmetic shifting. The quantization formula is as follows:

[0022]

[0023] b is the number of quantization bits, and the greater the number of quantization bits, the higher the precision. u is the quantization level.

[0024] By arranging and observing the tap coefficient part corresponding to the nonlinear part, it is found that the tap weight is very small at most positions, which has a very small influence on the final result, so a threshold value T can be found, which considers the balance of performance and resources, and by setting the weight value less than the threshold value to zero, the tap update and the multiplication of the nonlinear term and the tap are saved. This scheme is very suitable for deployment in the nonlinear part of the algorithm, and the pruning formula is as follows:

[0025] W Nonlinear (k)=0,if |W Nonlinear (k)|<T , (5)

[0026] Wherein, W Nonlinear is the tap coefficient corresponding to the nonlinear part, and T is the pruning threshold value. The threshold value cannot be too large, otherwise too much performance will be lost, and if it is too small, the released resources will be too small. By setting a small initial value to T, then performing simulation, the performance loss is judged by the bit error rate, if the performance loss is acceptable, then the T value is increased, and iterative updating is performed, until a balance point that can be accepted is found, that is, the performance loss is not too much, and the released resources are objective.

[0027] The application can greatly reduce the complexity while providing nonlinear impairment compensation capability, save power consumption, and provide a basis for hardware implementation of nonlinear compensation. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 It is a short distance optical link real-time communication system architecture using the application.

[0029] The figure mark: 1 is a short distance optical link communication system sending end, which includes DAC; 2 is a system optical fiber link; 3 is a system receiving end, which includes ADC; 4 is a hardware platform for deploying real-time DSP algorithm, which can adopt FPGA development board; 5 is a linear compensation algorithm; 6, 7 and 8 are the processes of the application, wherein 6 is a nonlinear compensation algorithm, 7 and 8 are respectively a complexity reduction scheme deployed in 6, 7 is a non-uniform quantization scheme, and 8 is a pruning scheme. DETAILED DESCRIPTION

[0030] The technical scheme of the application will be described clearly and completely in combination with the drawings.

[0031] The low complexity real-time nonlinear compensation method for short distance optical fiber link system provided by the application is experimentally verified. The performance of the low complexity real-time nonlinear compensation algorithm is verified by successfully deploying it on a field programmable gate array development board. And the successful transmission of 29.4912Gbit / s PAM4 signal through 25km single mode optical fiber is completed. According to the experimental results, the application can greatly reduce the complexity while providing nonlinear impairment compensation capability, save power consumption, and provide a basis for hardware implementation of nonlinear compensation. Figure 1As shown, it specifically includes three parts of "nonlinear compensation", "non-uniform quantization" and "pruning":

[0032] (1) "Nonlinear compensation" part:

[0033] When the pulse amplitude modulation signal is sent in the sending end 1, it is transmitted through the optical fiber link 2 to the receiving end 3, and in the receiving end, the received pulse amplitude modulation signal is converted into a digital sequence through an analog-to-digital converter (ADC), and then the digital sequence is sent into a hardware platform, and the digital sequence is distributed to parallel digital signal processing modules according to the filter length, and in the digital signal processing modules, the calculation of the input signal linear term and the corresponding tap coefficient, the generation of the input signal nonlinear term, and the calculation of the nonlinear term and the corresponding tap coefficient, the calculation of the output error, and the update of the linear term and the nonlinear term corresponding tap coefficient are performed. The calculation process and the coefficient update process are shown in the above formulas (1), (2) and (3). N1 and N2 represent the memory length of the linear part and the nonlinear part, and through simulation verification, N1 is selected as 15 and N2 is selected as 5. The coefficient update of the linear part and the nonlinear part is performed separately, that is, two different iterative compensations are required, and through simulation verification, the iteration step value required for updating the tap corresponding to the linear part is selected as 2 -7 , and the iteration step value required for updating the tap corresponding to the nonlinear part is selected as 2 -11 The advantage of such selection is that the use of multiplication can be saved, because in the hardware description language, the multiplication of the exponential of 2 can be realized by arithmetic shift, thereby reducing the use of the precious resource of the multiplier.

[0034] (2) "Non-uniform quantization" part:

[0035] In a short-distance optical link system, by arranging the converged tap coefficients, it is found that the tap coefficients corresponding to the linear term part are exponentially distributed, and the tap weights at the same position of different power points are relatively stable, so the taps at some positions are quantized by non-uniform quantization, which can save the multipliers consumed by updating the taps at these positions. On the FPGA platform, by adopting non-uniform quantization based on the exponential of 2, the multipliers consumed by the multiplication of the input signal and the taps can also be saved, because in the hardware description language, the multiplication of the exponential of 2 can be realized by arithmetic shift. The quantization formula is shown in the above formula (4). Through simulation verification, the number of quantization bits b is selected as 4, that is, Q u There are 16 quantization levels, and the accuracy is sufficient. By non-uniformly quantizing part of the taps of the linear part, that is, fixing part of the taps to a fixed value corresponding to the quantization interval, the taps are no longer updated. While releasing resources, the performance decline can be accepted.

[0036] (3) "Pruning" part:

[0037] In the short distance optical link system, by arranging the converged tap coefficients, it is found that the tap coefficients corresponding to the nonlinear terms are sparsely distributed, and the tap weights of most positions are very small, which has a very small influence on the final result, so a threshold value T can be found, which considers the balance of performance and resources, by setting the weights less than the threshold value to zero, to save the tap update and the multiplication consumed by the multiplication of the nonlinear term and the tap. The pruning formula is shown in formula (5) in the above. The pruning threshold T is selected by simulation, set a small initial value 0.0001 to T, set the taps less than the value to 0 after convergence, and do not update and participate in the calculation. The performance loss is judged by the bit error rate of the output signal, then T value is increased constantly, until a balanced threshold value is found. The final threshold value is set to 0.002.

[0038] In the experiment, the low complexity nonlinear compensation algorithm is successfully deployed on the programmable gate array platform, and the successful transmission of 29.4912Gbit / s PAM4 signal in 25km single mode optical fiber is completed. Compared with the algorithm without deploying the low complexity scheme. The experimental results show that the low complexity nonlinear compensation algorithm reduces the power consumption by 26.2%, reduces the use of multipliers by 75.3%, and the performance decline is acceptable, and still retains the nonlinear compensation ability.

[0039] The application realizes a low complexity nonlinear compensation technology suitable for hardware platform deployment by using non-uniform quantization and pruning scheme, effectively solves the problem of implementation difficulty caused by too high nonlinear compensation calculation complexity. The nonlinear compensation technology reduces redundant calculation and uses arithmetic shift instead of multiplication, so the hardware implementation is very friendly, greatly reduces the complexity and reduces the power consumption. The technology is successfully verified in the 29.4912Gbit / s PAM4 signal 25km single mode optical fiber transmission experiment, and can be applied to the receiver module in the future, bringing better receiving capacity and performance.

Claims

1. A real-time nonlinear compensation method for a short-distance optical fiber link system, characterized in that: A nonlinear compensation algorithm is used to achieve nonlinear damage compensation. The nonlinear compensation algorithm is specifically the Volterra algorithm. The algorithm is regarded as a filter that adaptively updates taps and is divided into a linear term finite impulse response filter calculation module, a nonlinear term finite impulse response filter calculation module, an error calculation module, and a tap coefficient update module. In particular: The sum of the outputs of the linear finite impulse response filter and the nonlinear finite impulse response filter is a complete output linear part and nonlinear part. The calculation expressions of the two calculation modules are as follows: Among them, w l1 (k) and w l1,l2 (k) represents the tap coefficients corresponding to the linear part and the nonlinear part respectively, N1 and N2 represent the memory lengths of the linear part and the nonlinear part respectively, the parameter k represents the current time point, y(k) is the output signal at the current moment, x(k) represents the input signal, l1, l2 represent the time delay index of the input signal x(k); x(k-l1) represents the value of the input signal at the current moment k delayed by l1; similarly, x(k-l2) represents the value delayed by l2; The error calculation module is equipped with a decision maker, and the specific decision is implemented by a conditional decision statement, wherein three threshold values ​​of 0.5, 0, and -0.5 are set for decision making, and the output signal is decided to four levels of -0.75, -0.25, 0.25, and 0.75; the sum of the outputs of the above two filters is subtracted from the standard constellation point output by the decision maker to obtain the error, and the calculation formula is as follows: e(k)=d(k)-y(k) , (2) d(k) is the standard constellation point output by the decision maker, y(k) is the output signal of the two filters mentioned above, and e(k) is the error; The tap coefficient update module is used to update the tap values ​​required in the finite impulse response filter calculation module. The required inputs are the filter output and the error calculated by the error calculation module. The calculation expression is as follows: w(k+1)=w(k)+μe(k)x * (k) , (3) w(k) refers to the coefficient before update, w(k+1) refers to the coefficient after update, μ is the iteration step size, e(k) is the error calculated by the error module, and x(k) is the input signal; The Volterra algorithm is implemented using a hardware description language and deployed in a field programmable gate array (FPGA) development board. The FPGA development board is arranged as a hardware platform in an intensity modulation direct detection communication system for real-time processing of signals received by a receiving end. The receiving end converts the received pulse amplitude modulation signal into a digital sequence through an analog-to-digital converter (ADC). The digital sequence is then sent to the FPGA development board. By allocating the digital sequence to the digital signal processing module deployed on the FPGA development board, the linear term of the input signal and the corresponding tap coefficient are calculated, the nonlinear term of the input signal is generated, and the nonlinear term and the corresponding tap coefficient are calculated in the linear term finite impulse response filter calculation module and the nonlinear term finite impulse response filter calculation module. The error is calculated in the error calculation module and the tap coefficient update module, and the tap coefficients corresponding to the linear term and the nonlinear term are updated. For the specific calculation and update process, please refer to the above formulas (1), (2), and (3). When implemented on a field-programmable gate array (FPGA) platform, the Volterra algorithm can be equated to an equalizer with adaptive tap updates and nonlinear compensation capabilities. The equalizer's first operation uses the initially set tap values. As the calculation proceeds, the tap coefficients are updated based on the minimum mean square error (MMSE) until convergence is achieved, achieving ideal nonlinear compensation. It also includes complexity reduction processing, as follows: In short-distance optical link systems, the tap coefficients corresponding to the linear terms are exponentially distributed, and the tap weights at the same location at different power points are relatively stable. Therefore, non-uniform quantization is used to quantize the taps at some locations to save the multipliers consumed by updating the taps at these locations. Therefore, on the field programmable gate array development board, non-uniform quantization based on the exponential of two is adopted. In the hardware description language, arithmetic shifts can be used to implement the multiplication of the exponential of two. The quantization formula is as follows: b is the number of quantization bits. The larger the number of quantization bits, the higher the accuracy. u is the quantitative level; Since the tap coefficients corresponding to the nonlinear part are sparsely distributed, the tap weights at most positions are very small, which has a very small impact on the final result. Therefore, a threshold value T can be found. This value takes into account the balance between performance and resources. By setting the weights smaller than the threshold value to zero for pruning, the multiplication consumed by tap updates and multiplication of nonlinear terms with taps can be saved. The pruning formula is as follows: W Nonlinear (k)=0,if |W Nonlinear (k)|<T , (5) Among them, W Nonlinear is the tap coefficient corresponding to the nonlinear part, and T is the pruning threshold. The threshold cannot be too large, otherwise too much performance will be lost. If it is too small, too few resources will be released. By setting a small initial value for T and then performing simulation, the performance loss is judged by the bit error rate. If the performance loss is acceptable, the T value is increased and iterative updates are performed until an acceptable balance point is found, that is, the performance loss is not too great and the released resources are also objective.

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