Residual voltage processing circuit and processing method

Abstract

The invention provides a residual voltage processing circuit and method, and the circuit comprises a battery charging circuit which is used for detecting a pulse signal when a battery is not connected to a battery holder, and transmitting the pulse signal to an ADC electric quantity detection circuit; when the battery is connected to the battery holder, a level signal is detected and is sent to the ADC electric quantity detection circuit; the ADC electric quantity detection circuit is used for sending a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit closes the battery charging management chip according to the low level and sends a high level to the charging chip residual voltage elimination circuit; or the low level is sent to the charging chip residual voltage elimination circuit according to the level signal; the charging chip residual voltage elimination circuit controls the conduction of the NMOS tube M1 according to the high level, and discharges the charging pin; or, the NMOS tube M1 is controlled not to be conducted according to the low level, and the charging pin is not discharged; the problem that high electric quantity display still exists when the battery is pulled up is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of security monitoring, and in particular to a residual voltage processing circuit and a processing method. Background Art

[0002] At present, batteries are widely used as system power supply, and battery power detection generally adopts the low-cost ADC power detection solution. ADC power detection divides the battery voltage and resistance, and identifies the current voltage through the ADC port of the MCU to calculate the corresponding power.

[0003] When the battery is unplugged, the charging pins connected to the charging chip and the battery still have a high voltage for a period of time due to the internal and external capacitors of the chip. At this time, the voltage will be output to the MCU through the ADC detection circuit, and the battery will appear to be unplugged but the battery is still displayed with a high power level (the power level display should be 0 when the battery is unplugged), causing the power display error. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a residual voltage processing circuit and a processing method to solve the problem that the battery has been unplugged but there is still a high power display, and the battery power can be accurately displayed.

[0005] In a first aspect, an embodiment of the present invention provides a residual voltage processing circuit, the residual voltage processing circuit comprising: a battery charging circuit, a battery, an ADC power detection circuit and a charging chip residual voltage elimination circuit;

[0006] The battery, the battery charging circuit, the ADC power detection circuit and the charging chip residual voltage elimination circuit are connected in sequence;

[0007] The battery charging circuit is used to detect a pulse signal when the battery is not connected to the battery holder, and send the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, detect a level signal, and send the level signal to the ADC power detection circuit;

[0008] The ADC power detection circuit is used to send a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit; or send the low level to the charging chip residual voltage elimination circuit according to the level signal;

[0009] The charging chip residual voltage elimination circuit is used to control the NMOS tube M1 to be turned on according to the high level to discharge the charging pin; or to control the NMOS tube M1 to be turned off according to the low level to not discharge the charging pin.

[0010] Furthermore, the ADC power detection circuit includes an MCU;

[0011] The battery charging circuit is used for detecting a pulse signal at pin 7 of the battery charging management chip when the battery is not connected to the battery holder, and sending the pulse signal to the ADC power detection circuit;

[0012] The MCU is used to send the low level to pin 8 of the battery charging management chip through pin EN, so that pin 8 turns off the battery charging management chip according to the low level, and at the same time outputs the high level to the resistor R5 of the residual voltage elimination circuit of the charging chip through pin BAT_DET.

[0013] Furthermore, the charging chip residual voltage elimination circuit includes a resistor R6;

[0014] The charging chip residual voltage elimination circuit is used to turn on the NMOS tube M1 when the G pole voltage of the NMOS tube M1 reaches the turn-on voltage after the resistor R5 and the resistor R6 divide the voltage.

[0015] Further, the charging chip residual voltage elimination circuit includes a resistor R2, the battery charging circuit includes a capacitor C3; the ADC power detection circuit includes a resistor R3 and a resistor R4;

[0016] When the NMOS tube M1 is turned on, the battery voltage, the resistor R2, the NMOS tube M1 and the capacitor C3 form a loop, and the charging pin voltage discharges the resistor R2;

[0017] When the charging pin voltage is discharged and close to 0V, the voltage divided by the resistor R3 and the resistor R4 is 0V, and reaches the MCU through the ADC port;

[0018] When the MCU recognizes that it is 0V, the software displays that the battery power is 0.

[0019] Furthermore, the battery charging circuit is used for when the battery is connected to the battery holder, pins 6 and 7 of the battery charging management chip detect the level signal, and send the level signal to the MCU of the ADC power detection circuit.

[0020] Furthermore, the MCU is used to output the low level to the resistor R5 of the residual voltage elimination circuit of the charging chip through the pin BAT_DET, so that the NMOS tube M1 is not turned on.

[0021] Further, the battery charging circuit is used to detect the battery voltage through the pin 5 of the battery charging management chip; when the battery voltage is less than the charging threshold and the pin 8 of the battery charging management chip turns on the battery charging management chip, the battery starts to be charged;

[0022] When the battery charging current decreases to a charging end threshold, stopping charging the battery;

[0023] When the battery is fully charged, the pin 6 of the battery charging management chip changes from a high impedance state to a low level, and sends the low level to the MCU;

[0024] The MCU is used to control pin 8 of the battery charging management chip to turn off the battery charging management chip according to the low level.

[0025] In a second aspect, an embodiment of the present invention provides a residual voltage processing method, which is applied to the residual voltage processing circuit as described above, wherein the residual voltage processing circuit includes: a battery charging circuit, a battery, an ADC power detection circuit, and a charging chip residual voltage elimination circuit; the method includes:

[0026] When the battery is not connected to the battery holder, the battery charging circuit detects a pulse signal and sends the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, the battery charging circuit detects a level signal and sends the level signal to the ADC power detection circuit;

[0027] The ADC power detection circuit sends a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit at the same time; or sends the low level to the charging chip residual voltage elimination circuit according to the level signal;

[0028] The charging chip residual voltage elimination circuit controls the NMOS tube M1 to be turned on according to the high level to discharge the charging pin; or controls the NMOS tube M1 to be turned off according to the low level to not discharge the charging pin.

[0029] In a third aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor, wherein the memory stores a computer program executable on the processor, and the processor implements the method described above when executing the computer program.

[0030] In a fourth aspect, an embodiment of the present invention provides a computer-readable medium having a non-volatile program code executable by a processor, wherein the program code enables the processor to execute the method as described above.

[0031] The embodiment of the present invention provides a residual voltage processing circuit and a processing method, wherein the residual voltage processing circuit comprises: a battery charging circuit, a battery, an ADC power detection circuit and a charging chip residual voltage elimination circuit; the battery, the battery charging circuit, the ADC power detection circuit and the charging chip residual voltage elimination circuit are connected in sequence; the battery charging circuit is used to detect a pulse signal when the battery is not connected to a battery holder, and send the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, the level signal is detected and sent to the ADC power detection circuit; the ADC power detection circuit is used to send a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit at the same time; or, according to the level signal, sends a low level to the charging chip residual voltage elimination circuit; the charging chip residual voltage elimination circuit is used to control the NMOS tube M1 to be turned on according to the high level, and discharge the charging pin; or, according to the low level, the NMOS tube M1 is controlled not to be turned on, and the charging pin is not discharged; the problem that the battery has been unplugged but there is still a high power display can be solved, and the battery power can be accurately displayed.

[0032] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description, claims and drawings.

[0033] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 A schematic diagram of a residual voltage processing circuit provided in Embodiment 1 of the present invention;

[0036] Figure 2 A schematic diagram of the structure of a residual voltage processing circuit provided in Embodiment 1 of the present invention;

[0037] Figure 3 This is a flow chart of the residual pressure processing method provided in the second embodiment of the present invention.

[0038] icon:

[0039] 1-battery; 2-battery charging circuit; 3-ADC power detection circuit; 4-charging chip residual voltage elimination circuit. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] To facilitate understanding of this embodiment, the embodiment of the present invention is described in detail below.

[0042] Embodiment 1:

[0043] Figure 1 A schematic diagram of a residual voltage processing circuit provided in Embodiment 1 of the present invention.

[0044] Reference Figure 1 , the residual voltage processing circuit includes: a battery charging circuit 2, a battery 1, an ADC power detection circuit 3 and a charging chip residual voltage elimination circuit 4;

[0045] A battery 1, a battery charging circuit 2, an ADC power detection circuit 3 and a charging chip residual voltage elimination circuit 4 are connected in sequence;

[0046] The battery charging circuit 2 is used to detect a pulse signal when the battery is not connected to the battery holder, and send the pulse signal to the ADC power detection circuit 3; when the battery is connected to the battery holder, it detects a level signal and sends the level signal to the ADC power detection circuit 3;

[0047] The ADC power detection circuit 3 is used to send a low level to the battery charging circuit 2 according to the pulse signal, so that the battery charging circuit 2 turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit 4; or, sends a low level to the charging chip residual voltage elimination circuit 4 according to the level signal;

[0048] The charging chip residual voltage elimination circuit 4 is used to control the NMOS tube M1 to be turned on according to a high level to discharge the charging pin (BAT pin); or to control the NMOS tube M1 to be turned off according to a low level to not discharge the charging pin.

[0049] Specifically, refer to Figure 2, U1 is the battery charging management chip, J1 is connected to the battery holder, C1 / C2 is the input power filter capacitor of U1, C3 is the charging pin of the battery charging management chip and the filter capacitor of the battery, and the resistor R1 is used to set the charging current. Pin 6 of U1 is the battery full signal, pin 7 of U1 is the charging signal, pin 8 of U1 is the charging chip enable pin, U1 is turned on when the battery is charging, and U1 is turned off when not charging (there is still voltage on charging pin 5 for a period of time after U1 is turned off), 5V_USB is the power supply of U1, 5V_BAT is the connection between the battery voltage and U1 charging pin 5. R3 / R4 are the voltage divider resistors of the ADC power detection circuit, and C4 is the filter capacitor. Among them, the 5V_BAT of the battery charging circuit, the 5V_BAT of the battery, the 5V_BAT of the ADC power detection circuit, and the 5V_BAT in the residual voltage elimination circuit of the charging chip are equipotential points and are connected together in the physical line.

[0050] Further, the ADC power detection circuit 3 includes an MCU;

[0051] The battery charging circuit 2 is used for detecting a pulse signal at the pin 7 of the battery charging management chip when the battery is not connected to the battery holder, and sending the pulse signal to the ADC power detection circuit 3;

[0052] MCU is used to send a low level to pin 8 of the battery charging management chip through pin EN, so that pin 8 turns off the battery charging management chip according to the low level, and at the same time output a high level to the resistor R5 of the charging chip residual voltage elimination circuit 4 through pin BAT_DET.

[0053] Furthermore, the charging chip residual voltage elimination circuit 4 includes a resistor R6;

[0054] The charging chip residual voltage elimination circuit 4 is used to turn on the NMOS tube M1 when the G-pole voltage of the NMOS tube M1 reaches the turn-on voltage after the resistor R5 and the resistor R6 divide the voltage.

[0055] Further, the charging chip residual voltage elimination circuit 4 includes a resistor R2, the battery charging circuit 2 includes a capacitor C3; the ADC power detection circuit 3 includes a resistor R3 and a resistor R4;

[0056] When the NMOS tube M1 is turned on, the battery voltage, the resistor R2, the NMOS tube M1 and the capacitor C3 form a loop, and the charging pin voltage is discharged to the resistor R2;

[0057] When the charging pin voltage is discharged and close to 0V, the voltage divided by resistors R3 and R4 is 0V, and reaches the MCU through the ADC port;

[0058] When the MCU recognizes that it is 0V, the software displays the battery power as 0.

[0059] Specifically, when the battery is not connected to the battery holder J1, the enable pin 8 of U1 turns off U1, and the MCU outputs a high level to BAT_DET by identifying the pulse signal of the pin 7 of U1, and the NMOS tube M1 is turned on.

[0060] At this time, capacitor C3 forms a loop with resistor R2 and NMOS tube M1, and 5V_BAT discharges quickly through resistor R2. The discharge time is related to the product RC of the capacitance and the resistance, which can be controlled by setting the resistance or capacitance, and 5V_BAT can be quickly released to close to 0V. In this way, when the battery is unplugged, the 5V_BAT voltage can drop to 0V quickly, so that accurate and timely display can be achieved.

[0061] Furthermore, the battery charging circuit 2 is used for detecting a level signal at pins 6 and 7 of the battery charging management chip when the battery is connected to the battery holder, and sending the level signal to the MCU of the ADC power detection circuit 3 .

[0062] Furthermore, the MCU is used to output a low level to the resistor R5 of the residual voltage elimination circuit of the charging chip through the pin BAT_DET, so that the NMOS tube M1 is not turned on.

[0063] Specifically, when the battery is connected to the battery holder J1, the MCU detects that the battery has been connected through the level logic of pins 6 and 7 of U1, outputs a low level to BAT_DET, and the NMOS tube M1 is not turned on, and the battery 5V_BAT will not be discharged, and the battery charging will not be affected.

[0064] Further, the battery charging circuit 2 is used to detect the battery voltage through the pin 5 of the battery charging management chip; when the battery voltage is less than the charging threshold and the pin 8 of the battery charging management chip turns on the battery charging management chip, the battery starts to be charged;

[0065] When the battery charging current decreases to the charging end threshold, the battery charging is stopped;

[0066] When the battery is fully charged, pin 6 of the battery charge management chip changes from a high impedance state to a low level and sends the low level to the MCU;

[0067] The MCU is used to control pin 8 of the battery charging management chip to shut down the battery charging management chip according to the low level, thereby achieving the effect of safety and reducing power consumption.

[0068] Embodiment 2:

[0069] Figure 3 This is a flow chart of the residual pressure processing method provided in the second embodiment of the present invention.

[0070] Reference Figure 3, applied to the residual voltage processing circuit as described above, the residual voltage processing circuit includes: a battery charging circuit, a battery, an ADC power detection circuit and a charging chip residual voltage elimination circuit; the method includes the following steps:

[0071] Step S101, when the battery is not connected to the battery holder, the battery charging circuit detects a pulse signal and sends the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, the battery charging circuit detects a level signal and sends the level signal to the ADC power detection circuit;

[0072] Step S102, the ADC power detection circuit sends a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit; or sends a low level to the charging chip residual voltage elimination circuit according to the level signal;

[0073] Step S103 , the residual voltage elimination circuit of the charging chip controls the NMOS tube M1 to be turned on according to the high level, so as to discharge the charging pin; or controls the NMOS tube M1 to be turned off according to the low level, so as not to discharge the charging pin.

[0074] An embodiment of the present invention further provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the residual pressure processing method provided in the above embodiment are implemented.

[0075] An embodiment of the present invention further provides a computer-readable medium having a non-volatile program code executable by a processor, wherein a computer program is stored on the computer-readable medium, and when the computer program is executed by the processor, the steps of the residual pressure processing method of the above embodiment are executed.

[0076] The computer program product provided in the embodiment of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the method described in the previous method embodiment. The specific implementation can be found in the method embodiment and will not be repeated here.

[0077] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system and device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0078] In addition, in the description of the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0079] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0080] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0081] Finally, it should be noted that the above-described embodiments are only specific implementations of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The protection scope of the present invention is not limited thereto. Although the present invention is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed by the present invention, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A residual voltage processing circuit, characterized in that: The residual voltage processing circuit comprises: a battery charging circuit, a battery, an ADC power detection circuit and a charging chip residual voltage elimination circuit; The battery, the battery charging circuit, the ADC power detection circuit and the charging chip residual voltage elimination circuit are connected in sequence; The battery charging circuit is used to detect a pulse signal when the battery is not connected to the battery holder, and send the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, detect a level signal, and send the level signal to the ADC power detection circuit; The ADC power detection circuit is used to send a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit; or send the low level to the charging chip residual voltage elimination circuit according to the level signal; The charging chip residual voltage elimination circuit is used to control the NMOS tube M1 to be turned on according to the high level to discharge the charging pin; or to control the NMOS tube M1 to be turned off according to the low level to not discharge the charging pin.

2. The residual voltage processing circuit according to claim 1, characterized in that: The ADC power detection circuit includes an MCU; The battery charging circuit is used for detecting a pulse signal at pin 7 of the battery charging management chip when the battery is not connected to the battery holder, and sending the pulse signal to the ADC power detection circuit; The MCU is used to send the low level to pin 8 of the battery charging management chip through pin EN, so that pin 8 turns off the battery charging management chip according to the low level, and at the same time outputs the high level to the resistor R5 of the residual voltage elimination circuit of the charging chip through pin BAT_DET.

3. The residual voltage processing circuit according to claim 2, characterized in that: The charging chip residual voltage elimination circuit includes a resistor R6; The charging chip residual voltage elimination circuit is used to turn on the NMOS tube M1 when the G pole voltage of the NMOS tube M1 reaches the turn-on voltage after the resistor R5 and the resistor R6 divide the voltage.

4. The residual voltage processing circuit according to claim 3, characterized in that: The charging chip residual voltage elimination circuit includes a resistor R2, and the battery charging circuit includes a capacitor C3; the ADC power detection circuit includes a resistor R3 and a resistor R4; When the NMOS tube M1 is turned on, the charging pin voltage, the resistor R2, the NMOS tube M1 and the capacitor C3 form a loop, and the charging pin voltage discharges the resistor R2; When the charging pin voltage is discharged and close to 0V, the voltage divided by the resistor R3 and the resistor R4 is 0V, and reaches the MCU through the ADC port; When the MCU recognizes that it is 0V, the software displays that the battery power is 0.

5. The residual voltage processing circuit according to claim 1, characterized in that: The battery charging circuit is used for detecting the level signal at pins 6 and 7 of the battery charging management chip when the battery is connected to the battery holder, and sending the level signal to the MCU of the ADC power detection circuit.

6. The residual voltage processing circuit according to claim 5, characterized in that: The MCU is used to output the low level to the resistor R5 of the residual voltage elimination circuit of the charging chip through the pin BAT_DET, so as to make the NMOS tube M1 non-conductive.

7. The residual voltage processing circuit according to claim 1, characterized in that: The battery charging circuit is used to detect the battery voltage through the pin 5 of the battery charging management chip; when the battery voltage is less than the charging threshold and the pin 8 of the battery charging management chip turns on the battery charging management chip, the battery starts to be charged; When the battery charging current decreases to a charging end threshold, stopping charging the battery; When the battery is fully charged, the pin 6 of the battery charging management chip changes from a high impedance state to a low level, and sends the low level to the MCU; The MCU is used to control pin 8 of the battery charging management chip to turn off the battery charging management chip according to the low level.

8. A residual pressure treatment method, characterized in that: The residual voltage processing circuit applied to any one of claims 1 to 7 comprises: a battery charging circuit, a battery, an ADC power detection circuit and a charging chip residual voltage elimination circuit; the method comprises: When the battery is not connected to the battery holder, the battery charging circuit detects a pulse signal and sends the pulse signal to the ADC power detection circuit; when the battery is connected to the battery holder, the battery charging circuit detects a level signal and sends the level signal to the ADC power detection circuit; The ADC power detection circuit sends a low level to the battery charging circuit according to the pulse signal, so that the battery charging circuit turns off the battery charging management chip according to the low level, and sends a high level to the charging chip residual voltage elimination circuit at the same time; or sends the low level to the charging chip residual voltage elimination circuit according to the level signal; The charging chip residual voltage elimination circuit controls the NMOS tube M1 to be turned on according to the high level to discharge the charging pin; or controls the NMOS tube M1 to be turned off according to the low level to not discharge the charging pin.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, wherein: When the processor executes the computer program, the method according to claim 8 is implemented.

10. A computer readable medium having a non-volatile program code executable by a processor, characterized in that: The program code causes the processor to execute the method of claim 8.

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