Method, medium, and device for LoRa packet detection in logical channels based on window sliding.

Abstract

This invention discloses a method, medium, and device for LoRa packet detection in a logical channel based on window sliding, belonging to the field of network communication technology. The method includes: for a received data packet, extracting peaks from the same symbol by tracking the changing patterns of multiple peaks within a continuous time window; generating corresponding peak sequences by matching the peaks of each symbol to obtain multiple peak sequences; identifying the characteristics of the same data packet in the frequency and time domains, and obtaining a matched peak sequence by matching the multiple peak sequences; extracting LoRa parameters of the data packet, including spreading factor and bandwidth, by combining the characteristics of the multiple peak sequences using the matched peak sequences; aligning the demodulation window in the frequency and time domains, and evaluating the carrier frequency offset of each data packet. This invention enables more accurate data packet detection, achieving high-quality and high-capacity communication.

Description

Technical Field

[0001] This invention relates to the field of network communication technology, and more specifically, to a method, medium, and device for detecting LoRa data packets in a logical channel based on window sliding. Background Technology

[0002] In recent years, Low Power Wide Area Networks (LPWANs) have been widely deployed in Internet of Things (IoT) applications. As a highly promising LPWAN communication technology, LoRa (a long-range radio standard) operates in the unlicensed ISM sub-1GHz band and is renowned for its low power consumption and long-range transmission capabilities. LoRa's physical layer (PHY) employs chirp spread spectrum (CSS) modulation technology and performs despreading at the receiver, giving LoRa excellent noise immunity, enabling it to operate normally in environments with signal-to-noise ratios (SNR) as low as -5dB. See [link to relevant documentation]. Figure 1 As shown. Furthermore, because each node is limited to a 1% duty cycle and spends most of its time in sleep mode, the lifespan of a single LoRa node can be as long as several years.

[0003] However, due to cost constraints, LoRa employs a very simple Media Access Control (MAC) protocol, namely the ALOHA (Radio Data Communication) protocol, which allows LoRa nodes to begin transmission immediately when data needs to be sent. As the deployment scale of LoRa nodes in various scenarios continues to expand, the congestion problem of transmission channels becomes increasingly serious, leading to a significant increase in packet collision frequency and exacerbating the deterioration of channel conditions. Specifically, when multiple LoRa symbols have the same slope as the target symbol, they are demodulated simultaneously, resulting in a lower signal-to-interference-plus-noise ratio (SINR); while LoRa symbols with different slopes introduce more background noise, thus reducing the SNR.

[0004] In summary, LoRa gateways face extremely low SNR (below -10dB) and poor SINR in actual deployments, which limits their scalability in large-scale networks. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method, medium, and device for detecting LoRa data packets in a logical channel based on window sliding.

[0006] According to a first aspect of the present invention, a method for detecting LoRa packets in a logical channel based on window sliding is provided. The method includes the following steps:

[0007] For the received data packets, by tracking the changing patterns of multiple peaks within a continuous time window, peaks are extracted from the same symbol. By matching the peaks of each symbol, corresponding peak sequences are generated, and multiple peak sequences are obtained.

[0008] In the frequency and time domains, the characteristics of the same data packet are identified, and a matching peak sequence is obtained by matching the multiple peak sequences.

[0009] Using the matched peak sequences, the LoRa parameters of the data packets, including the spreading factor and bandwidth, are extracted by combining the characteristics of the multiple peak sequences.

[0010] The demodulation window is aligned in both the frequency and time domains, and the carrier frequency offset for each data packet is evaluated.

[0011] According to a second aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described window-sliding logical channel LoRa packet detection method.

[0012] According to a third aspect of the present invention, a computer device is provided, including a memory and a processor, wherein a computer program capable of running on the processor is stored in the memory, wherein the processor executes the computer program to implement the steps of the above-described window-sliding logical channel LoRa packet detection method.

[0013] Compared with existing technologies, the advantages of this invention are that the proposed window-sliding logical channel LoRa packet detection method enables LoRa gateways to simultaneously detect LoRa packets from multiple logical channels under adverse channel conditions, achieving high-quality and high-capacity communication. This invention empowers existing LoRa gateways to detect potential packets from all logical channels within the spectrum and provides timely channel quality feedback to nodes.

[0014] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0016] Figure 1 This is a schematic diagram of the physical and logical channels in the 915MHz ISM spectrum specified by LoRaWAN according to an embodiment of the present invention;

[0017] Figure 2This is a flowchart of a LoRa packet detection method for logical channels based on fine-grained window sliding according to an embodiment of the present invention;

[0018] Figure 3 This is a flowchart of a LoRa packet detection method for logical channels based on fine-grained window sliding according to an embodiment of the present invention;

[0019] Figure 4 This is a schematic diagram of data packet detection based on a sliding fine-grained demodulation window according to an embodiment of the present invention;

[0020] Figure 5 This is a schematic diagram of cross-logical channel data packet detection without prior knowledge according to an embodiment of the present invention;

[0021] Figure 6 This is a schematic diagram of concurrent data packet transmission within a 1MHz bandwidth according to an embodiment of the present invention;

[0022] Figure 7 This is a schematic diagram of peak regression according to an embodiment of the present invention;

[0023] Figure 8 This is a schematic diagram of the FFT result after performing delinear frequency modulation operation in 8 consecutive demodulation windows according to an embodiment of the present invention.

[0024] In the attached diagram, Freq represents frequency; Packet represents data packets; BW represents bandwidth; Channel Guard represents channel protection; Demodulation Window represents demodulation window; PHY Samples represents physical layer sampling; CH represents channel; SF represents spreading factor; Peakheight represents peak height; Peak represents peak; Window number represents window number; recover represents recovery; Symbol represents symbol; Abs represents absolute value; FFT represents Fast Fourier Transform; and Win represents window. Detailed Implementation

[0025] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0026] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0027] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0028] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0029] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0030] To efficiently and accurately detect conflicting data packets in situations where multiple logical channels overlap, this invention provides a novel LoRa data packet detection method based on fine-grained window sliding. In general, the method includes: simultaneously detecting data packets from multiple logical channels under poor channel conditions; detecting data packets by decomposing them to achieve detection of data packets from multiple logical channels; reconstructing distorted frequency domain features using fine-grained window offset and LoRa preamble structure, and employing a larger demodulation window to encompass the entire LoRa symbol, thereby concentrating the energy of the entire LoRa symbol in a single FFT bin (Frequency Unit of Fast Fourier Transform), thus ensuring the best despreading effect. Furthermore, to enhance performance under poor channel conditions, three algorithms are proposed to accurately extract frequency domain features, ensuring the accuracy of data packet detection.

[0031] Specifically, in combination Figure 2 and Figure 3 As shown, the provided LoRa logical channel packet detection method based on fine-grained window sliding includes the following steps:

[0032] Step S1: For the received data packet, extract the peak from the same symbol by tracking the change pattern of multiple peaks within a continuous time window, and generate the corresponding peak sequence by matching the peaks of each symbol to obtain multiple peak sequences.

[0033] Step S1 is used to achieve symbol peak matching by tracking the changing patterns of multiple peaks within a continuous window and extracting peaks from the same symbol to form a peak sequence.

[0034] For example, during the demodulation window sliding process, peak information in each round of FFT is recorded, including the index, value, and window number. This is achieved by tracking the phase difference. The peak values ​​are grouped into the same peak sequence until no more peak values ​​are found in the FFT result.

[0035] Specifically, in combination Figure 4 , Figure 5 and Figure 6As shown, during the fine-grained sliding of the demodulation window, the {index, value, and window number} of each peak in the FFT result are recorded, and then the phase difference in the continuous demodulation window is tracked. The peak values ​​are identified and grouped into identical peak sequences. New peak sequences are created or existing ones are updated in each round of the FFT until no more peaks appear in the FFT result. For example, the demodulation window size is set to match the maximum symbol duration (i.e., the duration corresponding to a symbol with SF=12), and the bandwidth is the maximum bandwidth of LoRa symbols, i.e., 500kHz. This ensures that all symbols to be detected are included within the demodulation window, thus enabling random signal detection.

[0036] Step S2: In the frequency and time domains, identify the characteristics of the same data packet, and obtain the matching peak sequence by matching multiple peak sequences.

[0037] Step S2 is used to perform peak sequence matching, identify robust features of the same data packet in the frequency and time domains, and match multiple peak sequences.

[0038] Specifically, adjacent peak sequences are matched based on the following characteristics. Peak sequences of adjacent linear frequency modulated pulses (LFM) within the same data packet satisfy the following characteristics: peaks at the same position should have the same index; peak differences follow a pattern, meaning the differences between peak values ​​at the same position conform to a specific rule; and peak height patterns are consistent, meaning the heights of all peaks in the sequence should follow the same pattern. Based on these three characteristics, multiple peak sequences can be matched. For example, when more than six peak sequences are assigned to the same data packet, the data packet is considered to have been successfully detected.

[0039] Step S3: Using the matched peak sequence, the LoRa parameters of the data packet are extracted by combining the characteristics of multiple peak sequences.

[0040] Step S3 is used to extract LoRa parameters after detecting a data packet. For example, by using a matching peak sequence, multiple peak sequences are combined to calculate the LoRa parameters of the data packet, such as SF (spreading factor) and BW (bandwidth).

[0041] Traditional methods demodulate using pulses with the same symbol duration, while this invention selects the pulse with the longest duration, thereby improving LoRa parameter extraction and solving the problem caused by the difference in symbol duration.

[0042] Specifically, after a data packet is detected, its LoRa parameters, including SF and BW, need to be further analyzed for subsequent decoding operations. Traditional data packet detection methods only require using a basic downlink linear frequency modulation (LFFM) pulse with the same symbol duration as the target packet as the demodulation window. Once a data packet is detected, the SF and BW of the LFFM pulse are the same as the SF and BW of the data packet. However, in one embodiment of this invention, the LFFM pulse with the maximum symbol duration is always used to detect data packets, which introduces new problems. Therefore, a novel method is further adopted to extract the LoRa parameters, namely, symbols with different LoRa parameters have different durations, resulting in significant differences in the time the entire symbol remains within the demodulation window during the sliding process.

[0043] Step S4: Align the demodulation window in the frequency and time domains, and evaluate the carrier frequency offset of each data packet.

[0044] Step S4 is used to perform window alignment and frequency evaluation. In order to facilitate direct decoding by the decoder, the demodulation window is aligned in the frequency domain and time domain, and the carrier frequency offset of each data packet is calculated.

[0045] Considering that the preamble may be affected by noise under low signal-to-noise ratio conditions, in one embodiment, a refined carrier frequency offset (CFO) estimation is proposed using the preamble, precise locking is performed using a demodulation window consistent with the symbol duration, and finally the CFO is calculated.

[0046] Specifically, the main function of the preamble in LoRa data packets is to detect data packets and align the demodulation window before decoding the payload. However, under low signal-to-noise ratio (SNR) channel conditions, the preamble may be affected by noise, posing many practical challenges. For example, the received signal may contain multiple LoRa data packets exhibiting complex characteristics, mainly in the following aspects: 1) heterogeneity of center frequency: the received signal may contain LoRa data packets from different center frequencies; 2) time asynchrony: these LoRa data packets arrive at the gateway at significantly different times; 3) diversity of carrier frequency offset: each LoRa data packet comes from a different LoRa node. The unique hardware defects of different LoRa nodes, coupled with different paths to the gateway, cause each LoRa data packet to exhibit its own unique carrier frequency offset. This invention proposes an innovative method for fine-grained CFO (carrier frequency offset) estimation using preambles, based on the following key insights: leading to fractional bin offset ( The CFO (Cost Forward Frequency) of the FFT (Frequency Fiber) can cause peak attenuation because Dirichlet sidelobes are mistakenly identified as peaks, ignoring the true peak. Therefore, another round of demodulation is performed after coarse alignment and calibration. In this round, a demodulation window consistent with the symbol duration of the data packet is used, and zero-padding is applied to the FFT operation to accurately lock onto the true peak. Finally, the fractional part of the peak generated by frequency modulation on each reference is extracted and averaged to determine the CFO. The coarse calibration stage mainly utilizes the preamble peak sequence information extracted from the continuous demodulation window for window alignment and approximate frequency offset compensation. In this stage, by analyzing the FFT peaks generated by the same symbol in multiple windows, the integer-level offset of the window and the preliminary value of the center frequency can be estimated. Subsequently, in the fine calibration stage, the characteristics of the preamble and SFD are used to further refine and compensate for the frequency offset, thereby obtaining a more accurate frequency alignment.

[0047] In summary, this invention achieves cross-logical channel packet detection without prior knowledge through processes such as symbol peak matching, peak sequence matching, LoRa parameter extraction, window alignment, and frequency evaluation. The detailed parameters of the obtained packets are used for subsequent demodulation and decoding.

[0048] Furthermore, to enhance the reliability of packet detection, three anti-interference algorithms were designed.

[0049] 1) Peak Regression

[0050] For example, review the FFT results of the previous few windows, compare the height and index of the peaks, perform cross-window matching, and recover the peak sequence.

[0051] See Figure 7 and Figure 8 As shown, LoRa symbols from the same data packet have similar peak heights, and each peak index follows the same pattern. Therefore, the FFT results of previous windows can be reviewed, and peak heights and indices can be compared to perform cross-window matching. Finally, multiple FFT results are combined to fit the sequence between them, thereby recovering the actual peak sequence. The number of windows reviewed can be determined according to actual needs or simulation.

[0052] 2) Dynamic constraints for peak matching

[0053] In one embodiment, the dynamic constraint of peak matching dynamically adjusts the matching interval based on the peak energy ratio to improve the matching success rate.

[0054] Peak matching is based on a specific difference between the peak indices of the FFT results from two consecutive demodulation windows. However, under low signal-to-noise ratio conditions, the peak index is very fragile and prone to shifting, leading to matching failure. Therefore, the energy ratio of the peak can be calculated first, which is the ratio of the peak height to the sum of the heights of the other bins. Based on the different peak energy ratios, the range of the peak index matching interval can be dynamically adjusted, thereby improving the success rate of peak tracking.

[0055] Specifically, in the dynamic constraints of peak matching, the energy ratio of each FFT peak (i.e., the ratio of the peak's energy to the sum of the energies of all other peaks) is first calculated to measure the peak's reliability. If a peak's energy ratio is low, it indicates that the peak is weak and susceptible to noise. In this case, the constraints can be relaxed, allowing for larger index deviations when matching within a continuous window. Conversely, if the energy ratio is high, it indicates that the peak is strong, requiring the matched peak index to be closer to the ideal value, i.e., a narrower allowed matching range. In other words, the lower the energy ratio, the larger the allowed peak index matching interval; the higher the energy ratio, the smaller the matching interval. This improves the peak tracking success rate under low SNR conditions while maintaining matching accuracy.

[0056] 3) Iterative peak extraction based on dynamic threshold

[0057] For example, a dynamic threshold can be defined, and peak values ​​can be extracted iteratively until no peak value exceeds the threshold.

[0058] Specifically, first, the maximum peak value in the FFT result is determined, and a dynamic threshold is defined. This threshold is related to the mean and variance of the FFT result. For example, the dynamic threshold... Defined as the mean M of the FFT result plus four times the variance. ,Right now This means that in each iteration, the mean and variance of the current FFT result are first calculated, and then the formula is used... A threshold is set to determine if there are sufficiently significant peaks to extract. After extracting peaks, the threshold is updated. During each iteration of peak extraction, if the maximum value obtained in this round exceeds the threshold, it is identified as a peak. This peak and its surrounding peaks are then removed from the FFT result, the threshold is recalculated and updated, and the next round of peak extraction begins. This process iterates until no maximum value exceeds the threshold.

[0059] In summary, this invention provides a novel LoRa packet detection method that can simultaneously detect packets from multiple logical channels even under poor channel conditions. It utilizes fine-grained window offset and LoRa preamble structure to reconstruct distorted frequency domain features and employs a larger demodulation window to encompass the entire LoRa symbol, thereby concentrating the energy of the entire LoRa symbol into a single FFT bin and ensuring better despreading performance. Furthermore, to enhance performance under poor channel conditions, various anti-interference algorithms are designed to accurately extract frequency domain features, effectively improving the accuracy of packet detection.

[0060] This invention can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of the invention.

[0061] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination thereof. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0062] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0063] The computer program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, Python, etc., and conventional procedural programming languages ​​such as "C" or similar languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing state information from the computer-readable program instructions. This electronic circuitry can execute the computer-readable program instructions to implement various aspects of the invention.

[0064] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0065] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0066] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0067] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions. It will be known to those skilled in the art that implementation in hardware, implementation in software, and implementation using a combination of software and hardware are equivalent.

[0068] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, and are not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein. The scope of the invention is defined by the appended claims.

Claims

1. A method for detecting LoRa data packets in a logical channel based on window sliding, comprising the following steps: For the received data packets, by tracking the changing patterns of multiple peaks within a continuous time window, peaks are extracted from the same symbol. By matching the peaks of each symbol, corresponding peak sequences are generated, and multiple peak sequences are obtained. In the frequency and time domains, the characteristics of the same data packet are identified, and a matching peak sequence is obtained by matching the multiple peak sequences. Using the matched peak sequences, the LoRa parameters of the data packets, including the spreading factor and bandwidth, are extracted by combining the characteristics of the multiple peak sequences. Align the demodulation window in the frequency and time domains and evaluate the carrier frequency offset for each data packet; The evaluation of the carrier frequency offset for each data packet includes: After coarse alignment and calibration of the data packets, a coarsely calibrated data packet is obtained; For the coarsely calibrated data packets, a demodulation window consistent with the symbol duration of the data packets is used, and zero padding is applied to the FFT operation to lock onto the true peak. Extract the fractional part of the peak value generated by frequency modulation on each reference and average it to determine the carrier frequency offset.

2. The method according to claim 1, characterized in that, The multiple peak sequences are obtained according to the following steps: During the demodulation window sliding process, the information of each peak in the FFT result is recorded. The peak information includes the index, value and window number. Track peaks within a set threshold range in the continuous demodulation window and group them into the same peak sequence.

3. The method according to claim 1, characterized in that, The matched peak sequences satisfy the following characteristics: Peaks at the same location have the same index; The differences between the values ​​of peaks at the same location conform to a set pattern; The heights of all peaks in the peak sequence follow the same pattern.

4. The method according to claim 1, characterized in that, During the extraction of the LoRa parameters of the data packet, a downlink linear frequency modulation pulse with the maximum symbol duration is used to detect the data packet.

5. The method according to claim 1, characterized in that, In the process of matching the multiple peak sequences, cross-window matching is performed by reviewing the FFT results of a set number of previous windows and comparing the peak height and index; then, multiple FFT results are combined together to fit the sequence between them, thereby matching the peak sequence.

6. The method according to claim 1, characterized in that, Matching the multiple peak sequences includes: Calculate the peak energy ratio of the target peak, which is the ratio of the height of the target peak to the sum of the heights of other frequency units; Based on the peak energy ratio, the range of peak index matching is dynamically adjusted.

7. The method according to claim 1, characterized in that, Matching the multiple peak sequences includes: Identify the maximum peak value in the FFT result and define a dynamic threshold that is related to the mean and variance of the FFT result; During each iteration of peak extraction, if the maximum value obtained in this round exceeds the dynamic threshold, it is identified as a peak. The peak and surrounding peaks are then removed from the FFT result, the dynamic threshold is recalculated and updated, and the next round of peak extraction is performed.

8. A computer-readable storage medium having a computer program stored thereon, wherein, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

9. A computer device comprising a memory and a processor, wherein a computer program capable of running on the processor is stored in the memory, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

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