A preparation method of a printed circuit board with a blind via and a printed circuit board

Abstract

The present invention discloses a method for manufacturing a printed circuit board with blind vias and a printed circuit board, aiming to solve the problem that during the manufacturing process of multi-layer boards, when the gold-plated area of the inner layer accounts for a relatively large proportion, that is, when the bonding area of the prepreg is relatively low, the core board will generate relatively large peeling stress under the high-temperature and high-pressure environment during the lamination process, and it is extremely easy to occur board explosion and delamination. The method for manufacturing the printed circuit board of the present invention includes: drilling a ventilation hole at each end of the conventional layer core board corresponding to the blind via area. In this way, the expansion stress of the core board can be released in time through the ventilation holes, avoiding the phenomenon of board explosion and delamination when the bonding area of the prepreg of the printed circuit board is relatively low. The printed circuit board manufactured by the present invention has the advantages of no board explosion and delamination, simple manufacturing method, and easy to realize mass production, etc.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit boards, and particularly to a method for manufacturing a printed circuit board with blind vias and a printed circuit board. Background Art

[0002] In printed circuit boards, the blind via design features that it does not penetrate the entire PCB stack-up structure, occupies less space, enables more dense and flexible arrangement of components, and can also connect signals on different layers, simplifies wire compensation, reduces the thickness of the circuit board, and optimizes the overall occupied area. Currently, with the increase in products with blind via designs, hard gold plating and soft gold plating processes are commonly used to fabricate the final soldering area for blind vias. To ensure the precise separation of the prepreg from the gold plating layer, a resist film needs to be selected for blocking. The area covered by the resist film is the routed-out area of the prepreg, meaning that there is no adhesion force after lamination in the area covered by the resist film. After forming, the depth is controlled and routed to the resist film, and then the resist film is manually peeled off to expose the gold plating area. In the existing technology, when the proportion of the inner layer gold plating area > 30% (i.e., the resist film coverage rate), that is, when the adhesion area of the prepreg < 70%, the core board of the printed circuit board will generate a large peeling stress during the high-temperature baking process of the process, and it is extremely easy to occur board explosion and delamination. Summary of the Invention

[0003] The purpose of the present invention is to provide a method for manufacturing a printed circuit board with blind vias to solve the problem of board explosion and delamination at the resist film during core board lamination. The method includes:

[0004] S1. Core board cutting: Prepare two core boards, namely core board core1 and core board core2;

[0005] S2. Inner layer processing: First, drill holes in core board core1 and core board core2, and drill one vent hole at each end of the blind via area of core board core1. Then, perform inner layer copper deposition, full board electroplating, inner layer pattern transfer, inner layer etching, and film stripping on core board core1 and core board core2 in sequence;

[0006] S3. Form a partially gold-plated inner layer circuit pattern on core board core2: Perform wet film pattern transfer and dry film pattern transfer on core board core2 in sequence. Both wet film pattern transfer and dry film pattern transfer expose the copper layer in the gold plating area. After dry film pattern transfer, gold plating treatment is performed on the exposed copper layer, and then the dry film and wet film are removed to form a partially gold-plated core board core2. Perform wet film pattern transfer and dry film pattern transfer on the partially gold-plated core board core2 in sequence. Both wet film pattern transfer and dry film pattern transfer expose the copper layer in the wire area. Etch away the excess copper layer in the wire area, and then strip the film to form a partially gold-plated inner layer circuit pattern;

[0007] S4, Lamination and Outer Layer Drilling: Stack and laminate Core 1 that has gone through Step S2 and Core 2 that has gone through Step S3 with prepreg, and place a resist film in the gold-plated area between Core 1 and Core 2, then drill the production board according to the drill tape data;

[0008] S5, Forming Outer Layer Circuits and Surface Treatment;

[0009] S6, Resist Film Treatment and Finished Product Molding: Remove the resist film with controlled depth and perform outer shape molding;

[0010] S7, FQC Final Inspection and Electrical Testing.

[0011] Further, in Step S2, the diameter range of the ventilation holes is 0.3 - 0.5 mm; Inner layer copper deposition is to plate copper on the drilled hole walls of Core 1 and Core 2 to form via holes; Inner layer pattern transfer is to laminate a photoresist film on the surfaces of Core 1 and Core 2, and form a circuit pattern through exposure and development; Core 2 needs to design leads to the process edge in the gold-plated area to ensure electroplating conduction; Inner layer etching and stripping is to use an alkaline solution to remove the photoresist in the unexposed area, and then etch the exposed copper layer with an acidic etching solution, and complete the circuit forming after stripping the film.

[0012] Further, in Step S3, the gold plating is nickel-gold or soft gold.

[0013] Further, after drilling in Step S4, plasma treatment is required to remove the gum residue in the holes and activate the surface of the hole walls to improve the adhesion of subsequent copper deposition, as well as copper deposition and electroplating. After chemical copper deposition, the entire board is electroplated to thicken the hole walls to ensure the conduction reliability of the through holes; When removing the gum residue, the ventilation holes need to be exposed, and the ventilation holes are blocked with high-temperature tape during copper deposition and electroplating.

[0014] Further, in Step S5, forming the outer layer circuits is to perform the processes of laminating film, exposure, and development on the production board in sequence to form the outer layer circuit pattern, remove the exposed part with an alkaline solution and etch away the shape with an acidic etching solution for the unexposed area, and form the outer layer circuits after stripping the film; Surface treatment includes AOI optical inspection, solder mask, and character printing; During the solder mask process, the ventilation holes need to be exposed, and the ventilation holes are blocked with high-temperature tape during other processes of surface treatment and during the process of forming the outer layer circuits.

[0015] The printed circuit board with blind vias provided by the present invention is obtained by using the manufacturing method of the above-mentioned printed circuit board.

[0016] The printed circuit board of the present invention has a double-layer core board, and a vent hole is drilled at each end of the blind via area of one of the core boards, namely core1. By means of precise pattern transfer, gold plating process and lamination control of the PCB, the problem of delamination of the resist film during lamination is effectively solved through the design of adding vent holes, ensuring the reliability of the product; and the problem of delamination of the resist film during double-core lamination is solved. When the proportion of the cavity area in the inner blind via area > 30%, delamination and explosion of the board are extremely likely to occur under the negative pressure environment during the heating process and the plasma treatment stage. Description of the Drawings

[0017] Figure 1 It is a design diagram of the "vent hole" for the double-core laminated resist film. Detailed Embodiment

[0018] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0019] The present invention provides a preparation method for a printed circuit board with blind vias, and the preparation method includes:

[0020] S1. Core board cutting: Prepare two core boards, namely core board core1 and core board core2;

[0021] S2. Inner layer processing: First, drill holes in core board core1 and core board core2, and drill a vent hole with a diameter range of 0.3 - 0.5 mm at each end of the blind via area of core board core1 for subsequent lamination exhaust. Then, perform inner layer copper deposition, full panel electroplating, inner layer pattern transfer, inner layer etching and stripping on core board core1 and core board core2 in sequence; Inner layer copper deposition is to deposit copper on the hole walls of the drilled holes in core board core1 and core board core2 to form via holes; Inner layer pattern transfer is to laminate a photoresist film on the surfaces of core board core1 and core board core2, and form a circuit pattern through exposure and development; Core board core2 needs to design leads to the process edge in the gold plating area to ensure electroplating conduction; Inner layer etching and stripping is to use an alkaline solution to remove the photoresist in the unexposed area, and then etch the exposed copper layer with an acidic etching solution. After stripping, the circuit formation is completed.

[0022] S3. Core board core2 forms a locally gold-plated inner layer circuit pattern, including:

[0023] Step S31. Wet film pattern transfer: Coat a wet film on the surface of core board core2, and retain the non-gold plating area through exposure and development to expose the copper surface in the gold plating area;

[0024] S32. Dry film pattern transfer: Superimpose the dry film and perform secondary exposure and development to further protect the non-gilded areas and ensure accurate positioning of the gilded areas;

[0025] S33. Gilding treatment: Nickel-gold or soft gold plating is performed on the exposed copper layer to form a partial gilding structure;

[0026] S34. Film stripping: Remove the wet film and dry film on the surface of the core board core2, and retain the gilded areas;

[0027] S35. Wet film pattern transfer: Coat the wet film on the surface of the core board core2, and expose and develop to expose the copper layer in the wire areas;

[0028] S36. Dry film pattern transfer: Coat and dry the dry film on the surface of the core board core2, and expose and develop to expose the copper layer in the wire areas;

[0029] S37. Wire etching and film stripping: Etch away the excess copper layer in the wire areas, and after film stripping, form a complete inner layer circuit pattern with partial gilding.

[0030] S4. Lamination and outer layer drilling: Stack and laminate the core board core1 processed in step S2 and the core board core2 processed in step S3 through prepreg, and place a resist film in the gilded area between the core board core1 and the core board core2; the produced board after lamination is as Figure 1 shown, and then drill the produced board according to the drill tape data to connect the circuits of each layer; after drilling, plasma treatment is required to remove the gum residue in the holes and activate the surface of the hole walls to improve the adhesion of subsequent electroless copper plating, as well as electroless copper plating and electroplating. After electroless copper plating, the whole board is electroplated to thicken the hole walls to ensure the conduction reliability of the through holes; when removing the gum residue, the ventilation holes need to be exposed, and the ventilation holes are blocked with high-temperature tape during electroless copper plating and electroplating.

[0031] S5. Forming the outer layer circuit and surface treatment. Forming the outer layer circuit is to perform the processes of laminating the film, exposure, and development on the produced board in sequence to form the outer layer circuit pattern. The unexposed areas are removed by alkaline solution and etched away by acidic etching, and after film stripping, the outer layer circuit is formed; the surface treatment includes AOI optical inspection, solder mask, and character printing; during the solder mask process, the ventilation holes need to be exposed, and the ventilation holes are blocked with high-temperature tape during other processes of surface treatment and during the process of forming the outer layer circuit; AOI optical inspection is to compare the design data through automatic optical inspection to identify defects in the circuit pattern; the solder mask is to screen-print the solder mask ink, and the pad areas are retained after exposure and development. Character printing is the character identification of the welding points (such as component numbers).

[0032] S6. Resist film treatment and finished product forming: Use a depth control router to precisely route to the resist film position, manually tear off the resist film to expose the inner gold-plated area; mill the board edges according to the designed dimensions to complete the final shape processing.

[0033] S7. Finally, conduct electrical tests and FQC final inspection; Test the conductivity and insulation of the finished board; Detect surface defects (scratches, poor gold plating, etc.) through FQC (Final Quality Control) equipment.

[0034] Among them, in steps S4 and S5, in the processes of removing the glue dross and screen printing the solder resist ink, it is necessary to ensure that the ventilation holes are exposed so that the high-temperature material can expand and release through the ventilation holes; for other processes, high-temperature tape is required to seal the ventilation holes to prevent moisture from entering through the ventilation holes and affecting the quality of the finished product.

[0035] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for preparing a printed circuit board with blind vias, characterized in that, It includes the following steps: S1. Core board cutting: Prepare two core boards, namely core board core1 and core board core2; S2. Inner layer processing: First, drill holes in core board core1 and core board core2, and drill one ventilation hole at each end of the blind groove area of core board core1. Then, perform inner layer copper deposition, full panel electroplating, inner layer pattern transfer, inner layer etching and stripping on core board core1 and core board core2 in sequence; S3. Form a partially gold-plated inner layer circuit pattern on core board core2: Perform wet film pattern transfer and dry film pattern transfer on core board core2 in sequence. Both wet film pattern transfer and dry film pattern transfer expose the copper layer in the gold-plated area. After dry film pattern transfer, gold plating treatment is performed on the exposed copper layer, and then the dry film and wet film are removed to form a partially gold-plated core board core2; Perform wet film pattern transfer and dry film pattern transfer on the partially gold-plated core board core2 in sequence. Both wet film pattern transfer and dry film pattern transfer expose the copper layer in the wire area, etch and remove the excess copper layer in the wire area, and then strip the film to form a partially gold-plated inner layer circuit pattern; S4. Lamination and outer layer drilling: Stack and laminate the core board core1 processed in step S2 and the core board core2 processed in step S3 with prepreg, and place a resist film in the gold-plated area between core board core1 and core board core2. Then, drill the production board according to the drill tape data. After drilling, plasma treatment is required to remove the glue residue in the hole, activate the surface of the hole wall, and perform copper deposition and electroplating. The ventilation holes need to be exposed when removing the glue residue in the hole; S5. Form the outer layer circuit and surface treatment. The surface treatment includes AOI optical inspection, solder mask and character printing. The ventilation holes need to be exposed during the solder mask process; S6. Resist film treatment and finished product shaping: Remove the resist film by controlling the depth and shape the outer form; S7. FQC final inspection and electrical testing.

2. The method according to claim 1, characterized in that, The diameter range of the ventilation holes described in step S2 is 0.3 - 0.5 mm.

3. The method according to any one of claims 1-2, characterized in that, The inner layer copper deposition described in step S2 is to deposit copper on the hole walls of the drilled holes in core board core1 and core board core2 to form via holes.

4. The method according to claim 3, characterized in that In step S3, the gold plating is nickel gold or soft gold.

5. The method according to claim 4, wherein In step S4, high-temperature tape is used to block the ventilation holes during copper deposition and electroplating.

6. The method according to claim 5, wherein In step S5, high-temperature tape is used to block the ventilation holes during other processes of surface treatment and during the formation of the outer layer circuit.

7. A printed circuit board, characterized in that, Prepared by using the preparation method described in any one of claims 1 - 6.

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