Solar cell, preparation method thereof and solar cell module

Abstract

The invention discloses a solar cell and a preparation method thereof and a solar cell module, the solar cell comprises a silicon substrate and a poly layer, the poly layer is arranged on one side of the silicon substrate and is connected with the silicon substrate, an adjusting area is formed on the poly layer, the adjusting area comprises a plurality of sub-areas, and the sub-areas are arranged on the silicon substrate. And at least two of the plurality of sub-regions are different in thickness. According to the solar cell, the sub-regions with different thicknesses are arranged in the adjusting region, and the thicknesses of the Poly layers are different, so that phosphorus atoms are not uniformly distributed in the deposition or doping process, potential difference is generated, the transmission speed of current carriers is changed, parasitic absorption is effectively reduced, and the photoelectric conversion efficiency is improved; as the whole surface of the solar cell does not need to be subjected to laser treatment with the same energy, and lasers with different energies are used in different areas, the thermal damage risk of the solar cell is reduced.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, and in particular to a solar cell and a preparation method thereof, and a solar cell assembly. Background Art

[0002] The relevant technology points out that at present, the market share of TOPCon solar cells based on poly-Si / SiOx passivation contacts is rapidly increasing, and its photoelectric conversion efficiency is constantly approaching the theoretical limit. However, the inherent parasitic absorption problem of the poly Si layer causes light to be absorbed but no effective electron-hole pairs are generated, resulting in the loss of optical and electrical efficiency. In order to solve the problem of parasitic absorption of the poly Si layer, there are currently several conventional improvement methods, including poly thinning, introducing a transparent conductive film buffer layer, light element doping, and local poly-Si / SiOx contact.

[0003] Poly layer thinning is mainly to reduce parasitic absorption loss by reducing the thickness of the poly-Si layer, but it needs to maintain sufficient thickness to provide protection and maintain sufficient lateral conductivity; the conductive film buffer layer is to introduce additional transparent conductive films to further reduce the thickness while maintaining the electrical properties of the poly-Si layer; light element doping is to improve the optical performance by introducing light elements (such as carbon, oxygen, and nitrogen) into the poly-Si / SiOx contact. Although the first two can effectively reduce parasitic absorption, their process window is too narrow, the yield is low, and stable mass production is difficult. The optical instability and process cost of light element doping also make this method unable to meet the requirements of large-scale production. The local poly-Si / SiOx contact is to add a laser process on the basis of the current TOPcon process flow, combined with a wet process to remove the poly-Si / SiOx layer in the non-required area to achieve the reduction of parasitic absorption. This method is feasible and effective and meets the requirements of industrial production.

[0004] Currently, local poly-Si / SiOx passivation contacts are mainly presented in the form of poly fingers, that is, the PSG (phosphosilicate glass) in the non-gate line area is removed by laser film opening, the PSG in the metal gate line area is retained, and then the poly layer in the non-gate line area is wet-etched to achieve the purpose of reducing the poly-Si / SiOx passivation contact area, thereby reducing parasitic absorption.

[0005] At present, the spot size of photovoltaic laser applications is usually 150-400μm, and the metal grid line printing width is usually 30-50μm. To achieve a larger poly removal area, that is, a smaller grid line poly width, it is necessary to increase the overlap rate. The increase in overlap rate will lead to an extension of the CT value, and there are potential risks of thermal damage and laser graphic accuracy problems. Keeping the poly film layer at a single thickness cannot achieve precise separation of areas with good passivation performance or functionalization of different areas. Summary of the invention

[0006] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a solar cell, which can effectively reduce parasitic absorption and improve photoelectric conversion efficiency.

[0007] The invention also provides a method for preparing the solar cell.

[0008] The present invention also provides a solar cell assembly having the solar cell.

[0009] According to the first aspect of the present invention, the solar cell comprises: a silicon substrate and a poly layer, wherein the poly layer is arranged on one side of the silicon substrate and connected to the silicon substrate, and the poly layer forms an adjustment area, wherein the adjustment area includes a plurality of sub-areas, and at least two of the plurality of sub-areas have different thicknesses.

[0010] According to the solar cell of the present invention, by setting a plurality of sub-regions with different thicknesses in the adjustment region, the thickness of the Poly layer is different, which will lead to uneven distribution of phosphorus atoms during the deposition or doping process, thereby generating a potential difference, changing the transmission speed of carriers, effectively reducing parasitic absorption, and improving the photoelectric conversion efficiency. In addition, since there is no need to perform laser treatment of the same energy on the entire surface of the solar cell, lasers of different energies are used in different regions, thereby reducing the risk of thermal damage to the solar cell.

[0011] In some embodiments, the thickness difference between the sub-regions with different thicknesses is 0 nm-30 nm.

[0012] In some embodiments, the thickness of the poly layer is 110 nm-150 nm.

[0013] In some embodiments, the solar cell has a metal grid line contact area and a non-metal grid line contact area, the adjustment area is arranged in the non-metal grid line contact area, and in the width direction of the solar cell, the ratio between the area of ​​the non-metal grid line contact area and the area of ​​the adjustment area is 1:1-5:1.

[0014] In some embodiments, the front side of the silicon substrate is provided with an emitter layer, a passivation layer and a metal contact layer in sequence in the direction away from the silicon substrate, the poly layer is provided on the back side of the silicon substrate, a dielectric layer is provided between the poly layer and the silicon substrate, and a passivation layer and a metal contact layer are provided in sequence on the side of the poly layer facing away from the silicon substrate.

[0015] In some embodiments, the plurality of sub-regions are arranged sequentially in a direction from the circumference of the solar cell toward the center position, one of every two adjacent sub-regions is a first sub-region, the other of every two adjacent sub-regions is a second sub-region, and the first sub-region is located on the inner side of the second sub-region in the circumferential direction.

[0016] The method for preparing a solar cell according to the second aspect of the present invention is used to produce the solar cell according to the first aspect of the present invention, and the method comprises:

[0017] Step S1, texturing the surface of the silicon substrate;

[0018] Step S2, diffusing boron into the silicon substrate to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate to form a dielectric layer;

[0019] Step S3, performing alkali polishing on the silicon substrate to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate;

[0020] Step S4, forming a poly layer on the surface of the dielectric layer facing away from the silicon substrate by low pressure chemical vapor deposition;

[0021] Step S5, performing phosphorus doping treatment on the poly layer;

[0022] Step S6, forming an adjustment area on the back side of the silicon substrate by laser, wherein the adjustment area includes a plurality of sub-areas, and at least two of the plurality of sub-areas have different thicknesses;

[0023] Step S7, removing the phosphosilicate glass on the silicon substrate and etching the silicon substrate;

[0024] Step S8, depositing an aluminum oxide layer on the silicon substrate by ALD to form a passivation layer;

[0025] Step S9, coating the front surface of the silicon substrate;

[0026] Step S10, coating the back of the silicon substrate;

[0027] Step S11 : printing a first fine grid on the back side of the solar cell, and printing a second fine grid on the front side of the solar cell.

[0028] According to the method for preparing solar cells of the present invention, the solar cells of the first aspect above use the preparation method of an embodiment of the present invention to optimize the thickness distribution of the poly layer, effectively reduce parasitic absorption, and improve the photoelectric conversion efficiency. Different areas are customized to meet specific functional requirements, such as better passivation effect, higher conductivity, etc., shortening the cycle time. Moreover, since there is no need for comprehensive laser processing on the entire surface, only specific areas are processed, which significantly reduces the risk of thermal damage.

[0029] In some embodiments, the boundary of the adjustment region is determined according to a test grayscale value after the low pressure chemical vapor deposition method.

[0030] In some embodiments, the single spot energy of the laser is 0-95 μj, and / or the spot size of the laser is 150 μm.

[0031] In some embodiments, the laser energy difference between the sub-regions with different thicknesses is 0-50 μj.

[0032] A solar cell module according to a third aspect of the present invention comprises a plurality of solar cells according to the first aspect of the present invention.

[0033] According to the solar cell assembly of the present invention, by arranging a plurality of solar cells according to the first aspect of the present invention, the energy conversion efficiency of the solar cell assembly is improved, the performance of the solar cell assembly is enhanced, the power generation and land space utilization rate are increased, the production and installation costs are reduced, and the economic benefits are ensured.

[0034] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a schematic diagram of a solar cell according to an embodiment of the first aspect of the present invention;

[0036] Figure 2 yes Figure 1 A schematic diagram of an adjustment region of a solar cell shown in ;

[0037] Figure 3 yes Figure 1 A schematic diagram of an adjustment region of a solar cell according to another embodiment shown in FIG.

[0038] Figure 4 It is a flow chart of a method for preparing a solar cell according to an embodiment of the second aspect of the present invention.

[0039] Reference numerals:

[0040] 100. Solar cell; 1. Silicon substrate; 2. Emitter layer; 3. Passivation layer; 4. Metal contact layer; 5. Dielectric layer; 6. Poly layer; 7. Adjustment region; 71. Sub-region; 8. Metal grid line contact region; 9. Non-metal grid line contact region. DETAILED DESCRIPTION

[0041] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0042] Reference below Figure 1-Figure 3 A solar cell 100 according to an embodiment of the first aspect of the present invention is described.

[0043] like Figure 1-Figure 3 As shown, a solar cell 100 according to an embodiment of the first aspect of the present invention.

[0044] Specifically, the solar cell 100 includes: a silicon substrate 1 and a poly layer 6, the poly layer 6 is disposed on one side of the silicon substrate 1 and connected to the silicon substrate 1, the poly layer 6 forms an adjustment area 7, the adjustment area 7 includes a plurality of sub-areas 71, and at least two of the plurality of sub-areas 71 have different thicknesses. It can be understood that the thickness of at least two of the plurality of sub-areas 71 is different, and the thickness between any two adjacent sub-areas 71, the thickness between any three adjacent sub-areas 71, the thickness between any four adjacent sub-areas 71, and so on.

[0045] It should be explained in detail here that the different thicknesses of the Poly layer 6 will lead to uneven distribution of phosphorus atoms during the deposition or doping process, that is, inconsistent phosphorus concentration, thereby forming energy bands of different widths with the dielectric layer 5. The difference in energy band width will affect the longitudinal transmission speed of carriers in the poly layer 6. A thicker and more highly doped Poly layer 6 will form a wider energy band, thereby increasing the energy barrier when the carriers pass through the dielectric layer 5 and slowing down the longitudinal transmission speed of the carriers; a thinner and less doped Poly layer 6 can reduce the energy barrier when the carriers pass through the dielectric layer 5, thereby promoting the rapid passage of the carriers through the dielectric layer 5, reducing the residence time of the carriers, and thus reducing the recombination loss between the carriers.

[0046] Furthermore, due to the difference in phosphorus atom concentration in different regions of the Poly layer 6, atomic diffusion occurs, resulting in the formation of local potential differences. The lateral potential can prompt carriers to move in the horizontal direction, especially in areas with high doping concentrations, thereby enhancing the lateral transmission efficiency of carriers from the generation position to the nearest electrode, reducing the loss of carriers during the transmission process, and improving the carrier collection efficiency, thereby improving the photoelectric conversion efficiency of solar cells.

[0047] According to the solar cell 100 of the embodiment of the present invention, by setting a plurality of sub-regions 71 with different thicknesses in the adjustment region 7, the thickness of the Poly layer 6 is different, which will lead to uneven distribution of phosphorus atoms during the deposition or doping process, thereby generating a potential difference, changing the transmission speed of carriers, effectively reducing parasitic absorption, and improving the photoelectric conversion efficiency. In addition, since it is not necessary to perform laser treatment of the same energy on the entire surface of the solar cell 100, lasers of different energies are used in different areas, thereby reducing the risk of thermal damage to the solar cell 100.

[0048] Specifically, the conventional full-layer removal treatment method will damage the passivation layer on the surface of the battery, resulting in an increase in the interface state density, thereby reducing the open-circuit voltage and reducing the overall performance and efficiency of the battery. Compared with the conventional full-layer removal treatment method, the solar cell 100 of the embodiment of the present invention is provided with multiple sub-regions 71 of different thicknesses, which can retain the passivation layer as much as possible, reduce the reduction in open-circuit voltage, reduce carrier recombination losses, and by maintaining a thicker Poly layer 6 in the area with higher current density, it can provide a lower contact resistivity, reduce the series resistance, and thus improve the fill factor. Using a thinner Poly layer 6 in the low current density area can reduce the recombination probability of photogenerated carriers, maintain a higher open-circuit voltage, and thus improve the overall efficiency of the solar cell 100;

[0049] The whole-layer uniform thinning treatment method means that the thickness of the Poly layer of the battery is removed uniformly, so there is no uneven distribution of phosphorus atoms, there is no potential difference, and the carrier transmission speed cannot be changed, thereby improving the carrier collection efficiency. Compared with the whole-layer thinning treatment method, the solar cell 100 of the embodiment of the present invention is provided with multiple sub-areas 71 with different thicknesses. Due to the different thicknesses of the Poly layer 6, the phosphorus atoms are unevenly distributed during the deposition or doping process, thereby generating a potential difference, changing the carrier transmission speed, and effectively reducing parasitic absorption, thereby improving the photoelectric conversion efficiency.

[0050] In some embodiments of the present invention, the thickness difference between the sub-areas 71 with different thicknesses is 0nm-30nm. It is understandable that the main problem of the poly layer 6 is the parasitic absorption of light, especially in the visible light range. By controlling the thickness difference within a smaller range (such as 0nm-30nm), the influence of this parasitic absorption can be effectively reduced, while ensuring that the poly layer 6 can still provide the necessary passivation effect. In addition, for poly-Si / SiOx contacts, maintaining an appropriate thickness is essential to maintaining good electrical properties. Too large a thickness difference may cause an increase in contact resistance or a decrease in current transmission efficiency. When the poly layer 6 is treated by laser or other heating methods, a large thickness difference may cause local overheating, thereby causing thermal damage. A smaller thickness difference can reduce the occurrence of this situation, ensure a more uniform temperature distribution during processing, and reduce potential risks.

[0051] Specifically, the thickness difference between the sub-areas 71 with different thicknesses can be any value of 0-30nm, for example: 0nm, 1nm, 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, 21nm, 22nm, 23nm, 24nm, 25nm, 26nm, 27nm, 28nm, 29nm, 30nm and the like.

[0052] In some embodiments of the present invention, the thickness of the poly layer 6 is 110nm-150nm. It is understood that within this thickness range, the poly-Si layer can provide sufficient lateral conductivity to ensure that the current can be effectively transmitted from the silicon substrate 1 to the metal grid line without causing efficiency loss due to excessive resistance. The poly-Si layer of appropriate thickness can form a good passivation contact with the SiOx layer, reduce the surface recombination rate, and thus improve the open circuit voltage (Voc) of the battery. In addition, although poly-Si itself will absorb light to a certain extent, the thickness of 110nm-150nm can minimize the parasitic absorption of incident light while maintaining a sufficient passivation effect, especially for photons with longer wavelengths. These photons are more likely to penetrate the poly layer 6 and be absorbed by the silicon substrate 1 and converted into electrical energy, which also helps to optimize the reflection and transmission characteristics of light, so that more light can enter the silicon substrate 1 instead of being reflected back or directly passing through without being absorbed.

[0053] Specifically, the thickness of the poly layer 6 can be any value between 110 nm and 150 nm, for example, 110 nm, 115 nm, 120 nm, 125 nm, 130 nm, 135 nm, 140 nm, 145 nm, 150 nm, etc.

[0054] In some embodiments of the present invention, the solar cell 100 has a metal grid line contact area 8 and a non-metal grid line contact area 9, and the adjustment area 7 is arranged in the non-metal grid line contact area 9. In the width direction of the solar cell 100, the ratio between the area of ​​the non-metal grid line contact area 9 and the area of ​​the adjustment area 7 is 1:1-5:1. It can be understood that the metal grid line contact area 8 is responsible for the collection and transmission of current, while the non-metal grid line contact area 9 is mainly used for passivation and reducing surface recombination. The adjustment area 7 is arranged in the non-metal grid line contact area 9. By optimizing the thickness of the poly layer 6, the passivation effect can be further improved, thereby increasing the open circuit voltage (Voc) and the fill factor (FF), and ultimately improving the overall conversion efficiency.

[0055] Specifically, when the area of ​​the non-metallic gate line contact region 9 is equal to that of the adjustment region 7 (such as a ratio of 1:1), a relatively uniform structural distribution can be obtained; when the area of ​​the non-metallic gate line contact region 9 is significantly larger than the area of ​​the adjustment region 7 (such as a ratio of 5:1), more emphasis can be placed on reducing light shielding and increasing the number of photogenerated carriers.

[0056] In some embodiments, the ratio between the area of ​​the non-metal gate line contact region 9 and the area of ​​the adjustment region 7 may be any ratio of 1:1-5:1, for example, 1:1, 2:1, 3:1, 4:1, 5:1, and the like.

[0057] In some embodiments of the present invention, the front side of the silicon substrate 1 is sequentially provided with an emitter layer 2, a passivation layer 3 and a metal contact layer 4 in the direction away from the silicon substrate 1, a poly layer 6 is provided on the back side of the silicon substrate 1, a dielectric layer 5 is provided between the poly layer 6 and the silicon substrate 1, and a passivation layer 3 and a metal contact layer 4 are sequentially provided on the side of the poly layer 6 away from the silicon substrate 1. It can be understood that the silicon substrate 1, as the basic material of the battery, is responsible for photon absorption and generation of electron-hole pairs; the emitter layer 2 is usually composed of n-type doped silicon, used to collect the generated carriers, located on the front side of the silicon substrate 1, and in direct contact with the incident light; the passivation layer 3 provides surface passivation, reduces surface recombination losses, and increases the open circuit voltage, and can be SiN x , Al2O3 and other materials; the metal contact layer 4 includes gate lines and other electrodes for current collection and transmission. These metal contacts need to ensure good conductivity while minimizing the shielding area; the poly layer 6 is located on the back of the silicon substrate 1, and a dielectric layer 5 is provided between the poly layer 6 and the silicon substrate 1. The main function of the poly layer 6 is to provide an additional carrier collection path and improve the passivation effect of the back surface; the passivation layer 3 is on the outside of the poly layer 6, further enhancing the passivation effect of the back and reducing the composite loss; the metal contact layer 4 is used for current collection and transmission, but the design of the back may be different to meet different current collection requirements.

[0058] It should be explained in detail here that when the thickness of the dielectric layer 5 is less than 2nm, the carriers mainly pass through the dielectric layer 5 through the quantum tunneling mechanism, so that electrons or holes can pass through the insulating barrier with a higher probability through the tunneling effect in quantum mechanics without sufficient energy to overcome the entire potential barrier. In the TOPCon battery, the thickness of the dielectric layer 5 is usually less than 2nm, and the majority carriers pass through while blocking the minority carriers, thereby reducing the recombination loss and improving the fill factor; when the thickness of the dielectric layer 5 is greater than 2nm, pinholes (pinhole defects) exist in the dielectric layer 5, and the carriers directly pass through the dielectric layer 5 through tiny holes, that is, when it is greater than 2nm, the carriers are more transmitted through pinholes.

[0059] It is understood that when the thickness of the dielectric layer 5 is less than 2nm, it is a tunneling layer of the TOPCon cell. In the solar cell 100 of the embodiment of the present invention, the thickness of the dielectric layer 5 is less than 2nm, that is, the embodiment of the present invention is a TOPCon cell. It is understood that the thickness of the dielectric layer 5 can also be set to be greater than 2nm, and the carriers are transmitted through the pinholes, which will not be repeated here.

[0060] Therefore, the combination of the poly layer 6 and the dielectric layer 5 enables carriers to be efficiently transferred from the silicon substrate 1 to the metal contact layer 4 on the back, thereby improving the short-circuit current density; a passivation layer 3 is provided on both the front and back sides, especially the poly layer 6 on the back side is combined with the dielectric layer 5, which provides an excellent surface passivation effect, significantly reduces surface recombination losses, and improves the open circuit voltage; the presence of the back poly layer 6 reduces the thickness requirement of the front emitter layer 2, reduces the parasitic absorption of the front side, and thus improves the optical efficiency.

[0061] In a specific embodiment of the present invention, a plurality of sub-regions 71 are arranged sequentially in a direction from the circumference of the current non-metal gate line contact region 9 toward the center position, one of every two adjacent sub-regions 71 is a first sub-region, and the other of every two adjacent sub-regions 71 is a second sub-region, and the first sub-region is located on the inner side of the second sub-region in the circumferential direction. It can be understood that the first sub-region of each two adjacent sub-regions 71 is closer to the center of the current non-metallic grid line contact region 9 than the second sub-region. Except for a sub-region 71 located in the current non-metallic grid line contact region 9, the other sub-regions 71 are formed into a ring shape and extend around a sub-region 71 located in the center of the current non-metallic grid line contact region 9. In addition, preferably, since the central position of the current non-metallic grid line contact region 9 has good passivation performance, the thickness of the Poly layer 6 of a sub-region 71 located in the center of the current non-metallic grid line contact region 9 is relatively thick to ensure that the opening voltage of the solar cell 100 is maintained. In the direction from the center of the solar cell 100 toward the edge, the thickness of the Poly layer 6 of multiple sub-regions 71 gradually decreases, that is, the thinned thickness of the Poly layer 6 gradually increases in the direction from the center of the current non-metallic grid line contact region 9 toward the edge, thereby reducing parasitic absorption and increasing current.

[0062] The method for preparing the solar cell 100 according to the second embodiment of the present invention is used to prepare the solar cell 100 according to the first embodiment of the present invention.

[0063] Specifically, Figure 4 As shown, the preparation method comprises:

[0064] Step S1, texturing the surface of the silicon substrate 1;

[0065] Step S2, performing boron diffusion on the silicon substrate 1 to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate 1 to form a dielectric layer 5;

[0066] Step S3, performing alkali polishing on the silicon substrate 1 to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate 1;

[0067] Step S4, forming a poly layer 6 on the surface of the dielectric layer 5 facing away from the silicon substrate 1 by low pressure chemical vapor deposition;

[0068] Step S5, performing phosphorus doping treatment on the poly layer 6;

[0069] Step S6, forming an adjustment area 7 on the back side of the silicon substrate 1 by laser, wherein the adjustment area 7 includes a plurality of sub-areas 71, and at least two of the plurality of sub-areas 71 have different thicknesses;

[0070] Step S7, removing the phosphosilicate glass on the silicon substrate 1, and etching the silicon substrate 1;

[0071] Step S8, depositing an aluminum oxide layer on the silicon substrate 1 by ALD to form a passivation layer 3;

[0072] Step S9, coating the front surface of the silicon substrate 1;

[0073] Step S10, performing coating treatment on the back side of the silicon substrate 1;

[0074] Step S11 : printing a first fine grid on the back side of the solar cell 100 , and printing a second fine grid on the front side of the solar cell 100 .

[0075] According to the preparation method of the solar cell 100 of the embodiment of the present invention, the solar cell 100 of the first aspect embodiment above optimizes the thickness distribution of the poly layer 6 by using the preparation method of the embodiment of the present invention, effectively reduces parasitic absorption, improves the photoelectric conversion efficiency, and performs customized processing on different areas to meet specific functional requirements, such as better passivation effect, higher conductivity, etc., shortens the cycle time, and since there is no need for comprehensive laser processing on the entire surface, only specific areas are processed, which significantly reduces the risk of thermal damage.

[0076] It is understandable that in step S1, an alkaline or acidic solution is usually used to treat the surface of the N-type silicon substrate 1 to form a microstructure to improve the light capture capability, thereby increasing the light absorption rate and reducing reflection;

[0077] In step S2, a pn junction is formed on the front side of the silicon substrate 1 by high-temperature diffusion of a boron source; the back side is then cleaned and subjected to low-temperature oxidation treatment to form a high-quality tunneling oxide layer, thereby forming a p+ emitter on the front side and an ultra-thin tunneling oxide layer on the back side;

[0078] In step S3, alkaline solution is used for light polishing to improve the surface quality, and wet chemical cleaning is used to remove borosilicate glass (BSG) and remove excess boron impurities on the back side to prepare for the subsequent deposition of poly layer 6;

[0079] In step S4, a uniform polysilicon layer is deposited at a relatively low pressure using LPCVD technology, so that a layer of polysilicon is deposited as part of the tunnel passivation contact;

[0080] In step S5, phosphorus atoms may be introduced by ion implantation or diffusion, followed by annealing to activate the dopant, converting the poly layer 6 into n+ doping to enhance its conductivity and selective contact performance;

[0081] In step S6, a plurality of sub-regions 71 with different thicknesses are formed by laser to reduce parasitic absorption while maintaining the function of key areas;

[0082] In step S7, wet chemical cleaning is used to remove the phosphosilicate glass, and then etching is performed to ensure that the surface is clean and flat, remove the phosphosilicate glass formed during the phosphorus diffusion process, and optimize the surface morphology;

[0083] In step S8, a high-quality aluminum oxide layer is deposited using atomic layer deposition (ALD) technology to ensure uniform coverage, provide additional surface passivation, and further reduce the surface recombination velocity;

[0084] In step S9, PECVD or other suitable coating techniques may be used to deposit materials such as silicon nitride to form an anti-reflective coating to improve light absorption efficiency;

[0085] In step S10, PECVD and other technologies can also be used for coating. The specific material is selected according to the design requirements to protect the back structure and may provide additional optical management functions;

[0086] In step S11, screen printing technology is used to print silver paste on the back side to form a fine grid; a fine grid is printed at the corresponding position on the front side to ensure that the grid lines on both sides are aligned with each other, defining a non-metallic grid line contact area, and multiple sub-areas 71 with different thicknesses are all located in the non-metallic grid line contact area, thereby forming an efficient current collection system.

[0087] Here, a second fine grid may be printed on the front side of the solar cell 100 at a position aligned with the first fine grid.

[0088] In some other embodiments, silver paste is printed on the back side of the solar cell 100 to form fine grids and main grids, and the fine grids and main grids are perpendicular to each other.

[0089] In some embodiments of the present invention, in order to ensure accuracy, the boundary of the adjustment area 7 is determined according to a test grayscale value after the low pressure chemical vapor deposition method.

[0090] In some embodiments of the present invention, the energy of a single laser spot is 0-95 μj, and the difference in laser energy between sub-areas 71 with different thicknesses is 0-50 μj. By adjusting the laser energy between 0-50 μj, the thickness of different sub-areas 71 can be precisely controlled without affecting the overall performance, thereby meeting specific functional requirements, such as optimizing the passivation effect, reducing parasitic absorption, etc. The laser spot size is 150 μm. Thus, a good etching effect can be achieved without damaging the underlying material. The laser is a green laser with a high absorption rate and a low thermal effect, which is suitable for fine processing.

[0091] Specifically, the single spot energy of the laser can be any value of 0-95μj, for example: 0μj, 1μj, 2μj, 3μj, 4μj, 5μj, 6μj, 7μj, 8μj, 9μj, 10μj, 15μj, 20μj, 25μj, 30μj, 35μj, 40μj, 45μj, 50μj, 55μj, 60μj, 65μj, 70μj, 75μj, 80μj, 85μj, 90μj, 95μj and the like.

[0092] The solar cell assembly according to the third aspect of the present invention comprises a plurality of solar cells 100 according to the first aspect of the present invention. It is understandable that the plurality of solar cells 100 constitute the solar cell assembly, and the plurality of solar cells 100 can be combined together in series, parallel or mixed connection. Due to the use of efficient single solar cells 100, the energy conversion efficiency of the entire solar cell assembly is improved, thereby generating more power output under the same light regulation and reducing the installation area.

[0093] The solar cell assembly according to the embodiment of the present invention improves the energy conversion efficiency of the solar cell assembly, enhances the performance of the solar cell assembly, increases the power generation and land space utilization, reduces the production and installation costs, and ensures economic benefits by disposing a plurality of solar cells 100 according to the first aspect of the present invention.

[0094] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0095] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0096] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0097] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0098] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A solar cell, characterized in that: include: A silicon substrate and a poly layer, wherein the poly layer is arranged on one side of the silicon substrate and connected to the silicon substrate, and the poly layer forms an adjustment area, wherein the adjustment area includes a plurality of sub-areas, and at least two of the plurality of sub-areas have different thicknesses.

2. The solar cell according to claim 1, characterized in that The difference in thickness between the sub-regions with different thicknesses is 0 nm-30 nm.

3. The solar cell according to claim 2, characterized in that: The thickness of the poly layer is 110nm-150nm.

4. The solar cell according to claim 3, characterized in that: The solar cell has a metal grid line contact area and a non-metal grid line contact area, the adjustment area is arranged in the non-metal grid line contact area, and in the width direction of the solar cell, the ratio between the area of ​​the non-metal grid line contact area and the area of ​​the adjustment area is 1:1-5:

1.

5. The solar cell according to any one of claims 1 to 4, characterized in that: The front side of the silicon substrate is provided with an emitter layer, a passivation layer and a metal contact layer in sequence in the direction away from the silicon substrate, the poly layer is provided on the back side of the silicon substrate, a dielectric layer is provided between the poly layer and the silicon substrate, and the side of the poly layer facing away from the silicon substrate is provided with a passivation layer and a metal contact layer in sequence.

6. The solar cell according to any one of claims 1 to 4, characterized in that: The multiple sub-areas are arranged in sequence from the circumference of the solar cell toward the center position, one of every two adjacent sub-areas is a first sub-area, and the other of every two adjacent sub-areas is a second sub-area, and the first sub-area is located on the inner side of the second sub-area in the circumferential direction.

7. A method for preparing a solar cell, characterized in that: For producing the solar cell according to any one of claims 1 to 6, the preparation method comprises: Step S1, texturing the surface of the silicon substrate; Step S2, diffusing boron into the silicon substrate to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate to form a dielectric layer; Step S3, performing alkali polishing on the silicon substrate to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate; Step S4, forming a poly layer on the surface of the dielectric layer facing away from the silicon substrate by low pressure chemical vapor deposition; Step S5, performing phosphorus doping treatment on the poly layer; Step S6, forming an adjustment area on the back side of the silicon substrate by laser, wherein the adjustment area includes a plurality of sub-areas, and at least two of the plurality of sub-areas have different thicknesses; Step S7, removing the phosphosilicate glass on the silicon substrate and etching the silicon substrate; Step S8, depositing an aluminum oxide layer on the silicon substrate by ALD to form a passivation layer; Step S9, coating the front surface of the silicon substrate; Step S10, coating the back of the silicon substrate; Step S11 : printing a first fine grid on the back side of the solar cell, and printing a second fine grid on the front side of the solar cell.

8. The preparation method according to claim 7, characterized in that: The boundary of the adjustment area is determined according to the test grayscale value after the low pressure chemical vapor deposition method.

9. The preparation method according to claim 8, characterized in that: The single spot energy of the laser is 0-95 μj, and / or the spot size of the laser is 150 μm.

10. The preparation method according to claim 9, characterized in that: The laser energy difference between the sub-regions with different thicknesses is 0-50 μj.

11. A solar cell module, characterized in that: The invention comprises a plurality of solar cells according to any one of claims 1 to 6.

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