Power supply control circuit, power supply control chip and charging device

Abstract

The invention provides a power supply control circuit, a power supply control chip and a charging device. The power supply control circuit comprises a first switching circuit, wherein the input end of the first switching circuit is used for connecting a second adapter; the first input end of the first control circuit is connected with the output end of the second switching circuit. The first end of the second control circuit is connected with the output end of the first switching circuit. The second end of the second control circuit is connected with the second input end of the first control circuit. The output end of the second control circuit is used for connecting to-be-charged equipment. When the first adapter and the second adapter are connected at the same time, the first control circuit obtains the first current of the second control circuit, if the first current is larger than the maximum input current of the first adapter, the first control circuit outputs the second current, and the second current does not exceed the maximum input current of the second adapter. If the first current is smaller than or equal to the maximum input current of the first adapter, the first control circuit does not output the second current.

Description

Technical Field

[0001] The present disclosure relates to the field of power supplies, and in particular to a power supply control circuit, a power supply control chip, and a charging device. Background Art

[0002] To support high-power CPUs, GPUs, and large-capacity batteries, high-power laptops (such as gaming laptops) need to use high-power square or round adapters, which currently have 300W and 330W. As the power of CPUs and GPUs increases, the charging power of adapters is tending to be higher. At the same time, to better facilitate consumers, Type C adapters are also needed.

[0003] Laptop power input generally supports two different types of adapters: square port adapter and Type C adapter. Since the two cannot power the system at the same time, when the computer is in high-power working conditions for a long time, the battery will be in a long-term discharge state, and the battery power will continue to decline; even after the battery is empty, the battery can no longer recharge the system, the system cannot get enough power, the CPU or GPU power cannot be increased, resulting in system performance degradation, which creates a bad experience for consumers. Summary of the invention

[0004] The present disclosure provides a power supply control circuit, a power supply control chip and a charging device to at least solve the above technical problems existing in the prior art.

[0005] According to a first aspect of the present disclosure, there is provided a power supply control circuit, the circuit comprising: a first switch circuit, an input end of the first switch circuit being used to connect to a first adapter;

[0006] a second switch circuit, wherein an input end of the first switch circuit is used to connect to a second adapter;

[0007] a first control circuit, wherein a first input terminal of the first control circuit is connected to an output terminal of the second switch circuit;

[0008] a second control circuit, wherein a first end of the second control circuit is respectively connected to an output end of the first switch circuit and an output end of the first control circuit, a second end of the second control circuit is connected to a second input end of the first control circuit, and an output end of the second control circuit is used to connect to a device to be charged;

[0009] When the first adapter and the second adapter are connected at the same time, the first control circuit obtains the first current of the second control circuit. If the first current is greater than the maximum input current of the first adapter, the first control circuit outputs the second current, and the second current does not exceed the maximum input current of the second adapter. If the first current is less than or equal to the maximum input current of the first adapter, the first control circuit does not output the second current, wherein the first current is the input current of the second control circuit.

[0010] In one possible implementation, it further includes:

[0011] The power management circuit is connected to the second switch circuit and the first control circuit respectively, and is used to set the working mode of the first control circuit, and the working mode includes a voltage following mode and a normal buck mode.

[0012] In one embodiment, the first control circuit includes:

[0013] a first controller, the first controller being connected to the second control circuit and the power management circuit respectively;

[0014] a first selection circuit, wherein a first end of the first selection circuit is connected to an output end of the second switch circuit, a second end of the first selection circuit is connected to the first controller, and a third end of the first selection circuit is connected to a first end of the second control circuit;

[0015] When the working mode of the first control circuit is the voltage following mode, the first controller obtains the first current. If the first current is greater than the maximum input current of the first adapter, the first controller controls the first selection circuit to output the second current, and the second current does not exceed the maximum input current of the second adapter. If the first current is less than or equal to the maximum input current of the first adapter, the first controller controls the first selection circuit not to output the second current.

[0016] In one possible implementation, the first selection circuit includes:

[0017] a first controllable switch, wherein a first end of the first controllable switch is connected to an output end of the second switch circuit, and a second end of the first controllable switch is connected to the first controller;

[0018] a second controllable switch, wherein a first end of the second controllable switch is connected to a third end of the first controllable switch, a second end of the second controllable switch is connected to the first controller, and a third end of the second controllable switch is grounded;

[0019] a first inductor, wherein a first end of the first inductor is respectively connected to a first end of the second controllable switch and a third end of the first controllable switch;

[0020] a first resistor, wherein a first end of the first resistor is respectively connected to a second end of the first inductor and a first controller, and a second end of the first resistor is respectively connected to a first end of the first controller and a first end of a second control circuit;

[0021] a third controllable switch, wherein a first end of the third controllable switch is connected to the output end of the second switch circuit, and a second end of the third controllable switch is connected to the first controller;

[0022] a fourth controllable switch, wherein a first end of the fourth controllable switch is connected to a third end of the third controllable switch, a second end of the fourth controllable switch is connected to the first controller, and a third end of the fourth controllable switch is grounded;

[0023] a second inductor, wherein a first end of the second inductor is respectively connected to a first end of the fourth controllable switch and a third end of the third controllable switch;

[0024] A second resistor, wherein a first end of the second resistor is respectively connected to a second end of the second inductor and the first controller, and a second end of the second resistor is respectively connected to a first end of the first controller and a first end of the second control circuit.

[0025] In one embodiment, the first controllable switch, the second controllable switch, the third controllable switch and the fourth controllable switch are all insulated gate bipolar transistors.

[0026] In one embodiment, the second control circuit includes:

[0027] a fifth controllable switch, wherein a first end of the fifth controllable switch is respectively connected to an output end of the first switch circuit and an output end of the first control circuit;

[0028] a sixth controllable switch, wherein a first end of the sixth controllable switch is connected to a second end of the fifth controllable switch;

[0029] a third resistor, wherein a first end of the third resistor is respectively connected to the second end of the sixth controllable switch and the first control circuit, and a second end of the third resistor is used to connect to a device to be charged;

[0030] a second controller connected to the third end of the fifth controllable switch, the third end of the sixth controllable switch, the first end of the third resistor, the second end of the third resistor and the first control circuit respectively;

[0031] a seventh controllable switch, wherein a first end of the seventh controllable switch is connected to the second end of the third resistor, and a second end of the seventh controllable switch is connected to the second controller;

[0032] an eighth controllable switch, wherein a first end of the eighth controllable switch is connected to the second end of the third resistor, and a second end of the eighth controllable switch is connected to the second controller;

[0033] a ninth controllable switch, wherein a first end of the ninth controllable switch is connected to a third end of the eighth controllable switch, a second end of the ninth controllable switch is connected to the second controller, and a third end of the ninth controllable switch is grounded;

[0034] a third inductor, wherein a first end of the third inductor is respectively connected to the first end of the ninth controllable switch, the third end of the eighth controllable switch and the second controller;

[0035] A fourth resistor, wherein a first end of the fourth resistor is respectively connected to the third end of the seventh controllable switch and the second controller, and a second end of the fourth resistor is connected to the second controller.

[0036] In one possible implementation, the first switch circuit includes:

[0037] a tenth controllable switch, wherein a first end of the tenth controllable switch is used to connect to the first adapter;

[0038] an eleventh controllable switch, wherein a first end of the eleventh controllable switch is connected to a second end of the tenth controllable switch, a second end of the eleventh controllable switch is connected to a first end of a second control circuit and an output end of the first control circuit, and a third end of the tenth controllable switch and a third end of the eleventh controllable switch are both connected to a controller.

[0039] In one possible implementation, the second switch circuit includes:

[0040] An electronic switch, wherein a first end of the electronic switch is used to connect to a second adapter, and a second end of the electronic switch is connected to a first input end of the first control circuit.

[0041] According to a second aspect of the present disclosure, a power control chip is provided, comprising the power supply control circuit according to any one of the above embodiments.

[0042] According to a third aspect of the present disclosure, there is provided a charging device, comprising: a power supply control circuit according to any one of the embodiments.

[0043] The power supply control circuit, power supply control chip and charging device disclosed in the present invention, when the first adapter and the second adapter are connected at the same time, the first control circuit obtains the first current of the second control circuit, if the first current is greater than the maximum input current of the first adapter, the first control circuit outputs the second current, and the second current does not exceed the maximum input current of the second adapter, if the first current is less than or equal to the maximum input current of the first adapter, the first control circuit does not output the second current, wherein the first current is the input current of the second control circuit. In this way, the problem that the square port adapter and the Type C adapter cannot be powered at the same time when connected at the same time can be solved, the power of the dual power supplies can be added, and the problem that the battery will be in a long-term discharge state and the battery power will continue to decrease when the charging device is in high-power working conditions for a long time can be solved; it can avoid the problem that the battery cannot replenish the system after the battery is discharged, the system cannot get enough power, and the system performance is reduced, thereby improving the consumer experience.

[0044] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which:

[0046] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.

[0047] Figure 1 A circuit schematic diagram of a power supply control circuit provided in an embodiment of the present application;

[0048] Figure 2 A circuit block diagram of a first controller provided in an embodiment of the present application;

[0049] Figure 3 A circuit block diagram of a power control chip provided in one embodiment of the present application;

[0050] Figure 4 A circuit block diagram of a charging device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0051] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.

[0052] A power supply control circuit, a power supply control chip and a charging device provided by the present application are described below in conjunction with the accompanying drawings.

[0053] See also Figure 1 , an embodiment of the present application provides a power supply control circuit 10. The power supply control circuit 10 includes: a first switch circuit 100, a second switch circuit 200, a first control circuit 300, and a second control circuit 400. The input end of the first switch circuit 100 is used to connect the first adapter 101. The input end of the first switch circuit 200 is used to connect the second adapter 201. The first input end of the first control circuit 300 is connected to the output end of the second switch circuit 200. The first end of the second control circuit 400 is respectively connected to the output end of the first switch circuit 100 and the output end of the first control circuit 300. The second end of the second control circuit 400 is connected to the second input end of the first control circuit 300. The output end of the second control circuit 400 is used to connect the device to be charged.

[0054] When the first adapter 101 and the second adapter 201 are connected at the same time, the first control circuit 300 obtains the first current of the second control circuit 400. If the first current is greater than the maximum input current of the first adapter 101, the first control circuit 300 outputs the second current, and the second current does not exceed the maximum input current of the second adapter 201. If the first current is less than or equal to the maximum input current of the first adapter 101, the first control circuit 300 does not output the second current, wherein the first current is the input current of the second control circuit 400.

[0055] In some embodiments, the type of the first adapter 101 is not limited, as long as it is different from the second adapter 201. In some embodiments, the first adapter 101 may be a square port adapter, and the second adapter 201 may be a Type-C adapter. In some embodiments, the specific circuit of the first switch circuit 100 is not limited, as long as it can control whether the first adapter 101 supplies power to the second control circuit 400. Specifically, the first switch circuit 100 may be an IGBT (Insulate-Gate Bipolar Transistor). Similarly, the specific circuit of the second switch circuit 200 is not limited, as long as it can control whether the second adapter 201 supplies power to the second control circuit 400. Specifically, the second switch circuit 200 may be an IGBT (Insulate-Gate Bipolar Transistor).

[0056] In some embodiments, when the first adapter 101 (taking a square port adapter as an example) and the second adapter 201 (taking a Type_C adapter as an example) are both connected to the system, the square port is the main adapter and the Type_C is the auxiliary adapter. The first control circuit 300 obtains the first current of the second control circuit 400. If the first current is greater than the maximum input current of the first adapter 101, the first control circuit 300 starts working and outputs the second current and the corresponding voltage, and the second current does not exceed the maximum input current of the second adapter 201. The output voltage follows the square port power supply output voltage V_BUS, so that the Type_C adapter is connected in parallel with the square port adapter output, and the total output power is a certain proportion of the square port and Type_C power added to meet the high power requirements of the system. If the first current is less than or equal to the maximum input current of the first adapter 101, the first control circuit 300 does not output the second current (i.e. stops working). Among them, the first current is the input current of the second control circuit 400. This can solve the problem that the square port adapter and the Type C adapter cannot be powered at the same time, realize the power addition of dual power supplies, and solve the problem that the battery will be in a long-term discharge state and the battery power will continue to decrease when the charging device is in high-power working conditions for a long time. It can also avoid the problem that after the battery is discharged, the battery cannot replenish the system, the system cannot get enough power, and the system performance is reduced, thereby improving the consumer experience.

[0057] In some embodiments, the power supply control circuit 10 further includes: a power management circuit 500. The power management circuit 500 is connected to the second switch circuit 200 and the first control circuit 300 respectively. The power management circuit 500 is used to set the working mode of the first control circuit 300. The working mode includes a voltage follower mode and a normal buck mode. In some embodiments, the specific circuit structure of the power management circuit 500 is not limited, as long as it has the function of managing power. In some embodiments, the power management circuit 500 can be a power supply management chip.

[0058] In some embodiments, the EC (ie, the power management circuit 500 ) may report information such as the maximum input current information V_ADP_ilim of the Type C adapter and the maximum input current information V_Type C_ilim to the first control circuit 300 via the SMBUS (system management bus).

[0059] In some embodiments, the EC can set the current working mode of the first control circuit 300 via SMBUS: voltage follower mode or normal buck mode.

[0060] In some embodiments, the first control circuit 300 includes: a first controller 310 and a first selection circuit 320. The first controller 310 is connected to the second control circuit 400 and the power management circuit 500 respectively. A first end of the first selection circuit 320 is connected to an output end of the second switch circuit 200. A second end of the first selection circuit 320 is connected to the first controller 310. A third end of the first selection circuit 320 is connected to a first end of the second control circuit 400.

[0061] When the working mode of the first control circuit 300 is the voltage following mode, the first controller 310 obtains the first current, and if the first current is greater than the maximum input current of the first adapter 101, the first controller 310 controls the first selection circuit 320 to output the second current, and the second current does not exceed the maximum input current of the second adapter 201. If the first current is less than or equal to the maximum input current of the first adapter 101, the first controller 310 controls the first selection circuit 320 not to output the second current.

[0062] In some embodiments, the first selection circuit 320 includes: a first controllable switch Q8, a second controllable switch Q9, a first inductor L2, a first resistor R1, a third controllable switch Q10, a fourth controllable switch Q11, a second inductor L3, and a second resistor R2. The first end of the first controllable switch Q8 is connected to the output end of the second switch circuit 200. The second end of the first controllable switch Q8 is connected to the first controller 310. The first end of the second controllable switch Q9 is connected to the third end of the first controllable switch Q8. The second end of the second controllable switch Q9 is connected to the first controller 310. The third end of the second controllable switch Q9 is grounded. The first end of the first inductor L2 is respectively connected to the first end of the second controllable switch Q9 and the third end of the first controllable switch Q8. The first end of the first resistor R1 is respectively connected to the second end of the first inductor L2 and the first controller 310. The second end of the first resistor R1 is respectively connected to the first controller 310 and the first end of the second control circuit 400.

[0063] The first end of the third controllable switch Q10 is connected to the output end of the second switch circuit 200. The second end of the third controllable switch Q10 is connected to the first controller 310. The first end of the fourth controllable switch Q11 is connected to the third end of the third controllable switch Q10. The second end of the fourth controllable switch Q11 is connected to the first controller 310. The third end of the fourth controllable switch Q11 is grounded. The first end of the second inductor L3 is respectively connected to the first end of the fourth controllable switch Q11 and the third end of the third controllable switch Q10. The first end of the second resistor R2 is respectively connected to the second end of the second inductor L3 and the first controller 310. The second end of the second resistor R2 is respectively connected to the first controller 310 and the first end of the second control circuit 400. In some embodiments, the first controllable switch Q8, the second controllable switch Q9, the third controllable switch Q10 and the fourth controllable switch Q11 may be an insulated gate bipolar transistor (IGBT) or a MOS tube.

[0064] In some embodiments, a square port adapter (i.e., the first adapter 101) and a Type_C adapter (i.e., the second adapter 201) are taken as examples. The square port adapter generally has a 20V output (V_ADP=20V), is connected to V_BUS through the first switch circuit 100, and the input current is represented by I_ADP. The output voltage of the Type C adapter is generally 5-48V, and is connected to the first control circuit 300 composed of the first controller 310, the first selection circuit 320, etc. through the second switch circuit 200. The input current is represented by I_Type_C, and the output current is represented by I_BUCK. The EC (i.e., the power management circuit 500) reports to the first controller 310 through SMBUS: the maximum input current information V_ADP_ilim of the square port adapter and the maximum input current information V_TypeC_ilim of the Type C adapter. The first controller 310 obtains the first current (specifically, the obtaining method may be: by detecting the voltage difference V_Rac=V_Rac_P-V_Rac_N across the Rac resistor in the second control circuit 400, and then dividing by the resistance value of Rac to obtain the real-time input current I_Rac (i.e., the first current). The first controller 310 may determine the real-time output current I_BUCK (i.e., the second current) of the first selection circuit 320 by detecting the voltage difference V_Isen1_P-V_Isen1_N of R1, or the voltage difference V_Isen2_P-V_Isen2_N of R2.

[0065] In some embodiments, when the square port adapter is connected first, the EC identifies the square port adapter power and obtains the square port adapter maximum input current information V_ADP_ilim. At the same time, the corresponding system CPU, GPU, etc. operating parameters PL1 / PL2 / PL4 / TGP... are set. At this time, I_Rac is equal to I_ADP. When the Type C adapter is connected again, the EC identifies the Type C adapter type and power through the PD, and obtains the Type C adapter maximum input current information V_Type C_ilim. The EC informs the first controller 310 of the square port adapter maximum input current information V_ADP_ilim and the Type C adapter maximum input current information V_Type C_ilim through the SMBUS. At this time, the EC can set the first controller 310 to work in voltage following mode, and reset the corresponding system CPU, GPU, etc. operating parameters PL1 / PL2 / PL4 / TGP...

[0066] When the real-time I_Rac is higher than V_ADP_ilim, the first controller 310 works, the output voltage follows V_BUS, and the output current I_BUCK is dynamically equal to I_Rac-I_ADP, but will not exceed V_Type C_ilim, so that I_Rac is equal to I_ADP+I_BUCK, and the device to be charged gets the sum of the power of the two adapters. When the real-time I_Rac is less than or equal to V_ADP_ilim, the first controller 310 stops working, and I_Rac is equal to I_ADP. At this time, only the square port adapter is independently powered.

[0067] In some embodiments, when the Type C adapter is connected first, the EC identifies the type and power of the Type C adapter through the PD, and obtains the maximum input current information V_Type C_ilim of the Type C adapter. At the same time, the corresponding system CPU, GPU, etc. operating parameters are set, and the EC sets the first controller 310 to work in the normal buck mode. The output voltage of the first selection circuit 320 is equal to the system target voltage (such as 20V), I_Rac is equal to I_BUCK, and I_BUCK does not exceed V_Type C_ilim. When the square port adapter is connected again, the EC identifies the square port adapter power, obtains the maximum input current information V_ADP_ilim of the square port adapter, and resets the corresponding system CPU, GPU, etc. operating parameters, and the EC sets U2 to work in the voltage following mode. The output voltage of the first selection circuit 320 follows V_BUS, and the output current I_BUCK is dynamically equal to I_Rac-I_ADP, but will not exceed V_TypeC_ilim. I_Rac is equal to I_ADP+I_BUCK, and the device to be charged also obtains the sum of the powers of the two adapters. This can solve the problem of connecting a square port adapter and a Type C adapter at the same time and not being able to supply power at the same time, and achieve the addition of dual power supplies to improve the consumer experience.

[0068] In some embodiments, the second control circuit 400 includes: a fifth controllable switch Q3, a sixth controllable switch Q4, a third resistor RAC, a second controller 410, a seventh controllable switch Q5, an eighth controllable switch Q6, a ninth controllable switch Q7, a third inductor L1, and a fourth resistor RSR. The first end of the fifth controllable switch Q3 is connected to the output end of the first switch circuit 100 and the output end of the first control circuit 300, respectively. The first end of the sixth controllable switch Q4 is connected to the second end of the fifth controllable switch Q3. The first end of the third resistor RAC is connected to the second end of the sixth controllable switch Q4 and the first control circuit 300, respectively. The second end of the third resistor RAC is used to connect the device to be charged. The second controller 410 is connected to the third end of the fifth controllable switch Q3, the third end of the sixth controllable switch Q4, the first end of the third resistor RAC, the second end of the third resistor RAC, and the first control circuit 300, respectively. The first end of the seventh controllable switch Q5 is connected to the second end of the third resistor RAC. A second end of the seventh controllable switch Q5 is connected to the second controller 410 .

[0069] The first end of the eighth controllable switch Q6 is connected to the second end of the third resistor RAC, and the second end of the eighth controllable switch Q6 is connected to the second controller 410. The first end of the ninth controllable switch Q7 is connected to the third end of the eighth controllable switch Q6. The second end of the ninth controllable switch Q7 is connected to the second controller 410. The third end of the ninth controllable switch Q7 is grounded. The first end of the third inductor L1 is respectively connected to the first end of the ninth controllable switch Q7, the third end of the eighth controllable switch Q6, and the second controller 410. The first end of the fourth resistor RSR is respectively connected to the third end of the seventh controllable switch Q5 and the second controller 410. The second end of the fourth resistor RSR is connected to the second controller 410.

[0070] In some embodiments, the specific circuit of the first controller 310 can be as follows: Figure 2 As shown in the figure, U3 is the SMBUS interface (system management bus interface). EC interacts with U3 through SMBUS, and U3 outputs DAC signals to U4-loop regulation reference through digital-to-analog conversion.

[0071] (loop adjustment reference), U4 outputs the output capability voltage signals V_ADP_ilim and V_Type C_ilim of the square port adapter and the Type C adapter. At the same time, U3 also outputs the current EC setting first controller 310 working mode selection signal Mode_Select, which is preset to low level for normal buck mode and high level for voltage follower mode.

[0072] In some embodiments, U1 is an error signal amplifier, which is used to amplify the difference between V_Rac_P and V_Rac_N (i.e., the voltage difference between the two ends of the Rac resistor in the second control circuit 400), and output a real-time input current magnitude signal V_Rac for use by the subsequent module. U2 is a hysteresis comparator, which compares the square port adaptation output capacity V_ADP_ilim and the real-time input V_Rac. When the real-time input V_Rac is higher than the square port adaptation output capacity V_ADP_ilim by a certain value, U2 outputs S_mode_EN as a high level, representing that it works in the voltage following mode. When the real-time input V_Rac is lower than the square port adaptation output capacity V_ADP_ilim by a certain value, U2 outputs S_mode_EN as a low level, representing that it works in the normal buck mode.

[0073] In some embodiments, U11 is a PWM logic driver EN control module, and the PWM_EN output truth table is as follows:

[0074] Table 1 PWM_EN output true value

[0075] Mode EN Mode_Select S_mode_EN PWM_EN 1 L x x L 2 H L x H 3 H H L L 4 H H H H

[0076] Mode 1: EN is L, indicating that the first controller 310 is in an inoperative state;

[0077] Mode 2: EN is H, Mode_Select is L, which means that the EC sets the first controller 310 to currently operate in the normal buck mode. Regardless of whether the S_mode_EN signal is high or low, PWM_EN outputs H.

[0078] Mode 3: EN is H, Mode_Select is H, indicating that the EC sets the first controller 310 to currently operate in the voltage following mode, S_mode_EN is L, indicating that the current real-time input current signal V_Rac is lower than the square port adapter power supply capacity V_ADP_ilim, and the Type C adapter is not required for auxiliary power supply, and the PWM_EN output is L;

[0079] Mode 4: EN is H, Mode_Select is H, indicating that the EC sets the first controller 310 to currently operate in voltage following mode, S_mode_EN is H, indicating that the current real-time input current signal V_Rac is higher than the square port adapter power supply capacity V_ADP_ilim, and the Type C adapter is required for auxiliary power supply, and the PWM_EN output is H.

[0080] In some embodiments, U12 is a PWM logic driver: under the control of U11 and U8, it drives one or two peripheral MOS or GaN devices to form a buck circuit. U8 is an RS trigger. When the S terminal is 1, the RS trigger sets the Q output to an L level. When the R terminal is 1, the RS trigger resets the Q output to an L level. Toff_timer is used as a set signal to access the S terminal. U7 is a high-speed comparator. The reverse terminal Vc is a reference voltage. When the same-direction terminal Vfb is higher than the reverse terminal Vc, U7 outputs an H level to reset the RS trigger U8. U6 is an error signal amplifier, which amplifies the difference between V_Isen1 / 2_P and V_Isen1 / 2_N, and outputs a voltage signal V_Isen representing the output current of the BUCK circuit, which is combined with the output voltage feedback signal FB to form a peak ripple feedback signal Vfb representing the output voltage and current, and is input to the same-direction terminal of the high-speed comparator U7. U9 is a high-speed comparator, with the same-direction terminal connected to the reference voltage Vref and the reverse terminal connected to the output voltage feedback signal FB. The output error amplified signal is divided by the divider Z to generate the error compensation signal Vcomp, which is sent to the U10 adaptive compensation controller.

[0081] U10 is an adaptive compensation controller, function one: generate the difference between the real-time input current V_Rac of the system and the output capacity V_ADP_ilim of the square port adapter, and output the compensation signal Vc' inversely proportional to the output capacity V_Type C_ilim of the Type C adapter as the reset reference signal of U7 in the first controller 310. The larger the difference, the lower the output value, and the smaller the difference, the higher the output value. When the difference is 0 or a negative value, the maximum value V_Type C_ilim is output. Function two: under the control of Mode_select, the reset reference signal of U7 in the voltage following mode or the normal buck mode is output. When Mode_select is low, Vc=Vcomp is output in real time as the reset reference signal of U7 in the normal buck mode. When Mode_select is high, Vc=Vc' is output in real time as the reset reference signal of U7 in the voltage following mode.

[0082] Specifically, take the square port adapter of 300W, output voltage of 20V, output capacity V_ADP_ilim=15A, Type C adapter of 140W, output voltage of 28V, output current capacity of 20V after voltage reduction by step-down circuit V_Type C_ilim=7A (all losses are not taken into account), the system CPU continuous power of the device to be charged is 50W, the transient power is 100W, the GPU continuous power is 150W, the transient power is 300W, and the battery is 80W as an example, the specific working description is as follows:

[0083] First, connect the square port adapter, and EC sets the square port adapter output capacity V_ADP_ilim = 15*93% = 13.95A, about 280W. At the same time, set the maximum input current of the second control circuit 400 to be equal to the square port adapter output capacity 15*93% = 13.95A, about 280W. When the system runs for a long time under large dynamic power conditions such as 250W-350W and average power 300W, the square port adapter output power cannot meet the system requirements, and the battery will continue to discharge 20W = 300W-280W, and the battery power will continue to decrease. When the battery is empty, in order to avoid system freeze or shutdown, EC will reduce the power of CPU and GPU, such as CPU continuous power 30W, transient power 60W, GPU continuous power 100W, transient power 240W, system performance will be greatly reduced, affecting user experience; in this process, EC pulls down the EN of the first controller 310 to a low level, and the first controller 310 does not participate in the work.

[0084] When the Type C adapter is connected again, the EC sets the output capacity of the square port adapter V_ADP_ilim = 15*93% = 13.95A, about 280W, and notifies the first controller 310; the EC sets the output capacity of the Type C adapter V_TypeC_ilim = 7*93% = 6.51A, about 130W, and notifies the first controller 310. At the same time, the maximum input current of the second control circuit 400 is set to be equal to the sum of the square port adapter capacity and the Type C adapter capacity 410W = 280W + 130W, and the EC appropriately increases the power of the CPU and GPU (determined by the maximum heat dissipation of the system) to improve system performance. The EC sets the first control circuit 300 to work in voltage following mode, and the EC pulls up the EN pin of the first controller 310, the first controller 310 starts working, and the Mode_Select signal is high. When the system power is lower than the output capacity of the square port adapter V_ADP_ilim, U1 of the first controller 310 detects that the system power V_Rac is lower than the set value V_ADP_ilim, U2 outputs low, U11 controls PWM_EN to be low, U12 has no output, and the first controller 310 does not participate in the output. When the system power exceeds the output capacity of the Type C adapter V_ADP_ilim, U1 of the first controller 310 detects that the system power V_Rac is higher than the set value V_ADP_ilim, U2 outputs high, U11 controls PWM_EN to be high, U12 has an output, and U10 outputs a compensation signal Vc' inversely proportional to the output capacity of the Type C adapter V_Type C_ilim according to the difference between the real-time input current V_Rac of the system and the output capacity V_ADP_ilim of the Type C adapter. For example, when V_Rac is 300W, U1O outputs Vc'=V_Rac-V_ADP_ilim=20W, and U10 outputs Vc=Vc' to the reverse end of the U7 comparator as a comparison reference. When Toff_timer sets U8 and the output Q is H, U12 drives the upper tube to turn on, the inductor current rises, and the output current I_BUCK of the first selection circuit 320 merges with I_ADP to assist in replenishing energy to the system. U6 detects that the output current signal V_Isen continues to rise and is combined with FB to continuously rise Vfb. When Vfb is greater than Vc, U7 outputs high, resets U8, Q output is low, U12 turns off the upper tube and turns on the lower tube for continuous current flow. By comparing Vfb with Vc, the output current of the first selection circuit 320 is limited to not exceed Vc'20W output by U10 in each cycle.When the system power continues to rise, for example, V_Rac is 350W, U1O outputs Vc'=V_Rac-V_ADP_ilim=70W, U10 outputs Vc=Vc' to the reverse end of U7 comparator as a comparison reference, Toff_timer sets U8, and when the output Q is H level, U12 drives the upper tube to turn on, the inductor current rises, and the output current I_BUCK of the first selection circuit 320 merges with I_ADP to help replenish energy to the system. U6 detects that the output current signal V_Isen continues to rise and merges with FB, and Vfb also continues to rise. When Vfb is greater than Vc, U7 outputs high, resets U8, and Q outputs low. U12 turns off the upper tube and turns on the lower tube for continuous flow. By comparing Vfb with Vc, the output current of the first selection circuit 320 is limited to not exceed Vc'70W output by U10 in each cycle.

[0085] When the system power rises further, U1O output Vc' also continues to rise, but cannot exceed V_TypeC_ilim130W. In this way, the system will get the sum of the power of the two adapters, improve system performance, avoid battery power decline, and at the same time, the TypeC adapter can adaptively control the output power according to the difference between the system power and the square port adapter power, and achieve weekly current limit to prevent the TypeC adapter from overloading. When the system load decreases, V_Rac is lower than V_ADP_ilim, U2 outputs S_mode_EN as a low level, U11 pulls down PWM_EN, U12 stops outputting, and the first control circuit 300 continues to detect V_Rac, ready to start again to supplement the system power.

[0086] In some embodiments, when only a Type C adapter is connected, the EC sets the Type C adapter output capacity V_TypeC_ilim=7*93%=6.51A about 130W, and notifies the first control circuit 300, and sets the maximum input current of the second control circuit 400 equal to the Type C adapter output capacity 130W, the EC appropriately lowers the power of the CPU and GPU, the EC sets the first control circuit 300 to work in the normal buck mode, the EC pulls up the EN pin of the first control circuit 300, the first controller 310 starts working, the Mode_Select signal is low, and U10 outputs Vc =Vcomp, giving the reverse end of the U7 comparator as a comparison reference, Toff_timer sets U8, when the output Q is H level, U12 drives the upper tube to turn on, the inductor current rises, the output voltage rises, and provides energy to the system. U6 detects that the output current signal V_Isen continues to rise and merges with FB. Vfb also continues to rise. When Vfb is greater than Vc, U7 outputs high, resets U8, and Q output is low. U12 turns off the upper tube and turns on the lower tube for continuous current flow. By comparing Vfb with Vc, U8 output is controlled to be high or low, and U12 is controlled to periodically switch the upper and lower tubes to maintain the output voltage stable at the set voltage (for example, 20V).

[0087] In some implementations, the first control circuit 300 can support 20-48V input and support large duty (duty cycle) to 100% duty cycle output when operating in normal buck mode. The Type C adapter operates at 100% duty when the input is 20V to maximize efficiency. The first control circuit 300 supports one or more power devices to achieve cost optimization.

[0088] In some embodiments, the first switch circuit 100 includes: a tenth controllable switch Q1 and an eleventh controllable switch Q2. The first end of the tenth controllable switch Q1 is used to connect the first adapter 101. The first end of the eleventh controllable switch Q2 is connected to the second end of the tenth controllable switch Q1. The second end of the eleventh controllable switch Q2 is connected to the first end of the second control circuit 400 and the output end of the first control circuit 300. The third end of the tenth controllable switch Q1 and the third end of the eleventh controllable switch Q2 are both connected to the controller. In some embodiments, the tenth controllable switch Q1 and the eleventh controllable switch Q2 may be insulated gate bipolar transistors (IGBTs) or MOS tubes.

[0089] In some embodiments, the second switch circuit 200 includes: an electronic switch 210. A first end of the electronic switch 210 is used to connect to the second adapter 201. A second end of the electronic switch 210 is connected to a first input end of the first control circuit 300. In some embodiments, the electronic switch 210 may be a MOS transistor.

[0090] See also Figure 3 Another embodiment of the present application provides a power control chip 20. The power control chip 20 includes the power supply control circuit 10 according to any one of the above embodiments.

[0091] See also Figure 4 Another embodiment of the present application provides a charging device 30. The charging device 30 includes the power supply control circuit 10 according to any one of the above embodiments.

[0092] The power control chip and charging device described in this embodiment, when the first adapter and the second adapter in the power supply control circuit 10 are connected at the same time, the first control circuit obtains the first current of the second control circuit, if the first current is greater than the maximum input current of the first adapter, the first control circuit outputs the second current, and the second current does not exceed the maximum input current of the second adapter, if the first current is less than or equal to the maximum input current of the first adapter, the first control circuit does not output the second current, wherein the first current is the input current of the second control circuit. In this way, the problem that the square port adapter and the Type C adapter cannot be powered at the same time when connected at the same time can be solved, the power of the dual power supplies can be added, and the problem that the battery will be in a long-term discharge state and the battery power will continue to decrease when the charging device is in high-power working conditions for a long time can be solved; it can avoid the problem that the battery cannot be recharged to the system after the battery is empty, the system cannot get enough power, and the system performance is reduced, thereby improving the consumer experience.

[0093] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0094] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0095] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction method, which is implemented in the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0096] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0097] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.

[0098] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0099] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A power supply control circuit, characterized in that: include: a first switch circuit, wherein an input end of the first switch circuit is used to connect to a first adapter; a second switch circuit, wherein the input end of the first switch circuit is used to connect to a second adapter; a first control circuit, wherein a first input terminal of the first control circuit is connected to an output terminal of the second switch circuit; a second control circuit, wherein a first end of the second control circuit is respectively connected to an output end of the first switch circuit and an output end of the first control circuit, a second end of the second control circuit is connected to a second input end of the first control circuit, and an output end of the second control circuit is used to connect to a device to be charged; When the first adapter and the second adapter are connected at the same time, the first control circuit obtains the first current of the second control circuit. If the first current is greater than the maximum input current of the first adapter, the first control circuit outputs the second current, and the second current does not exceed the maximum input current of the second adapter. If the first current is less than or equal to the maximum input current of the first adapter, the first control circuit does not output the second current, wherein the first current is the input current of the second control circuit.

2. The power supply control circuit according to claim 1, characterized in that: Also includes: The power management circuit is connected to the second switch circuit and the first control circuit respectively, and is used to set the working mode of the first control circuit, and the working mode includes a voltage following mode and a normal buck mode.

3. The power supply control circuit according to claim 2, characterized in that: The first control circuit comprises: a first controller, the first controller being connected to the second control circuit and the power management circuit respectively; a first selection circuit, wherein a first end of the first selection circuit is connected to an output end of the second switch circuit, a second end of the first selection circuit is connected to the first controller, and a third end of the first selection circuit is connected to a first end of the second control circuit; When the working mode of the first control circuit is the voltage following mode, the first controller obtains the first current. If the first current is greater than the maximum input current of the first adapter, the first controller controls the first selection circuit to output the second current, and the second current does not exceed the maximum input current of the second adapter. If the first current is less than or equal to the maximum input current of the first adapter, the first controller controls the first selection circuit not to output the second current.

4. The power supply control circuit according to claim 3, characterized in that: The first selection circuit comprises: a first controllable switch, wherein a first end of the first controllable switch is connected to an output end of the second switch circuit, and a second end of the first controllable switch is connected to the first controller; a second controllable switch, wherein a first end of the second controllable switch is connected to a third end of the first controllable switch, a second end of the second controllable switch is connected to the first controller, and a third end of the second controllable switch is grounded; a first inductor, wherein a first end of the first inductor is respectively connected to a first end of the second controllable switch and a third end of the first controllable switch; a first resistor, wherein a first end of the first resistor is respectively connected to a second end of the first inductor and a first controller, and a second end of the first resistor is respectively connected to a first end of the first controller and a first end of a second control circuit; a third controllable switch, wherein a first end of the third controllable switch is connected to the output end of the second switch circuit, and a second end of the third controllable switch is connected to the first controller; a fourth controllable switch, wherein a first end of the fourth controllable switch is connected to a third end of the third controllable switch, a second end of the fourth controllable switch is connected to the first controller, and a third end of the fourth controllable switch is grounded; a second inductor, wherein a first end of the second inductor is respectively connected to a first end of the fourth controllable switch and a third end of the third controllable switch; A second resistor, wherein a first end of the second resistor is respectively connected to a second end of the second inductor and the first controller, and a second end of the second resistor is respectively connected to a first end of the first controller and a first end of the second control circuit.

5. The power supply control circuit according to claim 4, characterized in that: The first controllable switch, the second controllable switch, the third controllable switch and the fourth controllable switch are all insulated gate bipolar transistors.

6. The power supply control circuit according to claim 1, characterized in that: The second control circuit comprises: a fifth controllable switch, wherein a first end of the fifth controllable switch is respectively connected to an output end of the first switch circuit and an output end of the first control circuit; a sixth controllable switch, wherein a first end of the sixth controllable switch is connected to a second end of the fifth controllable switch; a third resistor, wherein a first end of the third resistor is respectively connected to the second end of the sixth controllable switch and the first control circuit, and a second end of the third resistor is used to connect to a device to be charged; a second controller connected to the third end of the fifth controllable switch, the third end of the sixth controllable switch, the first end of the third resistor, the second end of the third resistor and the first control circuit respectively; a seventh controllable switch, wherein a first end of the seventh controllable switch is connected to the second end of the third resistor, and a second end of the seventh controllable switch is connected to the second controller; an eighth controllable switch, wherein a first end of the eighth controllable switch is connected to the second end of the third resistor, and a second end of the eighth controllable switch is connected to the second controller; a ninth controllable switch, wherein a first end of the ninth controllable switch is connected to a third end of the eighth controllable switch, a second end of the ninth controllable switch is connected to the second controller, and a third end of the ninth controllable switch is grounded; a third inductor, wherein a first end of the third inductor is respectively connected to the first end of the ninth controllable switch, the third end of the eighth controllable switch and the second controller; A fourth resistor, wherein a first end of the fourth resistor is respectively connected to the third end of the seventh controllable switch and the second controller, and a second end of the fourth resistor is connected to the second controller.

7. The power supply control circuit according to claim 1, characterized in that: The first switch circuit comprises: a tenth controllable switch, wherein a first end of the tenth controllable switch is used to connect to the first adapter; an eleventh controllable switch, wherein a first end of the eleventh controllable switch is connected to a second end of the tenth controllable switch, a second end of the eleventh controllable switch is connected to a first end of a second control circuit and an output end of the first control circuit, and a third end of the tenth controllable switch and a third end of the eleventh controllable switch are both connected to a controller.

8. The power supply control circuit according to claim 1, characterized in that: The second switch circuit comprises: An electronic switch, wherein a first end of the electronic switch is used to connect to a second adapter, and a second end of the electronic switch is connected to a first input end of the first control circuit.

9. A power control chip, characterized in that: The invention comprises a power supply control circuit as claimed in any one of claims 1 to 8.

10. A charging device, characterized in that: The invention comprises a power supply control circuit as claimed in any one of claims 1 to 8.

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