Bandwidth control method, data writing method, device and equipment

Abstract

The invention relates to the technical field of storage, and provides a bandwidth control method, a data writing method, a device and equipment. The method comprises the following steps: determining a plurality of super blocks in the storage equipment, comparing a bad block proportion of each super block with a preset threshold value, determining a super block corresponding to the bad block proportion greater than or equal to the preset threshold value, and marking the super block as a bad block. Wherein the super blocks marked as the bad blocks cannot be used for data writing, so that when data writing is performed through the storage device, the super blocks with a relatively large proportion of the bad blocks are prevented from being used, and the problem that bandwidth is easy to be inconsistent when a plurality of super blocks are used for writing data due to a large number of bad blocks and the overall system performance of the solid state disk is influenced is avoided.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a bandwidth control method, a data writing method, a device and an apparatus. Background Art

[0002] For flash memory products such as solid state disks (SSDs), they are usually composed of multiple storage units, such as Nand flash memory. In order to achieve error correction coding and data recovery protection, one or more superblocks can be constructed. Among them, a superblock can be composed of storage blocks selected from storage units. For example, when writing data to a storage unit of Nand flash memory, data is usually written in the form of a superblock.

[0003] In the process of writing data through Superblock, in order to ensure the stability and reliability of data storage, it is necessary to ensure that the bandwidth for writing data to Superblock is consistent. If there are a large number of bad blocks in Superblock, such as factory bad blocks, the bandwidth for writing data may drop sharply, resulting in the bandwidth for writing data to different Superblocks not meeting the consistency requirements, causing some write operations to take longer to complete, thus affecting the overall system performance of the SSD.

[0004] In the related art, in order to ensure the consistency of bandwidth when writing data to the Superblock, a storage block replacement method is adopted to replace the faulty storage block with a fault-free storage block. However, this method needs to be executed in conjunction with related software, which is costly, cumbersome to execute, and easily affects system performance. Summary of the invention

[0005] In view of this, the present application provides a bandwidth control method, a data writing method, a device and an apparatus to solve the problems in the related art, such as high cost, cumbersome execution and easy impact on system performance.

[0006] A first aspect of an embodiment of the present application provides a bandwidth control method, which is applied to an electronic device, and the bandwidth control method includes: determining multiple super blocks in a storage device; determining the bad block ratio in each super block; comparing each bad block ratio with a preset threshold, and marking the super blocks corresponding to the bad block ratio greater than or equal to the preset threshold as bad blocks; and according to the super blocks marked as bad blocks, controlling the write data bandwidth of the multiple super blocks to meet preset requirements.

[0007] In some embodiments, determining the bad block ratio in each super block includes: scanning the storage blocks in each super block to determine the faulty storage blocks in each super block; and determining the bad block ratio of each super block based on the faulty storage blocks in each super block and the storage blocks in each super block.

[0008] In some embodiments, scanning the storage blocks in each super block to determine the faulty storage blocks in each super block includes: testing the storage blocks in each super block according to preset operation instructions to obtain test results; and determining the faulty storage blocks in each super block according to the test results.

[0009] In some embodiments, the bandwidth control method further includes: if a super block not marked as a bad block among the multiple super blocks meets a preset capacity requirement, using the multiple super blocks as target super blocks, and the target super blocks are used to write data.

[0010] In some embodiments, controlling the write data bandwidth of the multiple super blocks to meet preset requirements includes: obtaining super blocks that are not marked as bad blocks among the multiple super blocks; controlling the bandwidth of the super blocks that are not marked as bad blocks when writing data to meet the preset requirements.

[0011] A second aspect of an embodiment of the present application provides a data writing method, which is applied to a storage device, and the data writing method includes: responding to an instruction to write data, determining multiple super blocks; according to the bandwidth control method as described in the above embodiment, determining the super blocks that are not marked as bad blocks among the multiple super blocks, and performing a data writing operation on the super blocks that are not marked as bad blocks.

[0012] A third aspect of an embodiment of the present application provides a bandwidth control device, which is applied to an electronic device, and the bandwidth control device includes: a first determination module, which is used to determine multiple super blocks in a storage device; a second determination module, which is used to determine the bad block ratio in each super block; a marking module, which is used to compare each bad block ratio with a preset threshold, and mark the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block; and a control module, which is used to control the write data bandwidth of the multiple super blocks to meet preset requirements according to the super blocks marked as bad blocks.

[0013] A fourth aspect of an embodiment of the present application provides a data writing device, which is applied to a storage device, and the data writing device includes: a response module, which is used to respond to an instruction to write data and determine multiple super blocks; a data writing module, which is used to determine the super blocks that are not marked as bad blocks among the multiple super blocks according to the above-mentioned bandwidth control method, and perform data writing operations on the super blocks that are not marked as bad blocks.

[0014] A fifth aspect of an embodiment of the present application provides an electronic device, comprising a memory, a processor, and computer-readable instructions stored in the memory and executable on the processor, wherein the processor implements the above-mentioned bandwidth control method when executing the computer-readable instructions.

[0015] A sixth aspect of the embodiments of the present application provides a storage device, which stores computer-readable instructions, and the computer-readable instructions implement the above-mentioned data writing method when executed by a processor.

[0016] A seventh aspect of an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-readable instructions, and when the computer-readable instructions are executed by a processor, the above-mentioned bandwidth control method or data writing method is implemented.

[0017] In a bandwidth control method provided by an embodiment of the present application, a plurality of super blocks in a storage device are first determined, and by comparing the bad block ratio of each super block with a preset threshold, a super block corresponding to a bad block ratio greater than or equal to the preset threshold is determined, and the super block is marked as a bad block. Among them, the super block marked as a bad block cannot be used for data writing, so that when writing data through the storage device, the use of a super block with a large bad block ratio is avoided, thereby avoiding the problem of inconsistent bandwidth when using multiple super blocks to write data due to a large number of bad blocks, affecting the overall system performance of the solid-state hard disk, and is easy to operate. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1 is an example diagram of a super block provided in an embodiment of the present application;

[0020] Figure 2 It is an application scenario diagram of the bandwidth control method or data writing method provided in the embodiments of the present application;

[0021] Figure 3 is a flow chart of the implementation of the bandwidth control method provided in the embodiment of the present application;

[0022] Figure 4 is a flow chart of the implementation of the data writing method provided in the embodiment of the present application;

[0023] Figure 5 is a schematic diagram of the structure of a bandwidth control device provided in an embodiment of the present application;

[0024] Figure 6 is a structural schematic diagram of a data writing device provided in an embodiment of the present application;

[0025] Figure 7 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] It should be noted that the terms "first" and "second" in the specification, claims and drawings of the present application are used to distinguish similar objects rather than to describe a specific order or sequence.

[0027] It should also be noted that the method disclosed in the embodiments of the present application or the method shown in the flowchart includes one or more steps for implementing the method. Without departing from the scope of the claims, the execution order of multiple steps can be interchangeable with each other, and some of the steps can also be deleted.

[0028] Some embodiments will be described below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0029] When writing data to flash memory products such as solid state drives, data is usually written in a super block. The super block can be composed of a certain number of storage blocks selected from the storage blocks contained in multiple storage units of the solid state drive, and then the selected storage blocks are combined into a super block. For example, four storage blocks are selected from each storage unit to form a super block. As an example, see Figure 1 , Figure 1 The following is an example diagram of a super block provided by an embodiment of the present application. Figure 1 As shown, Superblock0 to Superblock4 may represent the first superblock to the fifth superblock. In one embodiment of the present application, each chip (Die) may represent a storage unit in a solid state drive. For example, when the storage unit is a Nand flash memory unit, the Nand flash memory unit may be a Nand Die controlled by a controller of the solid state drive, and each Nand Die may include multiple Nand storage blocks. Figure 1Die0 to Die3 in can be represented as the first chip to the fourth chip. In the process of writing data using Superblock0 to Superblock4, for Die0 corresponding to Superblock0, the controller in the storage device needs to determine that the controller's buffer (Buffer) has the 3 pages (Page) of data in the storage block (Block) 0 / 1 / 2 / 3 ready before controlling Die0 to perform the data write operation. However, if Block1 and Block3 are faulty storage blocks, the controller's Buffer will not be able to perform the data write operation after the 3 pages of data corresponding to Block1 and Block3 are ready, affecting data storage. In addition, if Block1 and Block3 fail, the writable space of Die0 corresponding to Superblock0 is reduced, and the data that can be written per unit time is halved, resulting in a sharp drop in the bandwidth rate of writing data to Die0 corresponding to Superblock0. If other Die1 to Die3 also have similar situations, the overall write data bandwidth of Superblock0 will drop sharply, resulting in inconsistent write data bandwidth, affecting the overall performance of the solid-state drive.

[0030] In order to solve the above problems, an embodiment of the present application provides a bandwidth control method, which is applied to electronic devices. The electronic device determines the bad block ratio in each super block by screening and testing multiple super blocks in the storage device, and marks the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block. When the storage device performs a data write operation, it identifies the super block that is not marked as a bad block, and uses the super block that is not marked as a bad block to perform the data write operation. Since the bad block ratio in the super block that is not marked as a bad block is low, that is, the number of failed storage blocks is small, it is possible to ensure that the bandwidth when using the super block to write data is consistent as much as possible, without affecting the overall performance of the solid-state drive.

[0031] See also Figure 2 As shown, it is an application scenario diagram of the bandwidth control method provided in the embodiment of the present application, such as Figure 2 As shown, the electronic device 100 is connected to the storage device 200 in communication, for example, wirelessly connected via Bluetooth, Wireless Fidelity (Wi-Fi), etc., or wired connected via a data cable. In other embodiments, the storage device 200 may also be configured in the electronic device 100.

[0032] In some embodiments, the electronic device 100 first determines a plurality of super blocks in the storage device 200, and determines the ratio of bad blocks in each super block. The electronic device 100 sets a preset threshold in advance. If the ratio of bad blocks is greater than or equal to the preset threshold, it can be determined that there are a large number of faulty storage blocks in the super block corresponding to the ratio of bad blocks. At this time, the electronic device 100 marks the super block corresponding to the ratio of bad blocks greater than or equal to the preset threshold as a bad block. When the storage device 200 performs a data write operation, it identifies a super block marked as a bad block and does not write data to it, that is, the storage device 200 can only use the blocks that are not marked as bad blocks to perform data write operations, thereby ensuring that the bandwidth of multiple super blocks when writing data is consistent, and avoiding the overall system performance of the solid-state hard disk from being affected.

[0033] In some embodiments, the storage block that fails in the super block may be a factory bad block. The application scenario in the embodiments of the present application can be a performance test before the storage device is put into use, and the super block in the storage device is marked, so that when it is put into use later, the storage device can determine the super block containing fewer faulty storage blocks according to the marking information, and use the super block containing fewer faulty storage blocks to perform data write operations, thereby ensuring the overall performance of the storage device.

[0034] In some embodiments, the electronic device 100 includes but is not limited to any one of a computer, a server, a mobile phone, a tablet computer, etc. The storage device 200 includes but is not limited to a solid state drive.

[0035] In other embodiments, the electronic device that executes the bandwidth control method provided in the embodiments of the present application may be a storage device.

[0036] See also Figure 3 As shown in FIG. 1 , it is a flow chart of implementing the bandwidth control method provided in an embodiment of the present application. In an embodiment of the present application, the method is applied in Figure 2 The electronic device 100 in the embodiment is taken as an example to illustrate, and the steps are as follows.

[0037] S11: Determine a plurality of super blocks in the storage device.

[0038] In some embodiments, in order to implement error correction coding and data recovery protection, the storage device may construct one or more super blocks and use the super blocks to write data. The super block may be composed of storage blocks selected from multiple storage units of the solid state drive, wherein each storage unit includes multiple storage blocks. For example, the storage device may select 4 storage blocks from each storage unit of the solid state drive to form a super block.

[0039] In some embodiments, after the electronic device is connected to the storage device for communication, it can send a super block query instruction to the storage device. After receiving the query instruction, the storage device can return information of multiple super blocks that are pre-built or pre-set to the electronic device. The electronic device receives the information returned by the storage device and can determine multiple super blocks in the storage device by parsing the returned information.

[0040] In some embodiments, if the electronic device is a storage device itself, multiple super blocks can be directly determined or constructed.

[0041] S12: Determine the bad block ratio in each super block.

[0042] In some embodiments, the bad block ratio in each super block refers to the ratio of failed storage blocks in each super block. The electronic device can determine the bad block ratio in each super block by determining the failed storage blocks and all storage blocks in each super block. The failed storage blocks may be factory bad blocks.

[0043] In some embodiments of the present application, determining the bad block ratio in each super block includes: scanning the storage blocks in each super block to determine the faulty storage blocks in each super block; and determining the bad block ratio of each super block based on the faulty storage blocks in each super block and the storage blocks in each super block.

[0044] In some embodiments, a failed memory block refers to a memory block in which a failure occurs.

[0045] In some embodiments, the chip (Die) corresponding to each storage block stores the initial parameter data corresponding to the storage block. The electronic device can determine the current parameter data of each storage block by scanning each storage block. The electronic device obtains the initial parameter data corresponding to the storage block from the chip corresponding to each storage block, and by comparing the current parameter data corresponding to each storage block with the initial parameter data, the storage block corresponding to the current parameter data that is inconsistent with the comparison can be determined as a faulty storage block.

[0046] In some embodiments, the electronic device can use some detection tools, such as tools provided by the hard disk manufacturer for detecting and managing bad blocks, tools provided by the operating system, disk health detection tools, etc., to determine the faulty storage blocks in each super block. The embodiment of the present application does not limit the method of determining the faulty storage blocks in each super block.

[0047] In some embodiments, after the electronic device determines that there are faulty storage blocks in each super block, it can determine the bad block ratio of each super block by calculating the ratio of the number of faulty storage blocks in each super block to the total number of storage blocks in each super block.

[0048] In some embodiments of the present application, the storage blocks in each super block are scanned to determine the faulty storage blocks in each super block, including: testing the storage blocks in each super block according to preset operation instructions to obtain test results; and determining the faulty storage blocks in each super block according to the test results.

[0049] In some embodiments, in the process of testing the storage blocks in each super block according to the preset operation instructions and obtaining the test results, the electronic device can respond to the preset operation instructions to obtain the initial parameter data and current parameter data corresponding to each storage block in each super block, compare the initial parameter data with the current parameter data, and use the comparison result as the test result. The test result may include data matching or data mismatching. If the test result is data mismatching, the electronic device can determine that the storage block is a faulty storage block. By testing each storage block in each super block, the electronic device can determine the faulty storage block in each super block.

[0050] S13: Compare each bad block ratio with a preset threshold, and mark the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block.

[0051] In some embodiments, the preset threshold can be customized, for example, it can be 1 / 3, 1 / 4, etc.

[0052] In some embodiments, when there are a large number of faulty storage blocks in a super block, the data that can be written to the super block per unit time is sharply reduced, and the bandwidth of the super block when writing data will also drop sharply, so that the bandwidth of the super block and other super blocks when writing data cannot be consistent, which is easy to affect the overall performance of the solid state drive. Therefore, in order to avoid the super storage block with a large number of faulty storage blocks affecting the bandwidth when the super block writes data, thereby affecting the overall performance of the solid state drive, the electronic device pre-sets a preset threshold, and compares the bad block ratio corresponding to each super block with the preset threshold. When the bad block ratio is greater than or equal to the preset threshold, it can be determined that there are more faulty storage blocks in the super block corresponding to the bad block ratio. At this time, the electronic device marks the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block, and sends the mark information of the super block to the storage device, so that the subsequent storage device determines the super block marked as a bad block or the storage block not marked as a bad block according to the mark information when performing the data write operation, and to ensure the overall system performance of the storage device is stable, the storage device can only use the storage block not marked as a bad block to perform the data write operation.

[0053] S14: According to the super block marked as a bad block, control the write data bandwidth of multiple super blocks to meet the preset requirement.

[0054] In some embodiments, the preset requirements include but are not limited to the requirement that the write data bandwidth of multiple super blocks remain consistent.

[0055] In some embodiments, after marking the super blocks corresponding to the bad block ratio greater than or equal to the preset threshold as bad blocks, the electronic device can determine the super blocks that are not marked as bad blocks from multiple super blocks. The super blocks that are not marked as bad blocks can be used to perform data write operations. The super blocks marked as bad blocks cannot be used to perform data write operations.

[0056] In some embodiments of the present application, controlling the write data bandwidth of multiple super blocks to meet preset requirements includes: obtaining super blocks that are not marked as bad blocks among multiple super blocks; controlling the bandwidth of the super blocks that are not marked as bad blocks when writing data to meet preset requirements.

[0057] In some embodiments, controlling the write data bandwidth of multiple super blocks to meet preset requirements includes but is not limited to controlling the write data bandwidth of multiple super blocks to be consistent when performing data write operations. In order to make the write data bandwidth of multiple super blocks consistent when performing data write operations, the electronic device can determine the super blocks that are not marked as bad blocks from the multiple super blocks, and the electronic device can control the storage device to perform data write operations on the super blocks that are not marked as bad blocks. Since the proportion of faulty storage blocks in the super blocks that are not marked as bad blocks is small, the impact on the bandwidth of super block write data is also small, so that the write data bandwidth of multiple super blocks when performing data write operations can be guaranteed to be consistent as much as possible, and the overall system performance of the storage device can be guaranteed to be stable.

[0058] In some embodiments of the present application, the bandwidth control method provided by the embodiments of the present application also includes: if a super block not marked as a bad block among multiple super blocks meets the preset capacity requirement, multiple super blocks are used as target super blocks, and the target super blocks are used to write data.

[0059] In some embodiments, the preset capacity requirement may be a capacity requirement of the storage device determined according to product operating specifications (OP).

[0060] In some embodiments, when a storage device uses multiple super blocks to perform a data write operation, while satisfying the consistency of the write data bandwidth and the stability of the system performance, it is also necessary to ensure that the capacity of the super blocks that can be used to write data and are not marked as bad blocks in the multiple super blocks can meet the preset capacity requirements. Therefore, the electronic device needs to determine that the super blocks that are not marked as bad blocks in the multiple super blocks of the storage device meet the preset capacity requirements before using the multiple super blocks as target super blocks. The storage device can use the target super block to perform the data write operation to avoid insufficient capacity affecting the user experience.

[0061] In a bandwidth control method provided by an embodiment of the present application, multiple super blocks in a storage device are first determined, and the bad block ratio of each super block is compared with a preset threshold value to determine a super block corresponding to a bad block ratio greater than or equal to the preset threshold value, and mark it as a bad block. Among them, the super block marked as a bad block cannot be used for data writing, so that when writing data through the storage device, the use of a super block with a large bad block ratio is avoided, thereby avoiding a large number of bad blocks causing inconsistent bandwidth when using multiple super blocks to write data, affecting the overall system performance of the solid-state hard disk.

[0062] See also Figure 4 As shown, it is a flowchart of the implementation of the data writing method provided in the embodiment of the present application. The embodiment of the present application is applied in the method Figure 2 The storage device 200 in FIG. 1 is used as an example to illustrate the method, which includes the following steps.

[0063] S21: In response to an instruction to write data, a plurality of super blocks are determined.

[0064] In some embodiments, when the storage device is associated with an operating system, a user can trigger an instruction to write data to the storage device through the operating system's file manager, or trigger an instruction to write data to the storage device through the operating system's application save function; when the storage device is associated with a database system, corresponding database operation statements (such as INSERT, UPDATE, etc.) can be used as instructions to write data to the storage device, etc.

[0065] In some embodiments, the storage device can determine multiple super blocks and corresponding tag information in the storage device in response to the instruction to write data. The storage device can determine the super blocks marked as bad blocks and the super blocks not marked as bad blocks in the multiple super blocks according to the tag information. The multiple super blocks include at least one super block.

[0066] S22: Determine a super block that is not marked as a bad block among the multiple super blocks, and perform a data write operation on the super block that is not marked as a bad block. Figure 3 The description of the process shown, for example, steps S11 to S14 provide example content.

[0067] In some embodiments, the storage device can determine the tag information corresponding to each super block while determining the multiple super blocks in the storage device, and can determine the super block marked as a bad block among the multiple super blocks based on the tag information. During the data write operation, the storage device can exclude the super block marked as a bad block, determine the super block not marked as a bad block among the multiple super blocks, and use the super block not marked as a bad block to perform the data write operation.

[0068] In the data writing method provided by the embodiment of the present application, the storage device responds to the operation instruction of writing data, determines multiple super blocks, and determines the super blocks that are not marked as bad blocks among the multiple super blocks, and only uses the super blocks that are not marked as bad blocks to perform the data writing operation. Since the proportion of faulty storage blocks in the super blocks that are not marked as bad blocks is small, the impact on the bandwidth of writing data to the super blocks is also small, so that the write data bandwidth when multiple super blocks perform data writing operations can be guaranteed to be consistent as much as possible, and the overall system performance of the storage device can be guaranteed to be stable.

[0069] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0070] In some embodiments of the present application, a bandwidth control device 500 is provided, which is applied to an electronic device. The functions that can be implemented by the bandwidth control device 500 correspond one-to-one to the bandwidth control method in the above embodiment. Figure 5 As shown, the bandwidth control device 500 includes a first determination module 501, a second determination module 502, a marking module 503 and a control module 504. The functional modules are described in detail as follows: the first determination module 501 is used to determine multiple super blocks in the storage device; the second determination module 502 is used to determine the bad block ratio in each super block; the marking module 503 is used to compare each bad block ratio with a preset threshold value, and mark the super block corresponding to the bad block ratio greater than or equal to the preset threshold value as a bad block; the control module 504 is used to control the write data bandwidth of multiple super blocks to meet the preset requirements according to the super blocks marked as bad blocks.

[0071] For the specific definition of the bandwidth control device 500, please refer to the definition of the bandwidth control method above, which will not be repeated here. The various modules in the above-mentioned bandwidth control device 500 can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the electronic device in the form of hardware, or can be stored in the memory in the electronic device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0072] In some embodiments of the present application, a data writing device 600 is provided, and the functions that can be implemented by the data writing device 600 correspond one-to-one to the data writing method in the above embodiment. Figure 6As shown, the data writing device 600 includes a response module 601 and a data writing module 602. The functional modules are described in detail as follows: the response module 601 is used to respond to the instruction to write data and determine multiple super blocks; the data writing module 602 is used to determine the super blocks that are not marked as bad blocks among the multiple super blocks according to the bandwidth control method provided by the above embodiment, and perform data writing operations on the super blocks that are not marked as bad blocks.

[0073] For the specific definition of the data writing device 600, please refer to the definition of the data writing method above, which will not be repeated here. Each module in the above-mentioned data writing device 600 can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the storage device in the form of hardware, or can be stored in the storage device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0074] See also Figure 7 , which is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 100 includes any one of a computer, a storage device, etc. The network in which the electronic device 100 is located includes but is not limited to the Internet, a wide area network, a metropolitan area network, a local area network, a virtual private network (VPN), etc.

[0075] like Figure 7 As shown, the electronic device 100 includes a communication module 101, a memory 102, a processor 103, an input / output (I / O) interface 104 and a bus 105. The processor 103 is coupled to the communication module 101, the memory 102 and the I / O interface 104 through the bus 105.

[0076] The communication module 101 may be a wireless communication module or a mobile communication module. The wireless communication module may provide wireless communication solutions including wireless local area networks (WLAN) (e.g., wireless fidelity (Wi-Fi) network), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., applied to the electronic device 100. The mobile communication module may provide wireless communication solutions including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100.

[0077] The memory 102 may include one or more random access memories (RAM) and one or more non-volatile memories (NVM). The random access memory can be directly read and written by the processor 103, and can be used to store executable programs (such as machine instructions) of the operating system or other running programs, and can also be used to store user and application data. The random access memory may include static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM, for example, the fifth generation DDR SDRAM is generally referred to as DDR5 SDRAM), etc.

[0078] The non-volatile memory may also store executable programs and user and application data, etc., and may be loaded into the random access memory in advance for direct reading and writing by the processor 103. The non-volatile memory may include a disk storage device and a flash memory.

[0079] The memory 102 is used to store one or more computer programs. The one or more computer programs are configured to be executed by the processor 103. The one or more computer programs include multiple instructions. When the multiple instructions are executed by the processor 103, the bandwidth control method executed on the electronic device 100 can be implemented.

[0080] In other embodiments, the electronic device 100 further includes an external memory interface for connecting to an external memory to expand the storage capacity of the electronic device 100 .

[0081] The processor 103 may include one or more processing units, for example, the processor 103 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0082] The processor 103 provides computing and control capabilities. For example, the processor 103 is used to execute a computer program stored in the memory 102 to implement the above-mentioned bandwidth control method.

[0083] The I / O interface 104 is used to provide a channel for user input or output. For example, the I / O interface 104 can be used to connect various input and output devices, such as a mouse, keyboard, touch device, display screen, etc., so that the user can enter information or visualize information.

[0084] The bus 105 is at least used to provide a channel for mutual communication among the communication module 101 , the memory 102 , the processor 103 , and the I / O interface 104 in the electronic device 100 .

[0085] It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0086] An embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. The computer program includes program instructions. The method implemented when the program instructions are executed can refer to the bandwidth control method in the above-mentioned embodiments of the present application.

[0087] The computer-readable storage medium may be an internal memory of the electronic device described in the above embodiment, such as a hard disk or memory of the electronic device. The computer-readable storage medium may also be an external storage device of the electronic device, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the electronic device.

[0088] Furthermore, the computer-readable storage medium may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function, etc.; the data storage area may store data created according to the use of the electronic device, etc.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present application and are not intended to limit it. Although the present application has been described in detail with reference to the preferred embodiments, a person of ordinary skill in the art should understand that the technical solution of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present application.

Claims

1. A bandwidth control method, applied to electronic equipment, characterized in that: The bandwidth control method comprises: Determine a plurality of super blocks in a storage device; Determine the proportion of bad blocks in each superblock; Compare each bad block ratio with a preset threshold, and mark the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block; According to the super blocks marked as bad blocks, the write data bandwidths of the multiple super blocks are controlled to meet preset requirements.

2. The bandwidth control method according to claim 1, characterized in that: Determining the bad block ratio in each super block includes: Scanning the storage blocks in each super block to determine the faulty storage blocks in each super block; The bad block ratio of each super block is determined according to the failed storage blocks in each super block and the storage blocks in each super block.

3. The bandwidth control method according to claim 2, characterized in that: The scanning of the storage blocks in each super block to determine the faulty storage blocks in each super block includes: Testing the storage blocks in each super block according to the preset operation instructions to obtain the test results; The failed storage blocks in each super block are determined according to the test result.

4. The bandwidth control method according to claim 1, characterized in that: The bandwidth control method further includes: If the super blocks that are not marked as bad blocks among the multiple super blocks meet the preset capacity requirement, the multiple super blocks are used as target super blocks, and the target super blocks are used to write data.

5. The bandwidth control method according to claim 1, characterized in that: The controlling the write data bandwidth of the plurality of super blocks to meet a preset requirement includes: Obtaining a super block that is not marked as a bad block among the multiple super blocks; The bandwidth of the super block not marked as a bad block when writing data is controlled to meet the preset requirement.

6. A data writing method, applied to a storage device, characterized in that: The data writing method comprises: In response to an instruction to write data, a plurality of super blocks are determined; According to the bandwidth control method according to any one of claims 1 to 5, a super block not marked as a bad block among the multiple super blocks is determined, and a data write operation is performed on the super block not marked as a bad block.

7. A bandwidth control device, applied to electronic equipment, characterized in that: The bandwidth control device comprises: A first determining module, used for determining a plurality of super blocks in a storage device; A second determination module is used to determine the bad block ratio in each super block; A marking module, used to compare each bad block ratio with a preset threshold, and mark the super block corresponding to the bad block ratio greater than or equal to the preset threshold as a bad block; The control module is used to control the write data bandwidth of the plurality of super blocks to meet the preset requirement according to the super blocks marked as bad blocks.

8. A data writing device, applied to a storage device, characterized in that: The data writing device comprises: A response module, used for responding to an instruction to write data and determining a plurality of super blocks; A data writing module, used to determine the super blocks that are not marked as bad blocks among the multiple super blocks according to the bandwidth control method according to any one of claims 1 to 5, and perform data writing operations on the super blocks that are not marked as bad blocks.

9. An electronic device, characterized in that: The method comprises a memory, a processor, and computer-readable instructions stored in the memory and executable on the processor, wherein the computer-readable instructions implement the bandwidth control method according to any one of claims 1 to 5 when executed by the processor.

10. A storage device, characterized in that: The storage device stores computer-readable instructions, and when the computer-readable instructions are executed by a processor, the data writing method as claimed in claim 6 is implemented.

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