Heterogeneous architecture electronics control system and control method for atomic quantum computing control

Abstract

A heterogeneous electronic control system and control method for atomic quantum computing control relate to the field of quantum information technology. The heterogeneous electronic control system includes a control core module, a resource scheduling module, and a signal generation module. The control core module determines the computing task for the atomic quantum bit, determines the configuration instruction set, scheduling instructions, and control instructions, and configures the resource scheduling module and signal generation module. The resource scheduling module calls the processor for the computing task, and the signal generation module determines the signal generation instructions for the computing task, enabling the processor to complete the computing task. This heterogeneous electronic control system can integrate multiple computing resources to achieve precise scheduling during the computing task.

Description

Technical Field

[0001] The present application relates to the field of quantum information technology, and more specifically, to a heterogeneous architecture electronic control system and control method for atomic quantum computing control. Background Art

[0002] Computing with atomic qubits requires precise electronic control systems and efficient processing feedback capabilities. This feedback capability specifically involves data transmission efficiency, real-time data processing capabilities, and dynamic adjustment capabilities.

[0003] Currently, some solutions have emerged that can solve specific problems in the neutral atom quantum computing process through field-programmable gate arrays (FPGAs), such as collecting scientific camera images, performing image recognition and sorting algorithms, and generating radio frequency-driven acousto-optic deflectors (AODs) to sort atoms.

[0004] However, electronic control systems for atomic quantum computing designed for specific steps in atomic qubit experiments are not sufficient for the entire experimental process. For example, a fault-tolerant atomic quantum computing experiment requires flexible scheduling of peripheral resources such as RF, analog, and digital interfaces. Another example is an experimental design that uses atomic qubits to process image data online, generate decisions based on the results, and execute them. Optimizing only specific steps still fails to meet the requirements of the entire experimental process.

[0005] The contents of the background technology are merely technologies known to the public and do not necessarily represent existing technologies in this field. Summary of the Invention

[0006] This application aims to provide a heterogeneous architecture electronic control system and control method for atomic quantum computing control to solve the above-mentioned technical problem of being unable to meet the full-process test requirements.

[0007] According to an embodiment of one aspect of the present application, the present application provides a heterogeneous architecture electronic control system for atomic quantum computing control. The heterogeneous architecture electronic control system includes a control core module, a resource scheduling module, and a signal generation module. The control core module determines the computing task of the atomic quantum bit in response to user instructions. The control core module determines the configuration instruction set, scheduling instructions, and control instructions based on the computing task. The control core module configures the resource scheduling module, signal generation module, and data processing module based on the configuration instruction set; the resource scheduling module calls the processor of the computing task based on the scheduling instruction; the signal generation module determines the signal generation instruction of the computing task based on the control instruction, so that the processor completes the computing task.

[0008] According to some embodiments of the present application, the processor includes a central processing unit, a graphics processing unit and a field programmable gate array; the resource scheduling module also calls at least one of the central processing unit, the graphics processing unit and the field programmable gate array according to the scheduling instruction.

[0009] According to some embodiments of the present application, the heterogeneous architecture electronic control system also includes a data processing module; the control core module configures the data processing module according to the configuration instruction set; the signal generation module determines the signal generation instruction of the computing task according to the control instruction; the signal generation module, the data processing module and the control core module execute the feedback control instruction determination step at least once, including: the data processing module performs atomic cooling and collects a first atomic fluorescence image according to the signal generation instruction; the data processing module determines the existence state data of the atomic quantum bit according to the first atomic fluorescence graph; the signal generation module determines and executes the quantum gate manipulation of the atomic quantum bit according to the signal generation instruction; after executing the quantum gate manipulation, the data processing module collects a second atomic fluorescence image; the data processing module determines the quantum state data of the atomic quantum bit according to the second atomic fluorescence image; the control core module also determines the feedback control instruction based on the existence state data of the atomic quantum bit, so that the processor completes the computing task.

[0010] According to some embodiments of the present application, the control core module also generates feedback control instructions based on a preset atomic sorting strategy and the existence status data of the atomic quantum bits.

[0011] According to some embodiments of the present application, the heterogeneous architecture electronic control system also includes a quantum error correction module; the control core module configures the quantum error correction module according to the configuration instruction set; the quantum error correction module generates error correction control instructions based on the existence status data of the atomic quantum bit and the quantum state data of the atomic quantum bit.

[0012] According to an embodiment of one aspect of the present application, a control method for a heterogeneous electronic control system for atomic quantum computing control is provided. The control method includes: determining a computing task for an atomic quantum bit in response to a user instruction; generating a configuration instruction set, a scheduling instruction, and a control instruction based on the computing task; configuring the heterogeneous electronic control system based on the configuration instruction set; invoking a processor to perform the computing task based on the scheduling instruction; and generating a signal generation instruction for the computing task based on the control instruction, so that the processor completes the computing task.

[0013] According to some embodiments of the present application, the processor includes a central processing unit, a graphics processing unit and a field programmable gate array; the above-mentioned step of calling the processor to perform the computing task according to the scheduling instruction may include: calling at least one of the central processing unit, the graphics processing unit and the field programmable gate array according to the scheduling instruction.

[0014] According to some embodiments of the present application, the step of generating a signal generation instruction for a computing task based on a control instruction so that the processor completes the computing task includes: determining the signal generation instruction for the computing task based on the control instruction; and executing the feedback control instruction determination step at least once. The feedback control instruction determination step includes: performing atomic cooling and collecting a first atomic fluorescence image based on the signal generation instruction; determining the existence state data of the atomic quantum bit based on the first atomic fluorescence image; determining and performing quantum gate manipulation of the atomic quantum bit based on the signal generation instruction; after performing the quantum gate manipulation, collecting a second atomic fluorescence image; determining the quantum state data of the atomic quantum bit based on the second atomic fluorescence image; and determining the feedback control instruction based on the existence state data of the atomic quantum bit so that the processor completes the computing task.

[0015] According to some embodiments of the present application, the above-mentioned step of determining the feedback control instruction based on the existence status data of the atomic quantum bit may include: generating the feedback control instruction based on the preset atomic sorting strategy and the existence status data of the atomic quantum bit.

[0016] According to some embodiments of the present application, after the above-mentioned feedback control instruction determination step is executed at least once, the control method further includes: generating an error correction control instruction based on the existence status data of the atomic quantum bit and the quantum state data of the atomic quantum bit.

[0017] According to an embodiment of one aspect of the present application, the present application also provides a non-volatile computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, it can implement the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0018] According to an embodiment of one aspect of the present application, the present application also provides an electronic device, including: one or more processors; a storage device for storing one or more programs, which, when the one or more programs are executed by one or more processors, enables the one or more processors to implement the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0019] According to an embodiment of one aspect of the present application, the present application also provides a computer program product, including: a computer program stored on a computer-readable storage medium; the computer program includes program instructions, which, when executed by a computer, enable the computer to execute the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0020] Beneficial effects

[0021] This application can build a multi-level heterogeneous architecture electronic control system by integrating CPU, GPU, and FPGA. This application effectively integrates multiple computing resources through heterogeneous architecture to achieve precise scheduling of computing tasks. This application can ensure efficient and flexible execution of computing tasks through collaborative work between modules. This application can implement a dynamic resource scheduling mechanism by configuring instruction sets, control instructions, and feedback control instructions, thereby achieving optimized allocation of hardware resources for different tasks, supporting multi-task parallel processing and providing efficient operation support, significantly improving system flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] Figure 1 A schematic flow chart of a control method 1000 according to an embodiment of the present application is shown;

[0024] Figure 2 A schematic diagram showing a flow chart of step S150 according to an embodiment of the present application is shown;

[0025] Figure 3 A schematic diagram showing a flow chart of step S152 according to an embodiment of the present application is shown;

[0026] Figure 4 Another flowchart of a control method 1000 according to an embodiment of the present application is shown;

[0027] Figure 5 A schematic diagram showing the structure of a heterogeneous architecture electronic control system according to an embodiment of the present application is shown;

[0028] Figure 6 Another structural diagram of a heterogeneous architecture electronic control system according to an embodiment of the present application is shown.

[0029] Reference numerals

[0030] Heterogeneous architecture electronic control system 200; control core module 210; resource scheduling module 220; signal generation module 230; data processing module 240; quantum error correction module 250. DETAILED DESCRIPTION

[0031] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the drawings represent like or similar parts, and thus repetitive description thereof will be omitted.

[0032] The described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of these specific details, or other methods, components, materials, devices, etc. may be employed. In these cases, well-known structures, methods, devices, implementations, materials or operations will not be shown or described in detail.

[0033] Furthermore, the terms "include," "comprise," and "have," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0034] The terms "first", "second" and the like in the specification, claims and drawings of this application are used to distinguish different objects rather than to describe a specific order.

[0035] The following is a clear and complete description of the technical solution of this application in conjunction with the drawings in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of this application.

[0036] See also Figure 5 The present application provides a heterogeneous electronic control system 200 for atomic quantum computing control. The heterogeneous electronic control system 200 includes a control core module 210, a resource scheduling module 220, and a signal generation module 230.

[0037] The processors of the heterogeneous electronic control system 200 may include a central processing unit (CPU), a graphics processing unit (GPU), and a field-programmable gate array (FPGA). The processors of the heterogeneous electronic control system 200 may also include an atomic qubit server, an application-specific integrated circuit (ASIC), and a classical-quantum hybrid computing server.

[0038] See also Figure 6 The heterogeneous architecture electronic control system 200 further includes a data processing module 240 , a communication interface module (not shown in the figure) and a quantum error correction module 250 .

[0039] The following combination Figure 5 and Figure 6 The present invention describes a control method for an atomic quantum bit heterogeneous architecture electronic control system based on a heterogeneous architecture.

[0040] See also Figure 1 , the control method 1000 may include steps S110 to S150.

[0041] In step S110 , the control core module 210 determines the computing task of the atomic quantum bit in response to a user instruction.

[0042] According to example embodiments, atomic qubits include neutral atomic bits and ionic atomic bits. Atomic qubits are a type of qubit that uses atomic energy levels to encode and process information. User instructions can be user-issued atomic qubit computation instructions. Computational tasks for atomic qubits can be computational tasks for atomic qubits that are parsed based on user instructions.

[0043] For example, in step S110, the control core module 210 determines the computational task of the atomic qubit in response to a user instruction. The control core module 210 may run on a CPU. The control core module 210 may receive the user instruction via a graphical human-computer interaction interface, quantum circuit description code, quantum gate parameter description, or the like.

[0044] Atomic qubit computing tasks can include task parameters. These parameters include task type, quantum gate sequence, quantum gate type, execution timing accuracy, and number of repetitions. Execution timing accuracy can be nanoseconds.

[0045] For example, after receiving the user instructions, the control core module 210 can parse the user instructions into task parameters through quantum compilation, physical parameter conversion, etc., so as to determine the computing task of the atomic quantum bit according to the task parameters.

[0046] In step S120 , the control core module 210 generates a configuration instruction set, a scheduling instruction, and a control instruction according to the computing task.

[0047] According to an example embodiment, the configuration instruction set may be a data set for configuring a heterogeneous architecture electronic control system generated according to a computing task, and the configuration instruction set includes configuration parameters.

[0048] For example, configuration parameters may include timing parameters, sampling rate, signal time sequence, and communication rate configuration, etc.

[0049] The scheduling instruction may be an instruction for scheduling a processor, and the scheduling instruction may include scheduling parameters.

[0050] For example, scheduling parameters may include task types. For example, the control core module 210 can determine the processor that performs the computing task based on the task parameters of the computing task. FPGAs perform high-speed, low-latency, and high-time precision tasks (e.g., quantum computing timing control, quantum gate manipulation process control, fluorescence acquisition exposure duration control, atomic fluorescence acquisition and real-time processing, etc.). CPUs perform complex algorithmic tasks (e.g., quantum compilation, data post-processing, quantum-classical hybrid algorithm collaboration, etc.). GPUs perform specific tasks such as AI reasoning (e.g., artificial intelligence algorithm processing of fluorescence images, real-time reasoning of spatial light modulator phase diagrams, etc.).

[0051] The control instruction may be instruction information generated according to the computing task to control the processor to execute the computing task, and the control instruction may include control parameters.

[0052] For example, control parameters may include parameters such as time requirements for executing computing tasks, atomic ordering strategies, and atomic manipulation strategies.

[0053] As an embodiment, in step S120, the control core module 210 may generate a configuration instruction set, a scheduling instruction, and a control instruction according to the computing task through quantum compilation, physical parameter conversion, and the like.

[0054] In step S130 , the control core module 210 configures the heterogeneous architecture electronic control system 200 according to the configuration instruction set.

[0055] According to an example embodiment, the control core module 210 may send a configuration instruction set to the communication interface module. The control core module 210 may send a rate configuration in the configuration instruction set to the communication interface module so that the communication interface module is configured according to the rate configuration.

[0056] According to an example embodiment, the control core module 210 may be in communication with the resource scheduling module 220 and the signal generation module 230 through the communication interface module, and send the configuration instruction set to the resource scheduling module 220 and the signal generation module 230 .

[0057] The resource scheduling module 220 can run on an FPGA and / or a CPU. The signal generation module 230 can run on an FPGA. The communication interface module can run on an FPGA, a CPU, and a GPU.

[0058] For example, in step S130, the control core module 210 may send the timing parameters in the configuration instruction set to the resource scheduling module 220, so that the resource scheduling module 220 performs configuration according to the timing parameters. The control core module 210 may send the sampling rate or signal time sequence in the configuration instruction set to the signal generation module 230, so that the signal generation module 230 performs configuration according to the sampling rate or signal time sequence.

[0059] In step S140 , the resource scheduling module 220 calls the processor that executes the computing task according to the scheduling instruction.

[0060] According to an example embodiment, the control core module 210 may send a scheduling instruction to the resource scheduling module 220 through the communication interface module. The resource scheduling module 220 may call a processor to execute a computing task according to the scheduling instruction.

[0061] Optionally, step S140 may specifically include: the resource scheduling module 220 calls at least one of a central processing unit, a graphics processing unit, and a field programmable gate array according to the scheduling instruction.

[0062] For example, after receiving the scheduling instruction, the resource scheduling module 220 can trigger the CPU, GPU and FPGA according to the scheduling instruction, so that one or a combination of the CPU, GPU and FPGA executes the above task allocation content according to the specific time requirements in the scheduling instruction.

[0063] In step S150 , the signal generation module 230 generates a signal generation instruction for the computing task according to the control instruction, so as to enable the processor to complete the computing task.

[0064] According to an example embodiment, the signal generation instruction may be an instruction for generating a timing signal. The signal generation module 230 may generate the signal generation instruction according to the quantum gate manipulation requirements (eg, pulse duration, amplitude, frequency, and phase, etc.) in the control instruction.

[0065] For example, data processing module 240 performs atomic cooling and acquires a first atomic fluorescence image based on the signal generation instruction. Data processing module 240 determines the presence state data of the atomic qubit based on the first atomic fluorescence image. Signal generation module 230 determines and executes quantum gate manipulation of the atomic qubit based on the signal generation instruction. After executing the quantum gate manipulation, data processing module 240 acquires a second atomic fluorescence image. Data processing module 240 determines the quantum state data of the atomic qubit based on the second atomic fluorescence image. Control core module 210 also determines feedback control instructions based on the presence state data of the atomic qubit to enable the processor to complete the computational task.

[0066] Through the above-mentioned embodiments, the present application can determine the computing task of the atomic qubit by responding to user instructions. The present application can generate a configuration instruction set, scheduling instructions, and control instructions based on the computing task. The present application can configure a heterogeneous architecture electronic control system based on the configuration instruction set. The present application can call the processor to perform the computing task through scheduling instructions. The present application can generate signal generation instructions for the computing task through control instructions, so that the processor can complete the computing task.

[0067] This application can form a heterogeneous architecture by integrating CPU, GPU, and FPGA to build a multi-level heterogeneous architecture electronic control system. This application effectively integrates multiple computing resources through a heterogeneous architecture to achieve precise scheduling of computing tasks. This application can ensure efficient and flexible execution of computing tasks through collaborative work between modules. This application can implement a dynamic resource scheduling mechanism by configuring instruction sets, control instructions, and feedback control instructions, thereby achieving optimized allocation of hardware resources for different tasks, supporting multi-task parallel processing and providing efficient operation support, significantly improving system flexibility.

[0068] Alternatively, see Figure 2 , step S150 may include step S151 and step S152.

[0069] In step S151 , the signal generation module 230 generates a signal generation instruction for the computing task according to the control instruction.

[0070] According to an example embodiment, the signal generation instruction may be an instruction for generating a timing signal. The signal generation module 230 may generate the signal generation instruction according to the quantum gate manipulation requirements (eg, pulse duration, amplitude, frequency, and phase, etc.) in the control instruction.

[0071] After step S151 , the signal generation module 230 , the data processing module 240 and the control core module 210 perform step S152 at least once.

[0072] Step S152 is a step for determining the feedback control instruction. Figure 3 , step S152 may include steps S1521 to S1526.

[0073] In step S1521 , the data processing module 240 performs atomic cooling and acquires a first atomic fluorescence image according to the signal generation instruction.

[0074] According to an example embodiment, the core control module may also be in communication with the data processing module 240 and send the configuration instruction set to the data processing module 240 .

[0075] The data processing module 240 can run on an FPGA, or can run collaboratively using multiple resources such as an FPGA, a CPU, and a GPU.

[0076] The configuration parameters may also include a processing algorithm. The control core module 210 may send the processing algorithm configuration in the configuration instruction set to the data processing module 240 so that the data processing module 240 is configured according to the processing algorithm configuration.

[0077] According to example embodiments, atomic cooling can be a process that reduces the thermal motion of atoms (i.e., lowers their kinetic energy), thereby achieving a temperature reduction. The data processing module 240 can perform atomic cooling through methods such as Doppler cooling, Sisyphus cooling, optical molasses, a Zeeman slower, and a magneto-optical trap (MOT). Based on the configuration of the control core module 210, the data processing module 240 can calculate the time-dependent changes in peripheral parameters such as laser, magnetic field, and electric field during the cooling process to perform atomic cooling.

[0078] According to an example embodiment, the atomic fluorescence image may be a distribution of photon intensity of stimulated atomic emission on a scientific camera, and the data processing module 240 may read the atomic fluorescence image through the scientific camera.

[0079] The first atomic fluorescence image may be an atomic fluorescence image before quantum gate manipulation is performed on the atomic qubit. The data processing module 240 may read the first atomic fluorescence image using a scientific camera.

[0080] In step S1522 , the data processing module 240 determines the existence state data of the atomic quantum bit according to the first atomic fluorescence pattern.

[0081] According to example embodiments, the atomic qubit presence status data may be data on the atomic qubit's presence status. The atomic qubit's presence status may include the presence of the atomic qubit and the absence of the atomic qubit. The data processing module 240 may perform image recognition on the first atomic fluorescence image using a linear threshold method to obtain the atomic qubit presence status data. Alternatively, the data processing module 240 may perform image recognition on the first atomic fluorescence image using a convolutional neural network (CNN) classification method to obtain the atomic qubit presence status data.

[0082] In step S1523 , the signal generation module 230 determines and executes quantum gate manipulation of the atomic qubit according to the signal generation instruction.

[0083] According to an example embodiment, quantum gate manipulation can be performed on atomic qubits to achieve specific quantum state conversion. The signal generation module 230 can accurately generate timing signals according to the signal generation instruction. The generated timing signals can include TTL digital signals (Transistor-Transistor Logic Signal, transistor-transistor logic level signals), high-precision analog modulation waveforms, and radio frequency signals. The timing signals generated by the signal generation module 230 can be used to trigger the execution of hardware-level quantum gate manipulation (such as acousto-optic deflector (AOD) / acousto-optic modulator (AOM) to manipulate laser pulse generation) to complete the quantum gate manipulation of the atomic qubit. The signal generation module 230 can perform quantum gate manipulation.

[0084] In step S1524 , after performing the quantum gate manipulation, the data processing module 240 collects a second atomic fluorescence image.

[0085] According to an example embodiment, the second atomic fluorescence image may be an atomic fluorescence image after quantum gate manipulation is performed on the atomic qubit. The data processing module 240 may read the second atomic fluorescence image using a scientific camera.

[0086] In step S1525, the data processing module 240 determines the quantum state data of the atomic quantum bit based on the second atomic fluorescence image.

[0087] According to example embodiments, the quantum state data of the atomic qubit may be data describing the quantum state of the atomic qubit. The quantum state data of the atomic qubit may include a 0 state and a 1 state. The quantum state data of the atomic qubit may be a binary array.

[0088] The data processing module 240 can perform image recognition on the second atomic fluorescence image using a linear threshold method to obtain the quantum state data of the atomic qubit. Alternatively, the data processing module 240 can also perform image recognition on the second atomic fluorescence image using a CNN classification method to obtain the quantum state data of the atomic qubit.

[0089] In step S1526, the control core module 210 also determines feedback control instructions based on the existence status data of the atomic quantum bit, so that the processor completes the computing task.

[0090] According to an example embodiment, the feedback control instruction may be instruction information generated according to the existence state data of the atomic qubits to control the processor to perform the computing task.

[0091] For example, the control core module 210 can generate feedback control instructions based on the existence state data of the atomic quantum bit through quantum compilation, physical parameter conversion, etc.

[0092] The quantum state data of atomic quantum bits can be post-processed using a linear threshold method or a convolutional neural network (CNN) model to obtain the computational results of the computational task.

[0093] Optionally, step S1526 may be specifically as follows: the control core module 210 further generates a feedback control instruction according to a preset atomic sorting strategy and the existence state data of the atomic quantum bit.

[0094] According to an example embodiment, the preset atomic sorting strategy may be a model for sorting and operating atomic qubits configured in the control core module 210. For example, the preset atomic sorting strategy may be an algorithm such as the Hungarian algorithm, the Tetris algorithm, and the artificial intelligence algorithm.

[0095] For example, the core control module 210 may use the atomic qubit existence state data as input to a preset atomic sorting strategy, which then performs algorithmic processing on the atomic qubit existence state data. The preset atomic sorting strategy then outputs feedback control instructions, which enable the processor to complete the computational task according to the feedback control instructions.

[0096] Alternatively, see Figure 4 , the control method 1000 may further include step S160.

[0097] In step S160 , the quantum error correction module 250 generates an error correction control instruction based on the existence status data of the atomic quantum bit and the quantum state data of the atomic quantum bit.

[0098] According to an example embodiment, the control core module 210 configures the quantum error correction module 250 according to a configuration instruction set.

[0099] For example, the configuration parameters may also include an error correction strategy. The control core module 210 may send the error correction strategy to the quantum error correction module 250 through the communication interface module, so that the quantum error correction module 250 is configured according to the error correction strategy.

[0100] Exemplarily, the quantum error correction module 250 may run on an FPGA.

[0101] The data processing module 240 can also communicate with the quantum error correction module 250 through the communication interface module. The data processing module 240 sends the atomic qubit existence status data and the atomic qubit quantum state data to the quantum error correction module 250 after error correction configuration. The quantum error correction module 250 generates error correction control instructions based on the atomic qubit existence status data and the atomic qubit quantum state data.

[0102] According to example embodiments, the quantum error correction module 250 may generate an error correction control instruction according to the existence state data of the atomic qubit and the quantum state data of the atomic qubit through quantum error correction (QEC).

[0103] For example, the quantum error correction module 250 can analyze the existence state data and quantum state data of the atomic qubits output by the data processing module 240 in real time based on the error correction strategy (e.g., error correction requirements and error correction algorithm) of the control core module 210. The quantum error correction module 250 can use a real-time error correction algorithm (e.g., a surface code algorithm or a stabilizer code algorithm) to determine errors in the existence state data of the atomic qubits, thereby identifying and correcting errors in the existence state data of the atomic qubits. The quantum error correction module 250 can use a real-time error correction algorithm to determine errors in the quantum state data of the atomic qubits, thereby identifying and correcting errors in the quantum state data of the atomic qubits.

[0104] For example, the data error of the existence state of the atomic qubit may be a quantum state flip, atom loss, phase error, etc. The data error of the quantum state of the atomic qubit may be a quantum state flip, atom loss, phase error, etc.

[0105] Afterwards, the quantum error correction module 250 can generate an error correction control instruction based on the existence state data error of the atomic quantum bit and the quantum state data error of the atomic quantum bit. The quantum error correction module 250 can send the error correction control instruction to the resource scheduling module 220 and the signal generation module 230 through the communication interface module. The resource scheduling module 220, the signal generation module 230 and the quantum error correction module 250 can systematically execute the error correction control instruction and execute the error correction algorithm, thereby correcting errors in the computing task in real time.

[0106] As an example, the computational task for atomic qubits can be a computational task for neutral atomic qubits or ionic atomic qubits. The processor that executes the computational task is an FPGA. The control core module 210 can formulate feedback control instructions (feedback strategy) based on the atomic qubit state data (real-time measurement data). The control core module 210 can also dynamically generate FPGA configuration parameters for real-time manipulation of the qubits. The signal generation module 230 can generate precise timing signals based on the FPGA configuration parameters to perform quantum state reading and manipulation. The data processing module 240 can process quantum state measurement data in real time, and the quantum error correction module 250 can perform real-time error correction to ensure the stability and accuracy of the computational task.

[0107] As another example, atomic qubit computation tasks can also be used for intermediate circuit measurement and feedback experiments. The control core module 210 generates a configuration instruction set based on the computation task (measurement and feedback requirements). The resource scheduling module 220 rapidly allocates FPGA resources to execute the configuration instruction set. The data processing module 240 can process the intermediate measurement data (i.e., atomic qubit state data) in the computation task in real time. The quantum error correction module 250 can rapidly identify and correct errors, ensuring precise synchronization between intermediate circuit measurements and subsequent operations.

[0108] As another example, the computational task for atomic qubits can also be a digital quantum simulation task (e.g., quantum chemistry simulation). Based on the specific quantum simulation task requirements, the control core module 210 can analyze the computational task definition parameters and generate the FPGA's timing and waveform modulation parameters, thereby controlling the qubits in real time to execute the required quantum gate sequence. The signal generation module 230 precisely implements quantum manipulation signals, the data processing module 240 analyzes the output state information, and the quantum error correction module 250 performs real-time error correction, thereby ensuring simulation accuracy and improving experimental efficiency.

[0109] Through the above-mentioned embodiments, the present application generates error correction control instructions through the state data of atomic quantum bits, thereby improving the computational accuracy and efficiency of atomic quantum bit computing tasks.

[0110] Optionally, the communication interface module can support peripheral interfaces required for atomic quantum bit experiments, such as arbitrary waveform generator (AWG), CXP high-speed image transmission protocol (CoaXPress), digital input / output (Digital Input / Output, Digital IO), and analog input / output (Analog Input / Output, Analog IO), and can support the expansion of interface types and quantity.

[0111] This application can significantly improve the scalability of heterogeneous electronic control systems through heterogeneous architecture, support the manipulation of large-scale quantum bits, and meet the needs of the gradual expansion of quantum heterogeneous electronic control systems in the future.

[0112] According to an embodiment of one aspect of the present application, the present application also provides a non-volatile computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, it can implement the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0113] According to an embodiment of one aspect of the present application, the present application also provides an electronic device, including: one or more processors; a storage device for storing one or more programs, which, when the one or more programs are executed by one or more processors, enables the one or more processors to implement the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0114] According to an embodiment of one aspect of the present application, the present application also provides a computer program product, including: a computer program stored on a computer-readable storage medium; the computer program includes program instructions, which, when executed by a computer, enable the computer to execute the control method of the heterogeneous architecture electronic control system controlled by atomic quantum computing as described above.

[0115] Finally, it should be noted that the above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Although the present application is described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions of the aforementioned embodiments or replace some of the technical features therein with equivalents. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A heterogeneous electronic control system for atomic quantum computing control, characterized in that: The heterogeneous architecture electronic control system includes a control core module, a resource scheduling module and a signal generation module; The control core module determines a computing task of the atomic quantum bit in response to a user instruction, determines a configuration instruction set, a scheduling instruction, and a control instruction according to the computing task, and configures the resource scheduling module and the signal generation module according to the configuration instruction set; The resource scheduling module calls the processor of the computing task according to the scheduling instruction; The signal generation module generates a signal generation instruction for the computing task according to the control instruction, so that the processor completes the computing task, the processor including a central processing unit, a graphics processing unit, and a field programmable gate array, and the resource scheduling module further calls at least one of the central processing unit, the graphics processing unit, and the field programmable gate array according to the scheduling instruction; The heterogeneous architecture electronics control system further includes a data processing module; The control core module configures the data processing module according to the configuration instruction set; The signal generation module determines the signal generation instruction of the computing task according to the control instruction; The signal generation module, the data processing module, and the control core module perform the feedback control instruction determination step at least once, including: The data processing module generates an instruction according to the signal, performs atomic cooling and acquires a first atomic fluorescence image; The data processing module determines the existence state data of the atomic quantum bit according to the first atomic fluorescence image; The signal generation module determines and executes the quantum gate manipulation of the atomic quantum bit according to the signal generation instruction; After performing the quantum gate manipulation, the data processing module collects a second atomic fluorescence image; The data processing module determines the quantum state data of the atomic quantum bit according to the second atomic fluorescence image; The control core module also determines feedback control instructions based on the existence status data of the atomic quantum bit, so that the processor completes the computing task.

2. The heterogeneous architecture electronic control system according to claim 1, characterized in that: The control core module also generates the feedback control instruction according to a preset atomic sorting strategy and the existence status data of the atomic quantum bits.

3. The heterogeneous architecture electronic control system according to claim 1, characterized in that: The heterogeneous architecture electronic control system further includes a quantum error correction module; The control core module configures the quantum error correction module according to the configuration instruction set; The configured quantum error correction module generates an error correction control instruction according to the existence state data of the atomic quantum bit and the quantum state data of the atomic quantum bit.

4. A control method for a heterogeneous electronic control system controlled by atomic quantum computing, characterized in that: The control method is executed by the heterogeneous architecture electronic control system according to any one of claims 1 to 3, and the control method includes: In response to a user instruction, determining a computing task for the atomic quantum bit; generating a configuration instruction set, a scheduling instruction, and a control instruction according to the computing task; Configuring the heterogeneous architecture electronic control system according to the configuration instruction set; Invoking a processor for executing the computing task according to the scheduling instruction, the processor comprising a central processing unit, a graphics processing unit, and a field programmable gate array, wherein at least one of the central processing unit, the graphics processing unit, and the field programmable gate array is invoked according to the scheduling instruction; Generating, according to the control instruction, a signal generation instruction for the computing task so as to enable the processor to complete the computing task, comprising: determining the signal generation instruction of the computing task according to the control instruction; The feedback control instruction determining step is performed at least once, wherein the feedback control instruction determining step includes: performing atomic cooling and acquiring a first atomic fluorescence image according to the signal generation instruction; determining the existence state data of the atomic quantum bit according to the first atomic fluorescence image; Determining and executing quantum gate manipulation of the atomic quantum bit according to the signal generation instruction; After performing the quantum gate manipulation, collecting a second atomic fluorescence image; determining quantum state data of the atomic quantum bit according to the second atomic fluorescence image; Based on the existence state data of the atomic quantum bit, a feedback control instruction is determined to enable the processor to complete the computing task.

5. The control method according to claim 4, characterized in that: The step of determining a feedback control instruction according to the existence state data of the atomic quantum bit includes: The feedback control instruction is generated according to a preset atomic sorting strategy and the existence state data of the atomic quantum bit.

6. The control method according to claim 4, characterized in that: After the step of determining the feedback control instruction is performed at least once, the control method further includes: An error correction control instruction is generated according to the existence state data of the atomic quantum bit and the quantum state data of the atomic quantum bit.

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