Driving method, driving circuit, display panel and display device

Abstract

The present application discloses a driving method, a driving circuit, a display panel, and a display device. The driving method is used to drive the display panel, and the driving method includes: receiving a low-voltage differential signal and generating a first data signal; generating a data clock signal based on the first data signal and a crystal oscillator signal; performing spectrum spreading based on the data clock signal to generate a second data signal; generating a latch signal and a clock signal based on the data clock signal; parsing the data latch signal, the clock signal, and the second data signal and outputting them to the display panel for driving; the duration of each gate drive signal is the same, and the spacing between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same. The present application only turns on spectrum spreading for the data signal, and the transmission frequency of the data signal is constantly changing to avoid the problem of signal interference caused by the unchanged transmission rate, and at the same time avoid the problem of overcharging or undercharging of adjacent row pixels after turning on spectrum spreading, which causes water ripples.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving method, a driving circuit, a display panel, and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode), also known as organic electroluminescence display or organic light-emitting semiconductor (Organic Electroluminescence Display, OLED), is a current-type organic light-emitting device that emits light through the injection and recombination of carriers. The reason why OLED technology has been widely used is that it has many advantages compared with other technologies.

[0003] Display devices on the market all pursue higher resolutions and require the transmission of large amounts of image data. The data transmission speed of display devices increases with the amount of data. When data signals are transmitted at a higher frequency, the regular data signals often cause electromagnetic interference (EMI). Among the various methods for reducing EMI, the spread spectrum clock generation method is relatively common. When using the spread spectrum clock generation method to adjust the transmission frequency of the data signal, since the data signal transmission frequency regularly fluctuates between greater than and less than the normal frequency, adjacent rows of pixels may appear to be fully charged or undercharged, which in turn causes water ripples when the image is displayed, thus affecting the display effect. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide a driving method, a driving circuit, a display panel and a display device that can improve the situation where adjacent rows of pixels are overcharged or undercharged and water ripples occur after the spread spectrum is turned on.

[0005] The present application discloses a driving method for driving a display panel, the driving method comprising:

[0006] receiving a low voltage differential signal and generating a first data signal;

[0007] generating a data clock signal according to the first data signal and the crystal oscillator signal;

[0008] Performing spectrum spreading based on the data clock signal to generate a second data signal;

[0009] generating a latch signal and a clock signal based on the data clock signal; and

[0010] analyzing the data latch signal, the clock signal, and the second data signal and outputting the signals to the display panel to drive the display panel;

[0011] The duration of each gate driving signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same.

[0012] Optionally, the step of performing spectrum spreading based on the data clock signal to generate the second data signal includes the following steps:

[0013] Spread spectrum during the generation phase of the second data signal so that the transmission frequency of the second data signal changes periodically around the original frequency;

[0014] The change value of the transmission frequency of the second data signal is ±3% of the original frequency, and the period of the transmission frequency of the second data signal is the scanning time of 3N scanning lines, where N is a natural number greater than or equal to 2.

[0015] Optionally, the step of performing spectrum spreading based on the data clock signal to generate the second data signal includes:

[0016] When spreading the data signal, a compensation time is added to the idle time of each row of pixels so that the total duration of the display time and the idle time of each row of pixels is the same;

[0017] The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period;

[0018] Or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period;

[0019] Among them, during the spread spectrum time period in the idle time, a preset amount of non-display data is transmitted to the display panel to compensate for the idle time; during each row scan line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequency of the latch signal and the clock signal remains unchanged.

[0020] Optionally, the maximum transmission frequency of the second data signal is a first frequency, the minimum transmission frequency is a second frequency, the first frequency is greater than the original frequency, and the second frequency is less than the original frequency, and the step of spreading the spectrum during the generation phase of the second data signal so that the transmission frequency of the second data signal varies around the original frequency includes:

[0021] In the spread spectrum phase, the transmission frequency of the second data signal is divided into a first change band and a second change band;

[0022] In the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases back to the original frequency; and

[0023] In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases back to the original frequency.

[0024] Optionally, in the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a stepwise or linear manner and then decreases to the original frequency;

[0025] In the step of decreasing the transmission frequency of the second data signal from the original frequency to the second frequency and then increasing it to the original frequency within the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a stepwise or linear manner and then increases it to the original frequency.

[0026] Optionally, the step of generating a latch signal and a clock signal based on the data clock signal and the step of parsing the data latch signal, the clock signal and the second data signal and outputting the parsed data to the display panel to drive the display panel include the following steps:

[0027] A reference value is set for the idle time of each row of pixels, and the number of rows whose corresponding idle time is higher than the reference value is uniformly set at the reference value to control the open period of the scan line corresponding to each row of pixels and the refresh rate of the display panel;

[0028] When insufficient charging occurs, the scan lines with short open cycle times are over-driven.

[0029] The present application also discloses a driving circuit that drives a display panel using any of the driving methods described above. The driving circuit includes a timing control module, a data driving module, and a gate driving module. The timing control module outputs a second data signal generated by spread spectrum to the data driving module according to the spread spectrum setting of the host computer, and outputs a latch signal and a clock signal that are not spread spectrum to the data driving module and the gate driving module respectively.

[0030] Optionally, the timing control module includes a frequency synthesizer, a spread spectrum unit, a second data signal analysis unit and an input and output port, the frequency synthesizer generates a data clock signal based on the first data signal and the crystal oscillator signal, the input end of the spread spectrum unit is connected to the output end of the frequency synthesizer, and the output end is connected to the input end of the second data signal analysis unit, the spread spectrum unit performs spread spectrum based on the data clock signal to generate a second data signal and outputs it to the second data signal analysis unit, the input and output ports are connected to the output end of the frequency synthesizer, and generates a latch signal and a clock signal according to the data clock signal; wherein, the timing control module includes a reset unit and a compensation unit, the reset unit and the compensation unit are respectively connected to the spread spectrum unit, the reset unit is used to control the spread spectrum unit to reset the transmission frequency of the data signal to the original frequency before the start of each frame, and the compensation unit compensates for the idle time before the rising edge of the latch signal, so that the display time of each row of pixels and the total duration of the idle time are the same.

[0031] The present application also discloses a display panel, which includes multiple data lines and multiple scan lines, and multiple pixels formed by the multiple data lines and multiple scan lines. The data lines are connected to a data driving module in a driving circuit, and the scan lines are connected to a gate driving module of the driving circuit. The display panel is driven by any of the driving circuits described above and using any of the driving methods described above.

[0032] The present application also discloses a display device, which includes a display panel and any of the driving circuits described above, wherein the driving circuit drives the display panel using any of the driving methods described above.

[0033] Compared with the scheme of spreading the data signal, latch signal and clock signal together, the present application turns on the spread spectrum for the data signal, and the transmission frequency of the data signal keeps changing to avoid the problem of signal interference caused by the unchanged transmission rate. The frequencies of the latch signal and the clock signal can remain unchanged. The duration of each gate drive signal analyzed according to the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same, ensuring the charging time to avoid the change of charging time caused by the jitter of the gate drive signal, thereby generating water ripples. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without inventive work. In the drawings:

[0035] Figure 1 This is a flowchart of the driving method according to the first embodiment of the present application;

[0036] Figure 2 is a flowchart of a driving method according to a second embodiment of the present application;

[0037] Figure 3 is a schematic diagram of data signal frequency variation according to the second embodiment of the present application;

[0038] Figure 4 is another schematic diagram of data signal frequency variation according to the second embodiment of the present application;

[0039] Figure 5 This is another schematic diagram of data signal frequency variation according to the second embodiment of the present application;

[0040] Figure 6 is a schematic flow chart of a driving method according to a third embodiment of the present application;

[0041] Figure 7 This is a schematic diagram of idle time partitioning in the third embodiment of the present application;

[0042] Figure 8 is a schematic flow chart of a driving method according to a fourth embodiment of the present application;

[0043] Figure 9 is a schematic structural diagram of a driving circuit according to a fifth embodiment of the present application;

[0044] Figure 10 is a schematic diagram of a timing control module according to a sixth embodiment of the present application;

[0045] Figure 11 is a schematic structural diagram of a display panel according to a seventh embodiment of the present application;

[0046] Figure 12 It is a structural schematic diagram of the display device of the eighth embodiment of the present application.

[0047] Among them, 100, driving circuit; 110, timing control module; 111, frequency synthesizer; 112, spread spectrum unit; 113, second data signal analysis unit; 114, input and output port; 115, reset unit; 116, compensation unit; 120, data driving module; 130, gate driving module; 200, display panel; 210, data line; 220, scan line; 230, pixel; 300, host computer; 400, display device; TP-latch signal; DCLK data clock signal; CLK / CKV-clock signal; Max-maximum transmission frequency; Min-minimum transmission frequency; MF-change period; w1-first change band; w2-second change band. DETAILED DESCRIPTION

[0048] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative. However, the present application can be implemented in many alternative forms and should not be construed as being limited to the embodiments described herein.

[0049] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.

[0050] Considering that commonly used display panels have a very high data signal transmission rate when displaying, signals with a fixed rate and high speed are prone to EMI (signal interference) problems. In order to solve this problem, spread spectrum technology is added. Although the interference problem is solved after spread spectrum, when the data signal frequency changes, the corresponding clock signal and latch signal also change synchronously, which eventually causes the frequency corresponding to the gate drive signal to change continuously, sometimes high and sometimes low, resulting in insufficient charging in some areas and excessive charging in some areas, resulting in obvious differences in brightness and darkness.

[0051] refer to Figure 1 As shown, as a first embodiment of the present application, a driving method is disclosed, which solves the problem of signal interference while also preventing uneven charging in some areas of the display panel. The driving method is used to drive the display panel, and the driving method includes the following steps:

[0052] S1: Receive a low voltage differential signal and generate a first data signal;

[0053] S2: Generate a data clock signal according to the first data signal and the crystal oscillator signal;

[0054] S3: Perform spectrum spreading based on the data clock signal to generate a second data signal;

[0055] S4: Generate a latch signal and a clock signal based on the data clock signal;

[0056] S5: analyzing the data latch signal, the clock signal, and the second data signal and outputting the signals to the display panel to drive the display panel;

[0057] The duration of each gate driving signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate driving signal is the same.

[0058] In this embodiment, in step S1, a low voltage differential signal is received and a first data signal is generated. The first data signal is the original data signal before spectrum spreading, and the transmission frequency is fixed. The differential signal has a strong anti-interference ability and can effectively suppress common mode noise. In step S2, a data clock signal is generated based on the first data signal and the crystal oscillator signal. The crystal oscillator signal has high stability and accuracy, and provides a stable time reference for subsequent signal processing, which helps to reduce jitter and interference of the signal during transmission and processing. In step S3, a second data signal is generated based on the data clock signal by spectrum spreading. The spectrum spreading technology can expand the bandwidth of the signal. , reducing the power density of the signal, thereby reducing mutual interference between signals; in step S4, a latch signal and a clock signal are generated based on the data clock signal, the latch signal is used to temporarily store and stabilize the data, and the clock signal is used to synchronize the operations of various signals to ensure the correct transmission and processing of the signals, further reducing the possibility of signal interference; in step S5, the data latch signal, the clock signal and the second data signal are parsed and output to the display panel for driving. Through precise parsing and synchronization, the timing relationship between the various signals is strictly controlled, avoiding conflicts and interference between the signals, and ensuring the normal driving of the display panel.

[0059] Generally, in step S4, the duration of each gate drive signal analyzed according to the clock signal is the same, and the spacing between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same, ensuring that during the charging process of the display panel, each pixel has the same charging time and stable charging conditions; the gate drive signal is used to control the switching of the pixel points, and its same duration ensures that the charging time of each pixel point is consistent, and the fixed spacing between the falling edge of the data latch signal and the falling edge of the gate drive signal further ensures the stability and uniformity of the charging process, avoiding the problem of uneven charging caused by inconsistent charging time.

[0060] This embodiment improves the spread spectrum output mode and eliminates the charging differences between sub-pixels by adopting a series of measures such as differential signals, stable clock signals, spread spectrum technology, precise latching and drive signal control, thereby improving the uniformity of the displayed brightness and darkness differences, eliminating the brightness and darkness differences caused by fluidity, improving water ripples, and enhancing the display effect.

[0061] like Figure 2 As shown, as the second embodiment of the present application, it further refines and improves the above-mentioned first embodiment. In step S3, the following steps are included:

[0062] S321: performing spectrum spreading in a generation phase of the second data signal so that a transmission frequency of the second data signal changes periodically around an original frequency;

[0063] Among them, the definition of spread spectrum indicates the frequency change of the data signal transmitted to the data driving module by the timing control module, and the original frequency indicates the actual transmission frequency when the spread spectrum is not used; the change value of the transmission frequency of the second data signal is ±3% of the original frequency, and ±3% indicates the amplitude of the frequency change, which can be set by the timing control module; generally, refer to Figure 3 As shown, the transmission frequency of the second data signal, that is, the period time of the spread spectrum frequency is the scanning time of 3N scan lines, where N is a natural number greater than or equal to 2. Assuming that the spread spectrum (SSCG) frequency SSCG=30K, for a display screen with a 1920-line resolution and dual scan lines, the total number of all lines in an actual frame image, V-total, is 2250*2. For a 60Hz frame rate, the corresponding line frequency is 270KHz (1*60*2250*2). It can be seen that the line frequency is 9 times that of the spread spectrum, that is, one spread spectrum cycle for every 9 lines. The corresponding water ripples caused by insufficient or excessive charging can be seen as the number of lines with a periodic bright and dark rolling change of 9 lines. Therefore, generally, the period time of the transmission frequency of the second data signal is the scanning time of 3N scan lines, but it can also be other relationships. For example, the period time of the transmission frequency of the second data signal is the scanning time of 1 scan line.

[0064] Furthermore, the maximum transmission frequency of the second data signal is a first frequency, the minimum transmission frequency is a second frequency, the first frequency is greater than the original frequency, and the second frequency is less than the original frequency, and the step of spreading the second data signal in the generation stage so that the transmission frequency of the second data signal varies around the original frequency includes:

[0065] In the spread spectrum phase, the transmission frequency of the second data signal is divided into a first change band and a second change band;

[0066] In the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases back to the original frequency;

[0067] In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases back to the original frequency.

[0068] In a display panel, the charging process of pixels is closely related to the transmission frequency of the data signal. The dynamic change characteristics of the second data signal transmission frequency in this embodiment can enable the pixels to receive more uniform and stable signal drive during the charging process; when the transmission frequency of the data signal fluctuates around the original frequency, the pixels can receive appropriate charging signal strength and duration in different time periods, avoiding the problem of over- or under-charging of some pixels due to constant or single frequency changes, thereby effectively improving the uniformity of charging and improving the overall display effect of the display panel.

[0069] Generally, in the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a step-like manner and then decreases to the original frequency in a step-like manner; in the step of decreasing the transmission frequency of the second data signal from the original frequency to the second frequency and then increasing to the original frequency within the second change band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a step-like manner and then increases to the original frequency in a step-like manner, wherein Max represents the maximum transmission frequency of the data signal after spread spectrum is turned on, Min represents the minimum transmission frequency of the data signal after spread spectrum is turned on, MR represents the change amplitude of the transmission frequency, that is, the amplitude, and MF represents the change period, that is, the speed at which the data signal changes from the maximum transmission frequency Max to the minimum transmission frequency Min, as shown in FIG. Figure 4 As shown; or in the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first change band, the transmission frequency of the second data signal increases linearly from the original frequency to the first frequency and then decreases linearly to the original frequency; in the step of decreasing the transmission frequency of the second data signal from the original frequency to the second frequency and then increasing to the original frequency within the second change band, the transmission frequency of the second data signal decreases linearly from the original frequency to the second frequency and then increases linearly to the original frequency, specifically as shown Figure 5 shown.

[0070] By precisely controlling the change in the transmission frequency of the second data signal, such as in a step-like or linear rise / fall pattern, the pixels of the display panel can more accurately respond to changes in the data signal. This avoids unstable or irregular changes in the data transmission frequency, which may cause the pixels to respond untimely or excessively, resulting in ghosting and blurring. Frequency change control can make the switching of pixels smoother and more accurate, reducing the generation of ghosting and blurring, and improving the clarity and sharpness of the displayed image. Data signals with different frequency characteristics can meet the needs of different types of display panels. For some high-resolution, high-refresh-rate display panels, a higher first frequency and a flexible frequency change range can provide sufficient data transmission speed and accuracy. For some panels with low power consumption and simple display requirements, a lower second frequency and a change around the original frequency can reduce energy consumption while ensuring basic display functions.

[0071] like Figure 6 As shown, as the third embodiment of the present application, which further improves the above-mentioned first embodiment, step S3 includes:

[0072] S361: When performing spectrum spreading on the data signal, a compensation time is added to the idle time of each row of pixels so that the total duration of the display time and the idle time of each row of pixels is the same;

[0073] The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period;

[0074] Or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period;

[0075] Among them, during the spread spectrum time period within the idle time (H-Blanking), a preset amount of non-display data is transmitted to the display panel to compensate for the idle time; within each row scan line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequencies of the latch signal and the clock signal remain unchanged.

[0076] Specifically, refer to Figure 7 As shown, the H-Blanking area is divided into three sections: the data volume unchanged area (also known as the data volume unchanged period), the spread spectrum compensation area (also known as the spread spectrum period), and the RST area (also known as the reset period). The first two areas are interchangeable, and all areas except the RST area can be spread spectrum compensation areas. This design greatly increases the flexibility of the system. In different application scenarios, the function and position of each area can be adjusted according to specific needs. For example, for applications with extremely high display quality requirements, such as medical imaging and high-end gaming, more areas can be set as spread spectrum compensation areas to ensure optimal display effects. For applications that are more sensitive to cost and power consumption, the spread spectrum compensation area can be appropriately narrowed to reduce system complexity and cost. In the data volume unchanged area, stable data transmission speed and frequency can be maintained, reducing unnecessary adjustments and changes. In the reset period, system initialization and reset operations can be centralized, improving system operating efficiency. The purpose of the spread spectrum compensation area is to compensate for the situation where the time of each line is different. It can accurately adjust the amount of data transmission according to the actual pixel response time of each line to ensure that each pixel can obtain the appropriate charging time and display brightness. For example, in the case of spread spectrum of this line, the number of CLKs required for LV+, LV- to transmit 1W (display data + non-display data), while non-spread spectrum requires 9999. In this case, one more LV+, LV- and other non-display data needs to be transmitted in the spread spectrum compensation area. In the spread spectrum compensation area, the difference in the time of each line is compensated by transmitting more non-display data, avoiding problems such as screen flickering and jitter caused by inaccurate time.

[0077] like Figure 8 As shown, as the fourth embodiment of the present application, it is a further refinement of the above-mentioned first embodiment, and further includes the following steps between steps S4 and S5:

[0078] S41: setting a reference value for the idle time of each row of pixels, and uniformly setting the number of rows whose corresponding idle time is higher than the reference value at the reference value, so as to control the open period of the scan line corresponding to each row of pixels and the refresh rate of the display panel;

[0079] S42: When insufficient charging occurs, overvoltage driving is performed on the scan line with a short open cycle time.

[0080] Considering that the mini-clock signal (i.e., the clock frequency of data signal transmission) is high, the H-Active (display time) is short. If the H-Blanking time is compensated, it will increase, wasting time and affecting the refresh rate. This embodiment uses a benchmark for all H-Blanking times above a certain threshold, reducing the H-Blanking time. This reduces the waste of H-Blanking time and shortens the display period of each frame. Because H-Blanking time occupies a portion of the entire display period, an excessively long H-Blanking time can lead to a decrease in refresh rate. Through optimization, more frames can be displayed per unit time, thereby improving the refresh rate. For example, in high-speed dynamic image display scenarios, such as gaming or video playback, a higher refresh rate can make the picture smoother, reduce stuttering and artifacts, and significantly enhance the visual experience. By properly controlling the H-Blanking time, the corresponding gate cycle can be shortened, resulting in a higher refresh rate and better display quality. When the gate cycle (i.e., the scan line open period) is shortened, insufficient charging can occur during charging. Overvoltage drive can be applied to the short gate cycle portion, using a separate overvoltage drive table to correct the insufficient charging to ensure display quality. This ensures that pixels receive sufficient charge even when the gate cycle is shortened, maintaining normal brightness and display quality. This avoids problems such as uneven pixel brightness and color distortion caused by insufficient charging, ensuring high-quality display output. For example, when displaying high-resolution images or low-grayscale images, overvoltage drive ensures that each pixel accurately reaches the required brightness level, resulting in more accurate image detail and color.

[0081] By setting thresholds or benchmark values ​​to determine which H-Blanking times need to be adjusted, and using specific overvoltage drive tables for different short gate cycle conditions, precise control of the display process is achieved. This precise control also helps extend the service life of the display panel because a stable operating state can reduce damage to pixels caused by overcharging or discharging.

[0082] like Figure 9As shown, as the fifth embodiment of the present application, a driving circuit 100 is disclosed, which drives the display panel 200 using the driving method described in any of the above embodiments. The driving circuit 100 includes a timing control module 110, a data driving module 120 and a gate driving module 130. The timing control module 110 outputs a second data signal generated by spreading to the data driving module 120 according to the spreading setting of the host computer 300, and outputs a non-spread latch signal TP and a clock signal CLK to the data driving module 120 and the gate driving module 130, respectively.

[0083] In this embodiment, the host computer 300 can reasonably adjust the spread spectrum parameters based on the actual needs and operating conditions of the display panel 200. Through precise spread spectrum settings, the timing control module 110 can accurately output the data signal DATA, latch signal TP, and clock signal CLK, so that the signal parameters such as frequency and phase can match the characteristics of the display panel 200, reducing interference such as signal reflection and superposition caused by signal mismatch. The timing control module 110 transmits different types of signals to the corresponding modules according to established rules. The second data signal generated by the spread spectrum is transmitted to the data driver module 120, and the non-spread latch signal and clock signal are transmitted to the data driver module 120 and the gate driver module 130, respectively.

[0084] This application turns on spread spectrum for the data signal, and the transmission frequency of the data signal keeps changing to avoid the problem of signal interference caused by the unchanged transmission rate. The frequencies of the latch signal and the clock signal can remain unchanged. The duration of each gate drive signal analyzed according to the clock signal is the same, and the corresponding falling edge of the data latch signal is the same as the spacing between the falling edge of the gate drive signal to ensure the charging time, so as to avoid the jitter of the gate drive signal causing the charging time to change, thereby generating water ripples.

[0085] For further reference, Figure 10 As shown, as the sixth embodiment of the present application, it is a further refinement and improvement of the above-mentioned fifth embodiment. The timing control module 110 includes a frequency synthesizer 111, a spread spectrum unit 112, a second data signal analysis unit 113 and an input-output port 114. The frequency synthesizer 111 generates a data clock signal according to the first data signal and the crystal oscillator signal. The input end of the spread spectrum unit 112 is connected to the output end of the frequency synthesizer 111, and the output end is connected to the input end of the second data signal analysis unit 113. The spread spectrum unit 112 performs spread spectrum based on the data clock signal to generate a second data signal and output it to the second data signal analysis unit 113. The input-output port 114 is connected to the output end of the frequency synthesizer 111 to generate a latch signal and a clock signal according to the data clock signal.

[0086] Because the spread spectrum of the data transmission signal changes regularly, when the data of the current row (for example, the first row) is sent and enters the H-Blanking region, the number of mini-clocks to send in the H-Blanking region can be determined based on the spread spectrum change trend. If the spread spectrum frequency is higher than when it is closed, the number of mini-clocks needs to be increased, and the number of mini-clocks in the corresponding spread spectrum change region increases accordingly. If the spread spectrum frequency is lower than when it is closed, the number of mini-clocks needs to be reduced, and the number of mini-clocks in the corresponding spread spectrum change region decreases accordingly. Because data is collected based on the mini-clocks, it will automatically change with the changes in the mini-clocks. For TP and CLK (source signals generated by the GOA gate), only the data clock signal DCLK is referenced. Since DCLK does not pass through the spread spectrum unit 112, there is no spread spectrum function. It is only related to the front-end refresh rate and resolution, that is, it is stable and does not change. The charging time is only related to these two signals. Therefore, the charging time is locked, and water ripples caused by charging time differences will not occur, thus solving the problem.

[0087] It should also be noted that the timing control module 110 also includes a reset unit 115 and a compensation unit 116. The reset unit 115 and the compensation unit 116 are respectively connected to the spread spectrum unit 112. The spread spectrum unit 112 includes a phase-locked loop PLL. The reset unit 115 is used to control the spread spectrum unit 112 to reset the transmission frequency of the data signal to the original frequency before the start of each frame. The compensation unit 116 compensates for the idle time before the rising edge of the latch signal so that the display time of each row of pixels and the total length of the idle time are the same.

[0088] Frequency synthesizer 111 receives a data signal with frequency A, namely DATA Fre A, and an oscillating signal oscD with frequency D, and generates a data clock signal DCLK. The phase-locked loop (PLL) performs spectrum spreading on the data signal based on the data clock signal DCLK to obtain a data signal with frequency B, namely DATA Fre B. The second data signal parsing unit 113 then parses and outputs the data signal. TP and CLK (source signal generated by the GOA gate) only reference DCLK. DCLK does not pass through the phase-locked loop (PLL) of the spectrum spreading unit 112, and thus does not have a spectrum spreading function. It is only related to the front-end refresh rate and resolution, that is, it is stable and does not change. The charging time is only related to these two signals. Therefore, the charging time is locked, and water ripples caused by charging time differences will not occur.

[0089] After turning on spread spectrum, refer to Figure 4 and Figure 5As shown, the transmission frequency of the second data signal is divided into a first change band and a second change band; within the first change band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases to the original frequency; within the second change band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases to the original frequency. When the transmission frequency of the data signal varies around the original frequency, the pixels can receive appropriate charging signal strength and duration in different time periods, avoiding the problem of over- or under-charging of some pixels due to constant frequency or single change, thereby effectively improving the uniformity of charging and improving the overall display effect of the display panel 200.

[0090] like Figure 11 As shown, as the seventh embodiment of the present application, the present application also discloses a display panel 200, wherein the display panel 200 includes multiple data lines 210 and multiple scan lines 220, and multiple pixels 230 formed by the multiple data lines 210 and the multiple scan lines 220, the data lines 210 are connected to the data driving module 120 in the driving circuit, and the scan lines 220 are connected to the gate driving module 130 of the driving circuit 100, and the display panel is driven by the driving circuit 100 as described in any of the above embodiments and using the driving method as described in any of the above embodiments; two gate driving modules 130 are shown in the figure, which are generally used in large-size panels, and the left and right sides can be scanned, but one gate driving module 130 can also realize the scanning of the scan lines 220 in the entire display panel 200.

[0091] like Figure 12 As shown, as the eighth embodiment of the present application, the present application also discloses a display device 400, which includes a display panel 200 and a driving circuit 100 as described in any of the above embodiments, and the driving circuit 100 uses the driving method described in any of the above embodiments to drive the display panel 200.

[0092] The spread spectrum setting of the host computer 300 can reasonably adjust the spread spectrum parameters according to the actual needs and working conditions of the display panel 200. Through the precise spread spectrum setting, the timing control module 110 can output accurate data signals DATA, latch signals TP and clock signals CLK to the data driving module 120 and the gate driving module 130; the timing control module 110 includes a frequency synthesizer 111, a spread spectrum unit 112, a second data signal parsing unit 113 and an input and output port 114. The frequency synthesizer 111 is based on the first data signal and the crystal signal. The frequency synthesizer 111 generates a data clock signal, the input end of the spread spectrum unit 112 is connected to the output end of the frequency synthesizer 111, and the output end is connected to the input end of the second data signal analysis unit 113. The spread spectrum unit 112 performs spectrum spreading based on the data clock signal to generate a second data signal and outputs it to the second data signal analysis unit 113. The input and output port 114 is connected to the output end of the frequency synthesizer 111, and generates a latch signal and a clock signal according to the data clock signal; the frequency synthesizer 111 receives a data signal with a frequency A, that is, DATA Fre A and an oscillating signal osc D with a frequency of D generate a data clock signal DCLK. The phase-locked loop (PLL) performs spectrum spreading on the data signal based on the data clock signal DCLK to obtain a data signal with a frequency of B, namely DATA Fre B. The second data signal parsing unit 113 then parses and outputs the data signal. TP and CLK (source signal generated by the GOA gate) only refer to DCLK. DCLK does not pass through the phase-locked loop (PLL) of the spectrum spreading unit 112, so it does not have a spectrum spreading function and is only related to the front-end refresh rate and resolution, that is, it is stable and does not change. The charging time is only related to these two signals, so it can be seen that the charging time is locked, and water ripples due to differences in charging time will not occur.

[0093] It should be noted that the limitations of the various steps involved in this solution, without affecting the implementation of the specific solution, are not considered to limit the order of the steps, that is, the steps written in the front can be executed first, or can be executed later, or even simultaneously. As long as this solution can be implemented, it should be considered to fall within the scope of protection of this application. The inventive concept of this application can form a large number of embodiments, but the length of the application document is limited and it is impossible to list them one by one. Therefore, under the premise of no conflict, the various embodiments or technical features described above can be arbitrarily combined to form new embodiments. After the various embodiments or technical features are combined, the original technical effects will be enhanced.

[0094] The above content is a further detailed description of the present application in conjunction with specific optional implementation methods, and the specific implementation of the present application cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be considered to fall within the scope of protection of the present application.

Claims

1. A driving method for driving a display panel, characterized in that: The driving method includes: receiving a low voltage differential signal and generating a first data signal; generating a data clock signal according to the first data signal and the crystal oscillator signal; Performing spectrum spreading based on the data clock signal to generate a second data signal; generating a latch signal and a clock signal based on the data clock signal; and analyzing the data latch signal, the clock signal, and the second data signal and outputting the signals to the display panel to drive the display panel; The duration of each gate drive signal parsed from the clock signal is the same, and the interval between the falling edge of the corresponding data latch signal and the falling edge of the gate drive signal is the same; The step of performing spectrum spreading based on the data clock signal to generate the second data signal comprises: When the data signal is spread spectrum, compensation time is added to the idle time of each row of pixels so that the total length of the display time and the idle time of each row of pixels is the same; within each row of scanning line cycle, after the spread spectrum is turned on, the transmission frequency of the second data signal gradually changes, and the transmission frequency of the latch signal and the clock signal remains unchanged.

2. The driving method according to claim 1, wherein: The step of performing spectrum spreading based on the data clock signal to generate the second data signal includes the following steps: Spread spectrum during the generation phase of the second data signal so that the transmission frequency of the second data signal changes periodically around the original frequency; The change value of the transmission frequency of the second data signal is ±3% of the original frequency, and the period of the transmission frequency of the second data signal is the scanning time of 3N scanning lines, where N is a natural number greater than or equal to 2.

3. The driving method according to claim 1, wherein: The idle time includes a first time period, a second time period and a third time period in sequence, the first time period is a time period in which the amount of data does not change, the second time period is a spread spectrum time period, and the third time period is a reset time period; Or the first time period is a spread spectrum time period, the second time period is a time period in which the amount of data does not change, and the third time period is a reset time period; In the spread spectrum period within the idle time, a preset amount of non-display data is transmitted to the display panel to compensate for the idle time.

4. The driving method according to claim 2, wherein: The maximum transmission frequency of the second data signal is a first frequency, the minimum transmission frequency is a second frequency, the first frequency is greater than the original frequency, and the second frequency is less than the original frequency, and the step of spreading the second data signal during the generation phase so that the transmission frequency of the second data signal varies around the original frequency includes: In the spread spectrum phase, the transmission frequency of the second data signal is divided into a first change band and a second change band; In the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency and then decreases back to the original frequency; and In the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency and then increases back to the original frequency.

5. The driving method according to claim 4, wherein: In the step of increasing the transmission frequency of the second data signal from the original frequency to the first frequency and then decreasing to the original frequency within the first variation band, the transmission frequency of the second data signal increases from the original frequency to the first frequency in a stepwise or linear manner and then decreases to the original frequency; In the step of decreasing the transmission frequency of the second data signal from the original frequency to the second frequency and then increasing it to the original frequency within the second variation band, the transmission frequency of the second data signal decreases from the original frequency to the second frequency in a stepwise or linear manner and then increases it to the original frequency.

6. The driving method according to claim 2, wherein: The steps of generating a latch signal and a clock signal based on the data clock signal and analyzing the data latch signal, the clock signal and the second data signal and outputting the analyzed data latch signal, the clock signal and the second data signal to the display panel to drive the display panel include the following steps: A reference value is set for the idle time of each row of pixels, and the number of rows whose corresponding idle time is higher than the reference value is uniformly set at the reference value to control the open period of the scan line corresponding to each row of pixels and the refresh rate of the display panel; When insufficient charging occurs, the scan lines with short open cycle times are over-driven.

7. A driving circuit, characterized in that: The display panel is driven using the driving method described in any one of claims 1 to 6, wherein the driving circuit includes a timing control module, a data driving module, and a gate driving module. The timing control module outputs a second data signal generated by spread spectrum to the data driving module according to the spread spectrum setting of the host computer, and outputs a latch signal and a clock signal that are not spread spectrum to the data driving module and the gate driving module, respectively.

8. The driving circuit according to claim 7, wherein: The timing control module includes a frequency synthesizer, a spread spectrum unit, a second data signal analysis unit, and an input and output port. The frequency synthesizer generates a data clock signal according to the first data signal and the crystal oscillator signal. The input end of the spread spectrum unit is connected to the output end of the frequency synthesizer, and the output end is connected to the input end of the second data signal analysis unit. The spread spectrum unit performs spread spectrum operation based on the data clock signal to generate a second data signal and outputs the second data signal to the second data signal analysis unit. The input and output port is connected to the output end of the frequency synthesizer to generate a latch signal and a clock signal according to the data clock signal. Among them, the timing control module includes a reset unit and a compensation unit, and the reset unit and the compensation unit are respectively connected to the spread spectrum unit. The reset unit is used to control the spread spectrum unit to reset the transmission frequency of the data signal to the original frequency before the start of each frame. The compensation unit compensates for the idle time before the rising edge of the latch signal so that the display time of each row of pixels and the total length of the idle time are the same.

9. A display panel, characterized in that: The display panel includes multiple data lines and multiple scan lines, and multiple pixels formed by the multiple data lines and the multiple scan lines, the data lines are connected to the data driving module in the driving circuit, and the scan lines are connected to the gate driving module of the driving circuit. The display panel is driven by the driving circuit as described in any one of claims 7-8 and using the driving method as described in any one of claims 1-6.

10. A display device, characterized in that: The display device includes the display panel according to claim 9 and the driving circuit according to any one of claims 7 to 8, and the driving circuit drives the display panel using the driving method according to any one of claims 1 to 6.

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