Display device and method of driving the same

Abstract

The invention relates to a display device and a method of driving the same. A display device includes: a light emitting element including an anode to which a driving power is input and a cathode to which a low power is applied; a driving TFT including a first electrode to which high power is input, a second electrode to which driving power is applied, and a gate electrode; a switching unit configured to apply a first voltage for sensing a characteristic of the driving TFT or a second voltage for driving the driving TFT when an on-level scan signal is input; and an anode reset unit configured to apply an anode reset voltage to an anode of the light emitting element in association with the switching unit.

Description

Technical Field

[0001] The present disclosure relates to a display device and a method of driving the display device. Background Art

[0002] Electroluminescent display devices have the advantages of high response speed, high luminous efficiency and wide viewing angle. Electroluminescent display devices include a plurality of sub-pixels and can display images through light-emitting elements of the sub-pixels that emit light. The light-emitting elements are implemented based on organic or inorganic materials.

[0003] The electroluminescent display device is capable of displaying an image based on light generated from each light emitting element by adjusting the amount of current applied to the light emitting element within the sub-pixel. Therefore, the previously displayed image may affect the next displayed image. For example, when the image pattern changes from black to white, a shooting amount ratio (SAR) overshoot may be generated that causes the brightness of the first frame to increase compared to when the image pattern changes from white to white.

[0004] Therefore, in order to improve image quality, it is necessary to improve the accuracy of a pixel driving circuit that controls light emission of sub-pixels. Summary of the invention

[0005] Accordingly, the present disclosure is directed to a display device and a method of driving the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.

[0006] An object of the present disclosure is to provide a display device including a pixel driving circuit for accurate grayscale expression and a method of driving the display device.

[0007] Additional advantages, purposes and features of the present disclosure will be partially described in the following description, and will partially become apparent to those of ordinary skill in the art who have studied the following, or may be learned from the practice of the present disclosure. The purposes and other advantages of the present disclosure may be realized and obtained by the structures specifically indicated in the specification and its claims and the drawings.

[0008] To achieve these objectives and other advantages, and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a display device includes: a light emitting element including an anode to which driving power is input and a cathode to which low power is applied; a driving TFT including a first electrode to which high power is input, a second electrode to which driving power is applied, and a gate electrode; a switching unit configured to apply a first voltage for sensing a characteristic of the driving TFT or a second voltage for driving the driving TFT when a conduction level scanning signal is input; and an anode reset unit configured to apply an anode reset voltage to the anode of the light emitting element in association with the switching unit.

[0009] The switching unit may include: a first switching TFT, which is configured to apply a second voltage to a gate electrode of the driving TFT when a first scanning signal at a turn-on level is input; and a second switching TFT, which is configured to apply a first voltage to the gate electrode of the driving TFT when a second scanning signal at a turn-on level is input.

[0010] The anode reset unit may include: a first anode reset TFT, which is configured to apply a first anode reset voltage to the anode of the light-emitting element when a first scan signal at a conduction level is input; and a second anode reset TFT, which is configured to apply a second anode reset voltage to the anode of the light-emitting element when a second scan signal at a conduction level is input.

[0011] The switching unit may include a third switching TFT configured to apply the initialization voltage to the source electrode of the driving TFT when a third scan signal at a turn-on level is input.

[0012] The anode reset unit may include a third anode reset TFT configured to apply a third anode reset voltage to the anode of the light emitting element when a third scan signal at an on level is input.

[0013] The first anode reset voltage, the second anode reset voltage, and the third anode reset voltage may have the same magnitude.

[0014] The display device may further include a capacitor having a first capacitor electrode connected to a gate electrode of the driving TFT and a second capacitor electrode connected to a second electrode of the driving TFT.

[0015] In another aspect of the present disclosure, a display device includes: a light emitting element; a driving TFT including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node, and configured to apply a current to the second node according to a reference voltage applied to the third node during a sensing operation, control a high voltage applied to the first node according to a data voltage applied to the gate electrode, and apply a controlled high voltage to the second node during an emission operation; a first switching TFT including a gate electrode inputted with a first scan signal, a first electrode connected to a data line for applying a data voltage, and a second electrode connected to the third node; a second switching TFT including a gate electrode inputted with a second scan signal, a first electrode connected to a reference voltage line for applying a reference voltage, and a second electrode connected to a fourth node connected to the third node; a capacitor connected between the fourth node and the second node; a first anode reset TFT including a gate electrode inputted with a first scan signal, a first electrode connected to a power line applied with an anode reset voltage, and a second electrode connected to an anode of the light emitting element; and a second anode reset TFT including a gate electrode inputted with a second scan signal, a first electrode connected to a power line applied with an anode reset voltage, and a second electrode connected to the anode of the light emitting element.

[0016] The display device may further include: a third switching TFT, which includes a gate electrode input with a third scan signal, a first electrode connected to a power line to which an initialization voltage is applied, and a second electrode connected to a second node; and a third anode reset TFT, which includes a gate electrode input with a third scan signal, a first electrode connected to a power line to which an anode reset voltage is applied, and a second electrode connected to an anode of the light-emitting element.

[0017] The display device may also include: a first emission control TFT, which includes a gate electrode for inputting a first emission signal, a first electrode to which a high power is applied, and a second electrode connected to the first node; and a second emission control TFT, which includes a gate electrode for inputting a second emission signal, a first electrode connected to the second node, and a second electrode connected to an anode of the light-emitting element.

[0018] In another aspect of the present disclosure, a method for driving a display device includes a display panel including a plurality of sub-pixels having a light-emitting element, the method including: an initialization step of initializing a gate electrode and a source electrode of a driving TFT of each sub-pixel; a sensing step of sensing a threshold voltage of the driving TFT; a data writing step of writing a data voltage for driving the driving TFT; and an emission step of causing the sub-pixel to emit light according to the data voltage, wherein an anode of the light-emitting element is reset in at least one of the sensing step or the data writing step.

[0019] The method may further include resetting an anode of the light emitting element between the data writing step and the emitting step.

[0020] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The included drawings are used to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this application. The drawings illustrate (one or more) aspects of the present disclosure and together with the description are used to explain the principles of the present disclosure. In the drawings:

[0022] Figure 1 is a block diagram schematically illustrating a configuration of a display device according to an aspect of the present disclosure;

[0023] Figure 2 yes Figure 1 An equivalent circuit diagram of a sub-pixel included in a display device;

[0024] Figure 3 It is shown Figure 2 A diagram of a driving waveform of a sub-pixel;

[0025] Figure 4A , Figure 4B , Figure 4C is a graph describing the SAR overshoot of a display device;

[0026] Figure 5 is an equivalent circuit diagram of a sub-pixel included in a display device according to one aspect of the present disclosure;

[0027] Figure 6 It is shown Figure 5 A diagram showing a driving waveform of a sub-pixel and voltage changes at a gate node and a source node of a driving transistor;

[0028] Figure 7 It is shown Figure 5 FIG. 1 is a diagram showing the operation of the pixel circuit in an initial period Pi;

[0029] Figure 8 It is shown Figure 5 FIG. 1 is a diagram showing the operation of the pixel circuit in the sensing period Ps;

[0030] Fig. 9 It is shown Figure 5 FIG. 1 is a diagram showing the operation of the pixel circuit in the data writing period Pw;

[0031] Fig.10 It is shown Figure 5FIG. 1 is a diagram showing the operation of the pixel circuit in the OBS period Pobs;

[0032] Fig.11 It is shown Figure 5 FIG. 1 is a diagram showing the operation of the pixel circuit in the emission period Pe; and

[0033] Figures 12 to 15 is a diagram describing a result of simulating a display device according to an aspect of the present disclosure. DETAILED DESCRIPTION

[0034] The advantages and features of the present disclosure and the manner in which these advantages and features are obtained will become apparent with reference to the aspects described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the aspects disclosed below and may be implemented in many different forms. More specifically, these exemplary aspects are provided to make the present disclosure thorough and complete and to fully convey the scope to those skilled in the art.

[0035] The shapes, sizes, ratios, angles, quantities, etc. shown in the drawings for describing various aspects of the present disclosure are given only by way of example, and therefore, the present disclosure is not limited to the illustrations in the drawings. In the present disclosure, when the terms "including", "comprising", etc. are used, other elements may be added unless the term "only" is used. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well.

[0036] When interpreting components, unless explicitly described otherwise, the components are interpreted as including the error range.

[0037] When describing a positional relationship, for example, when using "on," "above," "below," "beside," etc. to describe the positional relationship between two components, unless the term "directly" or "closely" is used, one or more other components may be located between the two components.

[0038] When describing various aspects of the present disclosure, although terms such as "first" and "second" may be used to describe various elements, these terms are only used to distinguish identical or similar elements from each other. Therefore, in the present disclosure, unless otherwise specified, within the technical scope of the present disclosure, an element modified by "first" may be the same as an element modified by "second".

[0039] In addition, the pixel circuit of the display device described below may include a plurality of transistors. The transistor may be implemented as an oxide thin film transistor (TFT) including an oxide semiconductor, a low temperature polysilicon (LTPS) TFT including LTPS, etc. Each transistor may be implemented as a p-channel TFT or an n-channel TFT.

[0040] A transistor is a three-electrode device including a gate, a source, and a drain. The source is an electrode that supplies carriers to the transistor. In a transistor, carriers flow out from the source. The drain is an electrode from which carriers leave the transistor. In a transistor, carriers flow from the source to the drain. In the case of an n-channel transistor, the carriers are electrons, so the source voltage is lower than the drain voltage, so that electrons can flow from the source to the drain. In an n-channel transistor, current flows from the drain to the source. In the case of a p-channel transistor (PMOS), the carriers are holes, so the source voltage is higher than the drain voltage, so that holes can flow from the source to the drain. In a p-channel transistor, because holes flow from the source to the drain, current flows from the source to the drain. It should be noted that the source and drain of a transistor are not fixed. For example, the source and drain can be changed according to the applied voltage. Therefore, the present disclosure is not limited by the source and drain of a transistor. In the following description, the source and drain of a transistor will be referred to as a first electrode and a second electrode.

[0041] The gating signal swings between a gating on voltage and a gating off voltage. The gating on voltage is set to a voltage higher than the threshold voltage of the transistor, and the gating off voltage is set to a voltage lower than the threshold voltage of the transistor. The transistor is turned on in response to the gating on voltage, and is turned off in response to the gating off voltage. For n-channel transistors, the gating on voltage may be a gating high voltage VGH, and the gating off voltage may be a gating low voltage VGL. For p-channel transistors, the gating on voltage may be a gating low voltage VGL, and the gating off voltage may be a gating high voltage VGH.

[0042] Each pixel of the electroluminescent display device includes a light-emitting element and a driving element, which generates a pixel current according to the voltage between the gate and the source to drive the light-emitting element. The light-emitting element includes an anode, a cathode, and an organic compound layer formed between the anode and the cathode. The organic compound layer may include a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), etc., but is not limited thereto. When the pixel current flows through the light-emitting element, the holes that have passed through the hole transport layer (HTL) and the electrons that have passed through the electron transport layer (ETL) move to the light-emitting layer (EML) to form excitons, so that the light-emitting layer (EML) emits visible light.

[0043] Recently, there have been increasing attempts to implement some transistors included in pixel circuits of electroluminescent display devices as oxide transistors. For oxide transistors, oxides (i.e., IGZO, which is a compound of indium (In), gallium (Ga), zinc (Zn), and oxygen (O)) are used instead of polysilicon as semiconductor materials.

[0044] The electron mobility of oxide transistors is lower than that of low-temperature polysilicon (LTPS) transistors, but more than 10 times higher than that of amorphous silicon transistors. In addition, the manufacturing cost of oxide transistors is higher than that of amorphous silicon transistors, but much lower than that of low-temperature polysilicon transistors. In addition, the manufacturing process of oxide transistors is similar to that of amorphous silicon transistors, so existing facilities can be used, which is efficient. Specifically, since oxide transistors have low cut-off current, oxide transistors have the advantages of high driving stability and reliability during low-speed operation with a relatively long transistor cut-off period. Therefore, oxide transistors can be used in large liquid crystal displays that require high resolution and low power consumption operation, or in OLED TVs where the screen size cannot be achieved using low-temperature polysilicon processes.

[0045] Throughout the specification, the same reference numerals represent substantially the same elements. Hereinafter, various aspects of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, when it is determined that the detailed description of known functions or configurations related to the present disclosure may unnecessarily obscure the subject matter of the present disclosure, the detailed description will be omitted.

[0046] Figure 1 is a block diagram schematically illustrating a configuration of a light emitting display device according to an aspect of the present disclosure.

[0047] Reference Figure 1 , the light emitting display device may include an image provider 110 , a timing controller 120 , a scan driver 130 , a data driver 140 , a display panel 150 , and a power supply 180 .

[0048] The image provider 110 may output various driving signals in addition to an image data signal supplied from the outside or an image data signal stored in an internal memory. The image provider 110 may supply the timing controller 120 with a data signal and various driving signals.

[0049] The display panel 150 includes a plurality of data lines DL1 to DLn extending in a column direction (or a vertical direction), a plurality of gate lines GL1 to GLm extending in a row direction (or a horizontal direction) intersecting the data lines, and sub-pixels SP arranged in a matrix form at the intersection to form a pixel array. The sub-pixels SP arranged on the same pixel line operate simultaneously according to the scan signal and the emission signal EM applied from the same gate line GL. Each sub-pixel SP includes a light-emitting element and a pixel circuit controlling the amount of current applied to the anode of the light-emitting element. The pixel circuit may include a driving transistor that controls the amount of current so that a specific amount of current flows through the light-emitting element. The light-emitting element emits light during the emission period and does not emit light during the period other than the emission period. During the period other than the emission period, initialization, programming of the pixel circuit and reset of the light-emitting element may be performed.

[0050] The timing controller 120 may output a gate timing control signal GDC for controlling the operation timing of the scan driver 130, a data timing control signal DDC for controlling the operation timing of the data driver 140, and various synchronization signals (a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync). The timing controller 120 may supply the data signal DATA supplied from the image provider 110 together with the data timing control signal DDC to the data driver 140. The timing controller 120 may be formed in the form of an integrated circuit (IC) and mounted on a printed circuit board, but is not limited thereto.

[0051] The data driver 140 may sample and latch the data signal DATA in response to the data timing control signal DDC provided from the timing controller 120, convert the digital data signal into an analog data voltage based on the gamma reference voltage, and output the analog data voltage. The data driver 140 may supply the data voltage to the sub-pixels included in the display panel 150 through the data lines DL1 to DLn. The data driver 140 may take the form of an IC and be mounted on the display panel 150 or on a printed circuit board, but is not limited thereto.

[0052] The scan driver 130 may output a scan signal and an emission signal in response to a gate timing control signal GDC provided from the timing controller 120. The scan driver 130 may provide at least one scan signal and an emission signal to sub-pixels included in the display panel 150 through the gate lines GL1 to GLm. The scan driver 130 may take the form of an IC, or be directly formed on the display panel 150 in an in-panel gate structure.

[0053] The power supply 180 may convert the power supplied from the outside into the power required to drive the display device and output the converted power under the control of the timing controller 120. For example, the power supply 180 may convert the power supplied from the outside into the high voltage EVDD and the low voltage EVSS, output the voltages, and generate and output the voltages required to drive the scan driver 130 (for example, a gate voltage including a gate high voltage and a gate low voltage) or the voltages required to drive the data driver 140 (a drain voltage including a drain voltage and a half-drain voltage).

[0054] Figure 2 yes Figure 1 An equivalent circuit diagram of a sub-pixel included in a light-emitting display device of Figure 3 It is shown Figure 2 In the following description, a first electrode of a transistor may be one of a source electrode and a drain electrode, and a second electrode of the transistor may be the other of the source electrode and the drain electrode.

[0055] One subpixel SP may be supplied with a high voltage EVDD, a low voltage EVSS, a reference voltage Vref, a data voltage Vdata, an initialization voltage Vini, and an anode reset voltage Var, and may receive first to third scan signals SCAN1 to SCAN3 , first and second emission signals EM1 and EM2 .

[0056] One sub-pixel SP may include an organic light emitting diode (OLED), a driving TFT DT, a first capacitor C1, a second capacitor C2, a first emission control TFT ET1, a second emission control TFT ET2, and first to fourth switch TFTs T1 to T4. Each TFT of the sub-pixel SP may be configured as a p-type MOSFET PMOS or an n-type MOSFET NMOS, or may be configured by mixing a p-type MOSFET PMOS and an n-type MOSFET NMOS. A case where the sub-pixel SP according to aspects of the present disclosure is implemented as an n-type is described, but the present disclosure is not limited thereto.

[0057] The OLED emits light by the driving current supplied from the driving TFT DT. An anode of the OLED is connected to the fifth node N5, and a cathode of the OLED is connected to a line of an electric low voltage EVSS.

[0058] A gate electrode of the driving TFT DT is connected to the third node N3, a first electrode of the driving TFT DT is connected to the first node N1, and a second electrode of the driving TFT DT is connected to the second node N2. The driving TFT DT may generate a driving current in response to the data voltage Vdata.

[0059] The first emission control TFT ET1 and the second emission control TFT ET2 control light emission of the OLED. The first emission control TFT ET1 is turned on / off according to the first emission signal EM1 input to its gate electrode, and the second emission control TFT ET2 is turned on / off according to the second emission signal EM2 input to its gate electrode.

[0060] The first emission control TFT ET1 may have a first electrode to which the high voltage EVDD is applied and a second electrode connected to the first node N1. The first emission control TFT ET1 may be used to transfer the high voltage EVDD to the first electrode of the driving TFT DT in response to the first emission signal EM1.

[0061] The second emission control TFT ET2 may have a first electrode connected to the second node N2 and a second electrode connected to the fifth node N5. The second emission control TFT ET2 may be used to transmit a driving current to the fifth node N5 connected to the anode of the OLED in response to the second emission signal EM2.

[0062] The first switch TFT T1 applies the data voltage Vdata to the third node N3 connected to the gate electrode of the driving TFT DT. The first switch TFT T1 may include a gate electrode to which the first scan signal SCAN1 is input, a first electrode connected to a data line supplied with the data voltage Vdata, and a second electrode connected to the third node N3. The first switch TFT T1 may be implemented as an n-type oxide TFT. Therefore, the first switch TFT T1 applies the data voltage Vdata supplied from the data line to the third node N3 connected to the gate electrode of the driving TFT DT in response to the high-level first scan signal SCAN1 as a turn-on voltage.

[0063] The second switch TFT T2 applies the reference voltage Vref to the fourth node N4. The second switch TFT T2 may include a gate electrode to which the second scan signal SCAN2 is input, a first electrode connected to a reference voltage line providing a reference voltage VREF, and a second electrode connected to the fourth node N4. The second switch TFT T2 may be implemented as an n-type oxide TFT. Therefore, in response to the high-level second scan signal SCAN2 as a turn-on voltage, the second switch TFT T2 applies the reference voltage Vref supplied from the reference voltage line to the fourth node N4.

[0064] The third switch TFT T3 applies the initialization voltage Vini to the second node N2 connected to the source electrode of the driving TFT DT. The third switch TFT T3 may include a gate electrode input with the third scan signal SCAN3, a first electrode applied with the initialization voltage Vini, and a second electrode connected to the second node N2.

[0065] The fourth switch TFT T4 is turned on / off by the third scan signal SCAN3 together with the third switch TFT T3 to apply the anode reset voltage Var to the fifth node N5 connected to the anode of the OLED. The fourth switch TFT T4 may include a gate electrode to which the third scan signal SCAN3 is input, a first electrode to which the anode reset voltage Var is applied, and a second electrode connected to the fifth node N5.

[0066] The first capacitor C1 maintains the data voltage Vdata stored in the subpixel SP for one frame. One electrode of the first capacitor C1 is connected to the fourth node N4, and the other electrode is connected to the second node N2.

[0067] When the reference voltage Vref changes to the data voltage Vdata, the second capacitor C2 is used to improve the driving efficiency according to the driving current by reflecting the change of the source electrode of the driving TFT DT as much as the change of the gate electrode of the driving TFT DT. One electrode of the second capacitor C2 is connected to the high voltage EVDD, and the other electrode is connected to the second node N2.

[0068] Figure 3 It is shown Figure 2 FIG. 5 is a diagram of a driving waveform of a sub-pixel.

[0069] Will refer to Figure 2 and Figure 3 An operation of a sub-pixel SP of a light emitting display device according to an aspect of the present disclosure is described.

[0070] The driving period of the sub-pixel SP may include an initial period Initial, a sensing period Sensing, a data writing period Writing, an on-bias stress (OBS) period OBS, and an emission period Emission.

[0071] During the initial period Initial, the second scan signal SCAN2 and the third scan signal SCAN3 are applied as high signals at the on level, and the first emission signal EM1, the second emission signal EM2 and the first scan signal SCAN1 are applied as low signals at the off level. When the second scan signal SCAN2 is applied at the on level, the second switch TFT T2 is turned on. The second switch TFT T2 applies the reference voltage Vref supplied through the reference line to the fourth node N4 and the third node N3 in response to the second scan signal SCAN2 at the on level. Therefore, the reference voltage Vref is applied to the gate electrode of the driving TFT DT connected to the third node N3. When the third scan signal SCAN3 is applied at the on level, the third switch TFT T3 and the fourth switch TFT T4 are turned on. The third switch TFT T3 applies the initialization voltage Vini to the second node N2 in response to the third scan signal SCAN3 at the on level. Therefore, the initialization voltage Vini is applied to the source electrode of the driving TFT DT connected to the second node N2. The fourth switch TFT T4 applies the anode reset voltage Var to the fifth node N5 in response to the third scan signal SCAN3 at the on level. Therefore, the anode reset voltage Var is applied to the anode of the OLED connected to the fifth node N5. As described above, during the initialization period Initial, the reference voltage Vref is applied to the gate electrode of the driving TFT DT, the initialization voltage Vini is applied to the source electrode of the driving TFT DT, and the anode reset voltage Var is applied to the anode of the OLED.

[0072] During the sensing period Sensing, the first emission signal EM1 and the second scan signal SCAN2 are applied as high signals at the on level, and the second emission signal EM2, the first scan signal SCAN1 and the third scan signal SCAN3 are applied as low signals at the off level. When the first emission signal EM1 is applied at the on level, the first emission control TFT ET1 is turned on. The first emission control TFT ET1 applies the high voltage EVDD to the first node N1 in response to the first emission signal EM1 at the on level. Therefore, the high voltage EVDD is applied to the drain electrode of the driving TFT DT connected to the first node N1. The second switch TFT T2 applies the reference voltage Vref supplied through the reference line to the third node N3 connected to the gate electrode of the driving TFT DT in response to the second scan signal SCAN2 at the on level.

[0073] During the sensing period Sensing, a high voltage EVDD is applied to the drain electrode of the driving TFT DT, and a reference voltage Vref is applied to the gate electrode thereof, and therefore, a channel is formed between the drain electrode and the source electrode of the driving TFT DT due to the gate-source voltage Vgs of the driving TFT DT, and a current Ids flows. Due to the current Ids flowing from the drain electrode to the source electrode, the voltage of the second node N2 increases until the gate-source voltage Vgs of the driving TFT DT reaches the threshold voltage Vth. Thereafter, when both the first emission control TFT ET1 and the second switching TFT T2 are turned off, the threshold voltage Vth corresponding to the gate-source voltage Vgs of the driving TFT DT may be stored as a compensation voltage in the first capacitor C1 connected between the third node N3 and the second node N2. As described above, the threshold voltage Vth of the driving TFT DT may be sensed during the sensing period Sensing and sampled to the first capacitor C1.

[0074] During the data writing period Writing, the first scan signal SCAN1 is applied as an on-level high signal, and the first emission signal EM1, the second emission signal EM2, the second scan signal SCAN2, and the third scan signal SCAN3 are applied as off-level low signals. When the first scan signal SCAN1 is applied at an on-level, the first switch TFT T1 is turned on. The first switch TFT T1 applies the data voltage Vdata supplied through the data line to the third node N3 connected to the gate electrode of the driving TFT DT in response to the first scan signal SCAN1 at an on-level. When the data writing is completed and the first switch TFT T1 is turned off, the data voltage Vdata may be stored in the first capacitor C1 together with the compensation voltage of the threshold voltage Vth.

[0075] During the OBS period OBS, the third scan signal SCAN3 is applied as a turn-on level high signal, and the first emission signal EM1, the second emission signal EM2, the first scan signal SCAN1, and the second scan signal SCAN2 are applied as turn-off level low signals. When the third scan signal SCAN3 is applied at the turn-on level, the third switch TFT T3 and the fourth switch TFT T4 are turned on. The third switch TFT T3 applies the initialization voltage Vini to the second node N2 in response to the third scan signal SCAN3 at the turn-on level. The fourth switch TFT T4 applies the anode reset voltage Var to the fifth node N5 in response to the third scan signal SCAN3 at the turn-on level. Therefore, the anode reset voltage Var is applied to the anode of the OLED connected to the fifth node N5.

[0076] During the emission period Emission, the first emission signal EM1 and the second emission signal EM2 are applied as turn-on level high signals, and the first scan signal SCAN1, the second scan signal SCAN2, and the third scan signal SCAN3 are applied as turn-off level low signals. When the first emission signal EM1 is applied at the turn-on level, the first emission control TFT ET1 is turned on, and when the second emission signal EM2 is applied at the turn-on level, the second emission control TFT ET2 is turned on. When the first emission control TFT ET1 is turned on, the high voltage EVDD is applied to the first node N1, and when the second emission control TFT ET2 is turned on, a current path is formed between the second node N2 and the fifth node N5. Therefore, the driving current I generated by the drain electrode and the source electrode of the driving TFT DT according to the compensation voltage and the data voltage Vdata stored in the first capacitor C1 can be OLED is applied to the OLED, so that the OLED emits light.

[0077] As described above, the driving period of the subpixel SP includes the initial period Initial, the sensing period Sensing, the data writing period Writing, the OBS period OBS and the emission period Emission, and the compensation voltage and the data voltage Vdata can be written during the sensing period Sensing and the data writing period Writing, and then during the OBS period OBS, the anode of the OLED can be reset and the OLED can emit light.

[0078] Due to the difference between the image pattern displayed in the previous frame and the image pattern displayed in the current frame, the display device including the sub-pixel SP having this configuration has a voltage C charged in the OLED to be discharged. OLED There may be different discharge delays. For example, in the case where the image pattern changes from black to white (black→white) and in the case where the image pattern changes from white to white (white→white), the voltage C charged in the OLED OLED The discharge time of the OLED may be different. The difference in the discharge time of the OLED leads to the difference in the anode voltage of the OLED. The anode voltage of the OLED may affect the source electrode of the driving TFT DT during the sensing period Sensing, and affect the gate electrode of the driving TFT DT during the data writing period Writing. Therefore, due to the difference in the discharge time of the OLED caused by the image pattern, the SAR overshoot that causes the brightness increase of the first frame may occur when changing from black to white (black→white) instead of when changing from white to white (white→white).

[0079] FIG. 4A to FIG. 4C is a diagram illustrating the results of simulating the SAR of a display device.

[0080] Figure 4A is a graph showing the simulation result of the change of the anode voltage during each sensing period Sensing when the image pattern changes from black to white (black→white) and when the image pattern changes from white to white (white→white). During the sensing period Sensing (from SCAN2 On to SCAN2 Off), the second scan signal SCAN2 is applied at the on level, so the second switch TFT T2 applies the reference voltage Vref to the gate electrode of the driving TFT DT. During the sensing period Sensing, when the reference voltage Vref is applied to the gate electrode, the threshold voltage Vth of the driving TFT DT can be sensed based on the potential change in the source electrode of the driving TFT DT. Here, the source electrode of the driving TFT DT is coupled to the anode of the OLED.

[0081] Reference Figure 4A From the simulation graph in FIG. 1 , it can be determined that during the sensing period Sensing, the anode voltage when the image pattern changes from black to white (black→white) is lower than the anode voltage when the image pattern changes from white to white (white→white).

[0082] Figure 4B is a graph showing simulation results of changes in anode voltage during each data writing period Writing when an image pattern changes from black to white (black→white) and when an image pattern changes from white to white (white→white). During the data writing period Writing (from SCAN1 On to SCAN1 Off), the first scan signal SCAN1 is applied at an on level, and the data voltage Vdata is applied to the gate electrode of the driving TFT DT. Here, the gate electrode of the driving TFT DT is coupled to the anode of the OLED.

[0083] Reference Figure 4B From the simulation curve graph in , it can be determined that during the data writing period Writing, the anode voltage when the image pattern changes from black to white (black→white) is lower than the anode voltage when the image pattern changes from white to white (white→white).

[0084] As described above, when the image pattern changes from black to white (black→white), the anode voltage is low, so the gate-source voltage Vgs of the driving TFT DT may increase due to the difference between the connection between the anode and the source electrode during the sensing period and the connection between the anode and the gate electrode during the data writing period compared to the case of changing from white to white (white→white).

[0085] Figure 4Cis a graph showing simulation results of a change in the current value of the OLED over time when an image pattern changes from black to white (black→white).

[0086] Reference Figure 4C , it can be determined that when the image pattern changes from black to white (black→white), a SAR overshoot occurs which causes the brightness of the first frame to increase.

[0087] As described above, in order to prevent SAR overshoot from occurring due to a difference in discharge time of the OLED caused by a change in an image pattern, it is necessary to maintain the anode voltage of the OLED at a constant voltage.

[0088] Figure 5 is an equivalent circuit diagram of a sub-pixel included in a display device according to one aspect of the present disclosure. In the following description, a first electrode of a transistor may be one of a source electrode and a drain electrode, and a second electrode of the transistor may be the other of the source electrode and the drain electrode.

[0089] According to aspects of the present disclosure, a sub-pixel and Figure 2 The sub-pixel shown is different in that it includes an anode reset unit 200. The anode reset unit 200 can apply an anode reset voltage Var to a fifth node N5 connected to the anode of the OLED in response to each of the first scan signal SCAN1, the second scan signal SCAN2, and the third scan signal SCAN3 for driving the sub-pixel. In this way, in the sub-pixel according to aspects of the present disclosure, the anode reset voltage Var is applied to the anode during each driving period, and therefore, even if a discharge time difference of the OLED occurs according to a change in an image pattern, the anode voltage can be constantly maintained at the anode reset voltage Var.

[0090] A configuration of a sub-pixel including the anode reset unit 200 according to aspects of the present disclosure will be described in detail.

[0091] The subpixel SP according to aspects of the present disclosure may be provided with a high voltage EVDD, a low voltage EVSS, a reference voltage Vref, a data voltage Vdata, an initialization voltage Vini, and an anode reset voltage Var, and may receive first to third scan signals SCAN1 to SCAN3, a first emission signal EM1, and a second emission signal EM2.

[0092] One sub-pixel SP may include an organic light emitting diode (OLED), a driving TFT DT, a first capacitor C1, a second capacitor C2, a first emission control TFT ET1, a second emission control TFT ET2, first to third switch TFTs T1 to T3, and an anode reset unit 200. Each TFT of the sub-pixel SP may be configured as a p-type MOSFET (PMOS) or an n-type MOSFET (NMOS), or may be configured by mixing a p-type MOSFET (PMOS) and an n-type MOSFET (NMOS). A case where the sub-pixel SP according to aspects of the present disclosure is implemented as an n-type will be described, but the present disclosure is not limited thereto.

[0093] The OLED emits light by the driving current supplied from the driving TFT DT. An anode of the OLED is connected to the fifth node N5, and a cathode of the OLED is connected to a line supplying a low voltage EVSS.

[0094] A gate electrode of the driving TFT DT is connected to the third node N3, a first electrode of the driving TFT DT is connected to the first node N1, and a second electrode of the driving TFT DT is connected to the second node N2. The driving TFT DT may generate a driving current in response to the data voltage Vdata.

[0095] The first emission control TFT ET1 and the second emission control TFT ET2 control light emission of the OLED. The first emission control TFT ET1 is turned on / off according to the first emission signal EM1 input to its gate electrode, and the second emission control TFT ET2 is turned on / off according to the second emission signal EM2 input to its gate electrode.

[0096] The first emission control TFT ET1 may have a first electrode to which the high voltage EVDD is applied and a second electrode connected to the first node N1. The first emission control TFT ET1 may be used to transfer the high voltage EVDD to the first electrode of the driving TFT DT in response to the first emission signal EM1.

[0097] The second emission control TFT ET2 may have a first electrode connected to the second node N2 and a second electrode connected to the fifth node N5. The second emission control TFT ET2 may be used to transmit a driving current to the fifth node N5 connected to the anode of the OLED in response to the second emission signal EM2.

[0098] The first switch TFT T1 applies the data voltage Vdata to the third node N3 connected to the gate electrode of the driving TFT DT. The first switch TFT T1 may include a gate electrode to which the first scan signal SCAN1 is input, a first electrode connected to a data line supplied with the data voltage Vdata, and a second electrode connected to the third node N3. The first switch TFT T1 may be implemented as an n-type oxide TFT. Therefore, the first switch TFT T1 applies the data voltage Vdata supplied from the data line to the third node N3 connected to the gate electrode of the driving TFT DT in response to the high-level first scan signal SCAN1 as a turn-on voltage.

[0099] The second switch TFT T2 applies the reference voltage Vref to the fourth node N4. The second switch TFT T2 may include a gate electrode to which the second scan signal SCAN2 is input, a first electrode connected to a reference voltage line to which the reference voltage Vref is supplied, and a second electrode connected to the fourth node N4. The second switch TFT T2 may be implemented as an n-type oxide TFT. Therefore, the second switch TFT T2 applies the reference voltage Vref supplied from the reference voltage line to the fourth node N4 in response to the high-level second scan signal SCAN2 as a turn-on voltage.

[0100] The third switch TFT T3 applies the initialization voltage Vini to the second node N2 connected to the source electrode of the driving TFT DT. The third switch TFT T3 may include a gate electrode input with the third scan signal SCAN3, a first electrode applied with the initialization voltage Vini, and a second electrode connected to the second node N2.

[0101] The first capacitor C1 maintains the data voltage Vdata stored in the subpixel SP for one frame. One electrode of the first capacitor C1 is connected to the fourth node N4, and the other electrode is connected to the second node N2.

[0102] When the reference voltage Vref becomes the data voltage Vdata, the second capacitor C2 is used to improve the driving efficiency according to the driving current by reflecting the change of the source electrode of the driving TFT DT as much as the change of the gate electrode of the driving TFT DT. One electrode of the second capacitor C2 is connected to the high voltage EVDD, and the other electrode is connected to the second node N2.

[0103] The anode reset unit 200 may include first, second, and third anode reset switches AR_T1, AR_T2, and AR_T3 that apply an anode reset voltage Var to a fifth node N5 connected to the anode of the OLED in response to first, second, and third scan signals SCAN1, SCAN2, and SCAN3, respectively.

[0104] The first anode reset switch AR_T1 may include a gate electrode input with the first scan signal SCAN1, a first electrode connected to the anode reset voltage Var1, and a second electrode connected to the fifth node N5. The first anode reset switch AR_T1 may be turned on / off by receiving the first scan signal SCAN1 simultaneously with the first switch TFT T1.

[0105] The second anode reset switch AR_T2 may include a gate electrode input with the second scan signal SCAN2, a first electrode connected to the anode reset voltage Var2, and a second electrode connected to the fifth node N5. The second anode reset switch AR_T2 may be turned on / off by receiving the second scan signal SCAN2 simultaneously with the second switch TFT T2.

[0106] The third anode reset switch AR_T3 may include a gate electrode input with the third scan signal SCAN3, a first electrode connected to the anode reset voltage Var3, and a second electrode connected to the fifth node N5. The third anode reset switch AR_T3 may be turned on / off by receiving the third scan signal SCAN3 simultaneously with the third switch TFT T3.

[0107] As described above, the subpixel according to aspects of the present disclosure may include a first anode reset switch AR_T1, a second anode reset switch AR_T2, and a third anode reset switch AR_T3 capable of independently applying an anode reset voltage Var. Here, the anode reset switches AR_T1, AR_T2, and AR_T3 may be operated by receiving input first to third scan signals SCAN1 to SCAN3 to control the operation of the first to third switch TFTs T1 to T3. Therefore, although the subpixel includes a plurality of anode reset switches AR_T1, AR_T2, and AR_T3 for applying an anode reset voltage Var, the anode reset switches may be driven using only existing scan signals SCAN1 to SCAN3 without adding new scan signals.

[0108] Figure 6 It is shown Figure 5 , a diagram showing a driving waveform of a sub-pixel of a driving TFT DT, a voltage change at a third node N3 connected to the gate electrode of the driving TFT DT and a fifth node N5 connected to the source electrode of the driving TFT DT, and a waveform of an anode reset voltage Var. Figure 5 The driving waveforms of the first to third scanning signals SCAN1, SCAN2 and SCAN3 and the first emission signal EM1 and the second emission signal EM2 of the sub-pixel may be the same as Figure 3 shown Figure 2The driving waveform of the sub-pixel is basically the same. Although the sub-pixel according to aspects of the present disclosure includes a plurality of anode reset switches AR_T1, AR_T2, and AR_T3, it can be driven using existing scan signals SCAN1 to SCAN3 without adding new scan signals. In addition, by applying the existing driving waveform, the sub-pixel can apply the anode reset voltage Var to the anode during each driving period.

[0109] Reference Figure 6 , the driving period of the sub-pixel SP may include an initial period Pi, a sensing period Ps, a data writing period Pw, an OBS period Pobs, and an emission period Pe. Figure 7 shows the operation of the pixel circuit in the initial period Pi, Figure 8 shows the operation of the pixel circuit in the sensing period Ps, Fig. 9 shows the operation of the pixel circuit in the data writing period Pw, Fig.10 shows the operation of the pixel circuit in the OBS period Pobs, and Fig.11 The operation of the pixel circuit in the emission period Pe is shown. Figures 6 to 11 The operation of the pixel circuit in each driving period Pi, Ps, Pw, Pobs and Pe is described in detail.

[0110] Reference Figure 6 and Figure 7 , during the initial period Pi, the second scan signal SCAN2 and the third scan signal SCAN3 are applied as on-level high signals, and the first emission signal EM1, the second emission signal EM2 and the first scan signal SCAN1 are applied as off-level low signals.

[0111] When the second scan signal SCAN2 is applied at a turn-on level, the second switch TFT T2 and the second anode reset switch AR_T2 are turned on. The second switch TFT T2 applies the reference voltage Vref supplied through the reference line to the fourth node N4 and the third node N3 in response to the second scan signal SCAN2 at a turn-on level. Therefore, the reference voltage Vref is applied to the gate electrode of the driving TFT DT connected to the third node N3. The second anode reset switch AR_T2 applies the anode reset voltage Var2 to the fifth node N5 in response to the second scan signal SCAN2 at a turn-on level. Therefore, the anode reset voltage Var2 is applied to the anode of the OLED connected to the fifth node N5.

[0112] When the third scan signal SCAN3 is applied at a turn-on level, the third switch TFT T3 and the third anode reset switch AR_T3 are turned on. The third switch TFT T3 applies the initialization voltage Vini to the second node N2 in response to the third scan signal SCAN3 at the turn-on level. Therefore, the initialization voltage Vini is applied to the source electrode of the driving TFT DT connected to the second node N2. The third anode reset switch AR_T3 applies the anode reset voltage Var3 to the fifth node N5 in response to the third scan signal SCAN3 at the turn-on level. Therefore, the anode reset voltage Var3 is applied to the anode of the OLED connected to the fifth node N5.

[0113] As described above, during the initial period Pi, the reference voltage Vref is applied to the gate electrode of the driving TFT DT, the initialization voltage Vini is applied to the source electrode of the driving TFT DT, and the anode reset voltage Var3 is applied to the anode of the OLED.

[0114] Reference Figure 6 and Figure 8 During the sensing period Ps, the first emission signal EM1 and the second scan signal SCAN2 are applied as on-level high signals, and the second emission signal EM2, the first scan signal SCAN1, and the third scan signal SCAN3 are applied as off-level low signals. The threshold voltage Vth of the driving TFT DT may be sensed during the sensing period Ps, and the sensing period Ps may be set to about 100 μs.

[0115] When the first emission signal EM1 is applied at a turn-on level, the first emission control TFT ET1 is turned on. The first emission control TFT ET1 applies the high voltage EVDD to the first node N1 in response to the first emission signal EM1 at a turn-on level. Therefore, the high voltage EVDD is applied to the drain electrode of the driving TFT DT connected to the first node N1.

[0116] When the second scan signal SCAN2 is applied at a turn-on level, the second switch TFT T2 and the second anode reset switch AR_T2 are turned on.

[0117] The second anode reset switch AR_T2 applies the anode reset voltage Var2 to the fifth node N5 in response to the second scan signal SCAN2 at a turn-on level. Therefore, the anode reset voltage Var2 is applied to the anode of the OLED connected to the fifth node N5.

[0118] The second switch TFT T2 applies the reference voltage Vref provided through the reference line to the third node N3 connected to the gate electrode DTG of the driving TFT DT in response to the second scan signal SCAN2 at the on level. "Vref-Vini" is set to have a value greater than the threshold voltage Vth of the driving TFT DT. Since the high voltage EVDD is applied to the drain electrode of the driving TFT DT and the reference voltage Vref is applied to the gate electrode of the driving TFT DT, a channel is formed between the drain electrode and the source electrode according to the difference "Vref-Vini" corresponding to the gate-source voltage Vgs, and the current Ids flows. Since the drain-source current Ids flows according to the magnitude of the gate-source voltage Vgs in a state where the voltage of the gate electrode DTG is fixed to the reference voltage Vref, the voltage of the source electrode DTS of the driving TFT DT gradually increases, and when the gate-source voltage Vgs reaches the threshold voltage Vth, the current flow is blocked. At this time, the voltage difference between the gate electrode DTG and the source electrode DTS can be sensed as the threshold voltage Vth of the driving TFT DT.

[0119] In a state where the gate electrode DTG is fixed to the reference voltage Vref and the source electrode DTS is in a floating state, the above process of sensing the threshold voltage Vth is performed, so the source electrode DTS can be coupled to the voltage of the fifth node N5 connected to the anode of the OLED. Therefore, aspects of the present disclosure can block the coupling between the voltage of the anode of the OLED and the source electrode DTS of the driving TFT DT by performing the process of sensing the threshold voltage Vth when the voltage of the fifth node N5 is fixed to the anode reset voltage Var. As a result, the sensing and compensation accuracy of the threshold voltage Vth of the driving TFT DT can be improved.

[0120] Thereafter, when the first emission signal EM1 and the second scan signal SCAN2 are turned into the off-level low signal, the threshold voltage Vth of the driving TFT DT may be maintained by the first capacitor C1 connected between the third node N3 and the second node N2. That is, the threshold voltage Vth corresponding to the gate-source voltage Vgs of the driving TFT DT may be stored in the first capacitor C1 as a compensation voltage.

[0121] Reference Figure 6 and Fig. 9 During the data writing period Pw, the first scan signal SCAN1 is applied as an on-level high signal, and the first emission signal EM1, the second emission signal EM2, the second scan signal SCAN2, and the third scan signal SCAN3 are applied as off-level low signals. During the data writing period Pw, the data voltage Vdata may be written by reflecting the mobility compensation of the driving TFT DT.

[0122] When the first scan signal SCAN1 is applied at a turn-on level, the first switch TFT T1 and the first anode reset switch AR_T1 are turned on.

[0123] The first anode reset switch AR_T1 applies the anode reset voltage Var1 to the fifth node N5 in response to the first scan signal SCAN1 at a turn-on level. Therefore, the anode reset voltage Var1 is applied to the anode of the OLED connected to the fifth node N5.

[0124] The first switch TFT T1 applies the data voltage Vdata supplied through the data line to the third node N3 connected to the gate electrode DTG of the driving TFT DT in response to the first scan signal SCAN1 at a turn-on level. The voltage of the gate electrode DTG rises from the reference voltage Vref by the data voltage Vdata, and a current Ids corresponding to the data voltage Vdata flows through the driving TFT DT. At this time, the magnitude of the flowing current Ids is proportional to the mobility of the driving TFT DT, and when the mobility is low, a relatively small amount of charge is charged into the first capacitor C1, and when the mobility is high, a relatively large amount of charge is charged into the first capacitor C1. Thereafter, the amount of current applied to the OLED is determined by the voltage charged in the first capacitor C1 during emission, so that compensation of the mobility of the driving TFT DT can be performed.

[0125] The above-mentioned process of writing the data voltage Vdata and compensating the mobility can be performed by fixing the voltage of the gate electrode DTG to the data voltage Vdata. However, the voltage of the gate electrode DTG can be coupled with the voltage of the fifth node N5 to which the anode of the OLED is connected. Therefore, aspects of the present disclosure can block the coupling between the voltage of the anode of the OLED and the voltage of the gate electrode DTG of the driving TFTDT by performing the process of writing the data voltage Vdata and compensating the mobility when the voltage of the fifth node N5 is fixed to the anode reset voltage Var. As a result, the accuracy of data voltage writing and mobility compensation can be improved.

[0126] Thereafter, the first scan signal SCAN1 turns into an off-level low signal and the gate-source voltage Vgs may be maintained by the first capacitor C1 connected between the third node N3 and the second node N2. That is, the data voltage having the compensated threshold voltage Vth and mobility may be stored in the first capacitor C1.

[0127] Reference Figure 6 and Fig.10 During the OBS period Pobs, the third scan signal SCAN3 is applied as an on-level high signal, and the first emission signal EM1, the second emission signal EM2, the first scan signal SCAN1 and the second scan signal SCAN2 are applied as off-level low signals.

[0128] When the third scan signal SCAN3 is applied at a turn-on level, the third switch TFT T3 and the third anode reset switch AR_T3 are turned on.

[0129] The third anode reset switch AR_T3 applies the anode reset voltage Var3 to the fifth node N5 in response to the third scan signal SCAN3 at the on level. Therefore, the anode reset voltage Var3 is applied to the anode of the OLED connected to the fifth node N5.

[0130] The third switch TFT T3 applies the initialization voltage Vini to the second node N2 in response to the third scan signal SCAN3 at the on level. Therefore, the voltage of the source electrode DTS of the driving TFT DT drops to the initialization voltage Vini, and the voltage of the gate electrode DTG also drops by the same amount as the voltage drop of the source electrode DTS.

[0131] Reference Figure 6 and Fig.11 During the emission period Pe, the first emission signal EM1 and the second emission signal EM2 are applied as on-level high signals, and the first scan signal SCAN1, the scan signal SCAN2, and the third scan signal SCAN3 are applied as off-level low signals.

[0132] When the first emission signal EM1 is applied at a turn-on level, the first emission control TFT ET1 is turned on, and when the second emission signal EM2 is applied at a turn-on level, the second emission control TFT ET2 is turned on. When the first emission control TFT ET1 is turned on, the high voltage EVDD is applied to the first node N1, and when the second emission control TFT ET2 is turned on, a current path is formed between the second node N2 and the fifth node N5. Therefore, according to the compensation voltage stored in the first capacitor C1 and the data voltage Vdata, the driving current I generated through the drain electrode and the source electrode of the driving TFT DT can be OLED is applied to the OLED, so that the OLED emits light.

[0133] As described above, according to the comparative example (reference Figure 2 ) performs anode reset only during the initial period Pi and the OBS period Pobs in the pixel driving period, and according to the present invention (refer to Figure 5 ) can perform anode reset during the initial period Pi, the sensing period Ps, the data writing period Pw and the OBS period Pobs.

[0134] Figure 12 to Figure 14 is a diagram describing a result of simulating a specific absorption ratio (SAR) of a display device according to an aspect of the present disclosure.

[0135] Fig.12 : is a graph showing simulation results of changes in the anode voltage in the sensing period Ps in a case where the image pattern changes from black to white (black→white) and in a case where the image pattern changes from white to white (white→white).

[0136] During the sensing period Ps (from SCAN2 On to SCAN2 Off), the second scan signal SCAN2 is applied at a turn-on level, so that the second switch TFT T2 and the second anode reset switch AR_T2 are turned on.

[0137] The second switch TFT T2 applies the reference voltage Vref to the gate electrode of the driving TFT DT in response to the second scan signal SCAN2 at a turn-on level. During the sensing period Ps, when the reference voltage Vref is applied to the gate electrode, the threshold voltage Vth of the driving TFT DT can be sensed based on the gate-source voltage Vgs of the driving TFT DT.

[0138] The second anode reset switch AR_T2 applies the anode reset voltage Var2 to the fifth node N5 in response to the second scan signal SCAN2 at a turn-on level. Therefore, the anode reset voltage Var2 is applied to the anode of the OLED connected to the fifth node N5.

[0139] Therefore, the coupling between the anode electrode and the source electrode DTS of the driving TFT DT, which may occur during the sensing period Ps, is blocked.

[0140] Results, such as Fig.12 As shown, no matter how the image pattern changes, the anode of the OLED can be maintained at the anode reset voltage Var.

[0141] Fig.13 : is a graph showing simulation results of changes in the anode voltage in the data writing period Pw in the case where the image pattern changes from black to white (black→white) and in the case where the image pattern changes from white to white (white→white).

[0142] During the data writing period Pw (from SCAN1 On to SCAN1 Off), the first scan signal SCAN1 is applied at a turn-on level, thereby turning on the first switch TFT T1 and the first anode reset switch AR_T1.

[0143] The first switch TFT T1 applies the data voltage Vdata to the gate electrode of the driving TFT DT in response to the first scan signal SCAN1 at a turn-on level. In the data writing period Pw, when the data voltage Vdata is applied to the gate electrode, the data voltage Vdata having compensated mobility may be written based on the gate-source voltage Vgs of the driving TFT DT.

[0144] The first anode reset switch AR_T1 applies the anode reset voltage Var1 to the fifth node N5 in response to the first scan signal SCAN1 at a turn-on level. Therefore, the anode reset voltage Var1 is applied to the anode of the OLED connected to the fifth node N5.

[0145] Therefore, the coupling between the anode electrode of the OLED and the gate electrode DTG of the driving TFT DT, which may occur during the data writing period Pw, is blocked.

[0146] Results, such as Fig.13 As shown, no matter how the image pattern changes, the anode of the OLED can be maintained at the anode reset voltage Var.

[0147] As described above, the anode reset voltage Var may be applied to the anode of the OLED during the sensing period Ps and the data writing period Pw to block the coupling between the anode of the OLED and the gate electrode or the source electrode of the driving TFT DT.

[0148] Fig.14 is a graph showing simulation results of a change in the current value of the OLED over time when an image pattern changes from black to white (black→white).

[0149] According to aspects of the present disclosure, an anode reset voltage Var may be applied to the anode of the OLED during the sensing period Ps and the data writing period Pw to block the coupling between the anode of the OLED and the gate electrode or the source electrode of the driving TFT DT.

[0150] Results, such as Fig.14 As shown, it can be confirmed that even when the image pattern changes from black to white (black→white), SAR overshoot that causes the brightness of the first frame to increase does not occur.

[0151] Fig.15 : is a graph showing simulation results according to SAR variation of capacitance between the source electrode DTS of the driving TFT DT and the anode of the OLED and according to SAR variation of capacitance between the gate electrode DTG of the driving TFT DT and the anode of the OLED.

[0152] like Fig.15 As shown in the curve graph, according to the improved structure, it can be determined that no matter how the capacitance between the source electrode DTS of the driving TFT DT and the anode of the OLED and the capacitance between the gate electrode DTG of the driving TFT DT and the anode of the OLED change, SAR overshoot can be prevented.

[0153] The subpixel according to this aspect of the present disclosure includes first, second, and third anode reset switches AR_T1, AR_T2, and AR_T3, which can independently apply an anode reset voltage Var, so that the anode reset voltage Var can be applied in each driving period of the subpixel.

[0154] Here, the anode reset switches AR_T1, AR_T2, and AR_T3 may be operated by receiving first to third scan signals SCAN1 to SCAN3 input to control the operation of the first to third switch TFTs T1 to T3. Therefore, although the sub-pixel includes a plurality of anode reset switches AR_T1, AR_T2, and AR_T3 in order to apply the anode reset voltage Var, the anode reset switches may be driven using existing scan signals SCAN1 to SCAN3 without adding new scan signals, and the sub-pixel may apply the anode reset voltage Var to the anode of the OLED during each driving period by applying an existing driving waveform.

[0155] In addition, the subpixel according to this aspect of the present disclosure performs anode reset in all periods of the initial period Pi, the sensing period Ps, the data writing period Pw, and the OBS period Pobs, so that the anode of the OLED can be maintained at the anode reset voltage Var regardless of how the image pattern changes. Therefore, the coupling between the anode of the OLED and the electrode of the driving TFT DT that may occur during each driving period can be blocked, and SAR overshoot caused by changes in the image pattern can be prevented.

[0156] Aspects of the present disclosure have the following effects.

[0157] Aspects of the present disclosure may provide a display device including a pixel driving circuit for precise grayscale expression and a method of driving the display device.

[0158] Aspects of the present disclosure can reduce SAR overshoot that causes the brightness of the first frame to increase when an image pattern changes from black to white compared to a change from white to white.

[0159] Aspects of the present disclosure can perform anode reset in multiple sub-pixel driving stages with a simple circuit configuration and a small design area.

[0160] The effects according to the present disclosure are not limited to the above-mentioned effects, and various other effects fall within the scope of the present disclosure.

[0161] Although aspects of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to these aspects, and various modifications may be made without departing from the technical spirit of the present disclosure. Therefore, the aspects disclosed in the present disclosure are not intended to limit the technical concept of the present disclosure, but to illustrate the technical concept, and the scope of the technical concept of the present disclosure is not limited by these aspects. Therefore, the above aspects should be understood as illustrative and not restrictive in all aspects. The scope of the present disclosure should be interpreted according to the claims, and all technical concepts within the equivalent scope should be interpreted as falling within the scope of the present disclosure.

[0162] CROSS-REFERENCE TO RELATED APPLICATIONS

[0163] This application claims the benefit of Korean Patent Application No. 10-2023-0157193, filed on November 14, 2023, which is incorporated herein by reference as if fully set forth herein.

Claims

1. A display device, comprising: a light emitting element including an anode to which driving power is input and a cathode to which low power is applied; A driving thin film transistor TFT, wherein the driving TFT includes a first electrode to which high power is input, a second electrode to which the driving power is applied, and a gate electrode; a switching unit configured to apply a first voltage for sensing a characteristic of the driving TFT or a second voltage for driving the driving TFT when a conduction level scanning signal is input; as well as an anode reset unit configured to apply an anode reset voltage to the anode of the light emitting element in association with the switching unit.

2. The display device according to claim 1, wherein: The switch unit comprises: a first switching TFT configured to apply the second voltage to the gate electrode of the driving TFT when a first scan signal at an on level is input; and a second switching TFT configured to apply the first voltage to the gate electrode of the driving TFT when a second scan signal at the on-level is input.

3. The display device according to claim 2, wherein: The anode reset unit comprises: a first anode reset TFT configured to apply a first anode reset voltage to the anode of the light emitting element when the first scan signal at the on-level is input; and a second anode reset TFT configured to apply a second anode reset voltage to the anode of the light emitting element when the second scan signal at the on-level is input.

4. The display device according to claim 3, wherein: The switching unit includes a third switching TFT configured to apply an initialization voltage to a source electrode of the driving TFT when a third scan signal at the on-level is input.

5. The display device according to claim 4, wherein: The anode reset unit includes a third anode reset TFT configured to apply a third anode reset voltage to the anode of the light emitting element when the third scan signal at the on-level is input.

6. The display device according to claim 5, wherein: The first anode reset voltage, the second anode reset voltage, and the third anode reset voltage have the same magnitude. 7 . The display device according to claim 1 , further comprising a capacitor having a first capacitor electrode connected to the gate electrode of the driving TFT and a second capacitor electrode connected to the second electrode of the driving TFT.

8. A display device, comprising: Light emitting element; a driving thin film transistor TFT, the driving TFT including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node, and configured to apply a current to the second node according to a reference voltage applied to the third node during a sensing operation, control a high voltage applied to the first node according to a data voltage applied to the gate electrode, and apply the controlled high voltage to the second node during an emission operation; a first switch TFT including a gate electrode input with a first scan signal, a first electrode connected to a data line for applying the data voltage, and a second electrode connected to the third node; a second switching TFT including a gate electrode input with a second scanning signal, a first electrode connected to a reference voltage line for applying the reference voltage, and a second electrode connected to a fourth node connected to the third node; a capacitor connected between the fourth node and the second node; a first anode reset TFT including a gate electrode to which the first scan signal is input, a first electrode connected to a power line to which an anode reset voltage is applied, and a second electrode connected to an anode of the light emitting element; as well as The second anode reset TFT includes a gate electrode to which the second scan signal is input, a first electrode connected to a power line to which the anode reset voltage is applied, and a second electrode connected to the anode of the light emitting element.

9. The display device according to claim 8, further comprising: a third switch TFT including a gate electrode input with a third scan signal, a first electrode connected to a power line to which an initialization voltage is applied, and a second electrode connected to the second node; as well as A third anode reset TFT includes a gate electrode to which the third scan signal is input, a first electrode connected to a power line to which the anode reset voltage is applied, and a second electrode connected to the anode of the light emitting element.

10. The display device according to claim 8, further comprising: a first emission control TFT including a gate electrode for inputting a first emission signal, a first electrode to which high power is applied, and a second electrode connected to the first node; as well as A second emission control TFT includes a gate electrode for inputting a second emission signal, a first electrode connected to the second node, and a second electrode connected to the anode of the light emitting element.

11. A method for driving a display device, the display device comprising a display panel, the display panel comprising a plurality of sub-pixels having light-emitting elements, the method comprising: An initialization step, wherein the initialization step initializes a gate electrode and a source electrode of a driving thin film transistor TFT of each sub-pixel; a sensing step of sensing a threshold voltage of the driving TFT; a data writing step, wherein the data writing step writes a data voltage for driving the driving TFT; as well as an emission step, wherein the emission step causes the sub-pixel to emit light according to the data voltage, The anode of the light emitting element is reset in at least one of the sensing step or the data writing step.

12. The method according to claim 11, further comprising: The anode of the light emitting element is reset between the data writing step and the emission step.

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