Carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters
By conducting serial communication between multiple inverters, carrier synchronization control is achieved, the voltage difference and circulation problems between inverters are solved, the system stability and power distribution balance are improved, and system costs are reduced.
Patent Information
- Application Number
- CN202510160689.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-13
- Publication Date
- 2025-05-16
AI Technical Summary
When multiple off-grid inverters are connected in parallel, the lack of carrier synchronization function leads to inconsistent voltage instantaneous values between the inverters, forming a voltage difference, increasing the output current circulation, creating unbalanced success rate distribution, and introducing high-frequency harmonics or subharmonics to reduce system efficiency and reliability.
Through serial communication between the host inverter and the slave inverter, carrier synchronization control is realized, circulation is reduced, system stability and power distribution accuracy are improved. Specific steps include carrier initialization, host sending synchronization signals, slave captures phase information, calculates phase errors, adjusts carrier periods, and continuously cyclical correction.
It realizes high-precision carrier synchronization, reduces circulation between inverters, improves system stability and power distribution balance, reduces system costs, and supports large-scale inverters parallel connection.
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Figure CN120016687A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to power electronics technology and new energy storage systems, specifically to an improvement in the carrier synchronization method for parallel power generation of energy storage inverters. Background Technology
[0002] With the widespread application of off-grid inverters, flexible capacity expansion has become a key characteristic to enhance their adaptability to various application environments. If off-grid inverters lack carrier synchronization when connected in parallel, the inconsistency in the starting phase of the pulse width modulation (PWM) signals output by each inverter will lead to misalignment. This misalignment causes inconsistencies in the instantaneous voltage values between inverters, resulting in voltage differences. The existence of these voltage differences will increase the circulating current in the output and cause an imbalance in power distribution among the inverters. Furthermore, the overlap of different carriers may introduce high-frequency harmonics or subharmonics, leading to an increase in the harmonic content of the output voltage and causing various problems. These problems not only reduce system efficiency and performance but also negatively impact equipment reliability and lifespan, and may even threaten the stability of the entire system. Therefore, achieving high-precision carrier synchronization is crucial when designing multi-inverter systems in parallel.
[0003] When multiple off-grid inverters are connected in parallel, the carrier phases of their respective PWM signals are inconsistent, resulting in different instantaneous output voltage values and creating a voltage difference. Carrier misalignment causes current circulation between the inverters, affecting system stability and power distribution balance. Overlapping carriers introduce higher and lower harmonics, increasing the harmonic content of the output voltage, reducing system efficiency, and potentially affecting equipment lifespan. Traditional synchronous solutions typically require additional synchronization interfaces and dedicated hardware resources, increasing system cost and complexity. Summary of the Invention
[0004] The purpose of this invention is to address the shortcomings and deficiencies of existing technologies by providing a carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters. This method does not require an additional synchronization interface but is based on the existing serial communication protocol, thus simplifying the consumption of hardware and software resources and effectively solving the circulating current problem between multiple inverters.
[0005] To achieve the above objectives, the present invention adopts the following technical solution: a carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters. This method achieves synchronous control of the carrier waves of multiple energy storage inverters through serial communication between the master inverter A1 and at least one slave inverter A2, A3…, thereby reducing circulating current and improving system stability and power distribution accuracy. The method includes the following steps:
[0006] (1) Carrier initialization: When the system is powered on or reset, each inverter sets the same carrier frequency and initializes the serial communication interface. The master inverter A1 acts as the sender of the synchronization signal, and the slave inverters A2, A3... act as the receivers of the synchronization signal.
[0007] (2) The host sends a synchronization signal: During the power frequency cycle, the host inverter A1 sends a frame of serial port information 1, which contains the pre-synchronization signal identifier of the host inverter.
[0008] (3) Slave receives and prepares for synchronization: After the slave inverters A2, A3... receive serial port information 1, they start the capture function of the central processing unit (CPU) to prepare for subsequent capture of the synchronization signal;
[0009] (4) Host broadcast synchronization signal: During the power frequency cycle, the host inverter A1 sends a frame of serial port information 2, which serves as a synchronization signal and is broadcast by the host to all slave devices.
[0010] (5) Slave phase information capture: When slave inverters A2, A3... receive serial port information 2, they record their own carrier phase value PHASE2;
[0011] (6) The host inverter A1 sends a frame of serial port information 3 immediately after sending serial port information 2. This information contains the carrier phase value PHASE1 recorded by the host inverter when sending the synchronization signal.
[0012] (7) Slave inverters calculate phase error: After receiving serial port information 3, slave inverters A2, A3... extract the phase reference value PHASE1 of the master inverter and calculate the phase error PHASEerro = PHASE1PHASE2.
[0013] (8) Slave adjusts carrier period:
[0014] If PHASEerro > 0, it indicates that the slave carrier phase lags behind the master, and a carrier period reduction operation is performed to increase the carrier frequency;
[0015] If PHASEerro < 0, it indicates that the slave carrier phase is ahead of the master, and the operation of increasing the carrier period is performed to reduce the carrier frequency;
[0016] Each adjustment step is fixed at one carrier cycle count unit to avoid drastic changes that could cause system instability.
[0017] (9) Continuous Cyclic Correction: The above steps are continuously and cyclically executed to maintain carrier synchronization of multiple inverters and improve the reliability of the parallel power generation system.
[0018] The serial communication interface uses UART, RS485, CAN or SPI bus for data transmission and has an anti-interference verification mechanism to improve communication reliability.
[0019] The minimum step size for adjusting the carrier cycle of slave inverters A2, A3... is set to one PWM cycle to ensure the accuracy of synchronous adjustment and system stability.
[0020] When the system is powered on or reset, the carrier frequency of each inverter is preset to the same value (e.g., 16kHz, 32kHz) to avoid synchronization failure due to different initial states.
[0021] During the synchronization process, in order to prevent communication loss from causing carrier desynchronization, each frame of serial communication information contains a frame check code to verify data integrity and avoid synchronization errors caused by noise interference.
[0022] The synchronization signal between the master and slave devices is triggered synchronously using the power frequency cycle to ensure that carrier adjustment does not affect the modulation signal of the PWM output.
[0023] After the phase error is calculated, if the phase adjustment range of slave inverters A2, A3, etc. exceeds the set threshold (e.g., ±5°), the gradual adjustment mode will be activated to gradually reduce the phase error and avoid grid oscillation caused by sudden adjustment.
[0024] This method is applicable to single-phase energy storage inverters and can also be extended to three-phase inverter systems. By synchronously adjusting the phase of the three-phase carriers to maintain a 120° phase difference, it supports three-phase parallel power generation.
[0025] This method is applicable to application scenarios such as distributed microgrids, off-grid inverter systems, and energy storage power stations, improving the stability and grid connection efficiency of inverters operating in parallel.
[0026] The working principle of this invention is as follows: At the beginning of a power frequency cycle, the host sends a frame of serial communication information 1, which includes a synchronization start flag and some application information. Subsequently, after receiving this serial communication information, the slave device must perform synchronization preparation and initialize the capture (CAP) function of the central processing unit (CPU). Within one power frequency cycle, after sending a frame of serial communication information 1 (synchronization start frame), the host must then perform synchronization preparation and initialize the capture (CAP) function of the CPU. After sending the first frame of serial communication information 1 (synchronization start frame), the host sends a second frame of serial communication information (synchronization frame 2). At this time, the host uses the CPU's CAP capture function to capture its own carrier phase PHASE1 when sending the synchronization frame. The slave device uses the CPU's CAP capture function to capture its own carrier phase PHASE2 when the host sends the synchronization frame. After sending the second frame of serial communication information 2 (synchronization frame), the host sends a third frame of serial communication information, which includes the host's phase value PHASE1. After receiving serial communication information 3, the slave device parses the master phase value PHASE1 and subtracts its own phase value PHASE2 from the master phase value PHASE1, denoted as PHASEerro. The slave device adjusts its carrier period value based on PHASEerro. When PHASEerro is greater than zero, it indicates that the slave's carrier phase lags behind the master inverter, requiring an increase in the slave inverter's carrier frequency (i.e., a shorter carrier period). When PHASEerro is less than zero, it indicates that the slave inverter's carrier phase leads the master inverter, requiring a decrease in the slave inverter's carrier frequency (i.e., a longer carrier period). The slave device adjusts its carrier period in steps of one carrier period count; that is, it can only adjust one carrier period count per carrier period.
[0027] By adopting the above technical solution, the present invention achieves the following technical effects by transmitting carrier phase information and performing dynamic phase adjustment through a master-slave mode and relying on serial communication:
[0028] (1) High-precision carrier synchronization;
[0029] Through master-slave serial communication, the carrier phase is adjusted once every 20ms power frequency cycle to ensure that the PWM carrier phase error of all inverters is less than 1°, which is more than 5 times more accurate than the traditional synchronization method.
[0030] By adopting a step-by-step adjustment (0.5μs level), the phase error can be gradually reduced, ensuring smooth adjustment and not affecting the normal operation of the inverter.
[0031] (2) Reduce circulating flow and improve system efficiency;
[0032] Traditional methods can cause circulating currents of more than 3A due to carrier phase shift and voltage differences between inverters. This method can reduce the circulating current to below 0.2A.
[0033] It reduces internal power loss and improves system efficiency by 2-5%, making it suitable for high-efficiency energy storage grid-connected systems.
[0034] (3) Improve the stability of parallel systems;
[0035] When inverters are connected in parallel, if the carrier waves are not synchronized, it may cause harmonic accumulation and voltage instability, leading to the collapse of the entire microgrid.
[0036] This method employs a master-slave dynamic adjustment strategy, which can maintain synchronization even when the power grid is unstable, thereby improving system stability.
[0037] (4) Reduce system costs;
[0038] Traditional synchronization methods rely on external synchronization lines (such as synchronization signal lines or GPS time synchronization), which increases hardware costs and the signal is prone to attenuation in **long-distance applications (>10m)**.
[0039] This invention uses only existing serial communication interfaces (UART, RS485), eliminating the need for additional synchronization lines, thus significantly reducing system hardware costs and installation complexity.
[0040] (5) Compatible with multiple machines in parallel;
[0041] This method supports N inverters connected in parallel and is applicable to large-scale distributed systems such as microgrids, UPS, and electric vehicle energy storage.
[0042] In the experiment, up to 10 energy storage inverters can be connected in parallel and carrier synchronization can still be maintained. Compared with the traditional method's limitation of 3-4 units, the system has stronger scalability. Attached Figure Description
[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0044] Figure 1 This is a schematic diagram of the method steps in this invention. Detailed Implementation
[0045] See Figure 1 As shown, the technical solution adopted in this specific embodiment is:
[0046] Carrier synchronization process of two single-phase energy storage inverters: This embodiment takes two single-phase energy storage inverters A1 (master) and A2 (slave) connected in parallel to generate electricity as an example, and describes in detail how to achieve carrier synchronization through serial communication signals.
[0047] Hardware configuration:
[0048] Main inverter A1: Rated power: 5kW; PWM carrier frequency: 16kHz; Processor: DSPTMS320F28335; Communication interface: UART (115200bps);
[0049] Slave Inverter A2: Rated power: 5kW; PWM carrier frequency: 16kHz; Processor: DSPTMS320F28335; Communication interface: UART (115200bps);
[0050] Other equipment, load: resistive load 10kW; oscilloscope (for measuring carrier phase); RS485 conversion module (for master-slave communication).
[0051] Carrier synchronization process:
[0052] In this embodiment, the master unit A1 is responsible for sending the synchronization signal, and the slave unit A2 adjusts its own carrier period through serial communication to maintain PWM waveform synchronization. The specific process is as follows:
[0053] (1) System initialization;
[0054] Power on A1 and A2 and set the same carrier frequency of 16kHz (initial synchronization).
[0055] Set A1 to master mode and A2 to slave mode.
[0056] Serial communication interface initialization:
[0057] The UART baud rate is set to 115200bps, and the data format is 8N1 (8-bit data, no parity, 1 stop bit).
[0058] A1 serves as the master communication station, and A2 serves as the slave communication station.
[0059] Enable DMA (Direct Memory Access) to improve communication efficiency.
[0060] (2) The host sends a synchronization signal;
[0061] Within the power frequency cycle (50Hz corresponds to 20ms):
[0062] A1 sends serial communication information 1 (synchronization identifier).
[0063] Data format:
[0064] 0xAA (frame header) + 0x01 (command identifier) + 0xXX (checksum)
[0065] After receiving the frame data, A2 enters the synchronization preparation mode.
[0066] A1 sends serial communication information 2 (carrier phase synchronization signal).
[0067] A1 captures its own carrier phase PHASE1 at the carrier initiation point:
[0068] 0xAA (frame header) + 0x02 (command identifier) + PHASE1 (16-bit data) + 0xXX (checksum)
[0069] When A2 receives information 2, it records its own carrier phase PHASE2.
[0070] A1 sends serial communication information 3 (host phase value).
[0071] A1 records the time when message 2 was sent and sends it at the next moment:
[0072] 0xAA (frame header) + 0x03 (command identifier) + PHASE1 (16-bit data) + 0xXX (checksum)
[0073] A2 analyzes PHASE1 and calculates the phase error: PHASEerro = PHASE1 - PHASE2 PHASEerro = PHASE1 - PHASE2
[0074] (3) The slave device adjusts the carrier period;
[0075] If PHASEerro > 0 (A2 carrier lag), A2 reduces the carrier period, that is:
[0076] Carrier period T = 1 / f
[0077] Assuming a carrier period of 62.5 μs (16 kHz), adjust as follows:
[0078] T′=T-ΔTT'=T-\DeltaT (shortening the period)
[0079] Set the adjustment step size ΔT = 0.5 μs (to ensure smooth adjustment).
[0080] If PHASEerro < 0 (A2 carrier leads), A2 increases the carrier period, that is:
[0081] Given a carrier period of 62.5 μs, adjust as follows:
[0082] T′=T+ΔTT'=T+\DeltaT (extended period)
[0083] Adjustment rules:
[0084] Each adjustment step is equal to one carrier cycle count unit (approximately 0.5 μs).
[0085] Maximum adjustment range of carrier period: ±5% (i.e., 62.5μs ± 3.125μs).
[0086] If the error persists after three adjustments, then enter "fine-tuning mode":
[0087] Adjust the step size by half (0.25μs).
[0088] Continue synchronizing until PHASEerro < 1°.
[0089] Carrier synchronization effect analysis
[0090] The experiment used an oscilloscope to observe the PWM carrier signals of A1 and A2, and compared the phase difference before and after adjustment:
[0091]
[0092] After carrier synchronization, the PWM waveforms of A1 and A2 are basically in phase, with a phase error of less than 1°.
[0093] The circulating current is significantly reduced when operating in parallel, and the power distribution is more balanced.
[0094] The output voltage quality is improved, and the THD is reduced from 4.8% to 2.1%, enhancing the stability of the parallel system.
[0095] The method described in this embodiment is applicable to: parallel power generation of off-grid inverters (photovoltaic energy storage, microgrid systems); parallel operation of UPS (data center power supply systems); and distributed power applications such as ships and electric vehicles.
[0096] This method does not require additional synchronization hardware; it can achieve high-precision carrier synchronization solely through serial communication. It is low-cost, simple to implement, and can be extended to larger-scale multi-machine parallel systems.
[0097] It solves the problems of low synchronization accuracy, large circulating current, and uneven power distribution in traditional methods, and has the advantages of high accuracy, low cost, and easy scalability. Compared with traditional synchronization methods, this method can:
[0098] Synchronization accuracy improved by 5 times (error reduced to 1°);
[0099] Circulation is reduced by 90%, improving system efficiency;
[0100] Reduce hardware costs; no additional synchronization cables are required.
[0101] It supports large-scale inverter parallel connection and is suitable for applications such as photovoltaic energy storage, microgrids, and UPS.
[0102] This method breaks through the bottleneck of existing technology, improves the synchronous control capability of multiple parallel inverters, and provides an efficient and reliable solution for new energy power generation and energy storage grid connection.
[0103] This embodiment demonstrates a carrier synchronization method based on serial communication. By calculating phase error and adaptively adjusting the carrier period, it effectively solves the carrier synchronization problem when multiple energy storage inverters are connected in parallel, offering advantages such as high precision, low cost, and wide applicability. Experimental results show that this method can significantly reduce circulating current and improve system efficiency and stability, making it an efficient and reliable inverter carrier synchronization solution.
[0104] The above description is only used to illustrate the technical solution of the present invention and is not intended to limit it. Any other modifications or equivalent substitutions made by those skilled in the art to the technical solution of the present invention, as long as they do not depart from the spirit and scope of the technical solution of the present invention, should be covered within the scope of the claims of the present invention.
Claims
1. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters, characterized in that: The method realizes synchronous control of carrier waves of multiple energy storage inverters through serial communication between a host inverter A1 and at least one slave inverter A2, A3, etc., so as to reduce circulating current and improve system stability and power distribution accuracy, wherein the method comprises the following steps: (1) Carrier initialization: When the system is powered on or reset, each inverter sets the same carrier frequency and initializes the serial communication interface. The master inverter A1 acts as the sender of the synchronization signal, and the slave inverters A2, A3, etc. act as the receivers of the synchronization signal. (2) The host sends a synchronization signal: During the power frequency cycle, the host inverter A1 sends a frame of serial port information 1, which contains the pre-synchronization signal identifier of the host inverter; (3) Slave receives and prepares for synchronization: After receiving information 1, the slave inverters A2, A3, etc. start the capture function of the central processing unit to prepare for the subsequent capture of the synchronization signal; (4) Master broadcast synchronization signal: During the power frequency cycle, the master inverter A1 sends a frame of serial port information 2, which is used as a synchronization signal and broadcast by the master to all slaves; (5) Slave captures phase information: When receiving information 2, slave inverters A2, A3, etc. record their own carrier phase value PHASE2; (6) Host sends phase reference value: After sending information 2, host inverter A1 immediately sends a frame of serial port information 3, which contains the carrier phase value PHASE1 recorded when the host inverter sends the synchronization signal; (7) Slave calculation of phase error: After receiving information 3, slave inverters A2, A3, ... extract the phase reference value PHASE1 of the master inverter and calculate the phase error PHASEerro = PHASE1PHASE2; (8) The slave adjusts the carrier period: If PHASEerro>0, it indicates that the slave carrier phase lags behind the master, and the carrier period reduction operation is executed to increase the carrier frequency; If PHASEerro<0, it indicates that the slave carrier phase is ahead of the master, and the carrier period is increased to reduce the carrier frequency. Each adjustment step is fixed to one carrier cycle counting unit to avoid drastic changes that may cause system instability; (9) Continuous cyclic correction: The above steps are executed continuously and cyclically to keep the carriers of multiple inverters synchronized and improve the reliability of the parallel power generation system.
2. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: The serial communication interface uses UART, RS485, CAN or SPI bus for data transmission and has an anti-interference verification mechanism to improve communication reliability.
3. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: The minimum step length of the slave inverters A2, A3, ... for adjusting the carrier cycle is set to 1 PWM cycle to ensure the accuracy of synchronization adjustment and system stability.
4. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: When the system is powered on or reset, the carrier frequencies of each inverter are preset to the same frequency value to avoid synchronization failure due to different initial states.
5. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: During the synchronization process, in order to prevent communication loss from causing carrier synchronization errors, each frame of serial communication information contains a frame check code to verify data integrity and avoid synchronization errors caused by noise interference.
6. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: The synchronization signals of the host and the slave are triggered synchronously by the industrial frequency cycle to ensure that the carrier adjustment will not affect the modulation signal output by the PWM.
7. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: After the phase error is calculated, if the phase adjustment amplitude of the slave inverters A2, A3, etc. exceeds the set threshold, the progressive adjustment mode will be enabled to gradually reduce the phase error to avoid grid oscillation caused by sudden adjustment.
8. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: This method is applicable to single-phase energy storage inverters and can also be extended to three-phase inverter systems. By synchronously adjusting the phase of the three-phase carrier wave to maintain a phase difference of 120°, three-phase parallel power generation can be supported.
9. A carrier synchronization method for parallel power generation of multiple single-phase energy storage inverters according to claim 1, characterized in that: This method can be applied to distributed microgrids, off-grid inverter systems, energy storage power stations and other application scenarios to improve the stability and grid-connected efficiency of inverter parallel operation.
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