Pre-bias control circuit and method thereof

Abstract

The invention discloses a pre-bias control circuit and a method thereof. The pre-bias control circuit comprises a flying capacitor, a voltage sensor and a voltage control current source. The voltage sensor is configured to generate a sensing capacitance voltage according to a capacitance voltage across the flying capacitor. The voltage sensor includes an inverted input end coupled to the flying capacitor, a non-inverted input end coupled to the flying capacitor, and an output end for outputting a sensing capacitor voltage. The voltage-controlled current source is used for discharging and charging the flying capacitor. The voltage-controlled current source includes a reference terminal for receiving a reference voltage, an input terminal coupled to an output terminal of the voltage sensor, a current output terminal coupled to the flying capacitor, and a current return terminal coupled to the flying capacitor. When the sensing capacitor voltage is lower than the reference voltage, the voltage controls the current source to generate a pull current to charge the flying capacitor.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to a pre-bias control circuit and a method thereof. Background Art

[0002] A buck converter is a DC-to-DC power converter that steps down an input voltage to a lower output voltage. It is widely used in a variety of electronic devices and systems to regulate and provide the voltage level required by the load. The basic principle of a buck converter is to control the on and off time of a switching element (usually a transistor) in order to transfer energy from the input source to the output load. This converter works by rapidly turning the transistor on and off, allowing the input current to charge the inductor when the transistor is on, and then transferring the stored energy from the inductor to the output capacitor and load when the transistor is off.

[0003] The main components of a buck converter are one or more power switches (transistors), an inductor, an output capacitor, a diode, and a control circuit. The switch controls the on and off times of the converter. The inductor stores energy during the on time of the switching element and releases the energy during the off time. The output capacitor filters the output fluctuations of the inductor and provides a smooth DC output voltage. When the switching element is off, the diode allows the inductor current to flow to the output. The control circuit generates the switching signal for the transistor, usually using pulse width modulation (PWM) to regulate the output voltage. The output voltage of the buck converter is controlled by adjusting the duty cycle of the switching signal. A higher duty cycle (longer on time) produces a higher output voltage, while a lower duty cycle (shorter on time) produces a lower output voltage.

[0004] Buck converters are highly efficient and compact in design, making them widely used in a variety of devices, such as power supplies for electronic devices (notebook computers, smartphones, etc.), voltage regulation in power distribution systems, automotive electronics, mobile power supplies, battery-powered devices, and telecommunication equipment.

[0005] The power converters (buck converters) mentioned above, especially in high-power applications, need to take measures to limit the inrush current. Some proposed solutions include "Three-level Buck Converter for Envelope Tracking in RF Power Amplifiers", 2005IEEE Applied Power Electronics Conference and Exposition, and "A Novel Hybrid 4:1 Step Down Converter Using an Autotransformer with DC Winding Current", 2020IEEE Energy Conversion Congress and Exposition (ECCE). However, the industry still needs more favorable solutions to alleviate the problem of inrush current and reduce the voltage stress on the switch or transistor. Summary of the invention

[0006] An embodiment provides a pre-bias control circuit, including a flying capacitor, a voltage sensor and a voltage-controlled current source. The voltage sensor is used to generate a sensing capacitor voltage according to the capacitor voltage across the flying capacitor. The voltage sensor includes an inverting input terminal coupled to the flying capacitor, a non-inverting input terminal coupled to the flying capacitor, and an output terminal for outputting the sensing capacitor voltage. The voltage-controlled current source is used to discharge and charge the flying capacitor. The voltage-controlled current source includes a reference terminal for receiving a reference voltage, an input terminal coupled to the output terminal of the voltage sensor, a current output terminal coupled to the flying capacitor, and a current return terminal coupled to the flying capacitor. When the sensing capacitor voltage is lower than the reference voltage, the voltage-controlled current source generates a pull current to charge the flying capacitor, and when the sensing capacitor voltage is higher than the reference voltage, the voltage-controlled current source generates a sink current to discharge the flying capacitor.

[0007] The embodiment provides a pre-bias control circuit, including a first switch, a second switch, a third switch and a fourth switch, a first current source coupled to the first switch, a second current source coupled between the second switch and the ground terminal, a third current source coupled to the third switch, a fourth current source coupled between the fourth switch and the ground terminal, a flying capacitor coupled to the first switch and the third switch, a voltage sensor, a first voltage comparator, and a second voltage comparator. The voltage sensor is used to generate a sensing capacitor voltage according to the capacitor voltage across the flying capacitor. The voltage sensor includes an inverting input terminal coupled to the flying capacitor, a non-inverting input terminal coupled to the flying capacitor, and an output terminal for outputting the sensing capacitor voltage. The first voltage comparator is used to compare the sensing capacitor voltage with a first reference voltage. The first voltage comparator includes an inverting input terminal for receiving the first reference voltage, a non-inverting input terminal coupled to the output terminal of the voltage sensor, and an output terminal coupled to the second switch and the third switch. The second voltage comparator is used to compare the sensing capacitor voltage with the second reference voltage. The second voltage comparator includes an inverting input terminal coupled to the output terminal of the voltage sensor. The non-inverting input terminal is used to receive the second reference voltage, and the output terminal is coupled to the first switch and the fourth switch. When the sensing capacitor voltage is higher than the first reference voltage, the second current source and the third current source discharge the flying capacitor. When the sensing capacitor voltage is lower than the second reference voltage, the first current source and the fourth current source charge the flying capacitor. When the sensing capacitor voltage is between the first reference voltage and the second reference voltage, the first voltage comparator and the second voltage comparator disable the first current source, the second current source, the third current source and the fourth current source.

[0008] The embodiment provides a method for biasing a flying capacitor operation using a pre-bias control circuit. The pre-bias control circuit includes a flying capacitor, a voltage sensor, and a voltage-controlled current source, the voltage sensor includes an inverting input terminal coupled to the flying capacitor, a non-inverting input terminal coupled to the flying capacitor, and an output terminal, and the voltage-controlled current source includes a reference terminal, an input terminal coupled to the output terminal of the voltage sensor, a current output terminal coupled to the flying capacitor, and a current return terminal coupled to the flying capacitor. The method includes generating a sensing capacitor voltage according to the capacitor voltage across the flying capacitor, comparing the sensing capacitor voltage with a reference voltage to generate a difference voltage, and generating a pull current or a sink current according to the difference voltage. The pull current or the sink current is proportional to the difference voltage.

[0009] An embodiment provides a method for biasing a flying capacitor, including a voltage sensor generating a sensing capacitor voltage based on a capacitor voltage across the flying capacitor, comparing the sensing capacitor voltage with a first reference voltage through a first voltage comparator, discharging the flying capacitor through a first current source when the sensed capacitor voltage is higher than the first reference voltage, comparing the sensing capacitor voltage with a second reference voltage through a second voltage comparator, and charging the flying capacitor through a second current source when the sensing capacitor voltage is lower than the second reference voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a schematic diagram illustrating a pre-bias control circuit of an embodiment.

[0011] Figure 2 Is a description Figure 1 Schematic diagram of the pre-bias control circuit applied in a power converter.

[0012] Figure 3A and Figure 3B Is a description Figure 2 Simulated waveforms of voltage and current in a power converter.

[0013] Figure 4 Is a description Figure 1 Schematic diagram of the pre-bias control circuit applied in a power converter.

[0014] Figure 5A and Figure 5B Is a description Figure 4 Simulated waveforms of voltage and current in a power converter.

[0015] Figure 6 is a schematic diagram illustrating a pre-bias control circuit according to another embodiment.

[0016] Figure 7 is a schematic diagram illustrating a pre-bias control circuit according to another embodiment.

[0017] Figure 8 is a schematic diagram illustrating a pre-bias control circuit according to another embodiment.

[0018] Fig. 9 is a schematic diagram illustrating a pre-bias control circuit according to another embodiment.

[0019] Fig.10 is a schematic diagram depicting a cascaded switched capacitor converter.

[0020] Fig.11 is a schematic diagram depicting a pipelined switched capacitor converter.

[0021] Fig.12 is a schematic diagram depicting a cross-coupled switched capacitor converter.

[0022] Fig.13 is a schematic diagram depicting another cross-coupled switched capacitor converter.

[0023] Fig.14A and Fig. 14B is a simulated waveform diagram depicting the voltage and current in a cross-coupled switched capacitor converter.

[0024] Fig.15 Yes Operation Figure 1 Flow chart of a method for biasing a flying capacitor using a pre-bias control circuit.

[0025] Fig.16 Yes Operation Figure 8 Flow chart of a method for biasing a flying capacitor using a pre-bias control circuit.

[0026]

Explanation of symbols

[0027] 10, 610, 710, 715, 810, C1, C2, C3: flying capacitors

[0029] 20, 620, 720, 725, 820, 920: Voltage sensor

[0030] 30, 630, 635, 730, 735, VCCS: Voltage Controlled Current Source

[0031] 100, 600, 700, 800, 900: Pre-bias control circuit

[0032] 200: Power Converter

[0033] 830, 840, 930, 940: Comparator

[0034] 950:NOR gate

[0035] 960: Buffer

[0036] 1500, 1600: Method

[0037] RDY: Delayed ready signal

[0038] SW1~SW4, Q1~Q12: switch

[0039] R1~R3: Resistance

[0040] CS1~CS4: Current source

[0041] Vin: Input voltage

[0042] Vout: output voltage

[0043] Vref, Vref1, Vref2: reference voltage

[0044] Vc, Vc1, Vc2: capacitor voltage

[0045] Vcs, Vcs1, Vcs2: sensing capacitor voltage

[0046] VQ1~VQ4: working voltage

[0047] IQ1: working current

[0048] Cin, Cmid, Cout, Co1, Co2: capacitors

[0049] L1~L3: Inductor

[0050] Vx: Inductor voltage

[0051] I in : Input current

[0052] I out :Output current

[0053] I LA :Inductor current

[0054] S1502~S1506,

[0055] S1602~S1610: Steps DETAILED DESCRIPTION

[0056] In the following detailed description, many specific details will be described to provide a thorough understanding of the present disclosure. However, it will be understood by those skilled in the art that the present disclosure can be implemented even without certain specific details. In other cases, well-known methods, processes, components and circuits are not described in detail herein to avoid blurring the key points of the present disclosure. In this specification, the technical features described separately in a figure can be implemented in practical applications separately or simultaneously.

[0057] Figure 1 is a schematic diagram describing a pre-bias control circuit 100. The pre-bias control circuit 100 includes a flying capacitor 10, a voltage sensor 20, and a voltage controlled current source (VCCS) 30. The voltage sensor 20 is used to generate a sensing capacitor voltage Vcs according to a capacitor voltage Vc1 on the flying capacitor 10. The voltage sensor 20 includes an inverting input terminal coupled to one end of the flying capacitor 10, a non-inverting input terminal coupled to the other end of the flying capacitor 10, and an output terminal for outputting the sensing capacitor voltage Vcs. The voltage controlled current source 30 is used to charge and discharge the flying capacitor 10. The voltage controlled current source 30 includes a reference terminal for receiving a reference voltage Vref, an input terminal coupled to the output terminal of the voltage sensor 20, a current output terminal coupled to one end of the flying capacitor 10, and a current return terminal coupled to the other end of the flying capacitor 10. The voltage sensor 20 may include an operational amplifier, an error amplifier, or an equivalent element thereof.

[0058] In addition, when the sensing capacitor voltage Vcs is lower than the reference voltage Vref, the voltage-controlled current source 30 generates a source current to charge the flying capacitor 10. When the sensing capacitor voltage Vcs is higher than the reference voltage Vref, the voltage-controlled current source 30 generates a sink current to discharge the flying capacitor 10.

[0059] like Figure 1 As shown, the pre-bias control circuit 100 may also selectively include a first switch SW1 coupled between the non-inverting input terminal and the flying capacitor 10, and a second switch SW2 coupled between the inverting input terminal and the flying capacitor 10. During the pre-charging cycle of the flying capacitor 10, the first switch SW1 and the second switch SW2 may be activated. When the pre-charging cycle is completed (the capacitor voltage Vc reaches the required pre-bias voltage), the first switch SW1 and the second switch SW2 may be disabled. The function of these switches is to control the current flow in the circuit, thereby realizing the charging and discharging of the flying capacitor 10. During the pre-charging process, the first switch SW1 and the second switch SW2 allow current to flow to the flying capacitor 10 until the required voltage is reached. Once the preset voltage is reached, these switches will be turned off to ensure the normal operation of the circuit. This is very important for power supply design in complex systems, especially in the presence of other power supply voltages, to avoid current feedback and affect the stability of the circuit.

[0060] like Figure 1 As shown, the pre-bias control circuit 100 may further selectively include a resistor divider, which is composed of resistors R1 and R2 and receives the input voltage Vin of the power converter. The resistor divider can generate a reference voltage Vref according to the input voltage Vin. By appropriately selecting the resistance ratio of the resistors R1 and R2, the reference voltage Vref can be set to a specific value, such as half of the input voltage Vin.

[0061] Figure 2 1 is a schematic diagram describing the application of the pre-bias control circuit 100 in a power converter 200. The power converter 200 is a hybrid switched-capacitor power converter. This power converter uses four switches Q1-Q4 and an output capacitor Cout to generate a desired output voltage. An inductor L1 is coupled between the output capacitor Cout and the switches Q1-Q4 to regulate current. In order to reduce the voltage stress on the switches Q1-Q4, the embodiment adds a flying capacitor C1 to the circuit, which acts as a voltage divider.

[0062] The power converter 200 can be described in more detail as follows. The input capacitor Cin can be coupled between the input terminal and the ground terminal. The switch Q1 can be coupled between the flying capacitor C1 and the input capacitor Cin. The switch Q4 can be coupled between the flying capacitor C1 and the ground terminal (Ground). The switch Q3 can be coupled between the inductor L1 and the switch Q4. The first end of the switch Q2 can be coupled to the switch Q1, and the second end of the switch Q2 can be coupled to the switch Q3. The output capacitor Cout can be coupled between the output terminal and the ground terminal. The switches Q1-Q4 can be implemented with suitable transistors.

[0063] The pre-bias control circuit 100 can manage the flying capacitor C1. The control circuit 100 uses the voltage controlled current source 30 to adjust the charge on the flying capacitor C1. In addition, the voltage controlled current source 30 can operate according to the difference between the reference voltage Vref and the voltage Vc1 sensed by the voltage sensor 20 from the flying capacitor C1.

[0064] Figure 3A and 3B Describes the simulated waveforms of various voltages and currents in the power converter 200. The vertical axis shows the voltage value in volts (V) or the current value in amperes (A). The horizontal axis represents the time in milliseconds (ms). The simulated input voltage is set to 54V. Vc1 represents the voltage across the flying capacitor C1. IQ1 represents the operating current of the switch Q1. VQ1, VQ2, VQ3 and VQ4 represent the operating voltages of the switches Q1, Q2, Q3 and Q4, respectively. Vx represents the inductor voltage.

[0065] Figure 3A The simulation waveforms are described without applying the pre-bias control circuit 100. Without the pre-bias voltage, the capacitor voltage Vc1 will start from 0V, and the voltage stress on the switches Q1 and Q4 will be equal to the full 54V input voltage during the startup transient. This surge current and voltage stress may damage the switches Q1-Q4, especially the switches Q1 and Q4.

[0066] on the other hand, Figure 3BThe simulated waveforms after applying the pre-bias control circuit 100 are shown. The capacitor voltage Vc1 is pre-biased to about 27V, which is half of the 54V input voltage (Vin / 2=54V / 2=27V). During transient and steady-state operation, pre-biasing the capacitor voltage Vc1 to half of the input voltage (Vin / 2=27V) can limit the voltage stress on the switches Q1-Q4 to about 27V to reduce the risk of damaging the switches. When the input voltage is high, pre-biasing the capacitor voltage Vc1 to 27V is a key design method that helps reduce the voltage stress on the switches Q1-Q4, thereby enabling the use of components with lower voltage ratings.

[0067] Figure 4 is a schematic diagram describing the application of the pre-bias control circuit 100 in the power converter 300. The architecture of the power converter 300 is similar to that of the power converter 200, but includes eight switches Q1-Q8. These switches regulate the current to generate the desired output voltage Vout on the output capacitor Cout. The inductor L1 is coupled between the output capacitor Cout and the switches Q1-Q8 to further control the current. In order to minimize the voltage stress on the switches, the embodiment adds two flying capacitors C1 and C2 and is configured as a voltage divider. In addition, the embodiment also uses the pre-bias control circuit 100 to independently manage each flying capacitor C1 and C2.

[0068] The power converter 200 can be described in more detail as follows. The input capacitor Cin can be coupled between the input terminal and the ground terminal. The switch Q1 can be coupled between the flying capacitor C1 and the input capacitor Cin. The first end of the switch Q2 can be connected to the switch Q1, and the second end of the switch Q2 can be connected to the switch Q3. The switch Q3 can be coupled between the inductor L1 and the switch Q4. The switch Q4 can be coupled between the flying capacitor C1 and the ground terminal. The output capacitor Cout can be coupled between the output terminal and the ground terminal. In addition, the switch Q5 can be coupled between the input terminal and the flying capacitor C2. The first end of the switch Q6 can be coupled to the switch Q5, and the second end of the switch Q6 can be coupled to the switch Q7. The switch Q7 can be coupled between the inductor L1 and the switch Q8. The switch Q8 can be coupled between the flying capacitor C2 and the ground terminal. The switches Q1-Q8 can be implemented with suitable transistors.

[0069] The pre-bias control circuit 100 can be used to manage the flying capacitors C1 and C2. The embodiment uses a voltage-controlled current source 30 to adjust the charge on the flying capacitors C1 and C2. The voltage-controlled current source 30 uses the difference between the reference voltage Vref and the capacitor voltages Vc1 and Vc2 sensed from the flying capacitors C1 and C2, respectively, to adjust the charge on the flying capacitors C1 and C2 until the desired voltage is reached.

[0070] Figure 5A and 5B Describes the simulated waveforms of the voltage and current in the power converter 300. The vertical axis shows the voltage value in volts (V) or the current value in amperes (A). The horizontal axis represents the time in milliseconds (ms). The simulated input voltage is set to 54V. Vc1 represents the voltage across the flying capacitor C1. IQ1 represents the operating current of the switch Q1. VQ1, VQ2, VQ3 and VQ4 represent the operating voltages of the switches Q1, Q2, Q3 and Q4, respectively. Vx represents the inductor voltage.

[0071] Figure 5A The simulation waveforms are shown below without the pre-bias control circuit 100. Without the pre-bias voltage, the capacitor voltage Vc1 will start from 0V, and the voltage stress on switches Q1 and Q4 will be equal to the full 54V input voltage during the startup transient. Figure 5A As shown, the inrush current IQ1 through switch Q1 during startup can rise to 2kA, which is much higher than the steady-state current. As a result, the inrush current and voltage stress may damage switches Q1-Q4, especially switches Q1 and Q4 that are subject to the largest voltage stress. In addition, the flying capacitor C2 and switches Q5-Q8 will basically have similar performances. This description will not be repeated here.

[0072] on the other hand, Figure 5B Describe the simulation waveform after implementing the pre-bias control circuit 100. The capacitor voltage Vc1 is pre-biased to about 27V, which is half of the 54V input voltage (Vin / 2=54V / 2=27V). During transient and steady-state operation, the capacitor voltage Vc1 is pre-biased to half of the input voltage (Vin / 2=27V), which can limit the voltage stress on the switches Q1-Q4 to about 27V and eliminate the surge current through the switches Q1-Q4. This can reduce the risk of damaging the switches. When the input voltage is high, pre-biasing the capacitor voltage Vc1 to 27V is a key design method that helps reduce the voltage stress on the switches Q1-Q4, thereby enabling the use of components with lower rated voltages. The flying capacitor C2 and switches Q5-Q8 will basically have similar performance. The description will not be repeated here.

[0073] Figure 66 is a schematic diagram describing a pre-bias control circuit 600. The pre-bias control circuit 600 includes a flying capacitor 610, a voltage sensor 620, and voltage controlled current sources 630 and 635. The voltage sensor 620 is used to generate a sensing capacitor voltage Vcs according to a capacitor voltage Vc1 across the flying capacitor 610. The voltage sensor 620 includes an inverting input terminal coupled to one end of the flying capacitor 610, a non-inverting input terminal coupled to the other end of the flying capacitor 610, and an output terminal for outputting the sensing capacitor voltage Vcs. The voltage controlled current sources 630 and 635 are used to charge and discharge the flying capacitor 610. The voltage controlled current source 630 includes a reference terminal for receiving a reference voltage Vref, an input terminal coupled to the output terminal of the voltage sensor 620, a current output terminal coupled to the flying capacitor 610, and a current return terminal coupled to the ground terminal. The voltage-controlled current source 635 includes a reference terminal for receiving a reference voltage Vref, an input terminal coupled to the output terminal of the voltage sensor 620 , a current output terminal coupled to the flying capacitor 610 , and a current return terminal coupled to the ground terminal.

[0074] In addition, when the sensing capacitor voltage Vcs is lower than the reference voltage Vref, the voltage-controlled current source 630 generates a current to charge the flying capacitor 610. At the same time, the voltage-controlled current source 635 generates a current to discharge the flying capacitor 610. The voltage-controlled current sources 630 and 635 operate in opposite ways.

[0075] By using two voltage-controlled current sources 630 and 635, an embodiment can be designed to use one voltage-controlled current source to provide current to charge the flying capacitor 610, and the other voltage-controlled current source to absorb current to discharge the flying capacitor 610. The voltage-controlled current sources 630 and 635 can share a current path, but work in opposite directions according to the control signal. Compared with using separate charging and discharging current paths, this can improve efficiency. In addition, using two voltage-controlled current sources 630 and 635 can provide a certain degree of redundancy. If one voltage-controlled current source fails, the other can still perform the function of precharging.

[0076] The pre-bias control circuit 600 may further include a first switch SW1 coupled between the non-inverting input terminal and the flying capacitor 610, and a second switch SW2 coupled between the inverting input terminal and the flying capacitor 610. The switches SW1 and SW2 may be enabled during the pre-charging period of the flying capacitor 610. After the pre-charging period is completed (the capacitor voltage Vc reaches the desired pre-bias voltage), the switches SW1 and SW2 may be disabled.

[0077] The pre-bias control circuit 600 may further include a resistor divider composed of resistors R1 and R2, which receives an input voltage Vin of the power converter and generates a reference voltage Vref. By selecting an appropriate resistance ratio of the resistors R1 and R2, the reference voltage Vref may be set to a specific value, such as half of the input voltage Vin.

[0078] Figure 7 is a schematic diagram illustrating a pre-bias control circuit 700. The pre-bias control circuit 700 includes flying capacitors 710 and 715, voltage sensors 720 and 725, and voltage-controlled current sources 730 and 735.

[0079] The voltage sensor 720 is used to generate a sensing capacitor voltage Vcs1 according to a capacitor voltage Vc1 across the flying capacitor 710. The voltage sensor 720 includes a non-inverting input terminal coupled to one end of the flying capacitor 710, an inverting input terminal coupled to the other end of the flying capacitor 710, and an output terminal for outputting the sensing capacitor voltage Vcs1. The voltage-controlled current source 730 is used to charge and discharge the flying capacitor 710. The voltage-controlled current source 730 includes a reference terminal for receiving a reference voltage Vref, an input terminal coupled to the output terminal of the voltage sensor 720, a current output terminal coupled to one end of the flying capacitor 710, and a current return terminal coupled to the other end of the flying capacitor 710.

[0080] The voltage sensor 725 is used to generate a sensing capacitor voltage Vcs2 according to the capacitor voltage Vc2 across the flying capacitor 715. The voltage sensor 725 includes a non-inverting input terminal coupled to one end of the flying capacitor 715, an inverting input terminal coupled to the other end of the flying capacitor 715, and an output terminal for outputting the sensing capacitor voltage Vcs2. The voltage-controlled current source 735 is used to charge and discharge the flying capacitor 715. The voltage-controlled current source 735 includes a reference terminal for receiving a reference voltage Vref, an input terminal coupled to the output terminal of the voltage sensor 725, a current output terminal coupled to one end of the flying capacitor 715, and a current return terminal coupled to the other end of the flying capacitor 715.

[0081] In addition, when the sensing capacitor voltage Vcs1 is lower than the reference voltage Vref, the voltage-controlled current source 730 generates a source current to charge the flying capacitor 710. When the sensing capacitor voltage Vcs1 is higher than the reference voltage Vref, the voltage-controlled current source 730 generates a sink current to discharge the flying capacitor 710. When the sensing capacitor voltage Vcs2 is lower than the reference voltage Vref, the voltage-controlled current source 735 generates a source current to charge the flying capacitor 715. When the sensing capacitor voltage Vcs2 is higher than the reference voltage Vref, the voltage-controlled current source 735 generates a sink current to discharge the flying capacitor 715.

[0082] The pre-bias control circuit 700 may further include a first switch SW1 coupled between the non-inverting input terminal of the voltage sensor 720 and the flying capacitor 710, and a second switch SW2 coupled between the inverting input terminal of the voltage sensor 720 and the flying capacitor 710. The switches SW1 and SW2 may be enabled during the pre-charging cycle of the flying capacitor 710. After the pre-charging cycle is completed (the capacitor voltage Vc1 reaches the desired pre-bias voltage), the switches SW1 and SW2 may be disabled.

[0083] Similarly, the pre-bias control circuit 700 may further include a third switch SW3 coupled between the non-inverting terminal of the voltage sensor 725 and the flying capacitor 715, and a fourth switch SW4 coupled between the inverting terminal of the voltage sensor 725 and the flying capacitor 715. The switches SW3 and SW4 may be enabled during the pre-charging cycle of the flying capacitor 715. After the pre-charging cycle is completed (the capacitor voltage Vc2 reaches the desired pre-bias voltage), the switches SW3 and SW4 may be disabled.

[0084] The pre-bias control circuit 700 may further include a resistor divider composed of resistors R1 and R2, receiving an input voltage Vin of the power converter. The voltage divider generates a reference voltage Vref, which is a portion of the input voltage Vin. By selecting an appropriate resistance ratio of the resistors R1 and R2, the reference voltage Vref may be set to a specific value, such as half of the input voltage Vin.

[0085] The pre-bias control circuit 700 simultaneously and independently manages the flying capacitors 710 and 715. The control circuit 700 uses two voltage-controlled current sources 730 and 735 to adjust the charges on the flying capacitors 710 and 715, respectively. In addition, the voltage-controlled current source 730 can be operated according to the difference between the reference voltage Vref and the sensing capacitor voltage Vcs1 sensed by the voltage sensor 720 from the flying capacitor 710. The voltage-controlled current source 735 can be operated according to the difference between the reference voltage Vref and the sensing capacitor voltage Vcs2 sensed by the voltage sensor 725 from the flying capacitor 715.

[0086] Figure 8is a schematic diagram describing a pre-bias control circuit 800. The pre-bias control circuit 800 includes switches SW1, SW2, SW3, and SW4, a first current source CS1 coupled to the first switch SW1, a second current source CS2 coupled between the second switch SW2 and a ground terminal, a third current source CS3 coupled to the third switch SW3, a fourth current source CS4 coupled between the fourth switch SW4 and a ground terminal, a flying capacitor 810 coupled to the first switch SW1 and the third switch SW3, a voltage sensor 820, a first voltage comparator 830, and a second voltage comparator 840. The voltage sensor 820 may include an operational amplifier, an error amplifier, or an equivalent circuit thereof.

[0087] The voltage sensor 820 is used to generate a sensing capacitor voltage Vcs according to the capacitor voltage Vc across the flying capacitor 810. The voltage sensor 820 includes an inverting input terminal coupled to one end of the flying capacitor 810, a non-inverting input terminal coupled to the other end of the flying capacitor 810, and an output terminal for outputting the sensing capacitor voltage Vcs. The first voltage comparator 830 is used to compare the sensing capacitor voltage Vcs with the first reference voltage Vref1, and includes an inverting input terminal for receiving the first reference voltage Vref1, a non-inverting input terminal coupled to the output end of the voltage sensor 820, and an output terminal coupled to the second switch SW2 and the third switch SW3. The second voltage comparator 840 is used to compare the sensing capacitor voltage Vcs with the second reference voltage Vref2, and includes an inverting input terminal coupled to the output end of the voltage sensor 820, a non-inverting input terminal for receiving the second reference voltage Vref2, and an output terminal coupled to the first switch SW1 and the fourth switch SW4.

[0088] When the sensing capacitor voltage Vcs rises above the first reference voltage Vref1, the second current source CS2 and the third current source CS3 discharge the flying capacitor 810. The second current source CS2 can provide a path for the current to be discharged from the flying capacitor 810 to the ground, while the third current source CS3 can push the current from the capacitor 810 back to the ground.

[0089] When the sensing capacitor voltage Vcs drops below the second reference voltage Vref2, the first current source CS1 and the fourth current source CS4 charge the flying capacitor 810. The first current source CS1 provides current from the power supply to charge the flying capacitor 810, and the fourth current source CS4 provides a path for returning current from the capacitor 810 to the ground.

[0090] When the level of the sensing capacitor voltage Vcs is between the first reference voltage Vref1 and the second reference voltage Vref2 , the comparators 830 and 840 disable all current sources CS1 - CS4 , which helps to maintain the voltage of the flying capacitor 810 at the pre-charge level.

[0091] The pre-bias control circuit 800 may further include a resistor divider composed of resistors R1, R2, and R3, the resistor divider receiving the input voltage Vin of the power converter and generating reference voltages Vref1 and Vref2. Embodiments By selecting an appropriate resistance ratio of the resistors R1, R2, and R3, the reference voltages Vref1 and Vref2 may be set to specific values, such as half of the input voltage Vin, and the first reference voltage Vref1 may be greater than the second reference voltage Vref2.

[0092] In summary, the pre-bias control circuit 800 ensures that the flying capacitor 810 is pre-charged to a specific voltage range (between Vref1 and Vref2) before the main circuit (eg, power converter) starts to operate, so as to reduce surge current and lower voltage stress on switches or transistors.

[0093] Fig. 9 is a schematic diagram describing a pre-bias control circuit 900. The pre-bias control circuit 900 includes switches SW1, SW2, SW3, and SW4, a first current source CS1 coupled to the first switch SW1, a second current source CS2 coupled between the second switch SW2 and a ground terminal, a third current source CS3 coupled to the third switch SW3, a fourth current source CS4 coupled between the fourth switch SW4 and a ground terminal, a flying capacitor 910 coupled to the first switch SW1 and the third switch SW3, a voltage sensor 920, a first voltage comparator 930, and a second voltage comparator 940. The voltage sensor 920 may include an operational amplifier, an error amplifier, or an equivalent circuit thereof.

[0094] The architecture of the pre-bias control circuit 900 is substantially similar to that of the pre-bias control circuit 800, except that the pre-bias control circuit 900 further includes a NOR gate 950 coupled to the output end of the voltage comparator 930 and the output end of the voltage comparator 940, and a buffer 960 coupled to the NOR gate 950. The NOR gate 950 and the buffer 960 may be used to generate a delayed ready signal RDY.

[0095] NOR gate 950 receives inputs from voltage comparators 930 and 940, indicating when the flying capacitor 910 reaches the pre-charge voltage range (between reference voltages Vref1 and Vref2). Buffer 960 introduces a controlled time delay after reaching the pre-charge voltage. This delay ensures that the flying capacitor 910 has enough time to enter a steady state and that the pre-bias control circuit 900 can perform any necessary internal processing. The role of the delayed ready signal RDY is to ensure that the main circuit (such as a power converter) can be started in a safe and efficient manner. It avoids voltage stress or surge current that may occur during the startup process by ensuring that the flying capacitor has been charged to the appropriate voltage level, thereby preventing potential damage to circuit components. In addition, proper pre-charging can also reduce energy loss during startup and improve overall efficiency.

[0096] Fig.10 1 is a schematic diagram illustrating a cascaded switched-capacitor converter 1000, in which the pre-bias control circuit 100 may be applied. Figure 4 The flying capacitors C1, C2 and C3 are coupled to the flying capacitors C1, C2 and C3 in the same manner as described in . Therefore, in the pre-charging stage, the flying capacitors C1, C2 and C3 can be pre-biased to a specific level using the pre-bias control circuit 100. For example, the flying capacitors C1 and C2 can be charged to Vin / 4, and the flying capacitor C3 can be charged to Vin / 2.

[0097] During the switching phase, the switches coupled to the flying capacitors C1, C2, and C3 are turned on to transfer the charge stored on the capacitors to the output capacitor Cout, thereby increasing the output voltage Vout. This process is repeated at a high frequency to regulate the output voltage Vout. Compared with a single-stage switched capacitor converter, the cascade design allows a higher voltage conversion ratio. Switches Q1-Q12 can be implemented by suitable transistors. The input capacitor Cin can store the input current and reduce the input ripple. Inductor L2 and capacitor Cmid are used to couple the various stages of the converter. Each stage of the converter 1000 has its own pre-charged flying capacitor. Inductor L2 and capacitor Cmid are bridges that couple the voltage from one stage to the next, helping to maintain a more consistent voltage between the various stages.

[0098] Fig.11 1 is a schematic diagram illustrating a pipelined switched-capacitor converter 1100, in which the pre-bias control circuit 100 may be applied. The pre-bias control circuit 100 may be used to Figure 4The pipeline switched capacitor converter 1100 is coupled to the flying capacitors C1, C2 and C3 in the same manner as described in . Compared with the single-stage design, the pipeline switched capacitor converter 1100 has significant advantages by achieving synchronous processing. When the final stage completes signal processing, the initial stage can start processing the next input signal, thereby obtaining a higher conversion rate. The switches Q1-Q10 are turned on and off at specific times according to the clock signal at their control terminals, transferring charge between the capacitors and the inductors. The pipeline switched capacitor converter 1100 uses this mechanism to perform voltage conversion between the input voltage Vin and the output voltage Vout. In application, the embodiment can use the pre-bias control circuit 100 to pre-bias the flying capacitors C1, C2 and C3 to a specific level during the pre-charging stage. For example, the flying capacitors C1 and C2 can be charged to Vin / 4, and the flying capacitor C3 can be charged to Vin / 2. The pre-bias voltage on the flying capacitors C1-C3 helps to regulate the output voltage, ensuring the stability of the output signal and reducing ripple by alleviating unnecessary voltage and / or current peaks.

[0099] Fig.12 1 is a schematic diagram of a cross coupled switched-capacitor converter 1200, in which the pre-bias control circuit 100 can be applied. The converter 1200 includes switches Q1-Q6, flying capacitors C1 and C2, an input capacitor Cin, an output capacitor Cout, and inductors L1 and L2. The switches Q1-Q6 are switches controlled by a clock signal. The pre-bias control circuit 100 can be used in Figure 4 Coupled to flying capacitors C1 and C2 in the same manner as described in .

[0100] One of the operating modes of the cross-coupled switched capacitor converter 1200 is described as follows. In the first stage, switches Q1, Q3 and Q5 are turned on, while the other switches are turned off. This operation connects capacitor C1 to the input terminal, and capacitor C1 is charged by input voltage Vin. At the same time, capacitor C1 is connected to the output terminal through inductor L2, generating a current flowing to the output terminal, so that the output voltage Vout can be increased. At the same time, capacitor C2 releases its stored energy to the output terminal through switches Q5 and Q3. In the second stage, switches Q2, Q4 and Q6 are turned on, while the other switches are turned off. This operation connects capacitor C2 to the input terminal, charges capacitor C2 from input voltage Vin, and connects capacitor C2 to the output terminal, generating a current flowing to the output terminal, so that the output voltage Vout can be increased. At the same time, capacitor C1 releases its stored energy to the output terminal through switches Q2 and Q6.

[0101] Embodiments may use the pre-bias control circuit 100 to pre-bias the flying capacitors C1 and C2 to a specific level during the pre-charging stage. For example, the flying capacitors C1 and C2 may be charged to Vin / 2. The pre-bias voltage on the flying capacitors C1 and C2 helps regulate the output voltage, ensuring the stability of the output signal and reducing ripple by mitigating unnecessary voltage and / or current peaks.

[0102] Fig.13 1 is a schematic diagram of a cross-coupled switched capacitor converter 1300, in which the pre-bias control circuit 100 may be applied. The architecture of the cross-coupled switched capacitor converter 1300 is substantially similar to that of the cross-coupled switched capacitor converter 1200, but the cross-coupled switched capacitor converter 1300 further includes an inductor L3 coupled to the output terminal. The pre-bias control circuit 100 may be Figure 4 The flying capacitors C1 and C2 are coupled to the flying capacitors C1 and C2 in the same manner as described in . The embodiment can use the pre-bias control circuit 100 to pre-bias the flying capacitors C1 and C2 to a specific level during the pre-charging stage. For example, the flying capacitors C1 and C2 can be charged to Vin / 2. The pre-bias voltage on the flying capacitors C1 and C2 helps to regulate the output voltage, ensure the stability of the output signal and reduce ripple by mitigating unnecessary voltage and / or current peaks.

[0103] Fig.14A and 14B Describes the simulated waveforms of voltage and current in the cross-coupled switched capacitor converter 1300. The vertical axis shows the voltage value in volts (V) or the current value in amperes (A). The horizontal axis represents the time in milliseconds (ms). The simulated input voltage Vin is set to 54V. Vc1 represents the voltage across the flying capacitor C1. Fig.14A The voltage and / or current peaks shown may damage switches Q1-Q6. When the flying capacitors C1 and C2 are pre-biased to half the input voltage (Vin / 2 = 27V), the inrush current problem during startup can be eliminated, ensuring the stability of the circuit operation and reducing ripple by mitigating unnecessary voltage and / or current spikes.

[0104] Fig.14A 1 and 2 illustrate the simulation waveforms without applying the pre-bias control circuit 100. When the capacitor voltages Vc1 and Vc2 of the flying capacitors C1 and C2 have no pre-bias voltage before startup, a very high surge input current I may appear during startup. in (up to 12kA), which is much higher than the steady-state current. in and voltage stress may damage switches Q1-Q6.

[0105] on the other hand, Fig. 14BThe simulated waveforms after applying the pre-bias control circuit 100 are described. The capacitor voltages Vc1 and Vc2 are pre-biased to about 27V, which is half of the 54V input voltage (Vin / 2=54V / 2=27V). During transient and steady-state operation, pre-biasing the capacitor voltages Vc1 and Vc2 to half of the input voltage (Vin / 2=27V) reduces the voltage stress on the switches Q1-Q6 and eliminates the surge input current I in , by mitigating unnecessary voltage and / or current spikes, ensuring stable circuit operation and reducing ripple. Pre-biasing the capacitor voltage Vc1 to 27V is a key design that helps reduce the voltage stress on switches Q1-Q6, allowing the use of components with lower voltage ratings.

[0106] Fig.15 1 is a flow chart of a method 1500 for operating the pre-bias control circuit 100 to bias a flying capacitor. The method 1500 comprises the following steps:

[0107] S1502: Generate a sensing capacitor voltage Vcs according to the capacitor voltage Vc across the flying capacitor 10;

[0108] S1504: Compare the sensing capacitor voltage Vcs with the reference voltage Vref to generate a difference voltage; and

[0109] S1506: Generate a source current or a sink current according to the differential voltage.

[0110] Fig.16 1 is a flow chart of a method 1600 for operating the pre-bias control circuit 800 to bias the flying capacitor. The method 1600 includes the following steps:

[0111] S1602: The voltage sensor 820 generates a sensing capacitor voltage Vcs according to the capacitor voltage Vc across the flying capacitor 810;

[0112] S1604: The first voltage comparator 830 compares the sensing capacitor voltage Vcs with the first reference voltage Vref1;

[0113] S1606: When the sensing capacitor voltage Vcs is higher than the first reference voltage Vref1, the first current source CS1 discharges the flying capacitor 810;

[0114] S1608: The second voltage comparator 840 compares the sensing capacitor voltage Vcs with the second reference voltage Vref2;

[0115] S1610 : When the sensing capacitor voltage Vcs is lower than the second reference voltage Vref2 , the second current source CS2 charges the flying capacitor 810 .

[0116] The above invention proposes a pre-bias control circuit and method, the purpose of which is to alleviate the inrush current problem and reduce the voltage stress on the power switch. The focus of the present invention is to implement a pre-bias voltage control mechanism for various power converters or buck converters, which can effectively alleviate the inrush current problem and reduce the voltage stress on the power switch during the transient phase. By solving these problems, the present invention improves the reliability of the power converter and enables the use of components with lower voltage ratings. Therefore, the present invention helps to improve the performance of the power converter, increase its durability, and reduce costs by using more economical components.

[0117] The terms used in this article are only used to describe specific embodiments and should not be understood as limiting. In the description of each embodiment and in the claims, the indefinite article "a" in the singular is intended to include the plural form, unless there is a clear indication in the context. In addition, when the word "and / or" is used in this article, it should be understood to include all possible combinations of the listed items. In addition, when "including" and / or "comprising" are used in this article, the presence of the features, integers, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, integers, steps, operations, elements, components and / or their combinations is not excluded.

[0118] The terms "coupled", "connected", "electrically connected", etc. are used interchangeably herein and generally refer to being in an electrically and / or electronically connected state. Similarly, when a first entity is "in communication" with a second entity, regardless of the type of signal (analog or digital), the first entity is considered to be "in communication" with the second entity and is electrically (via wire or wireless) sending and / or receiving information signals (whether containing voice information or non-voice data / control information). In addition, it should be noted that for illustrative purposes, the various schematic diagrams (including component diagrams) discussed herein are not drawn to scale.

[0119] In the description of the embodiments, the various exemplary elements, logic, logic blocks, modules, circuits, operations, and algorithm steps described may be implemented using electronic hardware, firmware, software, or a combination thereof. The interchangeability of hardware, firmware, and software in terms of functionality has been generally described in the various exemplary elements, modules, blocks, circuits, and steps described above. Whether such functionality is implemented using hardware, firmware, or software depends on the constraints of the specific application and the overall system design.

[0120] The hardware and data processing devices used to implement the various schematic components, logic, logic blocks, modules and circuits described herein may include a general-purpose single-chip or multi-chip processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device (PLD), discrete components or transistor logic, discrete hardware components, or any combination thereof to perform the functions described herein. A general-purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a digital signal processor and a microprocessor, a plurality of microprocessors, a combination of one or more microprocessors working in conjunction with a digital signal processor core, or any other such configuration. In some embodiments, specific functions may be performed by dedicated circuits.

[0121] As previously mentioned, certain aspects described herein may be implemented in software. For example, the various functions of the components, or the various blocks or steps of the methods, operations, programs or algorithms, may be implemented using non-temporary processor executable instructions or computer executable instructions in one or more computer program modules encoded on one or more processor-readable or computer-readable storage media and executed or controlled by a data processing device (including the device components described herein) to operate. Examples of these storage media include random access memory (RAM), read-only memory (ROM), electronically erasable rewritable read-only memory (EEPROM), hard disk storage, optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store program code in the form of instructions or data structures. The above combinations should also be included in the scope of storage media.

[0122] Some embodiments may include additional features not specifically described herein, while other embodiments may not include undisclosed elements. In other words, undisclosed elements may be selectively omitted.

[0123] Furthermore, although various features herein may be described in the context of a single embodiment, these features may also be combined into a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable combination. Thus, although features may be implemented in a particular combination and claimed as such in the initial claims, one or more dependent claims deleting one or more features from the claimed combination may also be included within the scope of the claims of this application.

[0124] Similarly, although the operations are shown in a particular order in the accompanying drawings, this should not be understood as requiring the operations to be performed in the particular order shown, or requiring the execution of all the operations shown to achieve the desired result. In some cases, operations not shown may be included between the operations shown. For example, one or more other operations may be performed before, after, or simultaneously with any of the operations shown. In some cases, multiplexing and parallel processing may also be performed. In addition, the division of various system components in the above-described embodiments should not be understood as requiring such division in all embodiments, but rather should be understood as the program components and systems can generally be integrated together to form a single software suite or multiple software suites.

[0125] Those skilled in the art can readily understand various modifications to the embodiments described herein, and the general principles defined herein can also be applied to other embodiments without departing from the spirit or scope of the present invention. Therefore, the claims are not limited to the embodiments described herein, but should be given the broadest scope consistent with the present invention, the principles described, and the novel features disclosed herein.

[0126] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A pre-bias control circuit, comprising: Flying capacitor; A voltage sensor, used for generating a sensing capacitor voltage according to the capacitor voltage across the flying capacitor, comprises: An inverting input terminal coupled to the flying capacitor; A non-inverting input terminal coupled to the flying capacitor; and an output terminal, used for outputting the sensing capacitor voltage; and A voltage-controlled current source is used to discharge and charge the flying capacitor, comprising: A reference terminal for receiving a reference voltage; An input terminal coupled to the output terminal of the voltage sensor; A current output terminal coupled to the flying capacitor; and A current return terminal coupled to the flying capacitor; in: When the sensing capacitor voltage is lower than the reference voltage, the voltage-controlled current source generates a source current to charge the flying capacitor; and When the sensing capacitor voltage is higher than the reference voltage, the voltage-controlled current source generates a sink current to discharge the flying capacitor.

2. The pre-bias control circuit according to claim 1, further comprising: A first switch coupled between the non-inverting input terminal and the flying capacitor; and The second switch is coupled between the inverting input terminal and the flying capacitor. 3 . The pre-bias control circuit as claimed in claim 1 , wherein the source current or the sink current is proportional to a difference between the sensing capacitor voltage and the reference voltage. 4 . The pre-bias control circuit as claimed in claim 1 , further comprising a resistor divider coupled to the reference terminal for generating the reference voltage according to an input voltage.

5. The pre-bias control circuit of claim 4 , wherein the resistor divider comprises: The first resistor comprises: A first terminal for receiving the input voltage; and The second terminal is used to output the reference voltage; and The second resistor comprises: A first terminal coupled to the second terminal of the first resistor; and The second end is coupled to the ground. The pre-bias control circuit as claimed in claim 5 , wherein the reference voltage is half of the input voltage. 7 . The pre-bias control circuit as claimed in claim 1 , wherein the voltage sensor comprises an operational amplifier or an error amplifier.

8. A pre-bias control circuit, comprising: A first switch, a second switch, a third switch and a fourth switch; A first current source coupled to the first switch; A second current source coupled between the second switch and a ground terminal; A third current source, coupled to the third switch; a fourth current source, coupled between the fourth switch and the ground; A flying capacitor coupled to the first switch and the third switch; A voltage sensor, used for generating a sensing capacitor voltage according to the capacitor voltage across the flying capacitor, comprises: An inverting input terminal coupled to the flying capacitor; A non-inverting input terminal coupled to the flying capacitor; and An output terminal, used for outputting the sensing capacitor voltage; A first voltage comparator is used to compare the sensing capacitor voltage with a first reference voltage, comprising: An inverting input terminal, used for receiving a first reference voltage; a non-inverting input terminal coupled to the output terminal of the voltage sensor; and an output terminal coupled to the second switch and the third switch; and A second voltage comparator, used for comparing the sensing capacitor voltage with a second reference voltage, comprises: An inverting input terminal coupled to the output terminal of the voltage sensor; a non-inverting input terminal, for receiving the second reference voltage; and An output terminal coupled to the first switch and the fourth switch; in: When the sensing capacitor voltage is higher than the first reference voltage, the second current source and the third current source discharge the flying capacitor; When the sensing capacitor voltage is lower than the second reference voltage, the first current source and the fourth current source charge the flying capacitor; and When the sensing capacitor voltage is between the first reference voltage and the second reference voltage, the first voltage comparator and the second voltage comparator disable the first current source, the second current source, the third current source, and the fourth current source. 9 . The pre-bias control circuit of claim 8 , wherein the voltage sensor comprises an operational amplifier or an error amplifier.

10. The pre-bias control circuit as described in claim 8, further comprising a NOR gate coupled to the output terminal of the first voltage comparator and the output terminal of the second voltage comparator, for generating an indication signal according to an output signal of the first voltage comparator and an output signal of the second voltage comparator.

11. The pre-bias control circuit as claimed in claim 10, further comprising a buffer coupled to the NOR gate.

12. The pre-bias control circuit as claimed in claim 8, further comprising a resistor divider coupled to the inverting input terminal of the first voltage comparator and the non-inverting input terminal of the second voltage comparator, for generating the first reference voltage and the second reference voltage according to input voltages.

13. The pre-bias control circuit of claim 12, wherein the resistor divider comprises: The first resistor comprises: A first terminal for receiving the input voltage; and A second terminal is coupled to the inverting input terminal of the first voltage comparator; The second resistor comprises: A first end coupled to the second end of the first resistor; and A second terminal is coupled to the non-inverting input terminal of the second voltage comparator; and The third resistor comprises: A first end coupled to the second end of the second resistor; and The second end is coupled to the ground end.

14. The pre-bias control circuit of claim 13, wherein the first reference voltage and the second reference voltage are approximately half of the input voltage, and the first reference voltage is higher than the second reference voltage.

15. A method for biasing a flying capacitor using a pre-bias control circuit, the pre-bias control circuit comprising the flying capacitor, a voltage sensor and a voltage-controlled current source, the voltage sensor comprising an inverting input terminal coupled to the flying capacitor, a non-inverting input terminal coupled to the flying capacitor, and an output terminal, the voltage-controlled current source comprising a reference terminal, an input terminal coupled to the output terminal of the voltage sensor, a current output terminal coupled to the flying capacitor, and a current return terminal coupled to the flying capacitor, the method comprising: generating a sensing capacitor voltage according to a capacitor voltage across the flying capacitor; comparing the sense capacitor voltage to a reference voltage to generate a difference voltage; and A source current or a sink current is generated according to the difference voltage, wherein the source current or the sink current is proportional to the difference voltage.

16. The method of claim 15, wherein the pre-bias control circuit further comprises a first switch coupled between the non-inverting input terminal and the flying capacitor, and a second switch coupled between the inverting input terminal and the flying capacitor, the method further comprising switching the first switch and the second switch.

17. The method of claim 15, wherein the pre-bias control circuit further comprises a resistor divider, and the method further comprises providing an input voltage, the reference voltage being half of the input voltage.

18. A method for biasing a flying capacitor, comprising: The voltage sensor generates a sensing capacitor voltage according to the capacitor voltage across the flying capacitor; Comparing the sensing capacitor voltage with a first reference voltage by a first voltage comparator; When the sensed capacitor voltage is higher than the first reference voltage, discharging the flying capacitor through a first current source; comparing the sensing capacitor voltage with a second reference voltage by a second voltage comparator; and When the sensing capacitor voltage is lower than the second reference voltage, the flying capacitor is charged by the second current source.

19. The method of claim 18, further comprising: When the first current source and the second current source are disabled for a delay time, an indication signal is generated.

20. The method of claim 18, further comprising: When the sensing capacitor voltage is between the first reference voltage and the second reference voltage, the first current source and the second current source are disabled, wherein the first reference voltage is higher than the second reference voltage.

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