SIP (Session Initiation Protocol)-based triaxial accelerometer analog data acquisition circuit and method
By adopting SIP technology and a combination of multiple circuits in the three-axis accelerometer analog data acquisition circuit, the existing ADC acquisition circuit has solved the problems of poor power supply capacity and high noise, and achieved higher acquisition accuracy and signal purity.
Patent Information
- Application Number
- CN202510064401.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-15
- Publication Date
- 2025-05-16
AI Technical Summary
The existing ADC acquisition circuit has poor bipolar power supply capacity, and the input noise is high, resulting in poor acquisition accuracy.
The SIP-based three-axis accelerometer is used to simulate data acquisition circuit, and the acquisition accuracy and signal purity are improved through the combination of digital circuits, analog power supply circuits, front-end conditioning circuits and analog-to-digital conversion circuits.
It significantly improves the acquisition accuracy, reduces noise interference, and ensures good waveform integrity of the signal, so that the effective number of bits ENOB of the acquisition circuit reaches 18.5~20.2, and the standard deviation reaches 3.1~19.6 within the entire range.
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Figure CN120017061A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of digital filtering and relates to a three-axis accelerometer analog data acquisition circuit and method based on SIP. Background Art
[0002] With the upgrading of missile weapon system's requirements for running speed, maneuverability, reliability and other aspects, the overall demand for the development of miniaturization, lightweight and intelligent weapon equipment is growing. In previous designs, the inertial group data acquisition circuit constructed with packaged devices occupied a large printed circuit board area and system volume, which could not meet the development trend of miniaturization and micro-miniaturization of missile systems.
[0003] SIP is a technology that integrates multiple chips with different functions (such as processors, memory, sensors, etc.) and other passive components (such as resistors, capacitors, etc.) in one package. The use of SIP technology can not only reduce the design complexity of the entire system and reduce design risks, but also significantly reduce the size, power consumption and weight of the system. At the same time, because SIP uses bare die direct packaging technology, the connection between chips is very short, and the parasitic capacitance and resistance of the entire system are very small, which is convenient for improving system performance.
[0004] In traditional inertial navigation systems, data acquisition of triaxial accelerometers is a crucial link, and the choice of power supply chip directly affects the stability and accuracy of data acquisition. The existing ADC acquisition circuit has poor bipolar power supply capability and large input noise, resulting in poor acquisition accuracy. Summary of the invention
[0005] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a three-axis accelerometer analog data acquisition circuit and method based on SIP. The SIP interface transmits the three-axis accelerometer acquisition data through an analog-to-digital conversion circuit, improves the acquisition accuracy, enhances applicability, and solves the technical problems in the prior art that the existing ADC acquisition circuit has poor bipolar power supply capacity and large input noise resulting in poor acquisition accuracy.
[0006] In order to achieve the above object, the present invention adopts the following technical solution: The invention provides a three-axis accelerometer analog data acquisition circuit based on SIP, comprising a digital circuit, an analog power supply circuit, a front-end conditioning circuit, and an analog-to-digital conversion circuit; the digital circuit is used for converting an input voltage, and the converted voltage is input to the front-end conditioning circuit and the analog power supply circuit; the analog power supply circuit receives the conversion voltage from the digital circuit, performs further voltage conversion, and inputs the converted voltage to the analog-to-digital conversion circuit; the front-end conditioning circuit is used for receiving an input signal, filtering the input signal, and inputting the filtered output signal to the analog-to-digital conversion circuit; the analog-to-digital conversion circuit is used for receiving a filtered signal from the front-end conditioning circuit and a power supply voltage from the analog power supply circuit, and performs three-axis acceleration data acquisition and analog-to-digital conversion.
[0007] Furthermore, the front-end conditioning circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a first operational amplifier, and a second operational amplifier; one end of the resistor R2 is connected to the resistor R1, and the other end is connected to the input end of the first operational amplifier, the input end of the first operational amplifier is also connected to the capacitor C5, the other end of the capacitor C5 is connected to one end of the resistor R1, and the other end of the resistor R1 is connected to the input signal, the output end of the first operational amplifier is connected to the capacitor C5 and one end of the resistor R3, the other end of the resistor R3 is connected to the capacitor C3 and the resistor R4, the other end of the resistor R4 is connected to the input end of the second operational amplifier and one end of the capacitor C4, and the other end of the capacitor C3 is connected to the input and output ends of the second operational amplifier.
[0008] Furthermore, the surface coating of the stamp hole pad is nickel-palladium-gold, wherein the thickness of the nickel layer is 3 μm. 6μm, the thickness of palladium layer is 0.05μm 0.3μm, the thickness of the gold layer is greater than 0.03μm.
[0009] Furthermore, the other end of the capacitor C4 is grounded, one end of the capacitor C2 is connected to the input end of the first operational amplifier, and the other end is grounded.
[0010] Furthermore, the digital circuit converts the ±15V voltage into a ±5V voltage and inputs it to the front-end conditioning circuit; the digital circuit converts the ±15V voltage into a +5V voltage and inputs it to the analog power supply circuit.
[0011] Furthermore, the analog power supply circuit converts the +5V voltage into ±2.5V voltage and inputs it into the analog-to-digital conversion circuit.
[0012] Furthermore, the first operational amplifier model and the second operational amplifier model are RS8452.
[0013] Furthermore, the analog-to-digital conversion circuit is powered by a bipolar power supply, and converts the +2.5V voltage into the ±2.5V voltage through the voltage reference LHR3025.
[0014] Furthermore, the main chip of the analog-to-digital conversion circuit is ADC LHA5658.
[0015] Furthermore, the cut-off frequency of the input signal of the front-end adjustment circuit is 1 KHz.
[0016] The present invention also provides a SIP-based three-axis accelerometer analog data acquisition method, based on the above-mentioned SIP three-axis accelerometer analog data acquisition circuit, including the following steps: the digital circuit converts the input voltage into the voltage required by the front-end conditioning circuit and the analog power supply circuit; the front-end conditioning circuit filters the input signal and inputs it to the analog-to-digital conversion circuit; the analog power supply circuit converts the voltage obtained in step 1 again and inputs it to the analog-to-digital conversion circuit; the analog-to-digital conversion circuit collects and converts the three-axis acceleration data.
[0017] Compared with the prior art, the present invention has the following beneficial technical effects: The invention discloses a three-axis accelerometer analog data acquisition circuit based on SIP, which improves the front-end conditioning circuit and ADC power supply, so that the analog signal input by the ADC chip is purer, the noise interference is greatly reduced, the analog signal can be quantized more accurately, the quantization error is reduced, and the signal output by the front-end conditioning circuit is ensured to maintain good waveform integrity during transmission to the analog-to-digital conversion circuit, so that the effective number of bits (ENOB) of the acquisition circuit conversion reaches 18.5-20.2 within the full range, and the standard deviation reaches 3.1-19.6 within the full range.
[0018] The invention discloses a three-axis accelerometer analog data acquisition circuit based on SIP, which adopts SIP miniaturization packaging technology, reduces the volume of the acquisition circuit, improves the system integration, meets its universal design, and can be widely used in the fields of missile weapon attitude control and the like. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 It is a structural diagram of a three-axis accelerometer analog data acquisition circuit based on SIP of the present invention; Figure 2 is a circuit diagram of a front-end conditioning circuit in an embodiment of the present invention; Figure 3 A power supply diagram of a front-end conditioning circuit in an embodiment of the present invention; Figure 4 This is a flow chart of ADC register configuration of the analog-to-digital conversion circuit in an embodiment of the present invention. DETAILED DESCRIPTION
[0020] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0021] Example 1 The invention solves the problems of poor bipolar power supply performance and large input noise of an ADC acquisition circuit in a three-axis accelerometer analog data acquisition process, and provides a three-axis accelerometer analog data acquisition circuit based on SIP.
[0022] A three-axis accelerometer analog data acquisition circuit based on SIP has the following characteristics: first, it has high integration accuracy, relying on high-precision sensor units, optimized signal conditioning links and precise analog-to-digital conversion to ensure high accuracy of collected data; second, the device occupancy area is reduced, and the circuit layout is more concise and compact through highly integrated SIP packaging and compact peripheral circuit design, which has broad application prospects in many fields.
[0023] A three-axis accelerometer analog data acquisition circuit based on SIP includes a digital circuit, an analog power supply circuit, a front-end conditioning circuit, and an analog-to-digital conversion circuit.
[0024] The digital circuit converts the input voltage and provides the converted voltage to the front-end conditioning circuit and the analog power supply circuit; the analog power supply circuit receives the converted voltage from the digital circuit, performs further voltage conversion, and provides the converted voltage to the analog-to-digital conversion circuit; the front-end conditioning circuit receives the input signal, filters the input signal, and provides the filtered output signal to the analog-to-digital conversion circuit; the analog-to-digital conversion circuit receives the filtered signal from the front-end conditioning circuit and the power supply voltage from the analog power supply circuit, and collects and performs analog-to-digital conversion on the three-axis acceleration data.
[0025] Specifically, Figure 1 As shown, the digital circuit converts the input ±15V voltage, one way is converted into ±5V voltage through a three-terminal regulator and input to the front-end conditioning circuit, and the other way is converted into +5V voltage and input to the analog power supply circuit.
[0026] The three-terminal voltage regulator has a simple structure and stable performance. For positive voltage conversion, +15V is converted to +5V through the internal voltage stabilization circuit structure. According to the voltage stabilization principle, the higher input voltage is stepped down and stabilized, so that the output end can stably output +5V voltage. Similarly, for negative voltage, that is, when converting from -15V to -5V, it can also effectively adjust the voltage amplitude according to the corresponding working mechanism to ensure the output of a stable -5V voltage.
[0027] The voltage regulation principle includes sampling feedback, control adjustment, and stable output.
[0028] Sampling feedback: There is usually a voltage sampling circuit inside the three-terminal regulator to monitor the output voltage in real time. When the output voltage deviates from the +5V set value, the sampling circuit feeds back the output voltage change information to the control circuit.
[0029] Control adjustment: The control circuit adjusts the conduction degree of the adjustment element according to the feedback information. If the output voltage increases, the control circuit will reduce the conduction degree of the adjustment element, increase its resistance, and thus reduce the output voltage; conversely, if the output voltage decreases, the control circuit will increase the conduction degree of the adjustment element, reduce its resistance, and increase the output voltage.
[0030] Stable output: Through continuous feedback adjustment, the three-terminal regulator can keep the output voltage stable at +5V when the input voltage and load change. Even if the input voltage fluctuates within a certain range, or the load current changes, the three-terminal regulator can quickly adjust to ensure that the output voltage always remains near the set +5V value with a very small fluctuation range.
[0031] The working principle of the three-terminal regulator from -15V to -5V: When the input voltage is -15V, the adjustment element will change its conduction state according to the feedback, so that a -10V voltage drop is generated across it (-15V-(-5V)=-10V), and a stable -5V voltage is obtained at the output. In addition, as the input voltage fluctuates or the load changes, the resistance of the adjustment element will change dynamically to continuously maintain the -5V voltage stability at the output.
[0032] like Figure 2 As shown, the front-end conditioning circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a first operational amplifier, and a second operational amplifier.
[0033] One end of the resistor R2 is connected in series with the resistor R1, and the other end is connected to the input end of the first operational amplifier. The input end of the first operational amplifier is also connected to the capacitor C5, the other end of the capacitor C5 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the capacitor C2, the other end of the capacitor C2 is grounded, the other end of the resistor R1 is connected to the input signal, the output end of the first operational amplifier is connected to the capacitor C5 and one end of the resistor R3, the other end of the resistor R3 is connected to the capacitor C3 and the resistor R4, the other end of the resistor R4 is connected to the input end of the second operational amplifier and one end of the capacitor C4, the other end of the capacitor C3 is connected to the input end and the output end of the second operational amplifier, and the other end of the capacitor C4 is grounded. The model of the first operational amplifier and the second operational amplifier is RS8452.
[0034] In the inertial navigation acquisition system, the acquisition value of the accelerometer is generally a small current signal with a cutoff frequency of less than 1KHz. The clutter signal and noise in the signal affect the accurate measurement of the signal. In order to ensure the accuracy of the acquisition value, filtering must be performed before analog-to-digital conversion.
[0035] When designing a traditional RC passive filter, there is no freedom of choice in setting the impedance of the front and rear stages and the characteristics. Therefore, a Butterworth filter is selected, which has a simple design, no obvious disadvantages in performance, and a low requirement for the Q value of the components constituting the filter. Therefore, the present invention designs a fourth-order Butterworth active low-pass filter as an ADC front-end conditioning circuit based on the basic characteristics of the accelerometer acquisition value. The cutoff frequency of the input signal is 1KHz, and the cutoff frequencies of each level of the fourth-order filter are the same, only the Q value is different. According to the Butterworth LPF normalization table in Table 1, the Q value is determined, and the circuit is connected from small to large according to the Q value.
[0036] Table 1
[0037] First, check the cutoff frequency and Q of the 4th-order Butterworth from Table 1. : 1.0, :0.541196 : 1.0, :1.306563 Cut-off frequency of each stage ( ) are all 1kHz, only the Q value is different. In addition, since the frequency characteristic will have a peak when the Q value is large, the output of the operational amplifier is easy to saturate, so the circuit is connected in order from small to large Q value.
[0038] =22nF, =1kHz, we can calculate , , .
[0039] =
[0040] = =
[0041] =
[0042] Specifically: = = =20.325nF = = = =7.834kΩ = = =18.778nF =22nF, =1kHz, we can calculate , , .
[0043] =
[0044] = =
[0045] =
[0046] Specifically: = = =8.419nF = = = =18.913kΩ = = =3.118nF resistance The bias current of the operational amplifier generates a DC offset voltage, so as an application parameter, its upper limit should be around tens of kΩ in the case of a bipolar input operational amplifier; and about hundreds of kΩ in the case of a FET input operational amplifier.
[0047] The front-end conditioning circuit filters the input signal. This is mainly to remove unwanted interference signals and noise while retaining useful signals. After filtering, the quality of the signal input to the analog-to-digital conversion circuit is improved. In the analog-to-digital conversion circuit, a clean signal can reduce quantization errors. If there are interference signals, it may cause erroneous digital outputs during the quantization process.
[0048] For example, in a high-precision temperature measurement circuit, the filtered analog temperature signal is input into the ADC and can be more accurately converted into a digital signal, thereby improving the accuracy of temperature measurement. At the same time, in subsequent processing links such as signal amplification, the filtered signal can avoid problems such as overload or nonlinear distortion of the amplifier due to interference signals, thereby ensuring the stable operation of the circuit system. In this embodiment, the analog-to-digital conversion circuit is referred to as ADC.
[0049] like Figure 3 As shown, the analog power supply circuit converts the +5V voltage converted by the digital circuit into ±2.5V voltage and inputs it to the analog-to-digital conversion circuit.
[0050] The voltage reference LHR3025 is used as a stable +2.5V voltage source. It is converted into a ±2.5V bipolar voltage output through the RS8452 converter. The bipolar power supply simplifies the input design of the analog-to-digital conversion circuit, reduces unnecessary circuit components, and thus reduces the design complexity. The bipolar power supply helps to reduce the interference of external noise, improve the anti-interference ability of the circuit, and at the same time reduce the design risk and ensure the stability and reliability of the circuit. Compared with the unipolar power supply, the bipolar power supply has more advantages in measurement range, linearity and stability, thereby improving the accuracy of the measurement.
[0051] RS8452 not only has the voltage conversion function, but also can build an inverter and a follower at the same time. The high input impedance of the follower can receive signals from a high impedance signal source without causing a significant load effect on the signal source, thereby effectively isolating the input circuit and the signal source, ensuring the integrity and accuracy of the signal; the low output impedance can ensure that the output signal can be smoothly transmitted to the analog-to-digital conversion circuit, reducing signal loss and interference, and can drive a larger load. The inverter can quickly process and amplify the input signal, effectively improving the speed and accuracy of signal processing, greatly improving the performance, and is suitable for high-speed signal processing applications. It can achieve accurate inversion and amplification functions in a wider frequency range, and can quickly respond to changes in the input signal to reduce signal distortion.
[0052] In the actual process, through the flexible configuration of the SPI interface, the three-axis accelerometer data acquisition can be realized, including continuous acquisition mode and single acquisition mode. The SPI interface is shown in Table 2. Continuous acquisition: While collecting, the accelerometer will transmit the collected three-axis acceleration data back to the master device (such as a microcontroller) through the MISO line of the SPI interface in a certain format (such as high bits first, low bits last, etc.). The master device receives these data bit by bit under the synchronization of the SCK clock signal, and then performs subsequent processing, such as converting the received binary data into actual acceleration values (converted by known parameters such as resolution and range), or directly storing the data in memory for further analysis. This process will continue to cycle as the accelerometer continues to collect data. As long as the collection operation is not stopped or an abnormal situation is encountered, real-time three-axis acceleration data can be obtained all the time.
[0053] Table 2
[0054] The single acquisition configures the accelerometer through the SPI interface. The configuration command sent at this time focuses on instructing the accelerometer to perform a single acquisition operation. For example, sending a specific single acquisition trigger command will cause the acquisition circuit inside the accelerometer to start a data acquisition process, measure the acceleration of the three axes, and after obtaining the corresponding data, wait for the master device to read it.
[0055] Example 2 A three-axis accelerometer analog data acquisition method based on SIP includes the following steps: a digital circuit converts an input voltage of ±15V into a voltage of ±5V required by a front-end conditioning circuit and a voltage of +5V required by an analog power supply circuit; the front-end conditioning circuit filters the input signal and inputs it to an analog-to-digital conversion circuit; the analog power supply circuit converts the +5V voltage output by the digital circuit into a ±2.5V voltage again and inputs it to the analog-to-digital conversion circuit; the analog-to-digital conversion circuit acquires and converts the three-axis acceleration data.
[0056] like Figure 4 As shown in the figure, the analog-to-digital conversion circuit continuously inputs 64 clocks through SCLK (clock signal line). At the same time, CS (chip select signal) is pulled low and DIN (data input line) is pulled high to reset the ADC, so that the internal ADC is restored to the initial configuration; then the ADC's selected channel, voltage reference, filter, sampling rate and reading mode are configured in sequence, and the acquisition process is started. Finally, a low pulse is sent to the SYNC pins of the three ADCs at the same time as a synchronization signal.
[0057] Specifically, ADC reset: 64 clock pulses are continuously input through SCLK (clock signal line). This process provides the basic timing basis for the entire reset and subsequent configuration operations. At the same time, pulling CS (chip select signal) low means selecting the corresponding ADC chip and making it operational, while DIN (data input line) is pulled high. This combined operation constitutes a specific signal condition that triggers ADC reset.
[0058] ADC configuration: First, configure the selected channel of the ADC. In different application scenarios, it may be necessary to collect analog signals from different sources. By configuring the selected channel, you can specify that the ADC obtains analog signals from specific input pins for conversion. Secondly, voltage reference configuration: The voltage reference determines the range and accuracy of the ADC conversion. You can choose an internal reference voltage source, which has a stable voltage value and high accuracy, to ensure the accuracy of the conversion result; you can also connect an external reference voltage source to meet some special application scenarios with high precision or specific voltage range requirements. After that, filter configuration: filter the input analog signal to remove noise and interference, improve signal quality, and thus improve the accuracy of ADC conversion, so that the useful frequency band in the audio signal can pass smoothly into the ADC for conversion. After that, sampling rate configuration: determine the number of times the ADC samples the analog signal per unit time. Finally, read mode configuration: different read modes determine how the host device (such as a microcontroller) obtains the converted digital data from the ADC. Common read modes include continuous read, single read, etc. Continuous read mode allows the master device to continuously obtain the latest conversion data; in the scenario of intermittent data collection, the single read mode can meet the needs while saving system resources.
[0059] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "top", "bottom", "inside", "outside", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.
[0060] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way are not interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
Claims
1. A three-axis accelerometer analog data acquisition circuit based on SIP, characterized in that: Including digital circuit, analog power supply circuit, front-end conditioning circuit, analog-to-digital conversion circuit; The digital circuit is used to convert the input voltage, and the converted voltage is input to the front-end conditioning circuit and the analog power supply circuit; The analog power supply circuit receives the converted voltage from the digital circuit, performs further voltage conversion, and inputs the converted voltage to the analog-to-digital conversion circuit; The front-end conditioning circuit is used to receive the input signal, filter the input signal, and input the filtered output signal to the analog-to-digital conversion circuit; The analog-to-digital conversion circuit is used to receive the filtered signal from the front-end conditioning circuit and the power supply voltage from the analog power supply circuit, and to collect and perform analog-to-digital conversion on the three-axis acceleration data.
2. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 1, characterized in that: The front-end conditioning circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a first operational amplifier, and a second operational amplifier; One end of the resistor R2 is connected to the resistor R1, and the other end is connected to the input end of the first operational amplifier. The input end of the first operational amplifier is also connected to the capacitor C5. The other end of the capacitor C5 is connected to one end of the resistor R1. The other end of the resistor R1 is connected to the input signal. The output end of the first operational amplifier is connected to the capacitor C5 and one end of the resistor R3. The other end of the resistor R3 is connected to the capacitor C3 and the resistor R4. The other end of the resistor R4 is connected to the input end of the second operational amplifier and one end of the capacitor C4. The other end of the capacitor C3 is connected to the input and output ends of the second operational amplifier.
3. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 2, characterized in that: The other end of the capacitor C4 is grounded. One end of the capacitor C2 is connected to the input end of the first operational amplifier, and the other end is grounded.
4. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 1, characterized in that: The digital circuit converts the ±15V voltage into a ±5V voltage and inputs it into the front-end conditioning circuit; The digital circuit converts the ±15V voltage into a +5V voltage and inputs it into the analog power supply circuit.
5. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 4, characterized in that: The analog power supply circuit converts the +5V voltage into ±2.5V voltage and inputs it into the analog-to-digital conversion circuit.
6. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 2, characterized in that: The first operational amplifier model and the second operational amplifier model are RS8452.
7. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 1, characterized in that: The analog-to-digital conversion circuit is powered by a bipolar power supply and converts a +2.5V voltage into a ±2.5V voltage through a voltage reference LHR3025.
8. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 1, characterized in that: The main chip of the analog-to-digital conversion circuit is ADC LHA5658.
9. The SIP-based three-axis accelerometer analog data acquisition circuit according to claim 1, characterized in that: The cut-off frequency of the input signal of the front-end adjustment circuit is 1 KHz.
10. A three-axis accelerometer simulation data acquisition method based on SIP, characterized in that: The SIP-based three-axis accelerometer analog data acquisition circuit according to any one of claims 1 to 9 comprises the following steps: The digital circuit converts the input voltage into the voltage required by the front-end conditioning circuit and the analog power supply circuit; The front-end conditioning circuit filters the input signal and inputs it to the analog-to-digital conversion circuit; The analog power supply circuit converts the voltage obtained in step 1 again and inputs it to the analog-to-digital conversion circuit; The analog-to-digital conversion circuit collects and converts the three-axis acceleration data.