Optical receiving assembly and optical modem

By using integrated circuit process to manufacture high-voltage ESD protection devices and filter circuits in the light receiving component, high-voltage protection is achieved using diodes with P-I-N structure, the problems of signal interference and high-voltage protection in the light receiving component are solved, and communication quality and packaging yield are improved.

CN120017166APending Publication Date: 2025-05-16苏州瀚宸科技有限公司
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Patent Information

Application Number
CN202311522649.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-15
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

The optical receiving components are easily disturbed by signal, resulting in a decline in communication quality. The prior art solves the signal interference problem by introducing filter circuits, but it leads to problems such as high voltage protection.

Method used

Design an optical receiving component, use integrated circuit technology to manufacture high-voltage ESD protection devices and filter circuits, and realize high-voltage protection through diodes with P-I-N structure to reduce the impact on the packaging.

Benefits of technology

It effectively solves the problem of medium and high voltage protection of optical receiving components, improves communication quality, reduces costs, and improves the yield of packaging.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to the optical receiving assembly and the optical modem, a first protection circuit manufactured through a first integrated circuit process is arranged on a first substrate, and the first protection circuit comprises a high-voltage ESD protection device; a photoelectric converter manufactured by a second integrated circuit process is arranged on the second substrate; an amplifying circuit manufactured by a third integrated circuit process is arranged on the third substrate; the high-voltage bias end is used for receiving a high-voltage bias signal, the high-voltage bias end is connected with one end of the first protection circuit, the other end of the first protection circuit is connected with the first end of the photoelectric converter, and the second end of the photoelectric converter is connected with the input end of the amplification circuit. According to the optical receiving assembly, the first substrate is introduced, the first protection circuit manufactured through the first integrated circuit process is arranged on the first substrate, and the first protection circuit comprises one or more high-voltage ESD protection devices, so that the derivative problems such as high-voltage protection generated after a filter circuit is introduced into the optical receiving assembly are well solved.
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Description

Technical Field

[0001] The present invention relates to the technical field of optical communication, and in particular to an optical receiving component and an optical modem. Background Art

[0002] As Gigabit technology matures and is gradually implemented, home users' demand for higher-speed networks is also growing, which makes 10G fiber technology used in home broadband access one of the key areas of concern for operators in the next few years. Figure 1 , which is a schematic diagram of fiber-to-the-home, where the optical modem is the popular name for the optical network unit ONU (Optical Network Unit), which is the terminal equipment for optical fiber access.

[0003] Taking the optical modem as an example, it is essentially an optical modem, which converts the optical signal of the optical fiber into an electrical signal. One of its core components is the Receiver Optical Subassembly (ROSA), which can convert the optical signal into an electrical signal and amplify it.

[0004] Optical receiving components are susceptible to signal interference, so it is generally necessary to introduce a filtering circuit / network to solve the problem of signal interference. However, this will also lead to a series of problems. Summary of the invention

[0005] In view of the above problems, the present invention provides an optical receiving component and an optical modem, which are described in detail below.

[0006] According to the first aspect, an embodiment provides a light receiving component, including a first substrate, a second substrate, a third substrate, a high voltage bias terminal and an output terminal;

[0007] A first protection circuit manufactured by a first integrated circuit process is provided on the first substrate, and the first protection circuit includes one or more high-voltage ESD protection devices; a photoelectric converter manufactured by a second integrated circuit process is provided on the second substrate, and the photoelectric converter is used to convert an optical signal into an electrical signal; an amplifier circuit manufactured by a third integrated circuit process is provided on the third substrate, and the amplifier circuit is used to amplify the electrical signal and then output it, and the output end of the amplifier circuit serves as the output end of the optical receiving component;

[0008] The high-voltage bias end is used to receive a high-voltage bias signal, the high-voltage bias end is connected to one end of the first protection circuit, the other end of the first protection circuit is connected to the first end of the photoelectric converter, and the second end of the photoelectric converter is connected to the input end of the amplifier circuit.

[0009] In one embodiment, the third substrate also has a second protection circuit manufactured by the third integrated circuit process, and the second protection circuit includes one or more high-voltage ESD protection devices; the high-voltage bias end is connected to one end of the second protection circuit, and the other end of the second protection circuit is connected to the first end of the photoelectric converter.

[0010] In one embodiment, the high-voltage ESD protection device includes a diode with a PIN structure.

[0011] In one embodiment, the PIN structure diode includes a shallow trench isolation region formed on the first substrate, a P-type region and an N-type region formed on the shallow trench isolation region, an intrinsic region on the shallow trench isolation region into which P-type carriers are not injected and N-type carriers are not injected, the intrinsic region separates the P-type region from the N-type region; and contact holes are respectively arranged on the P-type region and the N-type region.

[0012] In one embodiment, the second protection circuit further includes a filter circuit.

[0013] In one embodiment, the first protection circuit further includes a filter circuit.

[0014] In one embodiment, one or more high-voltage ESD protection devices are respectively connected to both ends of the filter circuit; the high-voltage bias signal reaches the filter circuit through the high-voltage ESD protection device at one end of the filter circuit, and then reaches the high-voltage ESD protection device at the other end of the filter circuit after passing through the filter circuit and is output to the first end of the photoelectric converter.

[0015] In one embodiment, the high voltage ESD protection device further includes a resistor.

[0016] In one embodiment, the resistor is a polysilicon resistor disposed on the shallow trench isolation region.

[0017] In one embodiment, the first integrated circuit process and the third integrated circuit process are the same integrated circuit process or different integrated circuit processes.

[0018] In one embodiment, the first integrated circuit process is a CMOS integrated circuit process; and / or the third integrated circuit process is a CMOS integrated circuit process.

[0019] In one embodiment, the CMOS integrated circuit process includes a 0.18 um or less CMOS integrated circuit process.

[0020] In one embodiment, the first substrate and the third substrate are the same substrate.

[0021] In one embodiment, the first substrate, the second substrate and the third substrate are the same substrate.

[0022] In one embodiment, there are multiple first substrates, and the first protection circuits on the first substrates are connected in parallel.

[0023] In one embodiment, the high voltage bias signal is greater than or equal to 15 volts, 20 volts, 25 volts or 30 volts.

[0024] According to a second aspect, an embodiment provides an optical modem, comprising: an optical receiving component as described in any embodiment of the present invention.

[0025] According to the optical receiving component and optical modem of the above-mentioned embodiments, a first substrate is introduced, on which a first protection circuit manufactured by a first integrated circuit process is provided, and the first protection circuit includes one or more high-voltage ESD protection devices. Therefore, the derivative problems such as high-voltage protection generated after the filter circuit is introduced into the optical receiving component are solved relatively well. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of a fiber-to-the-home related structure;

[0027] Figure 2 A schematic diagram of the structure of a light receiving component according to an embodiment;

[0028] Figure 3 A schematic diagram of the structure of a light receiving component according to an embodiment;

[0029] Figure 4 is a structural schematic diagram of a first protection circuit according to an embodiment;

[0030] Figure 5 Two structural schematic diagrams of STI diodes;

[0031] Figure 6 Two structural schematic diagrams of Gate diodes;

[0032] Figure 7 A schematic diagram of the structure of a diode with a PIN structure according to an embodiment;

[0033] Figure 8 A current-voltage curve diagram of a PIN structure diode according to an embodiment;

[0034] Figures 9(1), 9(2), 9(3), 9(4) and 9(5) are several schematic diagrams of the first protection circuit;

[0035] Fig.10 A schematic diagram of the structure of a light receiving component according to an embodiment;

[0036] Fig.11 The figure is a schematic diagram of the structure of an optical receiving component according to an embodiment. DETAILED DESCRIPTION

[0037] The present invention is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein similar elements in different embodiments adopt associated similar element numbers. In the following embodiments, many detailed descriptions are for making the present application better understood. However, those skilled in the art can easily recognize that some features can be omitted in different situations, or can be replaced by other elements, materials, methods. In some cases, some operations related to the present application are not shown or described in the specification, this is to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations according to the description in the specification and the general technical knowledge in the art.

[0038] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. At the same time, the steps or actions in the method description can also be interchanged or adjusted in a manner that is obvious to those skilled in the art. Therefore, the various sequences in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a required sequence, unless otherwise specified that a certain sequence must be followed.

[0039] The serial numbers of the components in this document, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings).

[0040] Taking the optical modem as an example, the mainstream optical modems on the market generally have the function of Wi-Fi routers integrated inside. Generally speaking, the carriers of Wi-Fi signals are divided into 2.4GHz and 5GHz, and the frequencies of these two signals are close to the base frequency of the XGPON / XGSPON 10Gbps transmission rate. If the Wi-Fi signal is coupled to the optical receiving component ROSA by conduction or radiation, the sensitivity of the optical receiving component ROSA will be deteriorated, thereby affecting the communication quality. In some solutions, the optical receiving component ROSA is generally powered by a board-level integrated power module, and the power supply noise will also affect the sensitivity of the optical receiving component ROSA.

[0041] In some schemes, the optical receiving assembly ROSA mainly includes a photoelectric converter and an amplifier circuit. The photoelectric converter converts the optical signal into an electrical signal, and the amplifier circuit amplifies the electrical signal as an output. The optical receiving assembly ROSA can be packaged and sealed using TO-CAN; in addition, the optical receiving assembly ROSA generally has a high-voltage bias terminal for providing a high-voltage bias for the photoelectric converter, especially when the photoelectric converter is implemented using an avalanche photodiode (APD) or the like.

[0042] In some solutions, a filtering network can be introduced to solve or reduce problems such as Wi-Fi signal interference. For example, a filtering network is formed by discrete devices such as wire binding inductors, capacitors and resistors to filter the ports that provide bias and power to the optical receiving component. In this solution, the optical receiving component ROSA needs to seal at least four devices, including the photoelectric converter, the amplifier circuit, and at least two discrete capacitors configured for the bias end and the power end. This not only increases the cost of using discrete devices, but also the yield of the package will drop sharply as the number of sealed devices increases. In addition, the ability of this solution to suppress interference is ultimately limited by the size of the parasitic inductance of the wire binding in the package.

[0043] In some solutions, the filtering network can be implemented through an integrated circuit and packaged into a chip. For example, the filtering network configured for the bias end that provides the bias voltage and the power end that provides the power supply can be integrated into a chip implemented with a mature process technology, which can solve the problem relatively well.

[0044] In the scheme of forming a filter network by discrete capacitors and the like, and realizing the filter network by integrated chips, since the bias end generally provides a high voltage bias, there is a problem of high voltage protection. In the scheme of forming a filter network by discrete capacitors and the like, the discrete capacitors are generally high voltage capacitors and have a large capacitance, so the high voltage protection problem caused by the high voltage bias end can be partially solved. Therefore, in such a scheme, the technicians generally do not realize that high voltage protection is required. When the filter network is realized by an integrated chip, the applicant finds that the problem of high voltage protection can no longer be ignored. This is one; second, even if the technicians realize that high voltage protection is required in this case, if the usual high voltage protection device is used for high voltage protection, there will still be problems with the use of discrete devices, so that the filter network realized by the integrated chip does not play its due role. Similarly, the high voltage protection circuit generally includes a plurality of reverse biased diodes and power clamps, and these devices are packaged into a high voltage protection chip. The size of the high voltage protection chip is relatively large compared to the optical receiving component, which is very unfavorable for packaging and has a high cost.

[0045] Some embodiments provide a light receiving component. Figure 2, the optical receiving component includes a first substrate 01, a second substrate 02, a third substrate 03, a high voltage bias terminal 11 and an output terminal 13; in some embodiments, please refer to Figure 3 The optical receiving component may further include a power supply terminal 12; and there may be two output terminals 13.

[0046] It should be noted that the first substrate 01, the second substrate 02 and the third substrate 03 in this article refer to substrates involved in integrated circuit manufacturing, which are generally wafers made of semiconductor single crystal materials. Integrated circuits can be manufactured through integrated circuit processes based on the substrates.

[0047] In some embodiments, the ports and substrates of the optical receiving assembly may be disposed on the base 100 and packaged.

[0048] In some embodiments, please refer to Figure 4 A first protection circuit 20 manufactured by a first integrated circuit process is provided on a first substrate 01 . The first protection circuit 20 includes one or more high-voltage ESD (Electro-Static discharge) protection devices 21 .

[0049] In some embodiments, a photoelectric converter 30 manufactured by a second integrated circuit process is provided on the second substrate 02, and the photoelectric converter 30 is used to convert an optical signal into an electrical signal. In some embodiments, the photoelectric converter 30 may be a photodiode, such as an avalanche photodiode.

[0050] In some embodiments, an amplifier circuit 40 manufactured by a third integrated circuit process is provided on the third substrate 03, and the amplifier circuit 40 is used to amplify the electrical signal and output it. For example, the amplifier circuit 40 amplifies the input current signal and outputs it; for another example, the amplifier circuit 40 amplifies the input voltage signal and outputs it; for another example, the amplifier circuit 40 converts the input current signal into a voltage signal and outputs it to achieve the function of signal amplification. In some embodiments, the amplifier circuit 40 can be a transimpedance amplifier.

[0051] The high voltage bias terminal 11 is used to receive a high voltage bias signal. In some embodiments, the high voltage bias signal is greater than or equal to a high voltage threshold, which may be, for example, 15 volts, 20 volts, 25 volts, or 30 volts.

[0052] The high-voltage bias terminal 11 is connected to one end of the first protection circuit 20 on the first substrate 01, the other end of the first protection circuit is connected to the first end (for example, the cathode) of the photoelectric converter 30 on the second substrate 02, the second end (for example, the anode) of the photoelectric converter 30 is connected to the input end of the amplifier circuit 40 on the third substrate 03, and the output end of the amplifier circuit 40 serves as the output end of the light receiving component, that is, the output end of the amplifier circuit 40 is connected to the output end 13.

[0053] exist Figure 3 In the example, the power supply terminal 12 provides the operating voltage for the amplifier circuit 40, and the amplifier circuit 40 can output a differential signal through the two output terminals 13 after amplifying the input signal.

[0054] It can be seen that a first protection circuit 20 manufactured by a first integrated circuit process is provided on the first substrate 01. The first protection circuit 20 includes one or more high-voltage ESD protection devices 21. For the high-voltage bias terminal 11, the first protection circuit 20 can provide high-voltage protection for subsequent devices such as a photoelectric converter 30.

[0055] The first protection circuit 20 is manufactured by integrated circuit technology to play the function of high-voltage ESD protection, and can be effectively compatible with the filter circuit / network manufactured by integrated circuit.

[0056] In some embodiments, the high-voltage ESD protection device 21 may include a diode. A forward-biased diode or a reverse-biased diode can provide high-voltage ESD protection. The diode may be a STI diode and / or a Gate diode manufactured by a CMOS process. Figure 5 are two structural examples of STI diodes, Figure 6 are two examples of Gate diodes. In the figure, STI refers to shallow trench isolation, N+ and P+ represent N-type and P-type regions respectively, Cathode refers to cathode, Anode refers to anode; N-Well refers to N-well, P-Well refers to P-well, P-Sub refers to P-type substrate; Poly refers to polysilicon resistor. The pressure-bearing capacity of STI diodes and Gate diodes is limited by the pressure-bearing capacity of diodes such as parasitics from N-Well to P-Sub substrate. For example, in the CMOS 0.18um process, the pressure-bearing capacity of the parasitic diode is about 14V, and the more advanced the process, the lower this voltage value may be. Therefore, when the high-voltage bias signal required by the photoelectric converter 30 is high (for example, a scenario above 20V or 30V), the reliability of the product will be reduced.

[0057] Therefore, in some embodiments, the high-voltage ESD protection device 21 includes a PIN structure diode. The applicant has found that the parasitic capacitance of the PIN structure diode is smaller than that of a conventional diode device, and is particularly suitable for high-voltage ESD protection of high-frequency pins.

[0058] In some embodiments, please refer to Figure 7The PIN structure diode includes a shallow trench isolation region STI formed on a first substrate 01 (e.g., a silicon substrate), a P-type region and an N-type region formed on the shallow trench isolation region STI, an intrinsic region i on the shallow trench isolation region STI into which P-type carriers are not injected and N-type carriers are not injected, and the intrinsic region i separates the P-type region from the N-type region; and contact holes Con are respectively arranged on the P-type region and the N-type region.

[0059] In this application, a PIN structure diode is used as the high-voltage ESD protection of the optical receiving component, which has many advantages: the manufacturing process of the PIN structure diode is fully compatible with the integrated circuit process such as the CMOS standard process. Therefore, even if the PIN structure diode is not a standard device, no additional mask is required for the foundry; in addition, since the PIN structure diode is placed on the shallow trench isolation area STI, the pressure-bearing capacity of the PIN structure diode is no longer limited by the parasitic diode from the N-Well to the P-Sub substrate, but depends on the pressure-bearing capacity of the shallow trench isolation area STI. Since the thickness of the shallow trench isolation area STI in common integrated circuit processes such as CMOS processes is generally higher than 300nm, it corresponds to a transient breakdown voltage of more than 100V and a DC pressure-bearing capacity of more than 50V - for example Figure 8 The current-voltage curve diagram of a PIN structure diode implemented in an integrated circuit process such as a CMOS process (in the figure, Current represents current and Voltage represents voltage); these properties make the PIN structure diode very suitable as an ESD protection device for high-voltage pins integrated on-chip in a deep submicron CMOS process.

[0060] In some embodiments, the high-voltage ESD protection device 21 may further include a resistor; in some embodiments, the resistor is a polysilicon resistor disposed on the shallow trench isolation region.

[0061] In some embodiments, the first protection circuit 20 further includes a filter circuit 22. In this case, the filter circuit 22 and the high-voltage ESD protection device 21 can be manufactured on the same substrate through the same integrated circuit process to form a chip.

[0062] In some embodiments, one or more high-voltage ESD protection devices 21 are respectively connected to both ends of the filter circuit 22; the high-voltage bias signal reaches the filter circuit 22 through the high-voltage ESD protection device 21 at one end of the filter circuit 22, and then reaches the high-voltage ESD protection device 21 at the other end of the filter circuit 22 after passing through the filter circuit 22, and is output to the first end of the photoelectric converter 30.

[0063] For example Figure 9(1) to Figure 9(5)are several examples of the first protection circuit 20; there are examples of filter circuits 22 formed by resistors and capacitors, and there are also examples of filter circuits 22 formed by capacitors. The resistors included in the filter circuit 22 may be polysilicon resistors, and the capacitors included in the filter circuit 22 may be interdigital capacitors; the diodes in the figure are high-voltage ESD protection devices 21, and in some figures, other resistors except the filter circuit 22 also represent high-voltage ESD protection devices 21, such as the resistors directly connected to the high-voltage bias terminal 11 in Figures 9 (4) and 9 (5). In some examples in the figure, multiple high-voltage ESD protection devices 21 (diodes, such as PIN structure diodes) are connected in series to achieve the purpose of reducing the leakage current of this node.

[0064] In some embodiments, the third substrate 03 also has a second protection circuit manufactured by a third integrated circuit process, and the structure of the second protection circuit can refer to the first protection circuit 20, for example, the structure of the second protection circuit is the same as the structure of the first protection circuit 20; for another example, the second protection circuit may include one or more high-voltage ESD protectors, may include a filtering circuit, etc.; in terms of connection relationship, the second protection circuit may also refer to the first protection circuit 20, for example, the high-voltage bias terminal 11 is connected to one end of the second protection circuit, and the other end of the second protection circuit is connected to the first end of the photoelectric converter 30.

[0065] Please refer to Fig.10 In the example where the optical receiving component further includes a power supply terminal 12, in addition to the first protection circuit 20 manufactured by the first integrated circuit process, the first substrate 01 may also include a first filter circuit 50 manufactured by the first integrated circuit process, and the power supply terminal 12 is connected to the power supply terminal of the amplifier circuit 40 after passing through the first filter circuit 50. In some embodiments, the first filter circuit 50 may include a resistor and / or a capacitor.

[0066] Please refer to Fig.11 In the example where the optical receiving component further includes a power supply terminal 12, a second filter circuit 51 manufactured by a third integrated circuit process may also be provided on the third substrate 03, and the power supply terminal 12 is connected to the power supply terminal of the amplifier circuit 40 after passing through the second filter circuit 51. In some embodiments, the second filter circuit 51 may include a resistor and / or a capacitor.

[0067] In some embodiments, the first substrate 01 and the third substrate 03 are different substrates, that is, two substrates; in some embodiments, the first integrated circuit process and the third integrated circuit process are the same integrated circuit process; in some embodiments, the first integrated circuit process and the third integrated circuit process are different integrated circuit processes.

[0068] In some embodiments, the first substrate 01 and the third substrate 03 are the same substrate; in some embodiments, the first integrated circuit process and the third integrated circuit process are the same integrated circuit process.

[0069] In some embodiments, the first substrate 01 , the second substrate 02 , and the third substrate 03 are the same substrate; in some embodiments, the first integrated circuit process, the second integrated circuit process, and the third integrated circuit process are the same integrated circuit process.

[0070] In some embodiments, the first integrated circuit process is a CMOS integrated circuit process. In some embodiments, the CMOS integrated circuit process includes a 0.18 um or less CMOS integrated circuit process.

[0071] In some embodiments, the second integrated circuit process is a CMOS integrated circuit process. In some embodiments, the CMOS integrated circuit process includes a 0.18 um or less CMOS integrated circuit process.

[0072] In some embodiments, the third integrated circuit process is a CMOS integrated circuit process. In some embodiments, the CMOS integrated circuit process includes a 0.18 um or less CMOS integrated circuit process.

[0073] In some embodiments, a plurality of first protection circuits 20 are provided on the first substrate 01 , and the first protection circuits 20 may be connected in parallel.

[0074] In some embodiments, the first substrate 01 has a plurality of first protection circuits 20 , and the first protection circuits 20 on the first substrates 01 are associated and connected with each other.

[0075] The above are some descriptions of the light receiving component.

[0076] Some embodiments also disclose an optical modem, which may include the optical receiving component described in any embodiment of the present invention. In addition, the optical modem may also include other structures, such as an optical transmitting component, a burst mode laser driver, a continuous mode limiting amplifier, etc., which will not be repeated here.

[0077] This document is described with reference to various exemplary embodiments. However, those skilled in the art will recognize that changes and modifications may be made to the exemplary embodiments without departing from the scope of this document. For example, various operating steps and components for performing the operating steps may be implemented in different ways (e.g., one or more steps may be deleted, modified, or incorporated into other steps) depending on the specific application or considering any number of cost functions associated with the operation of the system.

[0078] Although the principles of this invention have been shown in various embodiments, many modifications of structures, arrangements, proportions, elements, materials and components particularly suitable for specific environments and operational requirements can be used without departing from the principles and scope of this invention. The above modifications and other changes or amendments will be included in the scope of this invention.

[0079] The foregoing specific description has been described with reference to various embodiments. However, those skilled in the art will recognize that various modifications and changes can be made without departing from the scope of the present disclosure. Therefore, the consideration of the present disclosure will be illustrative rather than restrictive, and all these modifications will be included in its scope. Similarly, the advantages, other advantages and solutions to the problems of various embodiments have been described above. However, the benefits, advantages, solutions to the problems and any elements that can produce these, or make them more clear, should not be interpreted as critical, necessary or necessary. The term "include" and any other variants used in this article are all non-exclusive inclusions, so that the process, method, article or device including the list of elements not only includes these elements, but also includes other elements that are not explicitly listed or do not belong to the process, method, system, article or device. In addition, the term "coupled" and any other variants used in this article refer to physical connections, electrical connections, magnetic connections, optical connections, communication connections, functional connections and / or any other connections.

[0080] Those skilled in the art will appreciate that many changes may be made to the details of the above-described embodiments without departing from the basic principles of the invention. Therefore, the scope of the present invention should be determined solely by the claims.

Claims

1. A light receiving component, characterized in that: It includes a first substrate, a second substrate, a third substrate, a high voltage bias terminal and an output terminal; A first protection circuit manufactured by a first integrated circuit process is provided on the first substrate, and the first protection circuit includes one or more high-voltage ESD protection devices; a photoelectric converter manufactured by a second integrated circuit process is provided on the second substrate, and the photoelectric converter is used to convert an optical signal into an electrical signal; An amplifier circuit manufactured by a third integrated circuit process is provided on the third substrate, the amplifier circuit is used to amplify the electrical signal and then output it, and the output end of the amplifier circuit serves as the output end of the light receiving component; The high-voltage bias end is used to receive a high-voltage bias signal, the high-voltage bias end is connected to one end of the first protection circuit, the other end of the first protection circuit is connected to the first end of the photoelectric converter, and the second end of the photoelectric converter is connected to the input end of the amplifier circuit.

2. The light receiving assembly according to claim 1, wherein: The third substrate also has a second protection circuit manufactured by the third integrated circuit process, and the second protection circuit includes one or more high-voltage ESD protection devices; the high-voltage bias end is connected to one end of the second protection circuit, and the other end of the second protection circuit is connected to the first end of the photoelectric converter.

3. The light receiving component according to claim 1 or 2, characterized in that: The high-voltage ESD protection device includes a diode with a PIN structure.

4. The light receiving assembly according to claim 3, characterized in that: The PIN structure diode comprises a shallow trench isolation region formed on the first substrate, a P-type region and an N-type region formed on the shallow trench isolation region, an intrinsic region on the shallow trench isolation region where P-type carriers are not injected and N-type carriers are not injected, and the intrinsic region separates the P-type region from the N-type region; Contact holes are respectively disposed on the P-type region and the N-type region.

5. The light receiving assembly according to claim 2, characterized in that: The second protection circuit also includes a filter circuit.

6. The light receiving assembly according to claim 1, wherein: The first protection circuit also includes a filter circuit.

7. The light receiving assembly according to claim 5 or 6, characterized in that: One or more high-voltage ESD protection devices are respectively connected to the two ends of the filter circuit; the high-voltage bias signal reaches the filter circuit through the high-voltage ESD protection device at one end of the filter circuit, and then reaches the high-voltage ESD protection device at the other end of the filter circuit after passing through the filter circuit, and then is output to the first end of the photoelectric converter.

8. The light receiving assembly according to claim 1 or 2, characterized in that: The high voltage ESD protection device also includes a resistor.

9. The light receiving assembly according to claim 8, characterized in that: The resistor is a polysilicon resistor arranged on a shallow trench isolation region.

10. The light receiving assembly according to claim 1, wherein: The first integrated circuit process and the third integrated circuit process are the same integrated circuit process or different integrated circuit processes.

11. The light receiving assembly according to claim 10, wherein: The first integrated circuit process is a CMOS integrated circuit process; and / or the third integrated circuit process is a CMOS integrated circuit process.

12. The light receiving assembly according to claim 11, wherein: The CMOS integrated circuit process includes a 0.18 um or less CMOS integrated circuit process.

13. The light receiving assembly according to claim 1, wherein: The first substrate and the third substrate are the same substrate; or the first substrate, the second substrate and the third substrate are the same substrate.

14. The light receiving assembly according to claim 1, wherein: There are multiple first substrates, and the first protection circuits on the first substrates are connected in parallel.

15. The light receiving assembly according to claim 1, wherein: The high voltage bias signal is greater than or equal to 15 volts, 20 volts, 25 volts or 30 volts.

16. An optical modem, characterized in that: include: A light receiving module as claimed in any one of claims 1 to 15.