Inter-core-particle communication control method, device, equipment, medium and product
By realizing active flow control of the core particles at the transmitting end in a wafer-level chip, adjusting transmission parameters and feedback of return packets, the pressure problem of the communication flow between the core particles on the internal bus is solved, and data transmission efficiency and system performance are improved.
Patent Information
- Application Number
- CN202510163295.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-14
- Publication Date
- 2025-05-16
AI Technical Summary
The communication flow between chips in wafer-level chips puts pressure on the internal bus, resulting in reduced data transmission efficiency and reduced system performance. The existing two-way credit switching methods cannot meet the needs of high bandwidth and low latency.
The transmission terminal core particle determines the transmission data and the target transmission parameter information of the target receiving terminal core particle, performs transmission judgment, and adjusts the transmission data based on these parameters when it can be transmitted. The reception terminal core particle determines the congestion information based on the received data and generates a return message. The transmission terminal core particle adjusts the transmission parameter information based on the return message to actively perform flow control.
It effectively avoids congestion between core and particle transmission, improves data transmission efficiency, and fully utilizes the performance advantages of wafer-level chips without the need to make credit applications in advance.
Smart Images

Figure CN120017598A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chiplet technology, and in particular to a chiplet-to-chiplet communication control method, device, equipment, medium and product. Background Art
[0002] Wafer-level integration technology achieves ultra-high-density computing power by integrating multiple chiplets on a single silicon or organic substrate, providing an innovative solution to meet the needs of data centers for high-performance computing. Although this technology provides bandwidth that exceeds that of traditional networks through the interconnection between chiplets, its bandwidth is still limited compared to the high-speed bus inside the chiplets, forming a significant traffic bottleneck. This bottleneck may cause the communication traffic between chiplets to put pressure on the internal bus, affecting data transmission efficiency and reducing the overall performance of the system.
[0003] The bidirectional credit exchange method is a commonly used flow control method: the sender sends a credit application to the receiver to request a cache. After obtaining credit confirmation, data can be sent. The receiver schedules the requests of each sender to maximize system performance without packet loss. The flow control mechanism of the PCIe protocol allows only the receiver to notify the sender of the size of its available buffer by returning credits, avoiding buffer overflow and data loss.
[0004] However, the performance cost of the two-way credit exchange method is also significant because it requires additional two-way credit applications and confirmations. For wafer-level chips, there are data communications with ultra-high bandwidth and latency requirements between cores. This mechanism based on two-way credit confirmation cannot meet the needs of application scenarios. The PCIe protocol is not suitable for the grid topology of wafer-level chips. In this topology, the number of integrated sending / receiving nodes is much larger than the number of nodes in the general PCIe topology, and wafer-level chips use larger data packets for transmission. PCIe flow control faces great challenges and costs in terms of implementation complexity and efficiency in the grid topology. Summary of the invention
[0005] The present invention provides a method, device, equipment, medium and product for controlling communication between core particles, so as to realize active flow control of the core particles at the sending end and avoid the generation of core particle transmission congestion.
[0006] According to a first aspect of the present invention, there is provided a method for controlling communication between chiplets, which is applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of chiplets, and the method includes:
[0007] Determine the transmission data and the target transmission parameter information of the target receiving end chiplet through the sending end chiplet, perform transmission judgment on the transmission data according to the target transmission parameter information, and determine the transmission judgment result, wherein the target receiving end chiplet is the receiving end chiplet that receives the transmission data;
[0008] When the transmission judgment result is that the transmission is possible, the transmission data is transmitted to the target receiving end core particle based on the target transmission parameter information, and the target transmission parameter information is adjusted;
[0009] The receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle;
[0010] The transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message is adjusted by the sending end chiplet according to the return message to obtain the adjusted transmission parameter information.
[0011] According to a second aspect of the present invention, there is provided a chip-to-chip communication control device, which is applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of chiplets, and the device includes:
[0012] A transmission judgment module, used to determine the transmission data and the target transmission parameter information of the target receiving end chiplet through the sending end chiplet, perform transmission judgment on the transmission data according to the target transmission parameter information, and determine a transmission judgment result, wherein the target receiving end chiplet is the receiving end chiplet that receives the transmission data;
[0013] A data transmission module, configured to transmit the transmission data to the target receiving end core particle based on the target transmission parameter information when the transmission judgment result is that the transmission is possible, and adjust the target transmission parameter information;
[0014] A message feedback module, used to determine the congestion information of the receiving end and generate a return message to feed back to the sending end chip according to the received transmission data through the receiving end chip;
[0015] The parameter adjustment module is used to adjust the transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message according to the return message through the sending end chiplet to obtain the adjusted transmission parameter information.
[0016] According to a third aspect of the present invention, there is provided an electronic device, the electronic device comprising:
[0017] at least one core particle; and
[0018] a memory communicatively connected to the at least one chiplet; wherein,
[0019] The memory stores a computer program executable by the at least one core particle, and the computer program is executed by the at least one core particle so that the at least one core particle can execute the inter-core communication control method described in any embodiment of the present invention.
[0020] According to a fourth aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the inter-chiplet communication control method described in any embodiment of the present invention when the chiplets are executed.
[0021] According to a fifth aspect of the present invention, an embodiment of the present invention further provides a computer program product, the computer program product comprising a computer program, and when the computer program is executed by a chiplet, the inter-chiplet communication control method of any embodiment of the present invention is implemented.
[0022] The technical solution of the embodiment of the present invention is applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of core particles, and the method includes: determining the target transmission parameter information of the transmission data and the target receiving end core particle through the sending end core particle, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining the transmission judgment result, wherein the target receiving end core particle is the receiving end core particle that receives the transmission data; when the transmission judgment result is that the transmission can be transmitted, the transmission data is transmitted to the target receiving end core particle based on the target transmission parameter information, and the target transmission parameter information is adjusted; the receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle; the sending end core particle adjusts the transmission parameter information to be adjusted of the receiving end core particle that transmits the return message according to the return message, and obtains the adjusted transmission parameter information. The sending end core particle adjusts the transmission parameter information based on the return message, so as to actively perform flow control based on the actual bandwidth of the receiving end core particle. By adjusting the data transmission parameters, the transmission congestion problem between core particles is avoided, and the sending end core particle does not need to apply for credit in advance, so as to give full play to the performance advantages of the wafer-level chip.
[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0025] Figure 1is a flow chart of a method for controlling inter-chiplet communication according to Embodiment 1 of the present invention;
[0026] Figure 2 is a structural example diagram of a wafer-level chip in a method for controlling chiplet-chip communication according to a first embodiment of the present invention;
[0027] Figure 3 is a flow chart of a method for controlling communication between chips provided according to the second embodiment of the present invention;
[0028] Figure 4 This is an example diagram of a return message in a method for controlling communication between chips provided in Embodiment 2 of the present invention;
[0029] Figure 5 is a schematic diagram of the structure of an inter-chiplet communication control device provided according to Embodiment 3 of the present invention;
[0030] Figure 6 It is a schematic diagram of the structure of an electronic device implementing an embodiment of the present invention. DETAILED DESCRIPTION
[0031] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0032] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0033] Embodiment 1
[0034] Figure 1A flow chart of a chip-to-chip communication control method is provided for the first embodiment of the present invention. This embodiment is applicable to the communication between chiplets in a wafer-level chip. The method can be executed by a chip-to-chip communication control device. The chip-to-chip communication control device can be implemented in the form of hardware and / or software. The chip-to-chip communication control device can be configured in an electronic device. Figure 1 As shown, the method can be applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of core particles, and the method includes:
[0035] S110, determining the transmission data and target transmission parameter information of the target receiving-end chiplet through the transmitting-end chiplet, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining a transmission judgment result, wherein the target receiving-end chiplet is the receiving-end chiplet that receives the transmission data.
[0036] In this embodiment, each core particle communicates with the processing unit in other core particles through an interface. The core particle that sends data can be regarded as the sending end core particle, and the core particle that receives data can be regarded as the receiving end core particle, so as to distinguish the data sending and receiving ends. The transmission data can be understood as the data generated by the sending end core particle to be transmitted to other core particles. The target receiving end core particle can be understood as the core particle that is connected to the sending end core particle for receiving the transmission data.
[0037] As an example, a wafer-level chip comprising four core particles is shown. Figure 2 A structure diagram of a wafer-level chip in a chip-to-chip communication control method is provided for the first embodiment of the present invention. Figure 2As shown, the wafer-level chip is a mesh Mesh topology, D1-D4 represents four core particles, each core particle contains 16 processing units, each unit can send data to each other through the on-chip network, and at the same time, it can also communicate with the processing units in other core particles through the interface between core particles. Since the bus bandwidth inside the core particle is often much larger than the interface bandwidth between core particles, if the flow is not controlled, congestion is likely to occur, affecting the overall performance. As shown in the figure, D1 is the sending end core particle in the present invention, and the data streams S1, S2, S3, and S4 in D1 have a scene of accessing the receiving end core particle D2 at the same time. At this time, the limitation of the interface bandwidth will cause the bus in the D1 chip to be back-pressured, and the data stream S5 in the chip cannot be transmitted normally. By adopting effective flow control means according to the actual bandwidth between core particles, the rate at which the data sending end core particle sends data can be adjusted. In the case of insufficient bandwidth scheduling, the data is retained locally, which can effectively avoid congestion. For example, during the data transmission process of S3 and S4, S1 and S2 wait for scheduling and do not send data, so that S5 in the core particle can achieve effective transmission. The target transmission parameter information is the above-mentioned parameter used to determine whether transmission can be performed and at what rate. The transmission judgment result can be understood as a result of indicating whether the transmission data can be transmitted to the target receiving end chiplet at present.
[0038] Specifically, the transmission data and the target transmission parameter information of the target receiving end chip can be generated by the sending end chip, wherein the target transmission parameter information can be determined by the feedback of the receiving end chip after each successful data transmission, wherein the wafer-level chip can be initialized when it is powered on for the first time, and the judgment is made according to the initial value. The sending end chip can judge whether the transmission data can be transmitted normally based on the target transmission parameter information, and determine the transmission judgment result. The target receiving end chip is the receiving end chip that receives the transmission data. For example, the target transmission parameter information includes a credit value, and each transmission will consume a corresponding number of credit values. If the credit value is 0, the transmission cannot be made, and if it is not 0, the transmission can be made, thereby determining the transmission judgment result.
[0039] S120: When the transmission judgment result is that the transmission is possible, the transmission data is transmitted to the target receiving end chiplet based on the target transmission parameter information, and the target transmission parameter information is adjusted.
[0040] Specifically, when the transmission judgment result is that the transmission is possible, the sending end chip can calculate the rate of sending data to the target receiving end chip based on the parameters related to the bandwidth in the target transmission parameter information, and adjust the credit value in the target transmission parameter information according to the size of the data transmitted this time and other attributes after the transmission is completed, so as to ensure that the transmission judgment is made based on the updated target transmission parameter information at the next transmission. When the transmission judgment result is that the transmission is not possible, the sending end chip temporarily stores the transmission data until it is sent when the transmission judgment result is that the transmission is possible.
[0041] S130 , the receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle.
[0042] In this embodiment, the receiving end congestion information can be understood as the flow information of the receiving end core particle related to the current transmission data, for example, it can include the returned credit value, the statistical window length, the receiving end utilization rate and the proportion of the data transmission end flow, etc. The return message can be understood as the flow statistics information used to characterize the receiving end core particle after receiving the current transmission data.
[0043] Specifically, when the receiving end chip receives the transmission data, it can first determine the credit value to be returned based on the size of the transmission data, and secondly determine its own current traffic status to generate receiving end congestion information, and generate a return message in a predetermined information format to feed back to the sending end chip.
[0044] S140: The sending-end chiplet adjusts the transmission parameter information to be adjusted of the receiving-end chiplet that transmits the return message according to the return message, so as to obtain the adjusted transmission parameter information.
[0045] In this embodiment, the transmission parameter information to be adjusted can be understood as the transmission parameter information corresponding to the receiving-end chiplet that sends the return message.
[0046] Specifically, since a wafer-level chip includes multiple cores, a sending-end core may include multiple receiving-end cores. When the sending-end core receives a return message, it can determine which receiving-end core sent it through the identifier in the return message, and determine the corresponding transmission parameter information to be adjusted through the identifier. Based on the information in the return message, the credit in the transmission parameter information to be adjusted and the current flow control status of the receiving-end core are updated to obtain the adjusted transmission parameter information.
[0047] The technical solution of the embodiment of the present invention is applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of core particles, and the method includes: determining the target transmission parameter information of the transmission data and the target receiving end core particle through the sending end core particle, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining the transmission judgment result, wherein the target receiving end core particle is the receiving end core particle that receives the transmission data; when the transmission judgment result is that the transmission can be transmitted, the transmission data is transmitted to the target receiving end core particle based on the target transmission parameter information, and the target transmission parameter information is adjusted; the receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle; the sending end core particle adjusts the transmission parameter information to be adjusted of the receiving end core particle that transmits the return message according to the return message, and obtains the adjusted transmission parameter information. The sending end core particle adjusts the transmission parameter information based on the return message, so as to actively perform flow control based on the actual bandwidth of the receiving end core particle. By adjusting the data transmission parameters, the transmission congestion problem between core particles is avoided, and the sending end core particle does not need to apply for credit in advance, so as to give full play to the performance advantages of the wafer-level chip.
[0048] As a first optional embodiment of the first embodiment, after determining the transmission data and the target transmission parameter information of the target receiving end core particle by the transmitting end core particle, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining the transmission judgment result, it also includes:
[0049] When the transmission judgment result is that the transmission is not possible, the sending of the transmission data is stopped until the target transmission parameter information is adjusted and the transmission judgment is made again.
[0050] Specifically, when the transmission judgment result determined by the sending end chip is that transmission is not possible, the receiving end chip can no longer receive new transmission data, and congestion may occur if the transmission continues. Therefore, the sending end chip stops sending transmission data, and can temporarily store the transmission data until the receiving end chip that receives the transmission data returns the message, and makes another transmission judgment after adjusting the target transmission parameter information. While stopping the transmission of transmission data, the unit transmission inside the chip can still proceed normally, and the sending end chip only suspends the transmission to the target receiving end chip of the transmission data, and does not affect the data transmission to other receiving end chip under other transmission interfaces.
[0051] The first optional embodiment of the present embodiment 1, through such a setting, stops sending data when it is judged that transmission is not possible, avoids the occurrence of congestion, and monitors the target transmission parameter information, and makes a transmission judgment in time after it is adjusted to ensure the timeliness of subsequent transmission.
[0052] Embodiment 2
[0053] Figure 3This is a flow chart of a method for controlling communication between chips provided in the second embodiment of the present invention. This embodiment is a further refinement of the above embodiment. Figure 3 As shown, the method includes:
[0054] S301, determining the target transmission parameter information of the target receiving end core particle and the transmission data through the transmitting end core particle, and judging whether the target credit value in the target transmission parameter information meets the transmission condition.
[0055] In this embodiment, the target credit value can be understood as a value used to reflect the current data cache size of the target receiving end chip. When the wafer-level chip is powered on, the credit value in the transmission parameter information belonging to the receiving end chip can be initialized according to the data cache capacity of the receiving end chip for the sending end chip to judge. The transmission condition can be understood as a condition for judging whether the transmission data can be transmitted, such as whether the credit value is not 0.
[0056] Specifically, the transmitting end chiplet determines the transmission data and the target transmission parameter information of the target receiving end chiplet, and determines whether the transmission is possible by comparing the target credit value in the target transmission parameter information with the transmission condition, for example, the transmission condition is that the credit value is not 0.
[0057] S302: If yes, the transmission is allowed as the transmission judgment result.
[0058] Specifically, when the sending end chip determines that the target credit value meets the transmission condition (for example, the target credit value is not 0), the data buffer area of the target receiving end chip can receive data and congestion will not occur, and the transmission is allowed as the transmission judgment result.
[0059] S303: If not, the transmission is not allowed as the transmission judgment result.
[0060] Specifically, when the sending end chip determines that the target credit value does not meet the transmission condition (for example, the target credit value is 0), the data buffer area of the target receiving end chip cannot receive data, congestion occurs, and the transmission is not possible as the transmission judgment result.
[0061] S304: When the transmission judgment result is that transmission is possible, determine the transmission rate according to the target receiving end parameters in the target transmission parameter information and a preset threshold.
[0062] In this embodiment, the target receiving end parameter can be understood as information used to characterize the current traffic situation of the target receiving end core particle, for example, it can include bandwidth utilization and traffic proportion, etc. The preset threshold can be understood as a threshold used to determine the rate adjustment situation. The transmission rate can be understood as the rate used to transmit the transmission data to the target receiving end core particle.
[0063] Specifically, when the transmission judgment result is that transmission is possible, the sending end core particle can compare the target receiving end parameters in the target transmission parameter information with the preset threshold. If it exceeds the preset threshold, the transmission rate is reduced. If it is less than the preset threshold, the transmission rate is increased. If it is equal to the preset threshold, the transmission rate can be kept unchanged.
[0064] For example, when the bandwidth utilization rate in the target receiving end parameters is lower than the set threshold, over-issuance of credit value can be achieved to increase the transmission rate. When the bandwidth utilization rate of the receiving end is relatively high and the proportion of its own traffic is higher than the set threshold, even if there is credit, the transmission rate will be reduced, which can avoid congestion on the one hand, and balance the traffic of each sending end accessing the receiving end on the other hand.
[0065] S305 , transmitting the transmission data to the target receiving end chip according to the transmission rate.
[0066] Specifically, the sending-end core particle may transmit the transmission data to the target receiving-end core particle according to the determined transmission rate.
[0067] S306. Determine the credit consumption value of this transmission according to the data attribute information of the transmission data.
[0068] In this embodiment, the data attribute information can be understood as attribute information related to the transmission, such as the size of the data to be transmitted this time. The credit consumption value can be understood as the credit value occupied by the current transmission.
[0069] Specifically, the sending end chip may determine the credit consumption value of this transmission through corresponding calculations, such as a ratio calculation method, based on the data attribute information of the transmission data.
[0070] S307. Adjust the target credit value in the target transmission parameter information according to the credit consumption value.
[0071] Specifically, the sending-end chip may subtract the credit consumption value from the target credit value in the target transmission parameter information to obtain the remaining credit value that can be transmitted corresponding to the target receiving-end chip.
[0072] S308. Determine the return credit length corresponding to the received transmission data through the receiving end core particle.
[0073] In this embodiment, the returned credit length may be understood as a credit length that indicates that transmission can be performed, and may be consistent with the credit consumption value mentioned above for the transmission data.
[0074] Specifically, when the receiving end chip receives the transmission data, it returns credit to the sending end chip. The length of the returned credit can be determined by the data attribute information of the transmission data, which can be consistent with the method of determining the credit consumption value.
[0075] S309: Determine congestion information of the receiving end according to the current cache status of the cache area.
[0076] In this embodiment, the buffer area can be understood as an area belonging to the target receiving end chip for caching data. The current buffer situation can be understood as the situation of the buffer area after receiving the transmission data.
[0077] Specifically, the receiving end chip can obtain the current cache status of the cache area, and use the current remaining space of the data cache area, the statistical window length, the receiving end bandwidth utilization rate and the current sending end chip flow ratio information as the receiving end congestion information.
[0078] S310, determining a return message according to a preset credit information format, an identifier of a receiving end chip, receiving end congestion information, and a return credit length.
[0079] In this embodiment, the preset credit information format can be understood as a prescribed format for forming a return message. The identifier can be understood as a unique identifier for ensuring the receiving end chip, such as an ID.
[0080] Specifically, the receiving end chiplet may encapsulate the identification of the receiving end chiplet, the receiving end congestion information and the returned credit length according to a preset credit information format to form a return message.
[0081] For example, Figure 4 This is an example diagram of a returned message in a method for controlling communication between chips provided in Embodiment 2 of the present invention, such as Figure 4 As shown, the return message can be 16 bytes (128 bits), which includes the ID of the receiving end core particle, so that the sending end can determine which end sent the return message. The return credit length is used to characterize how large the credit cleared this time is. The reserved field is used for expansion. Active flow control needs to return statistical information, and the return message also includes the statistical window length, which is determined by the time window and statistical algorithm. The receiving end utilization is used to feedback the current saturation of the buffer area. The proportion of the sending end traffic of this transaction is used to reflect the resource occupancy rate. After receiving the credit, the sending end core particle can adjust the rate of sending data requests to the receiving end through the flow control algorithm based on this information.
[0082] S311, feeding back the return message to the sending end chip.
[0083] S312: The sending end core updates the receiving end parameters to be adjusted in the transmission parameter information to be adjusted of the receiving end core that transmits the returned message according to the receiving end congestion information in the returned message, so as to obtain adjusted receiving end parameters.
[0084] In this embodiment, the receiving end parameters to be adjusted can be understood as parameters related to the buffer area of the receiving end last time, such as the parameters recorded when the return message was received last time.
[0085] Specifically, the transmitter core replaces the to-be-adjusted receiver parameters in the to-be-adjusted transmission parameter information of the receiver core that transmits the return message according to the receiver congestion information in the return message, thereby obtaining the adjusted receiver parameters.
[0086] S313. According to the returned credit length in the returned message, the credit value to be adjusted in the transmission parameter information to be adjusted is adjusted to obtain an adjusted credit value.
[0087] In this embodiment, the credit value to be adjusted can be understood as a credit value that needs to be updated.
[0088] Specifically, the sending end chip may add the returned credit length in the returned message to the credit value to be adjusted in the transmission parameter information to obtain the adjusted credit value.
[0089] S314: Determine adjusted transmission parameter information according to the receiving end parameters and the credit value.
[0090] Specifically, the sending end chip can use the receiving end parameters and credit value as the adjusted transmission parameter information to provide a basis for the next data transmission. For example, if there is data that has stopped transmission and the credit value determined after returning the credit length is not 0, the transmission can be restarted.
[0091] The technical solution of the embodiment of the present invention is that the sending end core particle judges whether the transmission condition is met based on the target credit value, and the sending end core particle does not need to apply for credit in advance in a one-way credit exchange manner, thereby improving the communication efficiency. When the transmission condition is met, the transmission rate is adjusted based on the target receiving end parameters and the preset threshold, and the flow control is actively performed. The transmission data is transmitted based on the determined transmission rate to avoid the congestion problem caused by the mismatch between the bandwidth between the core particles and the bandwidth within the core particle, thereby giving full play to the performance advantages of the wafer-level chip. After the transmission, the target credit value is updated by the determined credit consumption value, and the credit statistics under the one-way credit exchange are realized. After receiving the transmission data, the receiving end core particle forms a return message based on the preset credit information format with the receiving end congestion information related to the flow information and the return credit length, and feeds it back to the sending end core particle. The return message carrying the actual bandwidth parameter provides support for the subsequent sending end core particle to determine the transmission rate, and the sending end core particle can start new data transmission by returning the credit length, thereby improving the accuracy of the transmission rate determination, effectively avoiding congestion, and making the traffic of each sending end accessing the receiving end balanced.
[0092] Embodiment 3
[0093] Figure 5 This is a schematic diagram of the structure of a chip-to-chip communication control device provided in the third embodiment of the present invention. The device can be applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of chiplets. Figure 5 As shown, the device comprises:
[0094] The transmission judgment module 51 is used to determine the transmission data and the target transmission parameter information of the target receiving end chiplet through the sending end chiplet, perform transmission judgment on the transmission data according to the target transmission parameter information, and determine the transmission judgment result, wherein the target receiving end chiplet is the receiving end chiplet that receives the transmission data;
[0095] The data transmission module 52 is used to transmit the transmission data to the target receiving end chiplet based on the target transmission parameter information when the transmission judgment result is that the transmission is possible, and adjust the target transmission parameter information;
[0096] A message feedback module 53, configured to determine the congestion information of the receiving end according to the received transmission data through the receiving end core particle and generate a return message to feed back to the sending end core particle;
[0097] The parameter adjustment module 54 is used to adjust the transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message according to the return message through the sending end chiplet to obtain the adjusted transmission parameter information.
[0098] The technical solution of the embodiment of the present invention is applied to a wafer-level chip, wherein the wafer-level chip includes a plurality of core particles, and the method includes: determining the target transmission parameter information of the transmission data and the target receiving end core particle through the sending end core particle, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining the transmission judgment result, wherein the target receiving end core particle is the receiving end core particle that receives the transmission data; when the transmission judgment result is that the transmission can be transmitted, the transmission data is transmitted to the target receiving end core particle based on the target transmission parameter information, and the target transmission parameter information is adjusted; the receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle; the sending end core particle adjusts the transmission parameter information to be adjusted of the receiving end core particle that transmits the return message according to the return message, and obtains the adjusted transmission parameter information. The sending end core particle adjusts the transmission parameter information based on the return message, so as to actively perform flow control based on the actual bandwidth of the receiving end core particle. By adjusting the data transmission parameters, the transmission congestion problem between core particles is avoided, and the sending end core particle does not need to apply for credit in advance, so as to give full play to the performance advantages of the wafer-level chip.
[0099] Furthermore, the transmission determination module 51 is specifically used for:
[0100] Determining whether the target credit value in the target transmission parameter information meets the transmission condition;
[0101] If yes, the transmission is allowed as the transmission judgment result;
[0102] If not, the transmission is not possible as the transmission determination result.
[0103] Furthermore, the data transmission module 52 is specifically used for:
[0104] Determining a transmission rate according to a target receiving end parameter and a preset threshold in the target transmission parameter information;
[0105] Transmitting the transmission data to the target receiving end chiplet according to the transmission rate;
[0106] Determining a credit consumption value for this transmission according to data attribute information of the transmission data;
[0107] The target credit value in the target transmission parameter information is adjusted according to the credit consumption value.
[0108] Furthermore, the message feedback module 53 is specifically used for:
[0109] Determining a return credit length corresponding to the received transmission data;
[0110] Determine the congestion information of the receiving end according to the current cache status of the cache area;
[0111] Determine a return message according to a preset credit information format, an identifier of the receiving end chiplet, the receiving end congestion information and the return credit length;
[0112] Feedback the return message to the sending end core particle.
[0113] Furthermore, the parameter adjustment module 54 is specifically used for:
[0114] According to the receiving end congestion information in the returned message, the receiving end parameters to be adjusted in the transmission parameter information to be adjusted of the receiving end chip that transmits the returned message are updated to obtain the adjusted receiving end parameters;
[0115] According to the returned credit length in the returned message, the credit value to be adjusted in the transmission parameter information to be adjusted is adjusted to obtain an adjusted credit value;
[0116] According to the receiving end parameters and the credit value, the adjusted transmission parameter information is determined.
[0117] Optionally, the device further comprises:
[0118] A transmission pause module is used to determine the target transmission parameter information of the transmission data and the target receiving end core particle through the sending end core particle, make a transmission judgment on the transmission data according to the target transmission parameter information, and after determining the transmission judgment result, when the transmission judgment result is that the transmission is not possible, stop sending the transmission data until the transmission judgment is made again after the target transmission parameter information is adjusted.
[0119] The inter-chiplet communication control device provided in the embodiment of the present invention can execute the inter-chiplet communication control method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0120] Embodiment 4
[0121] Figure 6 A schematic diagram of the structure of an electronic device 60 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.
[0122] like Figure 6 As shown, the electronic device 60 includes at least two core particles 61, and a memory connected to the at least two core particles 61 in communication, such as a read-only memory (ROM), a random access memory (RAM), etc., as not shown in the figure, wherein the memory stores a computer program that can be executed by at least one core particle, and the core particle 61 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) or the computer program loaded from the storage unit to the random access memory (RAM). In the RAM, various programs and data required for the operation of the electronic device 60 can also be stored. The core particles 61, ROM, and RAM can be connected to each other through a bus interface or the like.
[0123] The core particle 61 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the core particle 61 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various core particles running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The core particle 61 performs the various methods and processes described above, such as the inter-core communication control method.
[0124] In some embodiments, the inter-chip communication control method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 60 via a ROM and / or a communication unit. When the computer program is loaded into the RAM and executed by the chiplet 61, one or more steps of the inter-chip communication control method described above may be performed. Alternatively, in other embodiments, the chiplet 61 may be configured to perform the inter-chip communication control method in any other appropriate manner (e.g., by means of firmware).
[0125] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable core particle, which can be a special purpose or general purpose programmable core particle, which can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0126] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a core of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the core, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0127] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0128] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0129] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0130] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0131] In one embodiment, the embodiment of the present invention further includes a computer program product, the computer program product includes a computer program, and the computer program implements the inter-chiplet communication control method of any embodiment of the present invention when executed by a chiplet.
[0132] In the process of implementation, the computer program product can be written in one or more programming languages or a combination thereof to perform the computer program code of the present invention, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).
[0133] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0134] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A chip-to-chip communication control method, characterized in that: Applied to a wafer-level chip, the wafer-level chip includes a plurality of core particles, and the method includes: Determine the transmission data and the target transmission parameter information of the target receiving end chiplet through the sending end chiplet, perform transmission judgment on the transmission data according to the target transmission parameter information, and determine the transmission judgment result, wherein the target receiving end chiplet is the receiving end chiplet that receives the transmission data; When the transmission judgment result is that the transmission is possible, the transmission data is transmitted to the target receiving end core particle based on the target transmission parameter information, and the target transmission parameter information is adjusted; The receiving end core particle determines the receiving end congestion information according to the received transmission data and generates a return message to feed back to the sending end core particle; The transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message is adjusted by the sending end chiplet according to the return message to obtain the adjusted transmission parameter information.
2. The method according to claim 1, characterized in that The performing transmission judgment on the transmission data according to the target transmission parameter information and determining a transmission judgment result includes: Determining whether the target credit value in the target transmission parameter information meets the transmission condition; If yes, the transmission is allowed as the transmission judgment result; If not, the transmission is not possible as the transmission determination result.
3. The method according to claim 1, characterized in that The transmitting the transmission data to the target receiving end core particle based on the target transmission parameter information and adjusting the target transmission parameter information includes: Determining a transmission rate according to a target receiving end parameter and a preset threshold in the target transmission parameter information; Transmitting the transmission data to the target receiving end chiplet according to the transmission rate; Determining a credit consumption value for this transmission according to data attribute information of the transmission data; The target credit value in the target transmission parameter information is adjusted according to the credit consumption value.
4. The method according to claim 1, characterized in that: The step of determining the receiving end congestion information according to the received transmission data and generating a return message to feed back to the sending end core particle includes: Determining a return credit length corresponding to the received transmission data; Determine the congestion information of the receiving end according to the current cache status of the cache area; Determine a return message according to a preset credit information format, an identifier of the receiving end chiplet, the receiving end congestion information and the return credit length; Feedback the return message to the sending end core particle.
5. The method according to claim 1, characterized in that The step of adjusting the transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message according to the return message to obtain the adjusted transmission parameter information includes: According to the receiving end congestion information in the returned message, the receiving end parameters to be adjusted in the transmission parameter information to be adjusted of the receiving end chip that transmits the returned message are updated to obtain the adjusted receiving end parameters; According to the returned credit length in the returned message, the credit value to be adjusted in the transmission parameter information to be adjusted is adjusted to obtain an adjusted credit value; According to the receiving end parameters and the credit value, the adjusted transmission parameter information is determined.
6. The method according to claim 1, characterized in that After determining the transmission data and the target transmission parameter information of the target receiving end core particle by the transmitting end core particle, performing transmission judgment on the transmission data according to the target transmission parameter information, and determining the transmission judgment result, the method further includes: When the transmission judgment result is that the transmission is not possible, the sending of the transmission data is stopped until the transmission judgment is performed again after the target transmission parameter information is adjusted.
7. A chip-to-chip communication control device, characterized in that: Applied to a wafer-level chip, the wafer-level chip includes a plurality of core particles, and the device includes: A transmission judgment module, used to determine the transmission data and the target transmission parameter information of the target receiving end chiplet through the sending end chiplet, perform transmission judgment on the transmission data according to the target transmission parameter information, and determine a transmission judgment result, wherein the target receiving end chiplet is the receiving end chiplet that receives the transmission data; A data transmission module, configured to transmit the transmission data to the target receiving end core particle based on the target transmission parameter information when the transmission judgment result is that the transmission is possible, and adjust the target transmission parameter information; A message feedback module, used to determine the congestion information of the receiving end and generate a return message to feed back to the sending end chip according to the received transmission data through the receiving end chip; The parameter adjustment module is used to adjust the transmission parameter information to be adjusted of the receiving end chiplet that transmits the return message according to the return message through the sending end chiplet to obtain the adjusted transmission parameter information.
8. An electronic device, characterized in that: The electronic device is a wafer-level chip as claimed in any one of claims 1 to 6, and the electronic device comprises: at least two core particles; and A memory communicatively connected to the at least two chiplets; wherein, The memory stores a computer program executable by the at least two core particles, and the computer program is executed by the at least two core particles so that the at least two core particles can execute the inter-core communication control method according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the chiplets to implement the inter-chiplet communication control method according to any one of claims 1 to 6 when executed.
10. A computer program product, characterized in that The computer program product comprises a computer program, which, when executed by a chiplet, implements the inter-chiplet communication control method according to any one of claims 1 to 6.
Citation Information
Cited By
Data transmission skew calibration method, device and chip
CN121008656A
Data transmission skew calibration method, device and chip
CN121008656B
UCIe-based flow control method, artificial intelligence chip and storage medium
CN121193679A
Uci e-based traffic control method, artificial intelligence chip and storage medium
CN121193679B
Flow control method and chip
CN122069228A