Information transmission method, receiving method, communication device and storage medium

By generating high-level and low-level pulse signals, the problem of low energy collection efficiency of passive IoT terminals is solved, the dual effects of information transmission and energy supply are achieved, and the working ability of the equipment is improved.

CN120018204APending Publication Date: 2025-05-16ZTE CORP
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Patent Information

Application Number
CN202311524948.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-15
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

Passive IoT terminals are less efficient in collecting energy in the environment, limiting the working time and working distance of the equipment.

Method used

By generating signals composed of high-level pulses and low-level pulses, information transmission is achieved and energy is provided to the passive terminal. The ratio of the high-level pulses and low-level pulses of the signal can be adjusted to improve power supply.

Benefits of technology

While transmitting information, it provides energy for passive terminals, improves the working time and working distance of the equipment, and meets the technical needs of low cost, low power consumption, energy saving and carbon reduction.

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Abstract

The embodiment of the invention provides an information transmission method, a receiving method, a communication device and a storage medium, relates to the technical field of communication, and can provide energy for a passive terminal while transmitting information. The method comprises the steps of generating a first signal composed of a high-level pulse and a low-level pulse based on an information sequence, and sending the first signal.
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Description

Technical Field

[0001] The present disclosure relates to the field of communication technology, and in particular to an information transmission method, a receiving method, a communication device and a storage medium. Background Art

[0002] The Internet of Things (IoT) is a kind of convergent application and technology improvement. Through information sensing devices, according to the agreed protocol, any object can be connected to the network. Objects can exchange and communicate information through information transmission media to achieve intelligent identification, positioning, tracking, supervision and other functions. In particular, in order to meet the technical requirements of low cost, low power consumption, energy saving and carbon reduction, the passive Internet of Things (Passive loT) has also received widespread attention. Passive IoT is a new type of IoT technology that can use energy sources in the environment, such as electromagnetic waves or light energy, to provide power for the IoT, thereby reducing the energy consumption of the equipment and extending its service life. At the same time, it can also reduce dependence on traditional energy. Passive IoT can also better adapt to various environments and application scenarios, and its application range is very wide, including smart homes, smart cities, smart medical care, smart transportation, etc. However, passive terminals need to collect energy from the environment, and the energy collection efficiency may be low. Summary of the invention

[0003] The present disclosure provides an information transmission method, a receiving method, a communication device and a storage medium, which provide energy to a passive terminal while transmitting information.

[0004] In a first aspect, the present disclosure provides an information transmission method, the method comprising:

[0005] Based on the information sequence, generating a first signal consisting of a high level pulse and a low level pulse;

[0006] Send the first signal.

[0007] In a second aspect, the present disclosure further provides an information receiving method, the method comprising:

[0008] receiving a first signal consisting of a high level pulse and a low level pulse;

[0009] Charging is performed based on the first signal and an information sequence is acquired.

[0010] In a third aspect, the present disclosure provides a communication device, the communication device comprising:

[0011] A processing module, configured to generate a first signal consisting of a high level pulse and a low level pulse based on the information sequence;

[0012] The sending module is used to send a first signal.

[0013] In a fourth aspect, the present disclosure provides another communication device, the communication device comprising:

[0014] A receiving module, used for receiving a first signal consisting of a high level pulse and a low level pulse;

[0015] The processing module is used to charge and obtain an information sequence based on the first signal.

[0016] In a fifth aspect, the present disclosure provides a communication device, comprising: a processor and a memory; the memory stores instructions executable by the processor; when the processor is configured to execute the instructions, the communication device implements any method provided in the first aspect or the second aspect above.

[0017] In a sixth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a computer, the computer executes any one of the methods provided in the first aspect or the second aspect.

[0018] In a seventh aspect, a computer program product comprising computer instructions is provided. When the computer instructions are executed on a computer, the computer executes any one of the methods provided in the first aspect or the second aspect.

[0019] Based on the technical solution provided by the present disclosure, a signal generated based on an information sequence can be sent to generate a signal composed of a high-level pulse and a low-level pulse. Based on the signal, energy can be provided to a passive terminal at the receiving end while transmitting information. In addition, the different ratios of high-level pulses and low-level pulses in the signal can be used to measure the energy supply capacity of the signal, thereby improving the energy supply capacity by controlling the ratio of high-level pulses and low-level pulses in the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the architecture of a communication system provided by an embodiment of the present disclosure;

[0021] Figure 2 A flowchart of an information transmission method provided by an embodiment of the present disclosure;

[0022] Figure 3 A flowchart of another information transmission method provided by an embodiment of the present disclosure;

[0023] Figure 4 A schematic diagram of first information provided by an embodiment of the present disclosure;

[0024] Figure 5 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0025] Figure 6A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0026] Figure 7 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0027] Figure 8 A schematic diagram of second information provided by an embodiment of the present disclosure;

[0028] Fig. 9 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0029] Fig.10 A schematic diagram of another type of second information provided by an embodiment of the present disclosure;

[0030] Fig.11 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0031] Fig.12 A schematic diagram of another type of second information provided by an embodiment of the present disclosure;

[0032] Fig.13 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0033] Fig.14 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0034] Fig.15 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0035] Fig.16 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0036] Fig.17 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0037] Fig.18 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0038] Fig.19 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0039] Fig. 20 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0040] Fig.21 A schematic diagram of another type of second information provided by an embodiment of the present disclosure;

[0041] Fig. 22 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0042] Fig.23 A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0043] Fig.24 A schematic diagram of another type of second information provided by an embodiment of the present disclosure;

[0044] Fig.25A A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0045] Fig.25B A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0046] Fig.25C A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0047] Fig.25D A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0048] Fig.25E A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0049] Fig.25F A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0050] Fig.26 A schematic diagram of another type of second information provided by an embodiment of the present disclosure;

[0051] Fig.27A A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0052] Fig.27B A schematic diagram of another first information provided by an embodiment of the present disclosure;

[0053] Fig.28 A flowchart of another information transmission method provided by an embodiment of the present disclosure;

[0054] Fig.29 A schematic diagram of transmitting information provided by an embodiment of the present disclosure;

[0055] Fig.30 A flowchart of an information receiving method provided by an embodiment of the present disclosure;

[0056] Fig.31 A schematic diagram of the composition of a communication device provided in an embodiment of the present disclosure;

[0057] Fig.32 A schematic diagram of another communication device provided in an embodiment of the present disclosure;

[0058] Fig.33 A schematic diagram of the structure of a communication device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0059] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0060] In the description of the present disclosure, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, "at least one" means one or more, and "plurality" means two or more. The words "first", "second", etc. do not limit the quantity and execution order, and the words "first", "second", etc. do not limit them to be different.

[0061] It should be noted that in the present disclosure, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present disclosure should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0062] At present, the passive-internet of things (Passive-IoT) has received widespread attention. The passive terminals in the passive-IoT have the advantages of no need for external power supply, strong adaptability, high reliability, high security, low cost, easy installation and good maintainability, so they are widely used in many fields. However, the passive terminal needs to collect energy from the environment, and the energy collection efficiency may be low, which may further limit the working time, working distance, range, etc. of the device.

[0063] In view of this, the present disclosure provides a data information transmission method, the method comprising: generating a first signal consisting of a high level pulse and a low level pulse based on an information sequence, and sending the first signal. In this way, while transmitting information to a receiving end, the high level pulse in the first signal can also be used to provide energy to the receiving end.

[0064] In some embodiments, in a passive Internet of Things, a communication mode based on backscattering can be used to transmit information to a receiving end.

[0065] Backscatter communication (BSC) is a wireless communication technology that uses the principle of backscattering of radio frequency signals for communication. In backscatter communication, the transmitting device can enhance the reflection of the incident radio frequency signal by adjusting the matching between the receiving antenna and the impedance, and modulate the sensed data it obtains onto the reflected signal to complete the data transmission.

[0066] To facilitate understanding of the technical solution provided by the present disclosure, Figure 1 A communication system is shown in FIG. 1 , which can use the above-mentioned backscatter communication technology. Figure 1 As shown, the communication system 100 includes a transmitting device 101 , a reverse communication device 102 and a receiving device 103 .

[0067] The sending device 101 may also be called a helper, an exciter or an excitation device, etc., without limitation. The reverse communication device 102 may also be called a backscatter device, a reflection device, an electronic tag, or a tag, etc., without limitation. The receiving device 103 may also be called a receiver, a receiver or a reader / writer, etc., without limitation. The sending device may also be a base station, a reader / writer, a relay device, etc., and the receiving device may also be a base station, a reader / writer, a relay device, etc. The sending device and the receiving device may be the same or different. The excitation device mainly sends an excitation signal to provide energy and carrier to the tag to activate the tag. The tag is a passive device. When it receives the excitation signal sent by the excitation device, it starts to reflect the signal. The tag can be considered as a full-duplex device. While receiving energy / signal / carrier, it also modulates and reflects its own information. The reader / writer can control the excitation device to send instructions and excitations, and receive information from the tag at the same time. In some scenarios, the excitation device and the receiving device can be integrated into one device, that is, the integrated device can both send excitation signals and have the function of receiving reflected signals. In some scenarios, the excitation device and the receiving device may adopt a separate architecture, that is, the excitation device and the receiving device are two devices respectively, wherein the excitation device is used to send the excitation signal and the receiving device is used to receive the reflected signal. It should be noted that the embodiments of the present disclosure are all described in the scenario where the excitation device and the receiving device in the backscatter communication system are two devices respectively.

[0068] The method provided by the present invention can be applied to any current or future communication system that adopts reflection communication technology, such as global system of mobile communication (GSM) system, code division multiple access (CDMA) system, wideband code division multiple access (WCDMA) system, general packet radio service (GPRS), long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD), universal mobile telecommunication system (UMTS), worldwide interoperability for microwave access (WiMAX) communication system, fifth generation (5G) system or new radio (NR) and future communication systems, etc., without limitation herein.

[0069] In some embodiments, the excitation device involved in the embodiments of the present disclosure may be a network device, and the reader / writer may be a terminal device. Alternatively, the excitation device is a terminal device, and the reader / writer is a network device, or both the excitation device and the reader / writer may be network devices, or both the excitation device and the reader / writer may be terminal devices, etc., without limitation. The excitation device may send an excitation signal to the tag on a specified time-frequency resource under the coordination and control of the reader / writer to complete the communication process. For example, in the application scenario of the Internet of Things, the tag device can be used as a low-cost tag and installed on objects in large quantities. The network device and the terminal device can charge the tag device to obtain information when the electronic tag information is needed.

[0070] The network device can be used to implement functions such as resource scheduling, wireless resource management, and wireless access control of the terminal device. Specifically, the network device can be any node in a base station transceiver, a wireless base station, a wireless transceiver, a small base station, a wireless access point, a transmission receive point (TRP), a transmission point (TP), an evolved node B (eNB), a home node B, a home evolved node B, a reader, and some other access nodes. In some embodiments, the communication system 100 may also include different types of base stations, such as a macro cell base station and / or a small cell base station.

[0071] The terminal device may also be referred to as a terminal, user equipment (UE), mobile station, mobile terminal, etc. The terminal device may be an Internet of Things (IoT) device, which is used for various information collection and then forward error correction coding of the data information before sending the data to the base station. The terminal device may also be a mobile phone, a tablet computer, a computer with wireless transceiver function, a car, a tram and other mobile devices. In addition, the terminal device may be fixed or mobile. Various types of terminal devices may also include or be referred to by those skilled in the art as mobile stations, user stations, mobile units, user units, wireless units, remote units, mobile devices, wireless devices, wireless communication devices, remote devices, mobile user stations, access terminals, mobile terminals, wireless terminals, remote terminals, handheld devices, user agents, mobile clients, clients, passive tags, or some other possible devices. In addition, various types of UE may also be cellular phones, personal digital assistants (PDAs), wireless modems, wireless communication devices, handheld devices, tablet computers, laptop computers, cordless phones, wireless local loop (WLL) stations, and the like. Various types of UEs may communicate with various types of base stations and network devices (including macro eNBs, small cell eNBs, relay base stations, etc.) The wireless communication system 100 may also include an IoT system or be a part of an IoT system.

[0072] like Figure 2 As shown, an information transmission method provided by an embodiment of the present disclosure includes the following steps:

[0073] S101 . Generate a first signal consisting of a high-level pulse and a low-level pulse based on an information sequence.

[0074] The above information sequence is a sequence generated based on the data to be transmitted. In addition, the length of the information sequence may be K bits, where K≥1.

[0075] In some embodiments, the length of the information sequence is determined in one of the following ways: pre-set, configured by signaling. Exemplarily, the transmitting end device may receive a signaling indicating the length of the information sequence (i.e., the value of K), for example, the length of the information sequence is 1 bit, and then based on the signaling, the transmitting end device may determine the information sequence of 1 bit in length.

[0076] In a possible implementation, a second signal consisting of a high-level pulse and a low-level pulse may be generated first, and then the first signal may be generated based on the second signal. Figure 3 As shown, it can be specifically implemented as the following steps S101A1-S101A2:

[0077] S101A1. Generate a second signal consisting of a high-level pulse and a low-level pulse based on the information sequence.

[0078] The different characteristics of the second signal correspond to different information sequences, that is, the different characteristics of the second signal correspond to different information sequences of K bits in length.

[0079] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0080] In some embodiments, the above information sequence may also correspond to multiple sequence states, and the multiple sequences may be divided into multiple groups. Exemplarily, the above information sequence may be a K-bit long information sequence, and the K-bit long information sequence may correspond to 2 k sequence state, and then 2 k The sequence states are divided into multiple groups.

[0081] In the above-mentioned multiple groups of sequence states, the lengths of the information sequences corresponding to the sequence states belonging to the same group are the same, wherein the sequence states belonging to the same group are different, and different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different sequence states belonging to the same group. In addition, the signal lengths of the second signals corresponding to the sequence states belonging to different groups are different.

[0082] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0083] In one example, the preset waveform coding method may be a Manchester waveform coding method with a rate of 1 / 2 or a Manchester waveform coding method with a rate of 1 / 4. That is, the second signal may be generated based on an information sequence of K bits in length and using a Manchester waveform coding method with a rate of 1 / 2 or 1 / 4.

[0084] For example, Figure 4 As shown, the value of K is 1, and the second signal is generated by using a Manchester waveform encoding method with a rate of 1 / 2. Figure 4 Indicator boxes 41, 42, and 43 in the figure are all possible second signals, and different characteristics of the second signal correspond to different information sequences. In one example, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences, such as Figure 4 As shown, K=1, the bit value of the information sequence is 0, and the second signal is composed of a low-level pulse and a high-level pulse with equal pulse width. The bit value of the information sequence is 1, and the second signal is composed of a high-level pulse and a low-level pulse with equal pulse width.

[0085] S101A2. Add M unit high-level pulses and N unit low-level pulses to the second signal to generate a first signal.

[0086] Wherein, M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0087] In some embodiments, the pulse width of the above-mentioned unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

[0088] In an example, the value of N may be 0, that is, M unit high-level pulses may be added to the second signal to generate the first signal.

[0089] In some embodiments, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. Wherein, M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0090] Exemplarily, the value of M1 is equal to M, and the values ​​of M2 and M3 are both 0, that is, the M unit high-level pulses are all located before the first pulse of the second signal. Alternatively, the value of M2 is equal to M, and the values ​​of M1 and M3 are both 0, that is, the M unit high-level pulses are all located after the last pulse of the second signal. Alternatively, the values ​​of M1 and M2 are greater than 0, and the value of M3 is 0, that is, the M unit high-level pulses include two parts, one part of which is M1 unit high-level pulses, which are located before the first pulse of the second signal, and the other part is M2 unit high-level pulses, which are located after the last pulse of the second signal. It should be understood that the above is only an exemplary description of the values ​​of M1, M2 and M3, and there are many other possible situations for the values ​​of M1, M2 and M3, which are not listed here one by one.

[0091] Furthermore, the present embodiment is exemplarily described below with reference to Examples 1 to 3.

[0092] Example 1: Figure 4 As shown, the value of K is 1, and M=1, and the second signal is generated by using the Manchester waveform encoding method with a rate of 1 / 2. Among them, the pulse width of the unit high / low level pulse is PW, such as Figure 4 As shown in the second signal in the indicator box 41 in FIG. 4 , in the first signal, all of the M=1 unit high-level pulses are located before the first pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0093] Or, if Figure 4 As shown in the second signal in the indicator box 42 in FIG. 4 , in the first signal, M=1 unit of high-level pulses are all located in the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0094] Or, if Figure 4 As shown in the second signal in the indicator box 43 in FIG. 4 , in the first signal, all of the M=1 unit high-level pulses are located after the last pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0095] Example 2: Figure 5 As shown, the value of K is 1, and M>1, and the second signal is generated by using the Manchester waveform encoding method with a rate of 1 / 2. Among them, the pulse width of the unit high / low level pulse is PW, Figure 5 Indication box 51, indication box 52, indication box 53 and indication box 54 in FIG. 5 are all possible second signals. Figure 5As shown in the second signal in the indicator box 51 in FIG. 5 , in the first signal, M=2 unit high-level pulses are all located before the first pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0096] Or, if Figure 5 As shown in the second signal in the indicator box 52 in FIG. 5 , in the first signal, M=2 unit high-level pulses are all located in the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0097] Or, if Figure 5 As shown in the second signal in the indicator box 53 in FIG. 5 , in the first signal, M=2 unit high-level pulses are all located after the last pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0098] Or, if Figure 5 As shown in the second signal in the indicator box 54 in the first signal, in the first signal, M=2 unit high-level pulses include two parts, each of which includes 1 high-level pulse, wherein one part of the high-level pulses is located before the first pulse of the second signal, and the other part is located after the last pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all the pulses of the first signal is 3 / 4.

[0099] In addition, if Figure 5 As shown, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences, where K=1, the bit value of the information sequence is 0, and the second signal is composed of a sequence of low-level pulses and high-level pulses with equal pulse widths. Alternatively, the bit value of the information sequence is 1, and the second signal is composed of a sequence of high-level pulses and low-level pulses with equal pulse widths.

[0100] Example 3: Figure 6 As shown, the value of K is 1, and M=1, and the second signal is generated by using the Manchester waveform encoding method with a rate of 1 / 4. Among them, the pulse width of the unit high / low level pulse is PW, Figure 6 The indication boxes 61, 62 and 63 in FIG. 6 are all possible second signals. Figure 6 As shown in the second signal in the indicator box 61 in FIG. 1 , in the first signal, all of the M=1 unit high-level pulses are located before the first pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0101] Or, if Figure 6As shown in the second signal in the indicator box 62 in FIG. 1 , in the first signal, all of the high-level pulses of M=1 unit are located in the second signal. Moreover, the proportion of the high-level pulses of the first signal to all the pulses of the first signal is 3 / 5.

[0102] Or, if Figure 6 As shown in the second signal in the indicator box 63 in FIG. 1 , in the first signal, all of the M=1 unit high-level pulses are located after the last pulse of the second signal. Moreover, the proportion of the high-level pulses of the first signal to all the pulses of the first signal is 3 / 5.

[0103] In addition, if Figure 6 As shown, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences, where K=1, the bit value of the information sequence is 0, and the second signal is composed of two low-level pulses and two high-level pulses with equal pulse widths, alternating in sequence. Alternatively, the bit value of the information sequence is 1, and the second signal is composed of two high-level pulses and two low-level pulses with equal pulse widths, alternating in sequence.

[0104] In another example, the value of N may be greater than 0, that is, M unit high-level pulses and N unit low-level pulses are added to the second signal to generate the first signal.

[0105] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located in the second signal. Wherein. N1, N2 and N3 are integers less than or equal to N, and the sum of N1, N2 and N3 is equal to N. And, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located in the second signal. Wherein, M1, M2 and M3 are integers less than or equal to M, and the sum of M1, M2 and M3 is equal to M.

[0106] Exemplarily, the value of M1 is equal to M, the value of N1 is equal to N, and the values ​​of M2, M3, N2 and N3 are all 0, that is, the M unit high level pulses and the N unit low level pulses are all located before the first pulse of the second signal. Alternatively, the value of M2 is equal to M, the value of N2 is equal to N, and the values ​​of M1, M3, N1 and N3 are all 0, that is, the M unit high level pulses and the N unit low level pulses are all located after the last pulse of the second signal. Alternatively, the values ​​of M1, M2, N1, and N2 are all greater than 0, and the values ​​of M3 and N3 are all 0, that is, the M unit high-level pulses include two parts, one part of which is M1 unit high-level pulses, which are located before the first pulse of the second signal, and the other part is M2 unit high-level pulses, which are located after the last pulse of the second signal, and the N unit low-level pulses also include two parts, one part of which is N1 unit low-level pulses, which are located before the first pulse of the second signal, and the other part is N2 unit low-level pulses, which are located after the last pulse of the second signal. It should be understood that the above is only an exemplary description of the values ​​of M1, M2, M3, N1, N2, and N3, and there are many other possible situations for the values ​​of M1, M2, M3, N1, N2, and N3, which are not listed here one by one. In addition, the following example 4 is used to exemplarily describe this embodiment.

[0107] Example 4: Figure 7 As shown, the value of K is 1, M=2 and N=1, and the second signal is generated by using the Manchester waveform encoding method with a rate of 1 / 2. Among them, the pulse width of the unit high / low level pulse is PW, such as Figure 7 As shown in the second signal in the indicator box 71 in FIG. 1 , in the first signal, M=2 unit high level pulses and N=1 unit low level pulses are both located before the first pulse of the second signal. Moreover, the proportion of the high level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0108] Or, if Figure 7 As shown in the second signal in the indicator box 72 in FIG. 1 , in the first signal, M=2 unit high level pulses and N=1 unit low level pulses are both located in the second signal. Moreover, the proportion of the high level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0109] Or, if Figure 7 As shown in the second signal in the indicator box 73 in FIG. 1 , in the first signal, M=2 unit high level pulses and N=1 unit low level pulses are both located after the last pulse of the second signal. Moreover, the proportion of the high level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0110] In addition, if Figure 7As shown, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences, where K=1, the bit value of the information sequence is 0, and the second signal is composed of a sequence of low-level pulses and high-level pulses with equal pulse widths. Alternatively, the bit value of the information sequence is 1, and the second signal is composed of a sequence of high-level pulses and low-level pulses with equal pulse widths.

[0111] In some embodiments, the high level pulse and the low level pulse in the second signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols correspond to high level pulses and low level pulses, respectively. Exemplarily, the modulation symbol can be, for example, an on-off keying (OOK) modulation symbol, an amplitude shift keying (ASK) modulation symbol, an orthogonal frequency division multiplexing (OFDM) modulation symbol, etc., and the length of the modulation symbol is the duration of the symbol.

[0112] In some embodiments, the length of the second signal is determined based on the duration of the second signal. The duration of the pulse of the second signal is determined based on the pulse width of the high level pulse and the pulse width of the low level pulse in the second signal.

[0113] In some embodiments, the second signal can also be generated based on a signal sequence of length K and a preset mapping method. Furthermore, the first signal can be obtained based on the second signal and another M unit high-level pulses and N unit low-level pulses. Among them, the pulse width of the unit high-level pulse or the unit low-level pulse can be PW, and the pulse width of the unit high-level pulse or the unit low-level pulse can be determined by presetting the pulse width value or by signaling configuration. And, M≥1, N≥0, M>N. In the first signal, the M unit high-level pulses and the N unit low-level pulses can all be located before the second signal, all in the middle of the second signal, or all after the second signal. Alternatively, it can be divided into multiple parts of M unit high-level pulses and N unit low-level pulses, each of which is located before the second signal, in the middle of the second signal, or after the second signal, which will not be repeated here. In addition, the following examples 5-7 are used to exemplarily illustrate this embodiment.

[0114] Example 5, K=1, a signal sequence with a length of K generates a second signal in a preset mapping manner, and different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences, such as Figure 8As shown, when the value of the signal sequence is 1, the second signal is formed by sequentially connecting a low-level pulse with a pulse width of PW, a high-level pulse with a pulse width of 2PW, and a low-level pulse with a pulse width of PW. Alternatively, when the value of the signal sequence is 0, the second signal is formed by sequentially connecting a high-level pulse with a pulse width of PW, a low-level pulse with a pulse width of 2PW, and a high-level pulse with a pulse width of PW. Furthermore, M unit high-level pulses and N unit low-level pulses can be added to the second signal to generate the first signal. Fig. 9 As shown in the figure, the pulse width of the unit high / low level pulse is PW, M=1, N=0. Fig. 9 As shown in the second signal in the indicator box 91 in FIG. 1 , M=1 unit high-level pulse is located before the first pulse of the second signal. And, the ratio of the high-level pulse of the first signal to all pulses of the first signal is 3 / 5. Or, as Fig. 9 As shown in the second signal in the indicator box 92 in FIG. , M=1 unit high-level pulse is located in the second signal. And, the ratio of the high-level pulse of the first signal to all pulses of the first signal is 3 / 5. Alternatively, as Fig. 9 As shown in the second signal in the indicator box 93 in FIG. 1 , M=1 unit high level pulse and N=1 unit low level pulse are both located after the last pulse of the second signal. Moreover, the proportion of the high level pulse of the first signal to all pulses of the first signal is 3 / 5.

[0115] Example 6, K=1, a signal sequence with a length of K generates a second signal in a preset mapping manner, and different combinations of high-level pulses and low-level pulses in the second signal represent different k-bit signal sequences, such as Fig.10 As shown, when the bit value of the signal sequence is 1, the second signal is composed of a high level pulse with a pulse width of 2PW and a low level pulse with a pulse width of 2PW connected in sequence. When the bit value of the signal sequence is 0, the second signal is composed of a low level pulse with a pulse width of 2PW and a high level pulse with a pulse width of 2PW connected in sequence. Furthermore, M unit high level pulses and N unit low level pulses can be added to the second signal to generate the first signal. Fig.11 As shown in the figure, the pulse width of the unit high / low level pulse is PW, M=1, N=0. Fig.11 As shown in the second signal in the indicator box 111 in , M=1 unit high level pulses are all located before the second signal, and the high level ratio of the first signal is 3 / 5. Or, as Fig.11 As shown in the second signal in the indicator box 112 in , M=1 unit high level pulses are all located in the second signal, and the high level ratio of the first signal is 3 / 5. Or, as Fig.11As shown by the second signal in the indicator box 113 in FIG. 1 , all of the M=1 unit high-level pulses are located after the second signal, and the high-level ratio of the first signal is 3 / 5.

[0116] Example 7, K=1, a signal sequence with a length of K generates a second signal in a preset mapping manner, and different width ratios of two high-level pulses in the second signal correspond to different information sequences. Fig.12 As shown, when the bit value of the signal sequence is 0, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is less than 1. When the bit value of the signal sequence is 1, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is greater than 1. Further, the first signal can be generated based on the second signal and the other M unit high-level pulses and N unit low-level pulses. Fig.13 As shown in the figure, the pulse width of the unit high / low level pulse is PW, M=2, N=0. Fig.13 As shown in the second signal in the indicator box 131 in , M=2 unit high level pulses are all located within the last low level pulse in the second signal, and the high level ratio of the first signal is 5 / 8.

[0117] In some embodiments, the value of K may be greater than 1. In addition, the following uses Examples 8 to 11 to exemplarily illustrate the situation in which the value of K in this embodiment is greater than 1.

[0118] Example 8: Fig.14 As shown, K=2, M=2, N=0, the bit value of the information sequence may include 00, 01, 10 or 11, and the second signal is determined based on the information sequence and the Manchester waveform coding with a rate of 1 / 2. In addition, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Then, M=2 unit high-level pulses can be added to the second signal to generate the first signal. Fig.14 As shown, M=2 unit high-level pulses can be divided into two parts, one part is located before the second signal, and the other part is located after the second signal, and the high level accounts for 2 / 3 of the first signal.

[0119] Example 9: Fig.15 As shown, K=2, M=2, N=0. The second signal is determined based on the information sequence and the preset mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M=2 unit high-level pulses, such as Fig.15 As shown, M=2 unit high-level pulses are all located after the second signal, and the high level accounts for 3 / 5 in the first signal.

[0120] Example 10: Fig.16 As shown, K=2, M=2, N=0. The second signal is determined based on the information sequence and the preset mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M=2 unit high-level pulses, such as Fig.16 As shown, M=2 unit high level pulses are divided into two parts, each including 1 unit high level pulse, one part is located before the second signal, and the other part is located after the second signal. And the high level accounts for 5 / 8 in the first signal.

[0121] Example 11: Fig.17 As shown, K=2, M=2, N=1. The second signal is determined based on the information sequence and the pre-set mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M=2 unit high-level pulses and N=1 unit low-level, such as Fig.17 As shown, M=2 unit high level pulses and N=1 unit low level pulses are all located after the second signal. In addition, the high level accounts for 15 / 22 in the first signal. In addition, M=2 unit high level pulses and N=1 unit low level pulses can also be all located before or in the middle of the second signal, or divided into multiple parts, respectively located before, in the middle or after the second signal, which will not be repeated here.

[0122] In some embodiments, for different information sequences, the lengths of the corresponding generated second signals may also be different. In addition, the present embodiment is exemplarily described below with reference to Examples 12 and 13.

[0123] Example 12: Fig.18 As shown, K=1, and the second signal is determined based on the information sequence through a pre-set mapping method. The bit value of the information sequence is 0, and the corresponding second signal can be as shown in the indicator box 181. The bit value of the information sequence is 1, and the corresponding second signal can be as shown in the indicator box 182. It can be seen that the signal length in the indicator box 181 is different from the signal length in the indicator box 182. That is, for different information sequences, the length of the corresponding generated second signal may also be different. Furthermore, M=1, N=0. The first signal can be composed of the second signal and another M=1 unit high-level pulses, such as Fig.18 As shown, M=1 unit high level pulse is located before the second signal. In addition, the high level accounts for 2 / 3 of the first signal.

[0124] Example 13: Fig.19As shown, K = 2, and the second signal is determined based on the information sequence through a preset mapping method. The high-level pulses in the second signal are determined based on the bit values of the information sequence. For example, the width of the i-th high-level pulse in the second signal is determined by the value of the i-th bit in the information sequence, where 0 ≤ i < k. Exemplarily, when the i-th bit in the information sequence is 1, the width of the i-th high-level pulse in the second signal is 2PW. When the i-th bit in the information sequence is 0, the width of the i-th high-level pulse in the second signal is PW. In addition, the width of the low-level pulses in the second signal is PW. Thus, when the bit values of the information sequence are 00, the corresponding second signal can be as shown in indication box 191; when the bit values of the information sequence are 01, the corresponding second signal can be as shown in indication box 192; when the bit values of the information sequence are 10, the corresponding second signal can be as shown in indication box 193; when the bit values of the information sequence are 11, the corresponding second signal can be as shown in indication box 194. It can be seen that the signal length in indication box 191 is different from the signal lengths in indication box 192 and indication box 193, the signal length in indication box 194 is also different from the signal lengths in indication box 192 and indication box 193, and the signal length in indication box 191 is also different from the signal length in indication box 194. That is, for different information sequences, the lengths of the corresponding generated second signals can also be different. Furthermore, M = 2, N = 1. The first signal can be composed of the second signal, another M = 2 unit high-level pulses, and N = 1 unit low level, as Fig.19 shown, M = 2 unit high-level pulses and N = 1 unit low level are both located after the second signal. And, the high-level ratio of the first signal is 5 / 8.

[0125] In some embodiments, the pulse widths PW of the other M unit high-level pulses and N unit low-level pulses in the first signal are less than or equal to the high / low level pulse widths in the second signal. Or, the pulse widths PW of the other M unit high-level pulses and N unit low-level pulses in the first signal are greater than the high / low level pulse widths in the second signal. And, the following uses Example 14 - Example 16 to give an exemplary description of this embodiment.

[0126] Example 14: K = 1, M = 1, N = 0. The second signal is determined by the information sequence and Manchester waveform coding with a rate of 1 / 2. Different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences. As Fig. 20As shown, when the bit value of the signal sequence is 0, the second signal is composed of a low-level pulse and a high-level pulse with a pulse width of PW'. Alternatively, when the bit value of the signal sequence is 1, the second signal is composed of a low-level pulse and a high-level pulse with a pulse width of PW'. Further, the first signal is based on the second signal and another M=1 unit high-level pulse. In addition, the width of M=1 unit high-level pulse is PW, and PW>PW'. Wherein, as shown in the second signal in the indication box 201, M=1 unit high-level pulses are all located before the second signal, and the high-level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3. Alternatively, as shown in the second signal in the indication box 202, M=1 unit high-level pulses are all located in the second signal, and the high-level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3. Alternatively, as shown by the second signal in the indication box 203, M=1 unit high level pulses are all located after the second signal, and the high level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3.

[0127] Example 15, K=1, M=1, N=0. The second signal is determined by the information sequence and the preset mapping method, and different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Fig.21 As shown, when the bit value of the signal sequence is 0, the second signal is composed of a low-level pulse with a pulse width of PW', a high-level pulse with a width of 2PW', and a low-level pulse with a width of PW'. Alternatively, when the bit value of the signal sequence is 1, the second signal is composed of a high-level pulse with a pulse width of PW', a low-level pulse with a width of 2PW', and a high-level pulse with a width of PW'. Further, the first signal is based on the second signal and another M = 1 unit high-level pulse. As Fig. 22 As shown, M=1 unit high level pulses are all located before the second signal, and the high level ratio of the first signal is (PW+2PW') / (PW+4PW').

[0128] Example 16: K = 2, M = 2, N = 1. The second signal is determined by the information sequence and a preset mapping method. Different combinations and orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Moreover, different pulse widths of different high-level pulses in the second signal correspond to different bit values. That is, the width of the i-th high-level pulse in the second signal is determined by the value of the i-th bit in the information sequence, where 0 ≤ i < k. Exemplarily, when the i-th bit in the information sequence is 1, the width of the i-th high-level pulse in the second signal is PW2; when the i-th bit in the information sequence is 0, the width of the i-th high-level pulse in the second signal is PW1. The width of the low-level pulse in the second signal is PW0, where PW2 > PW1 ≥ PW0. Further, the first signal is composed of the second signal, along with another M = 2 unit high-level pulses and N = 1 unit low-level pulse. As Fig.23 shown, the M = 2 unit high-level pulses and N = 1 unit low-level pulse are located after the second signal. And the high-level ratio of the first signal is (PW1 + PW2 + 2PW) / (PW1 + PW2 + 2PW0 + 3PW).

[0129] In some embodiments, the bit length of the information sequence is K, and there can be 2 k kinds of bit values, which can also be understood as including 2 k kinds of information sequences. The 2 k kinds of information sequences can correspondingly generate 2 k kinds of second signals. Further, the 2 k kinds of second signals are combined with another M high-level pulses and N low-level pulses to generate 2 k kinds of first signals. Among them, in the 2 k kinds of first signals, the M unit high-level pulses and N unit low-level pulses are located at the same position of the second signal. For example, both the M unit high-level pulses and N unit low-level pulses are located before the first pulse of the second signal, or both the M unit high-level pulses and N unit low-level pulses are located after the last pulse of the second signal, etc., and will not be listed one by one.

[0130] Alternatively, in some embodiments, among the 2 k kinds of first signals, the M unit high-level pulses and N unit low-level pulses can be located at different positions of the second signal. And the following uses Example 17 - Example 18 to give an exemplary description of this embodiment.

[0131] Example 17: K = 1. The second signal is determined by the information sequence and a preset mapping method. Different width ratios of two high-level pulses in the second signal correspond to different information sequences. As Fig.24As shown, the bit value of the information sequence is 0, and the ratio of the first high-level pulse width to the second high-level pulse width of the second signal is less than 1. Alternatively, the bit value of the information sequence is 1, and the ratio of the first high-level pulse width to the second high-level pulse width of the second signal is greater than 1.

[0132] Furthermore, the first signal is composed based on the second signal and another M unit high level pulses and N unit low level pulses, wherein the pulse width of the unit high / low level pulse is PW, which can be determined by presetting or by signaling configuration, wherein M≥1, N≥0 and M>N.

[0133] based on Fig.24 The second signal shown in FIG. 1 and the other M unit high level pulses and N unit low level pulses constitute the first signal. Fig.25A As shown, M=1, N=0, K=1. The bit value of the information sequence is 0, and in the first signal, M=1 unit high-level pulse is located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1, and in the first signal, M=1 unit high-level pulse is located after the first high-level pulse in the second signal. In addition, the high level accounts for 2 / 3 in the first signal.

[0134] Or, if Fig.25B As shown, M=2, N=0, K=1. The bit value of the information sequence is 0, and in the first signal, M=2 unit high-level pulses are all located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1, and in the first signal, M=2 unit high-level pulses are all located after the first high-level pulse in the second signal. In addition, the high level ratio in the first signal is 5 / 7.

[0135] Or, if Fig.25C As shown, M=3, N=0, K=1. The bit value of the information sequence is 0. In the first signal, 1 high-level pulse is located after the first high-level pulse in the second signal, and 2 high-level pulses are located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, 2 high-level pulses are located after the first high-level pulse in the second signal, and 1 high-level pulse is located after the second high-level pulse in the second signal. In addition, the high level accounts for 3 / 4 in the first signal.

[0136] Or, if Fig.25DAs shown, M=6, N=0, K=1. The bit value of the information sequence is 0. In the first signal, 2 high-level pulses are located after the first high-level pulse in the second signal, and 4 high-level pulses are located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, 4 high-level pulses are located after the first high-level pulse in the second signal, and 2 high-level pulses are located after the second high-level pulse in the second signal. In addition, the high level ratio in the first signal is 9 / 11.

[0137] Or, if Fig.25E As shown, M=2, N=2, K=1. The bit value of the information sequence is 0. For M=2 unit high-level pulses and N=2 unit low-level pulses, in the first signal, a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, among M=2 unit high-level pulses and N=2 unit low-level pulses, a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. In addition, the high level ratio in the first signal is 5 / 9.

[0138] Or, if Fig.25F As shown, M=3, N=2, K=1. The bit value of the information sequence is 0. For M=3 unit high-level pulses and N=2 unit low-level pulses, in the first signal, a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and a sequential combination of 2 unit high-level pulses and 1 unit low-level pulse is located after the second high-level pulse in its second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, for M=3 unit high-level pulses and N=2 unit low-level pulses, a sequential combination of 2 unit high-level pulses and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and a sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. In addition, the high level accounts for 3 / 5 in the first signal.

[0139] Example 18, K=1, the second signal is determined by a K-length information sequence and a preset mapping method, and different width ratios of two high-level pulses in the second signal correspond to different information sequences, and different lengths of the second signal correspond to different information sequences, such as Fig.26As shown, when the bit value of the signal sequence is 0, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is less than 1, and the length of the second signal is 5PW. When the bit value of the signal sequence is 1, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is greater than 1, and the length of the second signal is 6PW. Further, the first signal can be obtained based on the second signal and another M unit high-level pulses and N unit low-level pulses, where M≥1, N>0 and M>N.

[0140] based on Fig.26 The second signal shown in FIG. 1 and another M unit high level pulses and N unit low level pulses constitute the first signal. Fig.27A As shown, M=1, N=0. When the bit value of the signal sequence is 0, as shown by the second signal in the indication box 271, M=1 unit high-level pulse is located after the second high-level pulse in its second signal. Alternatively, when the bit value of the signal sequence is 1, as shown by the second signal in the indication box 272, M=1 unit high-level pulse is located after the first high-level pulse in its second signal, and the high-level ratio of the first signal is 9 / 13.

[0141] Or, if Fig.27B As shown, K=1, M=1, N=1. When the bit value of the signal sequence is 0, as shown in the second signal in the indication box 273, M=1 unit high level pulse and N=1 unit low level pulse are sequentially located after the second high level pulse in its second signal. Alternatively, when the bit value of the signal sequence is 1, as shown in the second signal in the indication box 274, M=1 unit high level pulse and N=1 unit low level pulse are sequentially located after the first high level pulse in its second signal, and the high level ratio of the first signal is 9 / 15.

[0142] In another possible implementation, a first bit sequence may be generated first, and then a second bit sequence may be generated based on the first bit sequence, and then the first signal may be determined based on the second bit sequence. Fig.28 As shown, it can be specifically implemented as the following steps S101B1-S101B3:

[0143] S101B1. Generate a first bit sequence based on the information sequence.

[0144] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0145] S101B2. Add P bits to the first bit sequence to generate a second bit sequence.

[0146] Wherein, P is a positive integer.

[0147] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0148] S101B3. Generate a first signal based on the second bit sequence.

[0149] Different characteristics of the first signal correspond to different second bit sequences.

[0150] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses of the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0151] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform encoding method or mapping method.

[0152] In some embodiments, the high level pulse and the low level pulse in the first signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols correspond to the high level pulse and the low level pulse, respectively. Exemplarily, the modulation symbol can be, for example, an on-off keying modulation symbol, an amplitude shift keying modulation symbol, an orthogonal frequency division multiplexing modulation symbol, etc., and the length of the modulation symbol is the duration of the symbol.

[0153] In some embodiments, the length of the first signal is determined based on the duration of the first signal. The duration of the pulse of the first signal is determined based on the pulse width of the high level pulse and the pulse width of the low level pulse in the first signal.

[0154] In some embodiments, an information sequence with a length of K=1 is mapped to obtain a first bit sequence in a predetermined encoding method or mapping method, and P bits are added to the first bit sequence to generate a second bit sequence, where P is a positive integer. Further, a first signal is generated based on the second bit sequence, where different combinations of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences. The following is an exemplary description of this embodiment with Examples 19 to 25.

[0155] Example 19: As above Figure 4 Taking the first signal shown in as an example, K=1, P=1, wherein the information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=2 based on a preset mapping method, and the first bit sequence is added with P=1 bits to obtain a second bit sequence, wherein the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 1 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 01, and then, when all P=1 bits are located before the first bit sequence, the value of the second bit sequence is 101, or, when all P=1 bits are located within the first bit sequence, the value of the second bit sequence is 011, or, when all P=1 bits are located after the first bit sequence, the value of the second bit sequence is 011. Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 10, and further, when P=1 bit is all located before the first bit sequence, the value of the second bit sequence is 110, or, when P=1 bit is all located within the first bit sequence, the value of the second bit sequence is 110, or, when P=1 bit is all located after the first bit sequence, the value of the second bit sequence is 101. In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above. Figure 4 shown.

[0156] Table 1

[0157]

[0158]

[0159] Example 20: As above Figure 5Taking the first signal shown in as an example, K=1, P=2, wherein the information sequence with a length of K=1 bit can be mapped to a first bit sequence with a length of K1=2 based on a preset mapping method, and the first bit sequence is added with P=2 bits to obtain a second bit sequence, wherein the P=2 bit sequence is 11. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 2 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 01, and then, when P=2 bits are all located before the first bit sequence, the value of the second bit sequence is 1101, or, when P=2 bits are all located in the first bit sequence, the value of the second bit sequence is 0111, or, when P=2 bits are all located after the first bit sequence, the value of the second bit sequence is 0111, or, when P=2 bits are all located after the first bit sequence, the value of the second bit sequence is 0111, or, when one of the P=2 bits is located before the first bit sequence and the other bit is located after the first bit sequence, the value of the second bit sequence is 1011.

[0160] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 10, and further, when P=2 bits are all located before the first bit sequence, the value of the second bit sequence is 1110, or, when P=2 bits are all located within the first bit sequence, the value of the second bit sequence is 1110, or, when P=2 bits are all located after the first bit sequence, the value of the second bit sequence is 1011, or, when P=1 of the 2 bits is located before the first bit sequence and the other bit is located after the first bit sequence, the value of the second bit sequence is 1101.

[0161] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above Figure 5 shown.

[0162] Table 2

[0163]

[0164]

[0165] Example 21: As above Figure 6Taking the first signal shown in as an example, K=1, P=1, and K1=4. Among them, the information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a preset mapping method, and the first bit sequence is added with P=1 bits to obtain a second bit sequence, wherein the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 3 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 0101, and then, when P=1 bits are all located before the first bit sequence, the value of the second bit sequence is 10101, or, when P=1 bits are all located in the first bit sequence, the value of the second bit sequence is 01101, or, when P=1 bits are all located after the first bit sequence, the value of the second bit sequence is 01011.

[0166] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 1010, and further, when P=1 bit is all located before the first bit sequence, the value of the second bit sequence is 11010, or, when P=1 bit is all located within the first bit sequence, the value of the second bit sequence is 10110, or, when P=1 bit is all located after the first bit sequence, the value of the second bit sequence is 10101.

[0167] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above Figure 6 shown.

[0168] Table 3

[0169]

[0170]

[0171] Example 22: As above Figure 7Taking the first signal shown in as an example, K=1, P=3, and K1=2. Among them, the information sequence with a length of K=1 bit can be mapped to a first bit sequence with a length of K1=2 based on a preset mapping method, and the first bit sequence is added with P=3 bits to obtain a second bit sequence, wherein the P=3 bit sequence is 101. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 4 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 01, and then, when P=3 bits are all located before the first bit sequence, the value of the second bit sequence is 10101, or, when P=3 bits are all located in the first bit sequence, the value of the second bit sequence is 01011, or, when P=3 bits are all located in the first bit sequence, the value of the second bit sequence is 01101.

[0172] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 10, and further, when P=3 bits are all located before the first bit sequence, the value of the second bit sequence is 10110, or, when P=3 bits are all located within the first bit sequence, the value of the second bit sequence is 11010, or, when P=3 bits are all located after the first bit sequence, the value of the second bit sequence is 10101.

[0173] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above Figure 7 shown.

[0174] Table 4

[0175]

[0176]

[0177] Example 23, K=1, P=1, and K1=4. The information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a preset mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, wherein the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 5 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 1001, and then, when P=1 bits are all located before the first bit sequence, the value of the second bit sequence is 11001, or, when P=1 bits are all located in the first bit sequence, the value of the second bit sequence is 10101, or, when P=1 bits are all located in the first bit sequence, the value of the second bit sequence is 10011.

[0178] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 0110, and further, when P=1 bit is all located before the first bit sequence, the value of the second bit sequence is 10110, or, when P=1 bit is all located within the first bit sequence, the value of the second bit sequence is 01110, or, when P=1 bit is all located after the first bit sequence, the value of the second bit sequence is 01101.

[0179] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above Fig. 9 shown.

[0180] Table 5

[0181]

[0182]

[0183] Example 24, K=1, P=1, and K1=4. The information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a preset mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, wherein the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 6 below, the bit value of the information sequence is 0, the value of the first bit sequence is 0011, and when P=1 bits are all located before the first bit sequence, the second bit sequence is 10011, or, when P=1 bits are all located in the first bit sequence, the second bit sequence is 00111, or, when P=1 bits are all located in the first bit sequence, the second bit sequence is 00111, or, when P=1 bits are all located after the first bit sequence, the second bit sequence is 00111. The information sequence is 1, the first bit sequence is 1100, and when P=1 bit is all located before the first bit sequence, the second bit sequence is 11100, or, when P=1 bit is all located within the first bit sequence, the second bit sequence is 11100, or, when P=1 bit is all located after the first bit sequence, the second bit sequence is 11001. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above. Fig.11 shown.

[0184] Table 6

[0185] Information sequence First bit sequence The second bit sequence 0 0011 10011 (P = 1 bit before the first bit sequence) 0 0011 00111 (P = 1 bit in the first bit sequence) 0 0011 00111 (P = 1 bit after the first bit sequence) 1 1100 11100 (P = 1 bit before the first bit sequence) 1 1100 11100 (P = 1 bit in the first bit sequence) 1 1100 11001 (P = 1 bit after the first bit sequence)

[0186] Example 25, K=1, P=2, and K1=6. Among them, the information sequence with a length of K=1 bit can be mapped to a first bit sequence with a length of K1=6 based on a pre-set mapping method, and P=2 bits are added to the first bit sequence to obtain a second bit sequence, where the P=2 bit sequence is 11. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 7 below, the information sequence is 0, the first bit sequence is 101100, and when P=2 bits are all located in the first bit sequence, the second bit sequence can be 10110110. The information sequence is 1, the first bit sequence is 110100, and when P=2 bits are all located in the first bit sequence, the second bit sequence can be 11010110. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above. Fig.13 shown.

[0187] Table 7

[0188] Information sequence First bit sequence The second bit sequence 0 101100 10110110 1 110100 11010110

[0189] In some embodiments, the value of K may be greater than 1. In addition, the present embodiment is exemplarily described below with reference to Examples 26 to 29.

[0190] Example 26, K=2, P=2, the bit value of the information sequence may include 00, 01, 10 or 11. The information sequence can be mapped to a first bit sequence of K1=4 based on a preset mapping method. And, P=2 bits are added to the first bit sequence to obtain a second bit sequence. Among them, the P=2 bit sequence is 11, and the P=2 bits can be divided into two parts, which are located before the first bit sequence and after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 8 below, the bit value of the information sequence is 00, the value of the first bit sequence is 0101, and the value of the second bit sequence is 101011. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 0110, and the value of the second bit sequence is 101101. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 1001, and the value of the second bit sequence is 110011. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 1010, and the value of the second bit sequence is 110101. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as described above. Fig.14 shown.

[0191] Table 8

[0192]

[0193]

[0194] Example 27, K=2, and the information sequence of K=2 is determined to be a first bit sequence based on the encoding method of Walsh code with a length of 8 (that is, K1=8). Then, the first bit sequence and another P=2 bits are combined into a second bit sequence, where the P=2 bit sequence is 11. The P=2 bits can all be located before, in the middle or after the first bit sequence, or divided into multiple parts and respectively located before, in the middle or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 9. Taking the example that P=2 bits can all be located after the first bit sequence, the bit value of the information sequence is 00, the value of the first bit sequence is 01010101, and the value of the second bit sequence is 0101010111. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 01100110, and the value of the second bit sequence is 0110011011. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 01011010, and the value of the second bit sequence is 0101101011. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 01101001, and the value of the second bit sequence is 0110100111. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above. Fig.15 shown.

[0195] Table 9

[0196] Information sequence First bit sequence The second bit sequence 00 01010101 0101010111 01 01100110 0110011011 10 01011010 0101101011 11 01101001 0110100111

[0197] Example 28, K=2, and the information sequence of K=2 is determined based on a preset mapping method to determine the first bit sequence, K1=6. Then the first bit sequence and another P=2 bits are combined into a second bit sequence, where the P=2 bit sequence is 11. The P=2 bits may all be located before, in the middle, or after the first bit sequence, or may be divided into multiple parts and respectively located before, in the middle, or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 10. Taking P=2 bits divided into 2 parts and respectively located before and after the first bit sequence as an example, the bit value of the information sequence is 00, the value of the first bit sequence is 100111, and the value of the second bit sequence is 11001111. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 111001, and the value of the second bit sequence is 11110011. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 010100, and the value of the second bit sequence is 10101001. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 001010, and the value of the second bit sequence is 10010101. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above. Fig.16 shown.

[0198] Table 10

[0199] Information sequence First bit sequence The second bit sequence 00 100111 11001111 01 111001 11110011 10 010100 10101001 11 001010 10010101

[0200] Example 29, K=2, and the information sequence of K=2 is determined to be the first bit sequence based on a preset mapping method, K1=8. Then the first bit sequence and another P=3 bits are combined into a second bit sequence, where the P=3 bit sequence is 110. The P=3 bits may all be located before, in the middle or after the first bit sequence, or may be divided into multiple parts and respectively located before, in the middle or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 11. Taking the example that P=3 bits are all located after the first bit sequence, the bit value of the information sequence is 00, the value of the first bit sequence is 11111110, and the value of the second bit sequence is 11111110110. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 111111100, and the value of the second bit sequence is 111111100110. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 11111000, and the value of the second bit sequence is 11111000110. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 11110000, and the value of the second bit sequence is 11110000110. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, and the first signal can be as described above. Fig.17 shown.

[0201] Table 11

[0202]

[0203]

[0204] In some embodiments, for different information sequences, the lengths of the corresponding generated first bit sequences may also be different. In addition, the present embodiment is exemplarily described below with examples 30 and 31.

[0205] Example 30, K=1, and the information sequence of K=1 is determined based on a preset mapping method to determine the first bit sequence, and the value of K1 can be 4, 6 or other possible values. Then the first bit sequence and another P=1 bit are combined into a second bit sequence, where the P=1 bit sequence is 1. The P=1 bit can be all located before, in the middle or after the first bit sequence, or divided into multiple parts and respectively located before, in the middle or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 12. Taking P=1 bit all located before the first bit sequence as an example, the bit value of the information sequence is 0, the value of the first bit sequence is 1001, and the value of the second bit sequence is 11001. Alternatively, the bit value of the information sequence is 1, the value of the first bit sequence is 011011, and the value of the second bit sequence is 1011011. It can be seen that the length of the first bit sequence corresponding to different bit values ​​of the information sequence is different, and the length of the corresponding second bit sequence is also different. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above Fig.18 As shown, for different information sequences, the lengths of the corresponding generated first signals may also be different.

[0206] Table 12

[0207] Information sequence First bit sequence The second bit sequence 0 1001 11001 1 011011 1011011

[0208] Example 31, K=2, and the information sequence of K=2 is used to determine the first bit sequence based on a preset mapping method, and the value of K1 can be determined based on the bit value of the information sequence. Then the first bit sequence and another P=3 bits form a second bit sequence. The first bit sequence and the second bit sequence are shown in Table 13. For example, P=3 bits are all located after the first bit sequence, where P=3 bit sequences are 110, the bit value of the information sequence is 00, the value of the first bit sequence is 1010, and the value of the second bit sequence is 1010110. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 10110, and the value of the second bit sequence is 10110110. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 11010, and the value of the second bit sequence is 11010110. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 110110, and the value of the second bit sequence is 110110110. It can be seen that the lengths of the first bit sequences corresponding to different bit values ​​of the information sequence are different, and thus the lengths of the corresponding second bit sequences are also different. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above. Fig.19 As shown, for different information sequences, the length of the corresponding generated second signal may also be different.

[0209] Table 13

[0210] Information sequence First bit sequence The second bit sequence 00 1010 1010110 01 10110 10110110 10 11010 11010110 11 110110 110110110

[0211] In some embodiments, in the process of generating the first signal based on the second bit sequence through a preset waveform encoding method or mapping method, the waveform width corresponding to the first bit sequence is the same as the waveform width corresponding to the other P bits.

[0212] In some embodiments, the waveform width corresponding to the first bit sequence may be different from the waveform width corresponding to the other P bits. In addition, the present embodiment is exemplarily described below with examples 32 to 34.

[0213] Example 32, K=1, K1=2, the first bit sequence and another P=1 bit constitute the second bit sequence, where the P=1 bit sequence is 1. The P=1 bit can all be located before, within, or after the first bit sequence, and the first signal is obtained by mapping the second bit sequence in a predetermined mapping manner. The P=1 bit in the second bit sequence is mapped to a high-level pulse with a width of PW, bit 1 belonging to the first bit sequence in the second bit sequence is mapped to a high-level pulse with a width of PW', and bit 0 belonging to the first bit sequence is mapped to a low-level pulse with a width of PW', where PW>PW'. The first bit sequence and the second bit sequence are as shown in Table 1. When the bit value of the information sequence is 0 and the value of the first bit sequence is 01, and further, P=1 bit is all located before the first bit sequence, the value of the second bit sequence is 101, or, when P=1 bit is all located in the first bit sequence, the value of the second bit sequence is 011, or, when P=1 bit is all located after the first bit sequence, the value of the second bit sequence is 011. Alternatively, when the bit value of the information sequence is 1 and the value of the first bit sequence is 10, and further, P=1 bit is all located before the first bit sequence, the value of the second bit sequence is 110, or, when P=1 bit is all located in the first bit sequence, the value of the second bit sequence is 110, or, when P=1 bit is all located after the first bit sequence, the value of the second bit sequence is 101. In addition, the first signal obtained based on the second bit sequence can be as described above. Fig. 20 shown.

[0214] Example 33, K=1, K1=4, the first bit sequence and another P=1 bit constitute the second bit sequence, where the P=1 bit sequence is 1. Taking the case where all P=1 bits are located before the first bit sequence as an example, the first signal is obtained by mapping based on the second bit sequence in a pre-set mapping manner. The P=1 bit in the second bit sequence is mapped to a high-level pulse with a width of PW, bit 1 belonging to the first bit sequence in the second bit sequence is mapped to a high-level pulse with a width of PW', and bit 0 belonging to the first bit sequence is mapped to a low-level pulse with a width of PW', where PW>PW'. Among them, the first bit sequence and the second bit sequence are shown in Table 14. Taking the case where all P=1 bits are located before the first bit sequence as an example, the bit value of the information bit is 0, the bit value of the first bit sequence is 1001, and the bit value of the second bit sequence is 11001. Alternatively, the bit value of the information bit is 1, the bit value of the first bit sequence is 0110, and the bit value of the second bit sequence is 10110. In addition, the first signal obtained based on the second bit sequence can be as described above Fig. 22 shown.

[0215] Table 14

[0216] Information sequence First bit sequence The second bit sequence 0 1001 11001 1 0110 10110

[0217] Example 34, K=2, the first bit sequence and another P=3 bits form the second bit sequence, where the P=3 bit sequence is 110. Taking the case where all P=3 bits are located after the first bit sequence as an example, the first signal is obtained by mapping based on the second bit sequence in a pre-set mapping manner. Bit 1 among the P=3 bits in the second bit sequence is mapped to a high-level pulse with a width of PW, and bit 0 among the P=3 bits is mapped to a low-level pulse with a width of PW. Bit 0 belonging to the first bit sequence in the second bit sequence is mapped to a low-level pulse with a width of PW0, a single bit 1 belonging to the first bit sequence is mapped to a high-level pulse with a width of PW1, and two consecutive bit 1s belonging to the first bit sequence are jointly mapped to a high-level pulse with a width of PW2, where PW>PW2>PW1≥PW0. Among them, the first bit sequence and the second bit sequence are as shown in Table 15. Taking P=3 bits all located after the first bit sequence as an example, the bit value of the information bit is 00, the bit value of the first bit sequence is 1010, and the bit value of the second bit sequence is 1010110. Alternatively, the bit value of the information bit is 01, the bit value of the first bit sequence is 10110, and the bit value of the second bit sequence is 10110110. Alternatively, the bit value of the information bit is 10, the bit value of the first bit sequence is 11010, and the bit value of the second bit sequence is 11010110. Alternatively, the bit value of the information bit is 11, the bit value of the first bit sequence is 110110, and the bit value of the second bit sequence is 110110110. In addition, the first signal obtained based on the second bit sequence can be as described above. Fig.23 shown.

[0218] Table 15

[0219] Information sequence First bit sequence The second bit sequence 00 1010 1010110 01 10110 10110110 10 11010 11010110 11 110110 110110110

[0220] In some embodiments, for different information bit sequences, the added P bits may be located at different positions in the first bit sequence. In addition, the present embodiment is exemplarily described below with Examples 35 and 36.

[0221] Example 35: The information bit sequence of K=1 is mapped to a first bit sequence of K1=5 according to a predefined mapping method, and P bits are added to the first bit sequence to form a second bit sequence, where P is a positive integer. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above. Figure 25A-Figure 25F The first bit sequence and the second bit sequence are shown in Table 16 respectively. When the information sequence is 0, the first bit sequence is 10110; or when the information sequence is 1, the first bit sequence is 11010. Furthermore, P bits are added to the first bit sequence to form a second bit sequence.

[0222] Corresponding to the above Fig.25A , P=1 and P=1 bit is 1, when the information sequence is 0, and P=1 bit is added after the 4th bit of the first bit sequence, the obtained second bit sequence is 101110. Alternatively, when the information sequence is 1, and P=1 bit is added after the 2nd bit of the first bit sequence, the obtained second bit sequence is 111010.

[0223] Corresponding to the above Fig.25B , P=2 and P=2 bits are 11, when the information sequence is 0 and P=2 bits are added after the 4th bit of the first bit sequence, the obtained second bit sequence is 1011110. Alternatively, when the information sequence is 1 and P=2 bits are added after the 2nd bit of the first bit sequence, the obtained second bit sequence is 1111010.

[0224] Corresponding to the above Fig.25C , P=3 and P=3 bits are 111, when the information sequence is 0, and 1 and 2 bits are added after the 1st bit and the 4th bit of the first bit sequence respectively, the obtained second bit sequence is 11011110. Alternatively, when the information sequence is 1, and 2 and 1 bits are added after the 2nd bit and the 4th bit of the first bit sequence respectively, the obtained second bit sequence is 11110110.

[0225] Corresponding to the above Fig.25D, P=6 and P=6 bits are all 1, when the information sequence is 0, and 2 and 4 bits are added after the 1st bit and the 4th bit of the first bit sequence respectively, the obtained second bit sequence is 11101111110. Alternatively, when the information sequence is 1, and 4 and 2 bits are added after the 2nd bit and the 4th bit of the first bit sequence respectively, the obtained second bit sequence is 11111101110.

[0226] Corresponding to the above Fig.25E , P=4, and P=4 bits are 1010, when the information sequence is 0, and bit 10 and bit 10 are added after the 1st bit and the 4th bit of the first bit sequence, respectively, the obtained second bit sequence is 110011100. Alternatively, when the information sequence is 1, and bit 10 and bit 10 are added after the 2nd bit and the 4th bit of the first bit sequence, respectively, the obtained second bit sequence is 111001100.

[0227] Corresponding to the above Fig.25F , P=5, and P=5 bits are 10110. When the information sequence is 0, and bit 10 and bit 110 are added after the 1st bit and the 4th bit of the first bit sequence, respectively, the obtained second bit sequence is 1100111100. Alternatively, when the information sequence is 1, and bit 110 and bit 10 are added after the 2nd bit and the 4th bit of the first bit sequence, respectively, the obtained second bit sequence is 1111001100.

[0228] Table 16

[0229]

[0230]

[0231] Example 36: The information bit sequence of K=1 is mapped to a first bit sequence of K1=5, 6 or other possible values ​​according to a predefined mapping method, that is, the first bit sequences corresponding to different information bit sequences may have different lengths. In addition, P bits are added to the first bit sequence to form a second bit sequence, where P is a positive integer. Further, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be as described above. Figure 27A-27BAs shown. The first bit sequence and the second bit sequence are shown in Table 17 respectively. When the information sequence is 0, the first bit sequence is 10110, and its length K1=5; or when the information sequence is 1, the first bit sequence is 111010, and its length K1=6. Furthermore, P bits are added to the first bit sequence to form a second bit sequence.

[0232] Corresponding to the above Fig.27A , P=1 and P=1 bit is 1, when the information sequence is 0 and P=1 bit is added after the 4th bit of the first bit sequence, the obtained second bit sequence is 101110, which is 6 bits long. When the information sequence is 1 and P=1 bit is added after the 3rd bit of the first bit sequence, the obtained second bit sequence is 1111010, which is 7 bits long.

[0233] Corresponding to the above Fig.27B , P = 2 and P = 2 bits is 10, when the information sequence is 0 and bit 10 is added after the 4th bit of the first bit sequence, the second bit sequence obtained is 1011100, which is 7 bits long. When the information sequence is 1 and bit 10 is added after the 3rd bit of the first bit sequence, the second bit sequence obtained is 11110010, which is 8 bits long.

[0234] Table 17

[0235]

[0236] S102. Send a first signal.

[0237] Correspondingly, after receiving the first signal, the receiving end can use the high level in the signal for charging, and at the same time use the part of the first signal belonging to the second signal or the first bit sequence to detect the information bits represented in the received signal.

[0238] It should be noted that Figure 1 Taking the system shown in the figure as an example, the information transmission method used by the reader to tag link is the pulse interval encoding (PIE) scheme. Fig.29As shown, the transmission signal corresponding to the bit value of 0 is composed of high-level pulses and low-level pulses of equal width, and the width of the low-level pulse can be PW (Pulse Width). The transmission signal corresponding to the bit value of 1 is composed of high-level pulses and low-level pulses of unequal widths, where the width of the low-level pulse is PW, and the width of the high-level pulse can be 2PW~3PW. In the case of bit 0 and bit 1 being equal, the high-level ratio of each transmission signal is 3 / 5~2 / 3. Using the different width characteristics of the high-level pulses in the transmission signals of bit 0 and bit 1, the passive tag can make bit decisions based on the received high-level pulse width. In addition, since there are high-level pulses in the transmission signals of bit 0 and bit 1, the RF signal sent by the reader can always maintain a certain amount of energy.

[0239] For example, the waveform length of bit 0 is T s =2PW, the width of high level pulse and low level pulse are both 0.5T s =PW, so the waveform length of bit 1 is (1+α)T s (0.5≤α≤1). The amplitude of the high level is A, and the amplitude of the low level is 0, so the transmission signal of bit 0 has energy The transmitted signal of bit 1 has energy E1 = A 2 (1+α-0.5)T s Furthermore, when the probability of bits 0 and 1 is equal, the transmitted signal per bit has an average energy of Therefore, this information transmission method can ensure that energy is provided to the passive tag while data is transmitted.

[0240] Furthermore, in PIE coding, the average length of the transmission signal per bit is Therefore, within the length range of each transmission signal, the average power consumption of each bit of the transmission signal is It is easy to know that this value is proportional to the high level ratio in each transmission signal in PIE coding. Therefore, in the present disclosure, the energy supply capacity of the information transmission method can be improved to a certain extent by changing the high level ratio in the first signal.

[0241] Based on the technical solution provided by the present disclosure, a signal generated based on an information sequence can be sent to generate a signal composed of a high-level pulse and a low-level pulse. Based on the signal, energy can be provided to a passive terminal at the receiving end while transmitting information. In addition, the different ratios of high-level pulses and low-level pulses in the signal can be used to measure the energy supply capacity of the signal, thereby improving the energy supply capacity by controlling the ratio of high-level pulses and low-level pulses in the signal.

[0242] In some embodiments, Fig.30 As shown, the present disclosure also provides an information receiving method, the method comprising:

[0243] S201. Receive a first signal consisting of a high-level pulse and a low-level pulse.

[0244] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, configured through signaling.

[0245] In one possible implementation, the first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal; wherein the second signal is a signal generated based on an information sequence and composed of high-level pulses and low-level pulses, different characteristics of the second signal correspond to different information sequences, M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0246] In some embodiments, the pulse width of the above-mentioned unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

[0247] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0248] In some embodiments, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. Wherein, M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0249] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. Wherein, N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0250] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0251] In some embodiments, the high level pulses and low level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0252] In another possible implementation, the first signal is generated by adding P bits to the first bit sequence to obtain a second bit sequence, wherein the first bit sequence is generated based on the information sequence, and P is a positive integer.

[0253] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0254] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform encoding method or mapping method.

[0255] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, P3 bits are located within the first bit sequence, wherein P1, P2 and P3 are all integers less than or equal to P, and the sum of P1, P2 and P3 is equal to P.

[0256] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses of the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0257] In some embodiments, the high level pulses and low level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0258] S202: Charging and acquiring an information sequence based on the first signal.

[0259] After receiving the first signal, the receiving end can use the high level in the signal for charging, and at the same time use the part of the first signal belonging to the second signal or the first bit sequence to detect the information bits represented in the received signal.

[0260] The detailed description of steps S201-S202 can also refer to the relevant description of the above steps S101-S102, which will not be repeated here.

[0261] The above mainly introduces the solution provided by the present disclosure from the perspective of interaction between various nodes. It is understandable that each node, such as a device or equipment, includes a hardware structure and / or software module corresponding to the execution of each function in order to realize the above functions. It should be easily appreciated by those skilled in the art that, in combination with the algorithm steps of each example described in the embodiments disclosed herein, the present invention can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0262] The embodiments of the present disclosure may divide the functional modules of the communication device according to the above method embodiments. For example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one functional module. The above integrated modules may be implemented in the form of hardware or software. It should be noted that the division of modules in the embodiments of the present disclosure is schematic and is only a logical function division. There may be other division methods in actual implementation. The following is an example of dividing each functional module corresponding to each function.

[0263] Fig.31 FIG. 1 is a schematic diagram showing the composition of a communication device provided by an embodiment of the present disclosure. Fig.31 As shown, the communication device 310 includes a processing module 3101 and a sending module 3102 .

[0264] In some embodiments, the processing module 3101 is used to generate a first signal consisting of a high level pulse and a low level pulse based on the information sequence. The sending module 3102 is used to send the first signal.

[0265] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, configured through signaling.

[0266] In some embodiments, the processing module 3101 is specifically used to: generate a second signal consisting of high-level pulses and low-level pulses based on an information sequence, wherein different characteristics of the second signal correspond to different information sequences, and add M unit high-level pulses and N unit low-level pulses to the second signal to generate a first signal, where M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0267] In some embodiments, the pulse width of the above-mentioned unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

[0268] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0269] In some embodiments, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. Wherein, M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0270] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. Wherein, N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0271] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0272] In some embodiments, the high level pulses and low level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0273] In some embodiments, the processing module 3101 is specifically configured to: generate a first bit sequence based on the information sequence, add P bits to the first bit sequence to generate a second bit sequence, where P is a positive integer, and generate a first signal based on the second bit sequence.

[0274] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0275] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform encoding method or mapping method.

[0276] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0277] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses of the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0278] In some embodiments, the high level pulses and low level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0279] For a more detailed description of the processing module 3101 and the sending module 3102, as well as a more detailed description of the technical features therein and a description of the beneficial effects, etc., please refer to the corresponding method embodiment section above and will not be repeated here.

[0280] Fig.32 FIG. 1 is a schematic diagram showing the composition of a communication device provided by an embodiment of the present disclosure. Fig.32 As shown, the communication device 320 includes a receiving module 3201 and a processing module 3202 .

[0281] In some embodiments, the receiving module 3201 is used to receive a first signal composed of a high level pulse and a low level pulse. The processing module 3202 is used to charge and obtain an information sequence based on the first signal.

[0282] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, configured through signaling.

[0283] In some embodiments, the first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal; wherein the second signal is a signal generated based on an information sequence and composed of high-level pulses and low-level pulses, different characteristics of the second signal correspond to different information sequences, M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0284] In some embodiments, the pulse width of the above-mentioned unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

[0285] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0286] In some embodiments, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. Wherein, M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0287] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. Wherein, N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0288] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0289] In some embodiments, the high level pulses and low level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0290] In some embodiments, the first signal is generated by adding P bits to a first bit sequence to obtain a second bit sequence, wherein the first bit sequence is generated based on an information sequence, and P is a positive integer.

[0291] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0292] In some embodiments, the second signal is generated based on the second bit sequence through a preset waveform encoding method or mapping method.

[0293] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0294] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses of the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0295] In some embodiments, the high level pulses and low level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

[0296] For a more detailed description of the above-mentioned receiving module 3201 and processing module 3202, a more detailed description of each technical feature therein, and a description of the beneficial effects, etc., please refer to the above-mentioned corresponding method embodiment part, which will not be repeated here.

[0297] It should be noted that Fig.31 or Fig.32 The modules in the can also be called units, for example, the processing module can be called a processing unit. Fig.31 or Fig.32 In the illustrated embodiment, the names of the modules may not be the names shown in the figure. For example, the receiving module may also be called a communication module.

[0298] Fig.31 or Fig.32 If each unit in the embodiment is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present disclosure is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the methods of each embodiment of the present disclosure. The storage medium for storing computer software products includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program codes.

[0299] In the case of implementing the functions of the above-mentioned integrated modules in the form of hardware, the embodiment of the present disclosure provides a structural schematic diagram of a communication device. Fig.33 As shown, the communication device 330 includes: a processor 3302 , a communication interface 3303 , and a bus 3304 . Optionally, the communication device 330 may also include a memory 3301 .

[0300] The processor 3302 may be a processor that implements or executes various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. The processor 3302 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. The processor 3302 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0301] The communication interface 3303 is used to connect with other devices via a communication network, such as Ethernet, wireless access network, wireless local area network (WLAN), etc.

[0302] The memory 3301 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0303] As a possible implementation, the memory 3301 may exist independently of the processor 3302, and the memory 3301 may be connected to the processor 3302 via a bus 3304 to store instructions or program codes. When the processor 3302 calls and executes the instructions or program codes stored in the memory 3301, the method provided by the embodiment of the present disclosure can be implemented.

[0304] In another possible implementation, the memory 3301 may also be integrated with the processor 3302 .

[0305] The bus 3304 may be an extended industry standard architecture (EISA) bus, etc. The bus 3304 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.33 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0306] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the equipment or device is divided into different functional modules to complete all or part of the functions described above.

[0307] The embodiment of the present disclosure also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be completed by computer instructions to instruct the relevant hardware, and the program can be stored in the above computer-readable storage medium. When the program is executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be the memory or memory of any of the above embodiments. The above computer-readable storage medium can also be an external storage device of the above device or apparatus, such as a plug-in hard disk, a smart memory card (smart media card, SMC), a secure digital (secure digital, SD) card, a flash card (flash card), etc. equipped on the above device or apparatus. Further, the above computer-readable storage medium can also include both the internal storage unit of the above device or apparatus and an external storage device. The above computer-readable storage medium is used to store the above computer program and other programs and data required by the above device or apparatus. The above computer-readable storage medium can also be used to temporarily store data that has been output or is to be output.

[0308] The embodiments of the present disclosure also provide a computer program product, which includes a computer program. When the computer program product is run on a computer, the computer is enabled to execute any one of the methods provided in the above embodiments.

[0309] Although the present disclosure is described herein in conjunction with various embodiments, in the process of implementing the present disclosure claimed for protection, those skilled in the art may understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps.

[0310] "A" or "an" does not exclude a plurality of cases. A single processor or other unit may implement several functions listed in a claim. Certain measures are recorded in mutually different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0311] Although the present disclosure has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present disclosure. Accordingly, this specification and the drawings are merely exemplary illustrations of the present disclosure as defined by the appended claims, and are deemed to have covered any and all modifications, variations, combinations or equivalents within the scope of the present disclosure. Obviously, those skilled in the art may make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to include these modifications and variations.

[0312] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. An information transmission method, characterized in that: The method comprises: Based on the information sequence, generating a first signal consisting of a high level pulse and a low level pulse; The first signal is sent.

2. The method according to claim 1, characterized in that The length of the information sequence is determined according to one of the following methods: pre-set, or configured through signaling.

3. The method according to claim 1, characterized in that The step of generating a first signal consisting of a high level pulse and a low level pulse based on the information sequence comprises: Based on the information sequence, generating a second signal consisting of a high-level pulse and a low-level pulse; wherein different characteristics of the second signal correspond to different information sequences; The first signal is generated by adding M unit high-level pulses and N unit low-level pulses to the second signal, where M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

4. The method according to claim 3, characterized in that: The pulse width of the unit high level pulse and the pulse width of the unit low level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

5. The method according to claim 3, characterized in that: The second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

6. The method according to claim 3, characterized in that In the first signal, the M unit high-level pulses satisfy at least one of the following: M1 of the unit high level pulses are located before the first pulse in the second signal; M2 of the unit high level pulses are located after the last pulse in the second signal; M3 of the unit high level pulses are located in the second signal; Wherein, M1, M2 and M3 are all integers less than or equal to M, and the sum of M1, M2 and M3 is equal to M.

7. The method according to claim 3, characterized in that In the first signal, the N unit low-level pulses satisfy at least one of the following: N1 of the unit low level pulses are located before the first pulse in the second signal; N2 said unit low level pulses are located after the last pulse in the second signal; N3 of the unit low level pulses are located in the second signal; Wherein, N1, N2 and N3 are all integers less than or equal to N, and the sum of N1, N2 and N3 is equal to N.

8. The method according to claim 3, characterized in that Different characteristics of the second signal correspond to different information sequences, including at least one of the following: Different lengths of the second signal correspond to different information sequences; Different combination sequences of high-level pulses and low-level pulses in the second signal correspond to different information sequences; Different width combinations of the high level pulse and / or the low level pulse of the second signal correspond to different information sequences; Different widths of the high-level pulse and / or the low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

9. The method according to claim 3, characterized in that: The high level pulses and low level pulses in the second signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

10. The method according to claim 1, characterized in that The step of generating a first signal consisting of a high level pulse and a low level pulse based on the information sequence comprises: Based on the information sequence, generate a first bit sequence; Adding P bits to the first bit sequence to generate a second bit sequence, where P is a positive integer; Based on the second bit sequence, the first signal is generated.

11. The method according to claim 10, characterized in that The first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

12. The method according to claim 10, characterized in that The first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

13. The method according to claim 10, characterized in that In the second bit sequence, the P bits satisfy at least one of the following: P1 bits are located before the first bit sequence; P2 bits are located after the first bit sequence; P3 bits are located in the first bit sequence; Wherein, P1, P2 and P3 are all integers less than or equal to P, and the sum of P1, P2 and P3 is equal to P.

14. The method according to claim 10, characterized in that Different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: Different lengths of the first signal correspond to different second bit sequences; Different combination sequences of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences; Different width combinations of the high level pulse and / or the low level pulse of the first signal correspond to different second bit sequences; Different widths of the high-level pulse and / or the low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

15. The method according to claim 1, characterized in that The high level pulse and the low level pulse in the first signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

16. A method for receiving information, characterized in that: The method comprises: receiving a first signal consisting of a high level pulse and a low level pulse; Charging is performed based on the first signal and an information sequence is acquired.

17. The method according to claim 16, characterized in that The length of the information sequence is determined according to one of the following methods: pre-set, or configured through signaling.

18. The method according to claim 16, characterized in that The first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal; wherein, the second signal is a signal generated based on the information sequence and composed of high-level pulses and low-level pulses, different characteristics of the second signal correspond to different information sequences, M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

19. The method according to claim 18, characterized in that The pulse width of the unit high level pulse and the pulse width of the unit low level pulse are determined according to one of the following methods: a preset pulse width value, configured through signaling.

20. The method according to claim 18, characterized in that The second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

21. The method according to claim 18, characterized in that In the first signal, the M unit high-level pulses satisfy at least one of the following: M1 of the unit high level pulses are located before the first pulse in the second signal; M2 of the unit high level pulses are located after the last pulse in the second signal; M3 of the unit high level pulses are located in the second signal; Wherein, M1, M2 and M3 are all integers less than or equal to M, and the sum of M1, M2 and M3 is equal to M.

22. The method according to claim 18, characterized in that In the first signal, the N unit low-level pulses satisfy at least one of the following: N1 of the unit low level pulses are located before the first pulse in the second signal; N2 said unit low level pulses are located after the last pulse in the second signal; N3 of the unit low level pulses are located in the second signal; Wherein, N1, N2 and N3 are all integers less than or equal to N, and the sum of N1, N2 and N3 is equal to N.

23. The method according to claim 18, characterized in that Different characteristics of the second signal correspond to different information sequences, including at least one of the following: Different lengths of the second signal correspond to different information sequences; Different combination sequences of high-level pulses and low-level pulses in the second signal correspond to different information sequences; Different width combinations of the high level pulse and / or the low level pulse of the second signal correspond to different information sequences; Different widths of the high-level pulse and / or the low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

24. The method according to claim 18, characterized in that The high level pulses and low level pulses in the second signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

25. The method according to claim 16, characterized in that The first signal is generated by adding P bits to the first bit sequence to obtain a second bit sequence; wherein the first bit sequence is generated based on the information sequence, and P is a positive integer.

26. The method according to claim 25, characterized in that The first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

27. The method according to claim 25, characterized in that The first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

28. The method according to claim 25, characterized in that In the second bit sequence, the P bits satisfy at least one of the following: P1 bits are located before the first bit sequence; P2 bits are located after the first bit sequence; P3 bits are located in the first bit sequence; Wherein, P1, P2 and P3 are all integers less than or equal to P, and the sum of P1, P2 and P3 is equal to P.

29. The method according to claim 25, characterized in that Different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: Different lengths of the first signal correspond to different second bit sequences; Different combination sequences of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences; Different width combinations of the high level pulse and / or the low level pulse of the first signal correspond to different second bit sequences; Different widths of the high-level pulse and / or the low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

30. The method according to claim 16, characterized in that The high level pulse and the low level pulse in the first signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

31. A communication device, characterized in that: include: Memory and processor; Memory and processor coupling; The memory is used to store instructions executable by the processor; When the processor executes the instructions, the method according to any one of claims 1 to 30 is performed.

32. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a communication device, the communication device is caused to perform the method according to any one of claims 1 to 30.

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