Heterojunction infrared detector with double-mesa structure and preparation method thereof

Abstract

The invention discloses a heterojunction infrared detector with a double-mesa structure and a preparation method thereof, the infrared detector comprises a substrate, an epitaxial layer, a passivation layer and a metal electrode, the epitaxial layer comprises a buffer layer, a first ohmic contact layer, a current collection layer, a base layer, an emission layer, a second ohmic contact layer and a protection layer, the first ohmic contact layer is provided with a first step, so that the first ohmic contact layer and the current collection layer on the inner side of the first step form a pillar structure, and the current collection layer is provided with a second step, so that the current collection layer, the base layer, the emission layer, the second ohmic contact layer and the protection layer on the inner side of the second step form a micro-pillar structure. Through the design of the double-mesa structure, transverse movement of photon-generated carriers is effectively restrained, meanwhile, the micro-column structure and the mesa structure can limit an electric field in a central area, the electric field intensity of the peripheral area of the mesa can be reduced, edge breakdown is restrained, surface leakage current caused by impurities and defects is reduced, and dark current is reduced.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor application, and in particular relates to a double-table structure heterojunction infrared detector and a preparation method thereof. Background Art

[0002] With the rapid development of science and technology, the application of infrared detectors in military and civilian fields has been continuously expanded, covering a variety of fields from strategic warning, night vision to meteorological monitoring, medical diagnosis, etc. With the increasing requirements for infrared detection, the technical development of the new generation of infrared detectors is gradually moving towards the following directions: high pixel, high sensitivity, large array, high thermal resolution, multi-band detection, support for high operating temperature, small size, light weight and easy maintenance, etc.

[0003] At present, most infrared detectors use a table structure, that is, the semiconductor material outside the working area is removed by etching to achieve electrical isolation between devices. However, after etching, the continuity of the semiconductor crystal is broken, resulting in surface states and inversion layers on the side walls of the device, which causes conductive channels to appear on the side wall surface and generates surface leakage current. Although various means have been adopted to passivate the detector surface, such as depositing SiO2, polyimide, photoresist and other dielectric materials, the effect is still limited. Therefore, the structure and preparation process of infrared detectors need to be improved. Summary of the invention

[0004] Purpose of the invention: In order to solve the problems existing in the prior art, the present invention provides a double-mesa structure heterojunction infrared detector and a preparation method thereof. The design of the double-mesa structure effectively suppresses the side wall leakage current of the mesa structure detector, thereby achieving high responsiveness, high photoelectric gain, high detection rate and low dark current.

[0005] Invention content: To achieve the above-mentioned purpose, the present invention provides a double-table structure heterojunction infrared detector, comprising:

[0006] substrate;

[0007] An epitaxial layer is arranged on the substrate, the epitaxial layer includes a buffer layer, a first ohmic contact layer, a collector layer, a base layer, an emitter layer, a second ohmic contact layer and a protective layer, the first ohmic contact layer is provided with a first step, so that the first ohmic contact layer and the collector layer on the inner side of the first step form a pillar structure, and the collector layer is provided with a second step, so that the collector layer, the base layer, the emitter layer, the second ohmic contact layer and the protective layer on the inner side of the second step form a micro-pillar structure;

[0008] A passivation layer covering the surface of the epitaxial layer, wherein the passivation layer is provided with a first electrode window located on the first ohmic contact layer and a second electrode window located on the protective layer;

[0009] The metal electrode comprises a first electrode and a second electrode, wherein the first electrode and the second electrode are respectively arranged in a first electrode window and a second electrode window.

[0010] Specifically, the substrate is an N-type GaSb substrate with a doping concentration of ≥10 17 cm -3 The buffer layer is an N-type doped GaSb layer with a doping concentration of ≥10 17 cm -3 , wherein the thickness of the buffer layer is 300 to 1000 nm.

[0011] Specifically, the collector layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10 15 cm -3 , with a thickness of 200 to 600 nm; the base layer is an unintentionally doped GaSb layer, and the carrier concentration under undoped conditions is 10 14 ~10 16 cm -3 , with a thickness of 40 to 80 nm; the emission layer adopts an N-type doped InAs / AlSb superlattice structure, with a doping concentration of ≥10 17 cm -3 , thickness is 200~600nm.

[0012] Specifically, the first ohmic contact layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10 18 cm -3 , with a thickness of 250 to 800 nm; the second ohmic contact layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration of ≥10 18 cm -3 , with a thickness of 250 to 800 nm; the protective layer is an N-type doped InAs layer with a doping concentration of ≥10 18 cm -3 , thickness is 20~50nm.

[0013] Optionally, the material of the current collecting layer includes one of short-wave infrared material, medium-wave infrared material, long-wave infrared material or very long-wave infrared material.

[0014] In addition, the present invention also provides a method for preparing the above-mentioned double-table structure heterojunction infrared detector, comprising the following steps:

[0015] Preparing an epitaxial layer on a substrate, wherein the epitaxial layer includes a buffer layer, a first ohmic contact layer, a collector layer, a base layer, an emitter layer, a second ohmic contact layer and a protective layer;

[0016] Etching is performed at the outer edge of the epitaxial structure, thereby forming a first step on the first ohmic contact layer and a first step on the collector layer;

[0017] Depositing a passivation layer on the surface of the etched epitaxial layer, and etching the passivation layer to form a first electrode window and a second electrode window;

[0018] A first electrode and a second electrode are prepared in the first electrode window and the second electrode window, respectively.

[0019] Specifically, the epitaxial layer is prepared by molecular beam epitaxy.

[0020] Specifically, the first step and the second step are formed by inductively coupled plasma etching or wet etching.

[0021] Specifically, the etching depth of the first step is up to half the thickness of the first ohmic contact layer, and the etching depth of the second step is up to half the thickness of the collector layer.

[0022] Specifically, the passivation layer covers the top and sidewalls of the micro-pillar structure, the top and sidewalls of the pillar structure, and the first ohmic contact layer.

[0023] Beneficial effects:

[0024] The present invention effectively suppresses the lateral movement of photogenerated carriers through the design of a double-table structure. At the same time, the micro-column structure can limit the electric field to the central area, which can reduce the electric field strength in the peripheral area of ​​the table, suppress edge breakdown, reduce surface leakage current caused by impurities and defects, and reduce dark current.

[0025] The present invention adopts a large-scale collector and an emitter of a micro-column structure, wherein the micro-column structure represents low capacitance, which can reduce the turn-on current required for the device, and a small amount of hole capture will cause a significant change in the potential and generate amplified electron injection, and when the photogenerated holes generated by the large-scale collector move to the small-volume micro-column structure, a higher charge density will be generated, so that the device has the characteristic of high sensitivity; a larger collector area can make the electric field distribution in the detector more uniform and reasonable, which is conducive to more efficient drift and collection of photogenerated carriers to the collector under the action of the electric field, reducing the recombination probability of carriers during the migration process, thereby improving the collection efficiency, and then improving the sensitivity and responsiveness of the detector, and a larger collector can cover a wider area, so that the photogenerated carriers generated in the active layer of a larger area have a higher probability of being collected. For some situations where the generation positions of photogenerated carriers are relatively dispersed, the collection ratio can be effectively improved, and the detector's ability to collect optical signals is further enhanced.

[0026] In addition, the passivation layer deposited on the sidewalls of the micro-pillar structure and on the top and sidewalls of the pillar structure can neutralize the dangling bonds on the sidewalls and reduce the surface state density, thereby suppressing the sidewall leakage current of the infrared detector and improving the differential impedance of the infrared detector, thereby achieving high responsiveness, high detection rate and low dark current. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a cross-sectional schematic diagram of an infrared detector according to an embodiment of the present invention;

[0028] Figure 2 Schematic diagram of the process of preparing an infrared detector in an embodiment of the present invention, wherein (a) to (f) are schematic diagrams of the structures of the first to fifth devices and the infrared detector, respectively;

[0029] Figure 3 A schematic diagram of a three-dimensional structure of a third device in an embodiment of the present invention;

[0030] Figure 4 A schematic diagram of the three-dimensional structure of a focal plane detection chip in an embodiment of the present invention;

[0031] The figure includes: 1-substrate, 2-buffer layer, 3-first ohmic contact layer, 4-collecting layer, 5-base layer, 6-emitter layer, 7-second ohmic contact layer, 8-protective layer, 9-passivation layer, 10-first electrode, 11-second electrode. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0033] Reference Figure 1 This embodiment provides a double-table structure heterojunction infrared detector, including:

[0034] Substrate 1;

[0035] An epitaxial layer is arranged on the substrate 1, and the epitaxial layer includes a buffer layer 2, a first ohmic contact layer 3, a collector layer 4, a base layer 5, an emitter layer 6, a second ohmic contact layer 7 and a protective layer 8, wherein the first ohmic contact layer 3 is provided with a first step, so that the first ohmic contact layer 3 and the collector layer 4 on the inner side of the first step form a pillar structure, and the collector layer 4 is provided with a second step, so that the collector layer 4, the base layer 5, the emitter layer 6, the second ohmic contact layer 7 and the protective layer 8 on the inner side of the second step form a micro-pillar structure;

[0036] A passivation layer 9 covering the surface of the epitaxial layer, wherein the passivation layer 9 is provided with a first electrode window located on the first ohmic contact layer 3 and a second electrode window located on the protective layer 8;

[0037] The metal electrode includes a first electrode 10 and a second electrode 11, wherein the first electrode 10 and the second electrode 11 are respectively disposed in a first electrode window and a second electrode window.

[0038] Specifically, under the action of the bias voltage (the potential of the collector layer 4 is higher than the potential of the emitter layer 6), the emitter junction is forward biased and the collector junction is reverse biased, wherein the forward bias voltage loaded on the emitter junction will reduce the barrier of the emitter junction, a large number of electrons will be injected from the emitter layer into the base layer, and the generated holes will drift toward the emitter layer. After the electrons enter the base layer, they will recombine and drift toward the collector layer. When the thickness of the base layer is less than the diffusion length of the electrons, in addition to a small number of recombined electrons, a large number of electrons will cross to the boundary between the base layer and the collector layer. Due to the reverse bias of the collector junction, under the action of the reverse bias voltage, the barrier of the collector junction increases, and the electrons near the boundary are migrated to the collector layer under the action of the electric field and output to the external circuit. According to the above analysis, the change of the transistor input current will affect the change of the output current, and the output current is much larger than the input current. This is the principle of electrical amplification.

[0039] Infrared light enters from the top of the second step, and is absorbed by the collector layer to generate electron-hole pairs. Under the action of an external bias voltage, electrons are collected by the collector layer as the original photocurrent of the phototransistor; holes diffuse to the base layer and accumulate in the base layer trap, which reduces the barrier height between the base layer and the emission layer, and in turn enhances the electron injection of the emission layer and the electron migration of the base layer, thereby improving the injection efficiency of the emission junction. The electrons in the photogenerated carriers move to the first ohmic contact layer and are output through the first electrode, and the holes in the photogenerated carriers move to the second ohmic contact layer and are output through the second electrode. The movement of the photogenerated carriers forms a current, and the detection and gain of the infrared light are achieved by detecting the output current of the infrared light detection.

[0040] The present invention uses a large-scale collector and an emitter with a micro-column structure, wherein the micro-column structure represents low capacitance, which can reduce the turn-on current required for the device. A small amount of hole capture will cause a significant change in the potential and produce amplified electron injection. When the photogenerated holes generated by the large-scale collector move to the small-volume micro-column structure, a higher charge density will be generated, thereby giving the device a high sensitivity characteristic. At the same time, the internal amplification mechanism based on negative feedback stable injection reduces the noise level, and the large absorption area ensures high photon capture efficiency.

[0041] A larger collector area can optimize the electric field distribution of the heterojunction detector, promote the efficient collection of photogenerated carriers, reduce the recombination probability of carriers, and improve the collection efficiency, sensitivity and responsiveness; it can also increase the collection ratio of photogenerated carriers when they are dispersed, and enhance the ability to collect optical signals. At the same time, a larger collector can reduce the impact of edge effects, which may lead to problems such as uneven electric field distribution and increased carrier recombination. The increase in the collector area can make the effective working area of ​​the detector more concentrated inside, reduce the adverse effects of the edge area on the overall performance, and improve the consistency and stability of the detector performance.

[0042] Here we take the short-wave infrared detector based on GaSb substrate as an example. The structure of the infrared detector is as follows:

[0043] (1) Substrate 1 is an N-type GaSb substrate with a doping concentration ≥ 10 17 cm -3 ;

[0044] (2) The buffer layer 2 is a GaSb layer doped with Te for N-type, where the Te doping concentration is ≥10 17 cm -3 , with a thickness of 300 to 1000 nm, and is used to prevent substrate 1 defects from growing in the infrared detector;

[0045] (3) The first ohmic contact layer 3 is an InGaAsSb structure doped with Si for N-type, wherein the doping concentration of Si is ≥10 18 cm -3 , with a thickness of 250 to 600 nm, and is used to contact the first electrode 10 (metal lower electrode) to form an ohmic contact;

[0046] (4) The collector layer 4 is an InGaAsSb structure with Si for N-type doping, where the Si doping concentration is ≥10 15 cm -3 , with a thickness of 200 to 600 nm, used to absorb incident infrared light and generate photogenerated carriers;

[0047] (5) The base layer 5 is an unintentionally doped GaSb layer, and the carrier concentration under undoped conditions is 10 14 ~10 16 cm -3 , thickness is 40~80nm;

[0048] (6) The emission layer 6 is an InAs / AlSb superlattice structure with Si for N-type doping, where the Si doping concentration is ≥10 17 cm -3 , thickness is 200~600nm;

[0049] (7) The second ohmic contact layer 7 is an InAs / AlSb superlattice structure with Si for N-type doping, wherein the Si doping concentration is ≥10 18 cm -3 , thickness is 250~800nm;

[0050] (8) The protective layer 8 is an InAs layer doped with Si for N-type, where the doping concentration of Si is ≥10 18 cm -3 , with a thickness of 20 to 50 nm, used to form an ohmic contact with the second electrode 11 (metal upper electrode) and prevent the material of the infrared detector from being oxidized by contact with air;

[0051] (9) The passivation layer 9 is made of SiO2 material with a thickness of 100nm to 3μm;

[0052] (10) The structures of the first electrode 10 and the second electrode 11 both include a Ti layer, a Pt layer formed on the Ti layer, and an Au layer formed on the Pt layer, wherein the thickness of the Ti layer and the Pt layer is 50 nm, and the thickness of the Au layer is 300 nm.

[0053] Specifically, the first electrode 10 and the second electrode 11 are both ring-shaped. The Ti layer can form a good ohmic contact, Pt can prevent Au from diffusing into the Ti layer and the infrared detection material, and the Au layer can maintain good stability and bonding in the package.

[0054] Reference Figure 2 This embodiment also provides a method for preparing the above-mentioned double-table structure heterojunction infrared detector, which specifically includes the following steps:

[0055] S1, preparing an epitaxial layer on a substrate 1, wherein the epitaxial layer includes a buffer layer 2, a first ohmic contact layer 3, a collector layer 4, a base layer 5, an emitter layer 6, a second ohmic contact layer 7 and a protective layer 8, to obtain a first device;

[0056] S2, etching the surface of the first device away from the substrate 1 to form an initial step on the second ohmic contact layer 7 to obtain a second device;

[0057] S3, continue etching on the surface of the second device away from the substrate 1 to form a second step on the collector layer 4. At this time, under the synchronous etching, the initial step on the first ohmic contact layer 3 forms a first step, thereby obtaining the following: Figure 3 The third device shown;

[0058] S4, depositing a passivation layer 9 on a surface of the third device away from the substrate 1 to obtain a fourth device;

[0059] S5, etching is performed on the surface of the fourth device away from the substrate 1 to form a first electrode window and a second electrode window on the passivation layer 9 to obtain a fifth device;

[0060] S6. Prepare the first electrode 10 and the second electrode 11 on the surface of the fifth device away from the substrate 1 to obtain an infrared detector, wherein the first electrode 10 and the second electrode 11 are respectively located in the first electrode window and the second electrode window.

[0061] Specifically, the epitaxial layer can be prepared by molecular beam epitaxy.

[0062] Specifically, step S2 includes: first using a mask to protect the surface portion outside the etching area, and then using inductively coupled plasma or wet etching to etch the protective layer 8 and the second ohmic contact layer 7, the etching depth being the difference between the etching depths of the first step and the second step, and after the etching is completed, removing the mask on the device surface.

[0063] Specifically, the step S3 includes: first using a mask to protect the central microcolumn area, and then using inductively coupled plasma to etch the protective layer 8, the second ohmic contact layer 7, the emitter layer 6, the base layer 5, the collector layer 4 and the first ohmic contact layer 3. Since the etching is carried out simultaneously, when the etching depth reaches half of the thickness of the collector layer 4, the etching depth of the initial step will reach half of the first ohmic contact layer 3, thereby synchronously forming the first step on the first ohmic contact layer 3 and the second step on the collector layer 4.

[0064] Specifically, in step S4, the passivation layer 9 is deposited on the top and side walls of the microcolumn structure, the top and side walls of the pillar structure, and the first ohmic contact layer 3. The preparation method of the passivation layer 9 (dielectric film) includes plasma enhanced chemical vapor deposition, vacuum evaporation, magnetron sputtering, etc.

[0065] Specifically, in step S5, the method for removing part of the passivation layer 9 (dielectric film) may be reactive ion etching or buffered oxide etchant.

[0066] Specifically, in step S6, negative photolithography, electron beam evaporation of Ti / Pt / Au and lift-off process are used to prepare the first electrode 10 on the first electrode window, and the second electrode 11 on the second electrode window.

[0067] Furthermore, before each etching, a mesa mask is deposited on the surface of the device away from the substrate 1, and the mesa mask on the device surface is removed after etching. Specifically, the mesa mask material can be SiO2, Si x N y Materials such as PE / MS and PE / MS, the thickness can be 500 to 2000 nm.

[0068] By using the above preparation method, a GaSb-based InAs / GaSb superlattice heterojunction short-wave infrared detector can be obtained. In addition, the present invention can also be extended to GaAs-based and InP-based infrared detectors, whose epitaxial layers can use corresponding infrared detection materials, and can also be extended to medium-wave, long-wave or very long-wave infrared detectors by changing the collector layer material. When the present invention is applied to a focal plane detection chip, the double-table structure is not limited to a single micro-column structure, and can also be used as Figure 4 The double micropillar structure shown is used to improve detection accuracy.

[0069] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A double-table structure heterojunction infrared detector, characterized in that: include: substrate; An epitaxial layer is arranged on the substrate, the epitaxial layer includes a buffer layer, a first ohmic contact layer, a collector layer, a base layer, an emitter layer, a second ohmic contact layer and a protective layer, the first ohmic contact layer is provided with a first step, so that the first ohmic contact layer and the collector layer on the inner side of the first step form a pillar structure, and the collector layer is provided with a second step, so that the collector layer, the base layer, the emitter layer, the second ohmic contact layer and the protective layer on the inner side of the second step form a micro-pillar structure; A passivation layer covering the surface of the epitaxial layer, wherein the passivation layer is provided with a first electrode window located on the first ohmic contact layer and a second electrode window located on the protective layer; The metal electrode comprises a first electrode and a second electrode, wherein the first electrode and the second electrode are respectively arranged in a first electrode window and a second electrode window.

2. The double-mesa structure heterojunction infrared detector according to claim 1, characterized in that: The substrate is an N-type GaSb substrate with a doping concentration of ≥10 17 cm -3 The buffer layer is an N-type doped GaSb layer with a doping concentration of ≥10 17 cm -3 , wherein the thickness of the buffer layer is 300 to 1000 nm.

3. The double-mesa structure heterojunction infrared detector according to claim 2, characterized in that: The collector layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10 15 cm -3 , with a thickness of 200 to 600 nm; the base layer is an unintentionally doped GaSb layer, and the carrier concentration under undoped conditions is 10 14 ~10 16 cm -3 , with a thickness of 40 to 80 nm; the emission layer adopts an N-type doped InAs / AlSb superlattice structure, with a doping concentration of ≥10 17 cm -3 , thickness is 200~600nm.

4. The double-mesa structure heterojunction infrared detector according to claim 3, characterized in that: The first ohmic contact layer adopts an N-type doped InGaAsSb structure with a doping concentration of ≥10 18 cm -3 , with a thickness of 250 to 800 nm; the second ohmic contact layer adopts an N-type doped InAs / AlSb superlattice structure with a doping concentration of ≥10 18 cm -3 , with a thickness of 250 to 800 nm; the protective layer is an N-type doped InAs layer with a doping concentration of ≥10 18 cm -3 , thickness is 20~50nm.

5. The double-mesa structure heterojunction infrared detector according to claim 1, characterized in that: The material of the current collecting layer includes one of short-wave infrared material, medium-wave infrared material, long-wave infrared material or very long-wave infrared material.

6. A method for preparing a double-mesa structure heterojunction infrared detector according to any one of claims 1 to 5, characterized in that: The following steps are involved: Preparing an epitaxial layer on a substrate, wherein the epitaxial layer includes a buffer layer, a first ohmic contact layer, a collector layer, a base layer, an emitter layer, a second ohmic contact layer and a protective layer; Etching on the epitaxial structure, thereby forming a first step on the first ohmic contact layer and a second step on the collector layer; Depositing a passivation layer on the surface of the etched epitaxial layer, and etching the passivation layer to form a first electrode window and a second electrode window; A first electrode and a second electrode are prepared in the first electrode window and the second electrode window, respectively.

7. The preparation method according to claim 6, characterized in that: The epitaxial layer is prepared by molecular beam epitaxy.

8. The preparation method according to claim 6, characterized in that: The first step and the second step are formed by inductively coupled plasma etching or wet etching.

9. The preparation method according to claim 6, characterized in that: The etching depth of the first step is up to half the thickness of the first ohmic contact layer, and the etching depth of the second step is up to half the thickness of the collector layer.

10. The preparation method according to claim 6, characterized in that: The passivation layer covers the top and side walls of the micro-pillar structure, the top and side walls of the platform structure and the first ohmic contact layer.

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