Light emitting diode

By setting cutting marks of different distances on the substrate of the light emitting diode, the laser etching process is optimized, and the problem of edge collapse and angle collapse of the light emitting diode during the laser core cutting unitization process is solved, achieving higher brightness and reliability.

CN120018658APending Publication Date: 2025-05-16QUANZHOU SANAN SEMICON TECH CO LTD
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Patent Information

Application Number
CN202510286167.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-11-27
Filing Date
2025-03-11
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

In the process of laser core cutting, existing light emitting diodes are prone to edge collapse and angle collapse during the laser core cutting unitization process, resulting in dark cracking of semiconductor stacks, which in turn affects the brightness and reliability of the light emitting diodes.

Method used

By providing cutting marks of different distances on the first and second sides of the substrate, the cutting marks on the first side are ensured closer to the semiconductor stack, thereby optimizing the laser etching process, avoiding the formation of lightning-like structures, and improving the abnormal appearance of the collapse angle.

Benefits of technology

It effectively avoids lightning-like structures in the corners of the light emitting diodes, improves the appearance of abnormal collapse angles, improves the angular straightness of the substrate, reduces the risk of leakage under small currents, and improves the brightness and reliability of the light emitting diodes.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a light-emitting diode, and the light-emitting diode comprises a substrate which comprises a first surface, a second surface, and a side surface connected with the first surface and the second surface; the semiconductor lamination layer is formed on the first surface of the substrate, and the semiconductor lamination layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are stacked in sequence; the first electrode is formed on the semiconductor lamination layer and is electrically connected with the first semiconductor layer; the second electrode is formed on the semiconductor lamination layer and is electrically connected with the second semiconductor layer; wherein the side surfaces comprise a first side surface and a second side surface connected with the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; the first side face comprises at least one first cutting mark, the second side face comprises at least one second cutting mark, and the distance between the first cutting mark close to the first surface of the substrate and the first surface of the substrate is a first distance S1, the distance between the second cutting mark close to the first surface of the substrate and the first surface of the substrate is a second distance S2, and the first distance S1 is not equal to the second distance S2.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a light emitting diode and a light emitting device. Background Art

[0002] Light-emitting diodes are used in a variety of products such as large backlight units (BLUs), general lighting, and electronic devices, as well as various small home appliances and interior decoration products. Furthermore, light-emitting diodes are not only used as light sources, but also can be used for various purposes such as conveying information and evoking beauty. Summary of the invention

[0003] The present application provides a light-emitting diode, comprising: a substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; a semiconductor stack formed on the first surface of the substrate, the semiconductor stack comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; a first electrode formed on the semiconductor stack and electrically connected to the first semiconductor layer; a second electrode formed on the semiconductor stack and electrically connected to the second semiconductor layer; wherein the side surface comprises a first side surface and a second side surface connected to the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; the first side surface comprises at least one first cutting mark, the second side surface comprises at least one second cutting mark, the distance between the first cutting mark close to the first surface of the substrate and the first surface of the substrate is a first distance S1, the distance between the second cutting mark close to the first surface of the substrate and the first surface of the substrate is a second distance S2, and the first distance S1 is not equal to the second distance S2.

[0004] The present application provides another light-emitting diode, comprising: a substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; a semiconductor stack formed on the first surface of the substrate, the semiconductor stack comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; a first electrode formed on the semiconductor stack and electrically connected to the first semiconductor layer; a second electrode formed on the semiconductor stack and electrically connected to the second semiconductor layer; wherein the side surface comprises a first side surface and a second side surface connected to the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; the first side surface comprises a first cutting mark, the second side surface comprises a second cutting mark, the first cutting mark comprises a plurality of first bursting points, the second cutting mark comprises a plurality of second bursting points, the spacing between adjacent first bursting points is a first spacing D1, the spacing between adjacent second bursting points is a second spacing D2, and the first spacing D1 is greater than the second spacing D2.

[0005] The present application provides another light-emitting diode, comprising: a substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; a semiconductor stack formed on the first surface of the substrate, the semiconductor stack comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; a first electrode formed on the semiconductor stack and electrically connected to the first semiconductor layer; a second electrode formed on the semiconductor stack and electrically connected to the second semiconductor layer; wherein the substrate comprises a first step, the first step comprises a side wall and a table connected to the side wall, the side wall is connected to the first surface of the substrate, and the table is connected to the side surface of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. The positional relationships described in the drawings in the following description are based on the directions in which the components are drawn in the diagrams, unless otherwise specified.

[0007] Figure 1 is a schematic plan view of a light emitting diode according to an embodiment of the present invention; Figure 2 is along Figure 1 A schematic cross-sectional view taken along the cutting line AA' of Figure 3 for Figure 1A schematic plan view of a light emitting diode with some structural layers omitted; Figure 4 is a first side M1 view of the light emitting diode; Figure 5 is a second side M2 ​​view of the light emitting diode; Figure 6 for Figure 4 An enlarged schematic diagram of local A. DETAILED DESCRIPTION

[0008] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; the technical features designed in different implementation modes of the present invention described below can be combined with each other as long as they do not conflict with each other; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0009] Different embodiments disclosed below may repeatedly use the same reference symbols and / or marks. These repetitions are for the purpose of simplicity and clarity, and are not intended to limit the specific relationship between the different embodiments and / or structures discussed.

[0010] The light emitting diode of one embodiment of the present invention may be a flip-chip light emitting diode. The flip-chip light emitting diode may be a light emitting diode of conventional size, for example, a size of 90000 μm. 2 ~2000000μm 2 The flip-chip light-emitting diode may also be a small-sized or micro-sized flip-chip light-emitting diode, for example, a 90000 μm 2 The micro-LED has at least one of a length and a width of 100 μm to 500 μm and a height of 40 μm to 200 μm. The flip-chip LED can also be a micro-LED of a smaller size, for example, having a length of 2 μm to 100 μm, a width of 2 μm to 100 μm, and a height of 2 μm to 100 μm.

[0011] The present invention only takes a flip-chip light emitting diode as an example, and a face-up light emitting diode also conforms to the design concept of the present invention.

[0012] Figure 1 is a schematic plan view of a light emitting diode according to an embodiment of the present invention, Figure 2 is along Figure 1 A schematic cross-sectional view taken along the cutting line AA' of Figure 3 for Figure 1 Schematic plan view of a light emitting diode with some structural layers omitted.

[0013] like Figure 1 and Figure 2 As shown, the light emitting diode chip of this embodiment includes a substrate 100 , a semiconductor stack 110 , a current blocking layer 120 , a transparent conductive layer 130 , a first contact electrode 141 , a second contact electrode 142 , an insulating layer 150 , a first electrode 161 and a second electrode 162 .

[0014] The substrate 100 may be an insulating substrate or a conductive substrate. The substrate 100 may be a growth substrate for growing the semiconductor stack 110, and may include a sapphire substrate, a silicon carbide substrate, a silicon substrate, a gallium nitride substrate, an aluminum nitride substrate, etc. In addition, the substrate 100 may include a plurality of protrusions formed on at least a portion of its upper surface. The plurality of protrusions of the substrate 100 may be formed into a regular or irregular pattern. For example, the substrate 100 may be a patterned sapphire substrate (PSS) including a plurality of protrusions formed on the upper surface. The substrate 100 may have a thickness in the range of approximately 100 μm to 200 μm.

[0015] like Figure 1 As shown, the substrate 100 has a first side N1, a second side N2, a third side N3 and a fourth side N4 connected in sequence. The edge of the substrate 100 may be equivalent to the edge of the light-emitting diode. The first side N1 and the third side N3 extend along the first direction X, and the second side N2 and the fourth side N4 extend along the second direction Y. The thickness direction of the substrate 100 is the third direction Z. The substrate 100 includes a first surface 101, a second surface 102 opposite to the first surface 101, and a side surface connecting the first surface 101 and the second surface 102, the side surface including a first side surface M1, a second side surface M2, a third side surface M3, and a fourth side surface M4 connected in sequence, and the fourth side surface M4 is connected to the first side surface M1. Among them, the first side surface M1 and the third side surface M3 are opposite, and the second side surface M2 and the fourth side surface M4 are opposite. The first surface 101 also includes a first edge N1 connected to the first side surface M1, a second edge N2 connected to the second side surface M2, a third edge N3 connected to the third side surface M3, and a fourth edge N4 connected to the fourth side surface M4. The first edge N1, the second edge N2, the third edge N3 and the fourth edge N4 are connected in sequence.

[0016] like Figure 1 and Figure 2As shown, the semiconductor stack 110 is located on the first surface 101 of the substrate 100. In addition, the area of ​​the lower surface of the semiconductor stack 110 may be smaller than the area of ​​the first surface 101 of the substrate 100, and the first surface 101 of the substrate 100 may be exposed along the outer edge of the semiconductor stack 110. The first surface 101 of the substrate 100 includes a partial area covered by the semiconductor stack 110 and a partial area not covered by the semiconductor stack 110. A portion of the multiple protrusions (not shown) of the first surface 101 of the substrate 100 is located between the semiconductor stack 110 and the substrate 100, and the multiple protrusions (not shown) not covered by the semiconductor stack 110 are exposed at the periphery of the semiconductor stack 110.

[0017] like Figure 1 and Figure 2 As shown, the semiconductor stack 110 includes a first semiconductor layer 111, a second semiconductor layer 113 located on the first semiconductor layer 111, and an active layer 112 located between the first semiconductor layer 111 and the second semiconductor layer 113, which are sequentially stacked in the third direction Z of the substrate 100. The overall thickness of the semiconductor stack 110 may be approximately in the range of 3 μm to 10 μm.

[0018] The first semiconductor layer 111, the active layer 112 and the second semiconductor layer 113 may include III-V series nitride semiconductors, for example, nitride semiconductors such as (Al, Ga, In)N. The first semiconductor layer 111 may include n-type impurities (for example, Si, Ge, Sn), and the second semiconductor layer 113 may include p-type impurities (for example, Mg, Sr, Ba). In addition, the opposite may also be true. The active layer 112 may include a multi-layer quantum well structure (MQW), which can adjust the composition ratio of the nitride semiconductor in a manner to emit a desired wavelength. In particular, in the present embodiment, the second semiconductor layer 113 may be a p-type semiconductor layer.

[0019] The semiconductor stack 110 includes a local defect region M exposing a portion of the surface of the first semiconductor layer 111. Specifically, the semiconductor stack 110 can remove the second semiconductor layer 113, the active layer 112, and a portion of the first semiconductor layer 111 through etching or other processes to form a local defect region M exposing a portion of the surface of the first semiconductor layer 111. The local defect region M may be located outside the second semiconductor layer 113 and surround the second semiconductor layer 113. In another embodiment, a local defect region M (through hole or through groove) may also be formed inside the semiconductor stack 110 to expose a portion of the surface of the first semiconductor layer 111.

[0020] like Figure 1 and Figure 2As shown, the transparent conductive layer 130 is located on the second semiconductor layer 113. The transparent conductive layer 130 may be in ohmic contact with the second semiconductor layer 113. The transparent conductive layer 130 may include, for example, a light-transmitting conductive oxide layer such as indium tin oxide (ITO), zinc oxide (ZnO), zinc indium tin oxide (ZITO), zinc indium oxide (ZIO), zinc tin oxide (ZTO), gallium indium tin oxide (GITO), gallium indium oxide (GIO), gallium zinc oxide (GZO), aluminum doped zinc oxide (AZO), fluorine tin oxide (FTO), etc. The conductive oxide may also include various dopants.

[0021] In this embodiment, the thickness of the transparent conductive layer 130 is between 50nm and 200nm. The size of the light emitting diode is less than 300μm*150μm. If the thickness of the transparent conductive layer is less than 50nm, the current may not be able to spread, resulting in the light emitting diode not being able to obtain good ESD capability. If the thickness of the transparent conductive layer 130 is greater than 200nm, the transparent conductive layer 130 will absorb light and cause loss.

[0022] The first contact electrode 141 is formed on the first semiconductor layer 111 , and specifically, is formed on the local defect region M. The first contact electrode 141 ohmically contacts the first semiconductor layer 111 and disperses current. To this end, the first contact electrode 141 includes a metal layer that ohmically contacts the first semiconductor layer 111 .

[0023] In one embodiment, the first contact electrode 141 may be formed in the local defect region M in a block form.

[0024] The first contact electrode 141 does not overlap with the active layer 112 or the second semiconductor layer 113, so the insulating layer used to insulate the first contact electrode 141 from the second semiconductor layer 113 is omitted. The first contact electrode 141 can be formed, for example, by a lift-off process to the semiconductor stack 110 formed with the transparent conductive layer 130. At this time, the second contact electrode 142 described below can also be formed at the same time.

[0025] The second contact electrode 142 is located on the transparent conductive layer 130 and is electrically connected to the transparent conductive layer 130 , thereby facilitating current dispersion in the second semiconductor layer 113 .

[0026] The second contact electrode 142 may include a connecting portion and an extending portion extending from the connecting portion.

[0027] To reduce light absorption caused by the second contact electrode 142, the second contact electrode 142 is limitedly formed on a portion of the transparent conductive layer 130. The entire area of ​​the second contact electrode 142 does not exceed 2 / 10 of the area of ​​the transparent conductive layer 130. The second contact electrode 142 may include a starting portion and an extending portion.

[0028] The first contact electrode 141 and the second contact electrode 142 may be formed together using the same material in the same process, and thus may have the same layer structure. For example, the first contact electrode 141 and the second contact electrode 142 may include an Al reflective layer, and may include Au. Specifically, the first contact electrode 141 and the second contact electrode 142 may have a layer structure of Cr / Al / Ti / Ni / Ti / Ni / Au / Ti. In another embodiment, in order to reduce costs, the first contact electrode 141 and the second contact electrode 142 may also not include Au.

[0029] like Figure 1 and Figure 2 As shown, in order to prevent current concentration in the second semiconductor layer 113 below the first contact electrode 141 or the second contact electrode 142, a current blocking layer 130 is arranged between the second semiconductor layer 113 and the transparent conductive layer 130. The current blocking layer 130 is an insulating material layer, such as a SiO2 and / or SiN material layer.

[0030] The insulating layer 150 is formed on the semiconductor stack 110. Specifically, the insulating layer 150 may cover the semiconductor stack 110, the transparent conductive layer 130, the first contact electrode 141, and the second contact electrode 142. The insulating layer 150 has a first opening OP1 and a second opening OP2. The first opening OP1 exposes a portion of the surface of the first contact electrode 141, and the second opening OP2 exposes a portion of the surface of the second contact electrode 142, wherein the second opening OP2 exposes a portion of the surface of the second contact electrode 142. The size of the first opening OP1 is smaller than the area of ​​the first contact electrode 141, and the size of the second opening OP2 is smaller than the area of ​​the second contact electrode.

[0031] The insulating layer 150 includes a distributed Bragg reflector. The distributed Bragg reflector may be formed by repeatedly laminating dielectric layers with different refractive indices, and the dielectric layers may include TiO2, SiO2, HfO2, ZrO2, Nb2O5, MgF2, etc. For example, the insulating layer 150 may have a structure of alternately laminated TiO2 layers / SiO2 layers. The distributed Bragg reflector is made in a manner of reflecting light generated in the active layer 112, and multiple pairs are formed to improve the reflectivity. In this embodiment, the distributed Bragg reflector may include 10 to 25 pairs. The insulating layer 150 may include another insulating layer together with the distributed Bragg reflector. For example, in order to improve the adhesion between the distributed Bragg reflector and its underlying layer, it may include an interface layer located at the bottom of the distributed Bragg reflector and a protective layer covering the distributed Bragg reflector. The interface layer may be formed, for example, of a SiO2 layer, and the protective layer may be formed of SiNx. The layer formed of SiNx has excellent moisture resistance, thereby protecting the light-emitting diode chip from moisture.

[0032] The insulating layer 150 may have a thickness of about 2 μm to 5 μm. The reflectivity of the distributed Bragg reflector to the light generated in the active layer 112 may be above 90%, and a reflectivity close to 100% may be provided by controlling the type, thickness, and stacking period of the plurality of dielectric layers forming the distributed Bragg reflector. Furthermore, the distributed Bragg reflector may also have a high reflectivity to other visible light other than the light generated in the active layer 112.

[0033] The first electrode 161 and the second electrode 162 are located on the insulating layer 150 . The first electrode 161 contacts the first contact electrode 141 through the first opening OP1 , thereby being electrically connected to the first semiconductor layer 111 . The second electrode 162 contacts the second contact electrode 142 through the second opening OP2 , thereby being electrically connected to the second semiconductor layer 113 .

[0034] The first electrode 161 and the second electrode 162 may be formed together using the same material in the same process, and thus may have the same layer structure. The thickness of the first electrode 161 and the second electrode 162 may be thinner than the thickness of the insulating layer 150, and may be formed to a thickness of about 2 μm, for example. The thickness of the first electrode 161 and the second electrode 162 may also be thicker than the thickness of the insulating layer 150.

[0035] like Figure 3 As shown, the first electrode 161 includes a first edge 161a adjacent to the first side N1 of the substrate 100, a second edge 161b adjacent to the second side N2 of the substrate 100, a third edge 161c adjacent to the second electrode 162, and a fourth edge 161d adjacent to the fourth side N4 of the substrate 100.

[0036] The second electrode 162 includes a first edge 162 a adjacent to the third side N3 of the substrate 100 , a second edge 162 b adjacent to the second side N2 of the substrate 100 , a third edge 162 c adjacent to the first electrode 161 , and a fourth edge 162 d adjacent to the fourth side N4 of the substrate 100 .

[0037] like Figure 4 and Figure 5 As shown, Figure 4 is a view of the first side M1, Figure 5 1 is a view of the second side M2. The first side M1 is adjacent to the first edge 161a of the first electrode 161, and the second side M2 ​​is adjacent to the second edge 161b of the first electrode 161 and the second edge 162b of the second electrode 162. The first side M1 has at least one first cutting mark 211, and the first cutting mark 211 extends along the first direction X. The second side M2 ​​has at least one second cutting mark 212, and the second cutting mark 212 extends along the second direction Y. Similarly, the third side M3 is adjacent to the first edge 162a of the second electrode 162, and the fourth side M4 is adjacent to the fourth edge 161d of the first electrode 161 and the fourth edge 162d of the second electrode 162. The third side M3 has a first cutting mark 211, and the first cutting mark 211 extends along the first direction X. The fourth side M4 has at least a second cutting mark 212, and the second cutting mark 212 extends along the second direction Y.

[0038] In another embodiment (not shown), the third side surface M3 is adjacent to the first edge 161a of the first electrode 161, and the fourth side surface M4 is adjacent to the second edge 161b of the first electrode 161 and the second edge 162b of the second electrode 162. The third side surface M3 has at least one first cutting mark 211, and the first cutting mark 211 extends along the first direction X. The fourth side surface M4 has at least one second cutting mark 212, and the second cutting mark 212 extends along the second direction Y. Similarly, the first side surface M1 is adjacent to the first edge 162a of the second electrode 162, and the second side surface M2 is adjacent to the fourth edge 161d of the first electrode 161 and the fourth edge 162d of the second electrode 162. The first side surface M1 has a first cutting mark 211, and the first cutting mark 211 extends along the first direction X. The second side surface M2 has at least a second cutting mark 212, and the second cutting mark 212 extends along the second direction Y.

[0039] like Figure 4 and Figure 5As shown, the first cutting mark 211 includes a plurality of first explosive points 2111 and a first etched texture 2112 (degenerate zone) connected to each first explosive point 2111, and the etched texture 2112 is an irregularly distributed texture. In one embodiment, the first explosive points 2111 are arranged at substantially equal intervals, the interval between adjacent first explosive points 2111 is a first interval D1, and the distance between the first cutting mark 211 close to the first surface 101 of the substrate 100 and the first surface 101 of the substrate 100 is a first distance S1. The second cutting mark 212 includes a plurality of second explosive points 2121 and a second etched texture 2122 (degenerate zone) connected to each second explosive point 2121, and the etched texture 2122 is an irregularly distributed texture. In one embodiment, the first explosive points 2111 are arranged at substantially equal intervals, and the interval between adjacent second explosive points is a second interval D2. The distance between the second cutting mark 212 close to the first surface 101 of the substrate 100 and the first surface 101 of the substrate 100 is a second distance S2. The first distance S1 and the second distance S2 are distances between the first surface 101 and the explosion point, measured from the explosion point as the starting position.

[0040] The LED is usually cut into core units by laser cutting, which uses laser blasting to hit the inside of the substrate 100 and burn and explode it; finally, the adjacent cores are separated by the physical action of the external force of the splitter. However, this method may cause the core to collapse, and the cracks of the collapse will extend from the edge to the inside of the core, causing the semiconductor stack of the LED to crack, and finally causing the LED to be dim or slightly leaky.

[0041] In one embodiment, the first distance S1 is not equal to the second distance S2. By misaligning the positions of the first cutting mark 211 and the second cutting mark 212, the lightning-shaped structure at the corner of the light-emitting diode (i.e., the corner of the substrate 100) can be avoided, the abnormal appearance of the chipped corner can be improved, and the straightness of the corner of the substrate 100 can be improved.

[0042] In one embodiment, the first distance S1 is smaller than the second distance S2.

[0043] Since the first side surface M1 is adjacent to the first edge 161a of the first electrode 161 or the first edge 162a of the second electrode 162, if the energy of the hidden laser burst point is too high, it may damage the first edge 161a of the first electrode 161 or the first edge 162a of the second electrode 162, thereby affecting the reliability of the light-emitting diode. While the second side surface M2 is adjacent to the second edge 161b of the first electrode 161 and the second edge 162b of the second electrode 162, since there is a gap between the first electrode 161 and the second electrode 162, the energy of the hidden laser burst point is less likely to damage the first electrode 161 and the second electrode 162. Therefore, the energy of the hidden laser burst point on the first side surface M1 is smaller than that of the hidden laser burst point on the second side surface M2. Therefore, the first spacing D1 between the first burst points 2111 of the first cutting mark 211 on the first side surface M1 is greater than the second spacing D2 between the second burst points 2121 of the second cutting mark 212 on the second side surface M2.

[0044] In one embodiment, the first distance D1 is preferably greater than 6 μm and less than 25 μm.

[0045] In one embodiment, the second distance D2 is preferably greater than or equal to 2 μm and less than or equal to 15 μm.

[0046] Since the first spacing D1 is larger than the second spacing D2, the first distance S1 needs to be smaller than the second distance S2 so that the first cutting mark 211 is closer to the semiconductor stack 110 of the light-emitting diode. Otherwise, the number of laser burst points per unit area of ​​the first side M1 is small, resulting in insufficient laser energy, which leads to incomplete cracking of the semiconductor stack on the electrode surface of the light-emitting diode, thereby causing the core grain to collapse.

[0047] In one embodiment, the first distance S1 is preferably greater than 8 μm, preferably 8 to 45 μm. If the distance is too low, on the one hand, the laser may easily damage the epitaxial layer during the etching process of the substrate, and on the other hand, the cracks generated during the splitting process may also exceed the first distance S1 of the first surface 101 of the substrate 100 to reach the semiconductor stack, the insulating layer or the electrode. If the distance is too large, oblique cracking along the lattice direction may easily occur during the splitting process.

[0048] In one embodiment, the second distance S2 is preferably greater than 20 μm to ensure that the epitaxial layer is not damaged when the interior of the substrate 100 is laser-etched. For example, the second distance S2 may be 20 μm to 60 μm.

[0049] In another embodiment (not shown), the thickness of the substrate 100 is h, the first distance S1 is between 1 / 3h and 2 / 3h, and the second distance is between 1 / 3h and 2 / 3h.

[0050] In one embodiment, if Figure 4 and Figure 5As shown, the first side M1 has two first cutting marks 211, the second side M2 ​​has two second cutting marks 212, the distance between the first cutting marks 211 close to the second surface 102 of the substrate 100 and the second surface 102 of the substrate 100 is the third distance S3, and the distance between the second cutting marks 212 close to the second surface 102 of the substrate 100 and the second surface 102 of the substrate 100 is the fourth distance S4. Similarly, the third distance S3 and the fourth distance S4 are the distances between the second surface 102 measured with the explosion point as the starting position.

[0051] In one embodiment, the third distance S3 is greater than the fourth distance S4.

[0052] In one embodiment, the first distance S1 is smaller than the third distance S3, and the second distance S2 is smaller than the fourth distance S4.

[0053] In one embodiment, the distance between two first cutting marks 211 on the first side M1 is smaller than the distance between two second cutting marks 212 on the second side M2. The spacing between adjacent first cutting lines 211 may be 10-50 μm. The spacing between adjacent second cutting lines 212 may be 10-50 μm.

[0054] In the process of core unitization by laser hidden cutting, on the one hand, the semiconductor stack on the electrode surface of the light-emitting diode is not completely cracked due to insufficient laser energy, resulting in core chipping; on the other hand, the etching texture formed by the release of thermal stress at the hidden laser explosion point will extend from the edge to the inside of the core, causing dark cracks in the semiconductor stack of the light-emitting diode, resulting in dim brightness or slight leakage of the light-emitting diode.

[0055] Therefore, in this embodiment, laser or other methods can be used to burn and scratch downward from the first surface 101 of the substrate 100 at the core unitization dividing line so that a first step 200 is formed downward from the first surface 101 of the substrate 100; and then the core unitization is performed by using a laser hidden cutting method and the physical action of the external force of the splitting knife, which can avoid the core chipping caused by the incomplete cracking of the semiconductor stack on the electrode surface of the light-emitting diode due to insufficient laser energy.

[0056] Figure 6 for Figure 4 An enlarged schematic diagram of local A.

[0057] like Figure 6As shown, the substrate 100 includes a first step 200, and the first step 200 includes a side wall 201 and a table 202 connected to the side wall 201, the side wall 201 is connected to the first surface 101 of the substrate 100, and the table 202 is connected to the side surfaces of the substrate (the first side surface M1, the second side surface M2, the third side surface M3 and the fourth side surface M4). After the first step 200 is formed on the first surface of the substrate 100, the distance between the table 202 and the hidden cutting explosion point is shorter than the first surface 101 of the substrate 100, and its stress release is easier; therefore, during the thermal stress release process of the hidden cutting laser explosion point, the direction of its explosion will extend to the position of the first step 200 without damaging the inside of the core particle, thereby fundamentally improving the phenomenon of edge and angle collapse, so that the microcracks on the edge of the substrate 100 will not be introduced into the inside of the core particle, thereby reducing the risk of leakage under low current and improving the brightness under low current.

[0058] In one embodiment, the distance between the first etched texture 2112 of the first cutting mark 211 and the terrace 201 of the first step 200 is smaller than the distance between the second etched texture 2122 of the second cutting mark 212 and the terrace 201 of the first step 200 .

[0059] The side wall 201 between the first step 200 and the first surface 101 is cracked due to laser burning, resulting in the side wall 201 having a rough surface similar to horizontal stripes.

[0060] In one embodiment, the depth d of the sidewall 201 in the third direction Z is 2-20 μm. If d is less than 2 μm, the first step 200 formed cannot improve the risk of chipping and leakage of the core grain; if d is greater than 20 μm, the laser energy required to form the first step 200 may be too large to cause epitaxy loss. In one embodiment, the width k of the mesa 202 in the first direction X or the second direction Y is 0.1-2 μm. If k is less than 0.1 μm, it cannot prevent the thermal stress of the hidden laser explosion point from extending to the semiconductor stack, the insulating layer or the electrode; if K is greater than 2 μm, the laser energy required to form the first step 200 may be too large to cause epitaxy loss.

[0061] In one embodiment, the thickness of the substrate 100 is 60-200 μm.

[0062] In one embodiment, the thickness of the substrate 100 is h, the first distance S1 is less than 1 / 3h, and the second distance S2 is less than 1 / 3h. Since the first step 200 is formed on the first surface 101 of the substrate 100, during the release of thermal stress of the hidden laser explosion point, the direction of the explosion will extend to the position of the first step 200 without damaging the inside of the core particle. Therefore, the first distance S1 and the second distance S2 are less than 1 / 3h, which can not only avoid the core particle from being broken due to insufficient laser energy causing the semiconductor stack on the electrode surface of the light-emitting diode to be not completely cracked, but also prevent the inside of the core particle from being damaged during the release of thermal stress of the hidden laser explosion point.

Claims

1. A light emitting diode, comprising: A substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; A semiconductor stack is formed on the first surface of the substrate, wherein the semiconductor stack comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; A first electrode, formed on the semiconductor stack and electrically connected to the first semiconductor layer; A second electrode is formed on the semiconductor stack and is electrically connected to the second semiconductor layer; The side surface includes a first side surface and a second side surface connected to the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; The first side surface includes at least one first cutting mark, and the second side surface includes at least one second cutting mark. The distance between the first cutting mark close to the first surface of the substrate and the first surface of the substrate is a first distance S1, and the distance between the second cutting mark close to the first surface of the substrate and the first surface of the substrate is a second distance S2. The first distance S1 is not equal to the second distance S2.

2. The light emitting diode according to claim 1, characterized in that: The first distance S1 is smaller than the second distance S2.

3. The light emitting diode according to claim 1, characterized in that: The first distance S1 is between 8 and 45 μm, and the second distance S2 is between 20 and 60 μm.

4. The light emitting diode according to claim 1, characterized in that: The first side surface has two first cutting marks, the second side surface has two second cutting marks, and the distance between the two first cutting marks on the first side surface is smaller than the distance between the two second cutting marks on the second side surface.

5. The light emitting diode according to claim 1, characterized in that: The distance between the first cutting mark near the second surface of the substrate and the second surface of the substrate is a third distance S3, the distance between the second cutting mark near the second surface of the substrate and the second surface of the substrate is a fourth distance S4, and the third distance S3 is greater than the fourth distance S4.

6. The light emitting diode according to claim 5, characterized in that: The first distance S1 is smaller than the third distance S3, and the second distance S2 is smaller than the fourth distance S4.

7. The light emitting diode according to claim 1, characterized in that: The substrate thickness is h, the first distance S1 is between 1 / 3h and 2 / 3h, and the second distance S2 is between 1 / 3h and 2 / 3h.

8. The light emitting diode according to claim 1, characterized in that: The first cutting mark includes a plurality of first bursting points, the second cutting mark includes a plurality of second bursting points, the spacing between adjacent first bursting points is a first spacing D1, the spacing between adjacent second bursting points is a second spacing D2, and the first spacing D1 is greater than the second spacing D2.

9. The light emitting diode according to claim 8, characterized in that: The first distance D1 is between 6 and 25 μm, and the second distance D2 is between 2 and 15 μm.

10. A light emitting diode, comprising: A substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; A semiconductor stack is formed on the first surface of the substrate, wherein the semiconductor stack comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; A first electrode, formed on the semiconductor stack and electrically connected to the first semiconductor layer; A second electrode is formed on the semiconductor stack and is electrically connected to the second semiconductor layer; The side surface includes a first side surface and a second side surface connected to the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; The first side includes a first cutting mark, the second side includes a second cutting mark, the first cutting mark includes a plurality of first bursting points, the second cutting mark includes a plurality of second bursting points, the spacing between adjacent first bursting points is a first spacing D1, the spacing between adjacent second bursting points is a second spacing D2, and the first spacing D1 is greater than the second spacing D2.

11. The light emitting diode according to claim 10, characterized in that: The first distance D1 is between 6 and 25 μm, and the second distance D2 is between 2 and 15 μm.

12. The light emitting diode according to claim 10, characterized in that: The distance between the first cutting mark near the first surface of the substrate and the first surface of the substrate is a first distance S1, the distance between the second cutting mark near the first surface of the substrate and the first surface of the substrate is a second distance S2, and the first distance S1 is not equal to the second distance S2.

13. The light emitting diode according to claim 10, characterized in that: The distance between the first cutting mark near the first surface of the substrate and the first surface of the substrate is a first distance S1, the distance between the second cutting mark near the first surface of the substrate and the first surface of the substrate is a second distance S2, and the first distance S1 is smaller than the second distance S2.

14. The light emitting diode according to claim 10, characterized in that: The substrate comprises a first step, wherein the first step comprises a side wall and a table connected to the side wall, the side wall is connected to the first surface of the substrate, and the table is connected to the side surface of the substrate.

15. The light emitting diode according to claim 14, characterized in that: The depth of the sidewall is between 2 and 20 μm, and the width of the mesa is between 0.1 and 2 μm.

16. A light emitting diode, comprising: A substrate, comprising a first surface, a second surface, and a side surface connecting the first surface and the second surface; A semiconductor stack is formed on the first surface of the substrate, wherein the semiconductor stack comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence; A first electrode, formed on the semiconductor stack and electrically connected to the first semiconductor layer; A second electrode, formed on the semiconductor stack and electrically connected to the second semiconductor layer; The substrate includes a first step, the first step includes a side wall and a table connected to the side wall, the side wall is connected to the first surface of the substrate, and the table is connected to the side surface of the substrate.

17. The light emitting diode according to claim 16, characterized in that: The depth of the sidewall is between 2 and 20 μm, and the width of the mesa is between 0.1 and 2 μm.

18. The light emitting diode according to claim 16, characterized in that: The side surface includes a first side surface and a second side surface connected to the first side surface, the first side surface is adjacent to the first electrode or the second electrode, and the second side surface is adjacent to the first electrode and the second electrode; the first side surface includes at least one first cutting mark, and the second side surface includes at least one second cutting mark, the distance between the first cutting mark close to the first surface of the substrate and the first surface of the substrate is a first distance S1, the distance between the second cutting mark close to the first surface of the substrate and the first surface of the substrate is a second distance S2, and the first distance S1 is not equal to the second distance S2.

19. The light emitting diode according to claim 18, characterized in that: The substrate thickness is h, the first distance S1 is less than 1 / 3h, and the second distance S2 is less than 1 / 3h.

20. The light emitting diode according to claim 16, characterized in that: The first side includes at least one first cutting mark, the second side includes at least one second cutting mark, the first cutting mark includes a plurality of first burst points and a first etching texture connected to the first burst points, the second cutting mark includes a plurality of second burst points and a second etching texture connected to the second burst points, and the distance between the first etching texture and the first step terrace is smaller than the distance between the second etching texture and the first step terrace.