Display substrate, preparation method thereof and display device

Abstract

The invention provides a display substrate. The display substrate comprises a substrate body; a driving circuit layer; the first electrode layer comprises a first electrode, and the first electrode is electrically connected with the driving circuit layer; a barrier layer including a pixel opening; and a light-emitting functional layer; the partition layer comprises at least one interval opening, the interval opening is located between two adjacent pixel openings, and the side face, facing the interval opening, of the partition layer is provided with a first undercut structure; the light-emitting functional layer comprises a charge generation layer, and at least one part of the charge generation layer is disconnected at the first undercut structure; the display substrate further comprises at least one supporting column, the supporting column is located on the side, away from the substrate, of the driving circuit layer, the orthographic projection, on the substrate, of at least one part of the supporting column is located in the orthographic projection, on the substrate, of the interval opening, and the supporting column and the first undercut structure are arranged in a spaced mode. At least one part of the charge generation layer is located on the side, away from the substrate, of the supporting column, and at least the other part of the charge generation layer is located between the supporting column and the adjacent first undercut structure.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a preparation method thereof, and a display device. Background Art

[0002] With the development of display technology, Organic Light Emitting Diode (OLED) display products have occupied the high-end display product market in recent years due to their excellent picture quality and wide range of application scenarios. As a result, users have higher and higher demands on the display performance of OLED display products. Tandem OLED (TandemOLED) is a high-efficiency OLED device structure formed by stacking multiple OLED devices in series through a charge generating layer (CGL). However, the newly added CGL in Tandem OLED has lateral leakage, which leads to abnormal lighting problems in low-grayscale images of lighting tests. In Tandem OLED display products, how to avoid the crosstalk problem between pixels caused by the lateral leakage of the charge generating layer is one of the topics that display product developers are concerned about.

[0003] The above information disclosed in this section is only for understanding the background of the inventive concept of the present disclosure and therefore the above information may contain information that does not constitute the prior art. Summary of the invention

[0004] In one aspect, a display substrate is provided, wherein the display substrate comprises:

[0005] substrate substrate;

[0006] A driving circuit layer, located on the substrate;

[0007] A first electrode layer, located at a side of the driving circuit layer away from the base substrate, the first electrode layer comprising a first electrode, and the first electrode is electrically connected to the driving circuit layer;

[0008] a partition layer, located on a side of the first electrode layer away from the base substrate, the partition layer comprising a pixel opening, the pixel opening exposing at least a portion of the first electrode; and

[0009] a light-emitting functional layer, located on a side of the partition layer away from the base substrate, a portion of the light-emitting functional layer being located in the pixel opening and in contact with the first electrode,

[0010] Wherein, the partition layer comprises at least one spacing opening, the spacing opening is located between two adjacent pixel openings, and the side surface of the partition layer facing the spacing opening has a first undercut structure;

[0011] The light-emitting functional layer comprises a first light-emitting functional sublayer, a charge generation layer located on a side of the first light-emitting functional sublayer away from the substrate, and a second light-emitting functional sublayer located on a side of the charge generation layer away from the substrate, wherein at least a portion of the charge generation layer is disconnected at the first undercut structure; and

[0012] The display substrate also includes at least one supporting column, which is located on a side of the driving circuit layer away from the base substrate, an orthographic projection of at least a portion of the supporting column on the base substrate is located within an orthographic projection of the spacing opening on the base substrate, and the supporting column is spaced apart from the first undercut structure, at least a portion of the charge generating layer is located on a side of the supporting column away from the base substrate, and at least another portion of the charge generating layer is located between the supporting column and the adjacent first undercut structure.

[0013] According to some exemplary embodiments, the isolation layer includes a first sublayer and a second sublayer located on the first sublayer close to the base substrate, and an end of the first sublayer facing the spacing opening is more protruding than an end of the second sublayer facing the spacing opening.

[0014] According to some exemplary embodiments, the isolation layer includes a third sublayer located on a side of the second sublayer close to the base substrate, and an end of the third sublayer facing the spacing opening is more protruding than an end of the second sublayer facing the spacing opening.

[0015] According to some exemplary embodiments, the display substrate further includes a planarization layer located between the driving circuit layer and the first electrode layer, the planarization layer includes a via hole, and the first electrode is electrically connected to the driving circuit layer through the via hole; and

[0016] The planarization layer has a groove, which is at least partially recessed into the planarization layer in a direction close to the base substrate, and the orthographic projection of the groove on the base substrate at least partially overlaps with the orthographic projection of the spacing opening on the base substrate, and the groove includes a first side wall facing the spacing opening, and an end of the third sub-layer facing the spacing opening protrudes toward one side of the spacing opening compared to the first side wall.

[0017] According to some exemplary embodiments, a shape of an orthographic projection of the support pillar on the base substrate includes a long strip.

[0018] According to some exemplary embodiments, at least a portion of the long strip is extended along an edge of an orthographic projection of at least one adjacent pixel opening on the base substrate.

[0019] According to some exemplary embodiments, in a direction perpendicular to the extension direction of the support pillar, a distance between an orthographic projection of the support pillar on the substrate and an orthographic projection of an adjacent first undercut structure on the substrate is 2 μm-3 μm.

[0020] According to some exemplary embodiments, a side of the partition layer facing the pixel opening has a second undercut structure, and at least a portion of the charge generation layer is disconnected at the second undercut structure.

[0021] According to some exemplary embodiments, the first electrode includes a first electrode main body portion and a first electrode connecting portion connected into an integrated structure, the pixel opening exposes at least a portion of the first electrode main body portion, and the orthographic projection of the spacing opening on the base substrate is spaced from the orthographic projection of the first electrode connecting portion on the base substrate.

[0022] According to some exemplary embodiments, at least two adjacent spacing openings are connected; and / or,

[0023] At least two adjacent spacing openings are arranged at intervals, and the orthographic projections of two adjacent spacing openings on the base substrate are respectively located on both sides of the orthographic projection of at least one first electrode connecting portion on the base substrate.

[0024] According to some exemplary embodiments, the first sublayer, the second sublayer and the third sublayer all include inorganic insulating materials, and the material of the first sublayer is different from the material of the second sublayer, and the material of the second sublayer is different from the material of the third sublayer.

[0025] In another aspect, a display device is provided, comprising the display substrate according to any one of the above descriptions.

[0026] In another aspect, a method for preparing a display substrate is provided, the method comprising:

[0027] forming a driving circuit layer on the base substrate;

[0028] forming a first electrode layer on a side of the driving circuit layer away from the base substrate, wherein the first electrode layer comprises a first electrode, and the first electrode is electrically connected to the driving circuit layer;

[0029] forming a partition layer on a side of the first electrode layer away from the base substrate, the partition layer comprising a pixel opening, the pixel opening exposing at least a portion of the first electrode, the partition layer comprising at least one spacing opening, the spacing opening being located between two adjacent pixel openings, and a side of the partition layer facing the spacing opening having a first undercut structure;

[0030] forming a support column on a side of the driving circuit layer away from the base substrate, wherein an orthographic projection of at least a portion of the support column on the base substrate is located within an orthographic projection of the spacing opening on the base substrate, and the support column is spaced apart from the first undercut structure; and

[0031] A light-emitting functional layer is formed on the side of the partition layer away from the base substrate, a portion of the light-emitting functional layer is located in the pixel opening and in contact with the first electrode, the light-emitting functional layer includes a first light-emitting functional sublayer, a charge generating layer located on the side of the first light-emitting functional sublayer away from the base substrate, and a second light-emitting functional sublayer located on the side of the charge generating layer away from the base substrate, the charge generating layer is disconnected at the first undercut structure, at least a portion of the charge generating layer is located on the side of the support column away from the base substrate, and at least another portion of the charge generating layer is located between the support column and the adjacent first undercut structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Other objects and advantages of the present disclosure will be apparent from the following description of the present disclosure with reference to the accompanying drawings and will help to have a comprehensive understanding of the present disclosure.

[0033] Figure 1 A cross-sectional view of a display substrate in the related art is schematically shown.

[0034] Figure 2 A cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure is schematically shown.

[0035] Figure 3 A cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure is schematically shown.

[0036] Figure 4-Figure 7 Schematically shows a plan view of a display substrate according to some embodiments of the present disclosure. Figure 4 A plan view of the first electrode layer is shown. Figure 5 A plan view of the combination of the first electrode layer and the isolation layer is shown. Figure 6 A plan view of the combination of the first electrode layer, the partition layer and the support column layer is shown. Figure 7 Another plan view of the combination of the first electrode layer, the partition layer and the support column layer is shown.

[0037] Figure 8 The flowchart of a method for preparing a display substrate according to some embodiments of the present disclosure is schematically shown.

[0038] Figure 9A-9H The diagram schematically shows a preparation process diagram of a method for preparing a display substrate according to some embodiments of the present disclosure.

[0039] It should be noted that, for the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the sizes of layers, structures or regions may be enlarged or reduced, that is, these drawings are not drawn according to the actual scale. DETAILED DESCRIPTION

[0040] In the following description, for the purpose of explanation, many specific details are set forth to provide a comprehensive understanding of various exemplary embodiments. However, it is apparent that various exemplary embodiments may be implemented without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid making various exemplary embodiments unnecessarily obscure. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, the specific shape, configuration, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0041] In the accompanying drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. Thus, the size and relative size of the individual elements are not necessarily limited to the size and relative size shown in the drawings. When the exemplary embodiments may be implemented differently, the specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0042] When an element is described as "on" another element, "connected to" another element or "coupled to" another element, the element may be directly on another element, directly connected to another element or directly coupled to another element, or there may be an intermediate element. However, when an element is described as "directly on" another element, "directly connected to" another element or "directly coupled to" another element, there is no intermediate element. Other terms and / or expressions used to describe the relationship between elements should be interpreted in a similar manner, for example, "between..." versus "directly between...", "adjacent" versus "directly adjacent" or "on..." versus "directly on...", etc. In addition, the term "connection" may refer to physical connection, electrical connection, communication connection and / or fluid connection. In addition, the X-axis, Y-axis and Z-axis are not limited to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the X-axis, Y-axis and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, YZ, and XZ. As used herein, the term "and / or" includes any and all combinations of one or more of the listed associated items.

[0043] It should be understood that, although the terms first, second, etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the exemplary embodiment, a first element may be named a second element, and similarly, a second element may be named a first element.

[0044] Figure 1 A cross-sectional view of a display substrate in the related art is schematically shown.

[0045] Reference Figure 1The display substrate includes a first electrode 311', a pixel defining layer PDL' located on the first electrode 311', a support column PS' located on the side of the pixel defining layer PDL' away from the first electrode 311', and a light-emitting functional layer 320' located on the side of the support column PS' away from the first electrode 311'. The light-emitting functional layer 320' includes a first light-emitting functional sublayer 321', a second light-emitting functional sublayer 322', and a charge generation layer CGL' located between the first light-emitting functional sublayer 321' and the second light-emitting functional sublayer 322'. The charge generation layer CGL' is formed by open mask evaporation, and the charge generation layer CGL' of each sub-pixel is connected to form a whole film layer. Since the conductivity of the charge generation layer CGL' is relatively high, the lateral leakage current in the charge generation layer CGL' will cause crosstalk problems in adjacent sub-pixels, thereby affecting the display effect.

[0046] Figure 2 A cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure is schematically shown.

[0047] Reference Figure 2 The display substrate includes a base substrate 100, a driving circuit layer 200 located on the base substrate 100, and a light emitting device layer 300 located on a side of the driving circuit layer 200 away from the base substrate 100. The driving circuit layer 200 includes a plurality of pixel driving circuits arranged at intervals, and the light emitting device layer 300 includes a plurality of light emitting devices 300A arranged at intervals, and the plurality of light emitting devices 300A are electrically connected to the plurality of pixel driving circuits, respectively.

[0048] The light-emitting device layer 300 includes a first electrode layer 310, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100. The first electrode layer 310 includes a plurality of first electrodes 311 arranged at intervals, and the plurality of first electrodes 311 are located in the display area. A partition layer 400 is also provided between the first electrode layer 310 and the light-emitting functional layer 320, and the partition layer 400 includes a plurality of pixel openings KK located in the display area, and the plurality of pixel openings KK respectively expose the plurality of first electrodes 311. The light-emitting functional layer 320 is in contact with the plurality of first electrodes 311 through the plurality of pixel openings KK, respectively. Each light-emitting device 300A includes a first electrode 311 and a portion of the light-emitting functional layer 320 and the second electrode layer 330 located above the first electrode 311.

[0049] The light-emitting functional layer 320 includes a first light-emitting functional sublayer 321, a charge generation layer CGL located on the side of the first light-emitting functional sublayer 321 away from the substrate 100, and a second light-emitting functional sublayer 322 located on the side of the charge generation layer CGL away from the substrate 100. For example, the first light-emitting functional sublayer 321 may include a first hole transport layer located on the first electrode layer 310, a first light-emitting layer located on the side of the first hole transport layer away from the substrate 100, and a first electron transport layer located on the side of the first light-emitting layer away from the substrate 100; the second light-emitting functional sublayer 322 may include a second hole transport layer located on the side of the charge generation layer CGL away from the substrate 100, a second light-emitting layer located on the side of the second hole transport layer away from the substrate 100, and a second electron transport layer located on the side of the second light-emitting layer away from the substrate 100.

[0050] The partition layer 400 includes at least one spacing opening 401, and the spacing opening 401 is located between two adjacent pixel openings KK. The side of the partition layer 400 facing the spacing opening 401 has a first undercut structure UC1, and at least a portion of the charge generation layer CGL is disconnected at the first undercut structure UC1. By providing the first undercut structure UC1 between the pixel openings KK, a portion of the charge generation layer CGL can be effectively isolated, thereby effectively avoiding the problem of crosstalk between adjacent light-emitting devices 300A caused by lateral leakage current in the charge generation layer CGL. In addition, since the partition layer can also be used as a pixel defining layer of the display substrate, there is no need to add an additional film layer, that is, providing the partition layer 400 will not increase the preparation cost of the display substrate.

[0051] It should be noted that, in this article, the undercut structure should be understood as a structure in which the edge of the surface away from the base substrate 100 is more convex than the edge of the surface close to the base substrate 100 .

[0052] Reference Figure 2 The display substrate also includes a support column layer 500, the support column layer 500 includes at least one support column PS, the support column PS is located on the side of the driving circuit layer 200 away from the base substrate 100, the orthographic projection of at least a portion of the support column PS on the base substrate 100 is located within the orthographic projection of the spacing opening 401 on the base substrate 100, and the support column PS is spaced apart from the first bottom cut structure UC1, at least a portion of the charge generation layer CGL is located on the side of the support column PS away from the base substrate 100, and at least another portion of the charge generation layer CGL is located between the support column PS and the adjacent first bottom cut structure UC1.

[0053] The support column PS is a structure for supporting the mask when the light-emitting functional layer 320 is formed by vapor deposition. The surface of the support column PS away from the substrate substrate 100 is farther away from the substrate substrate 100 than the surface of the partition layer 400 away from the substrate substrate 100. At the same time, at least a portion of the support column PS is arranged in the spacing opening 401. The surface of the support column PS close to the substrate substrate 100 can contact the film layer (for example, the planarization layer PLN) located on the side of the partition layer 400 close to the substrate substrate 100, so that the support column PS has a higher height. The support column PS with a higher height located between adjacent pixel openings KK can extend the path of the lateral leakage current in the charge generation layer CGL to be transmitted between adjacent light-emitting devices, which is beneficial to further avoid the problem of crosstalk between adjacent light-emitting devices caused by the lateral leakage current in the charge generation layer CGL.

[0054] In addition, the support column PS is obtained by patterning only using a conventional mask, compared with using a halftone mask to form a pixel definition layer and a support column PS (ie Figure 1 The technology of the structure shown in the figure can effectively reduce the cost of Mask.

[0055] It should be noted that the first light-emitting layer in the first light-emitting functional sublayer 321 and the second light-emitting layer in the second light-emitting functional sublayer 322 are both film layers formed by fine mask evaporation, and are basically not deposited at the first undercut structure UC1. In the light-emitting functional layer 320, other film layers except the light-emitting layer (including the first light-emitting layer and the second light-emitting layer) and the charge generation layer CGL can be separated by the first undercut structure UC1 or be continuous at the first undercut structure UC1. Figure 2 The structure in which the first light-emitting functional sublayer 321 is separated by the first undercut structure UC1 and the second light-emitting functional sublayer 322 is continuous at the first undercut structure UC1 is schematically shown.

[0056] In addition, it is necessary to adjust the size of the first undercut structure UC1 and the evaporation process parameters of the second electrode layer 330 so that the second electrode layer 330 is continuous at the first undercut structure UC1 .

[0057] According to some exemplary embodiments, referring to Figure 2 The partition layer 400 includes a first sublayer 410 and a second sublayer 420 located on the first sublayer 410 close to the base substrate 100. One end of the first sublayer 410 facing the spacing opening 401 is more protruding than one end of the second sublayer 420 facing the spacing opening 401 to form a first undercut structure UC1.

[0058] According to some exemplary embodiments, referring to Figure 2, the first sublayer 410 and the second sublayer 420 both include inorganic insulating materials, and the materials of the first sublayer 410 and the second sublayer 420 are different, so that when etching the partition layer 400, by selecting the corresponding etching gas etching process parameters, the etching amount of the second sublayer 420 is greater than the etching amount of the first sublayer 410, thereby causing the edge of the second sublayer 420 to shrink inward compared to the first sublayer 410. In addition, the partition layer 400 composed of inorganic materials is relatively thin, which can improve the problem of Mura caused by the difficulty of leveling the organic encapsulation layer, thereby reducing the thickness of the encapsulation layer located on the light-emitting device layer 300, which is conducive to realizing the thinness of the display substrate and improving the bending performance.

[0059] According to some exemplary embodiments, the inorganic insulating material may include silicon oxide, silicon nitride, and silicon oxynitride. For example, the material of the first sublayer 410 includes one of silicon oxide, silicon nitride, and silicon oxynitride, and the material of the second sublayer 420 includes the other of silicon oxide, silicon nitride, and silicon oxynitride. Alternatively, the material of the first sublayer 410 and the material of the second sublayer 420 both include silicon oxynitride, but the content ratios of the nitrogen element and the oxygen element are set to be different.

[0060] According to some exemplary embodiments, referring to Figure 2 , the side of the partition layer 400 facing the pixel opening KK has a second undercut structure UC2, and at least a portion of the charge generation layer CGL is disconnected at the second undercut structure UC2. One end of the first sublayer 410 facing the pixel opening KK protrudes compared to the end of the second sublayer 420 facing the pixel opening KK to form a second undercut structure UC2, and the second undercut structure UC2 and the first undercut structure UC1 can be formed in the same patterning process. By providing the second undercut structure UC2 on the side of the partition layer 400 facing the pixel opening KK, it is helpful to further avoid the problem of crosstalk between adjacent light-emitting devices caused by lateral leakage current in the charge generation layer CGL.

[0061] According to some exemplary embodiments, referring to Figure 2 The isolation layer 400 includes a third sublayer 430 located on the side of the second sublayer 420 close to the base substrate 100, and one end of the third sublayer 430 facing the spacing opening 401 protrudes compared to the end of the second sublayer 420 facing the spacing opening 401, and one end of the third sublayer 430 facing the pixel opening KK protrudes compared to the end of the second sublayer 420 facing the pixel opening KK.

[0062] In order to make the edge of the second sublayer 420 retract inward compared to the edge of the first sublayer 410, the etching power is relatively large when etching the second sublayer 420. In order to avoid damaging the surface of the underlying first electrode 311 when etching the second sublayer 420, a third sublayer 430 is added between the second sublayer 420 and the first electrode 311 to protect the first electrode 311 when etching the second sublayer 420. In addition, by setting the etching power of the third sublayer 430 to be smaller, damage to the surface of the first electrode 311 can be effectively avoided.

[0063] According to some exemplary embodiments, referring to Figure 2 The third sublayer 430 includes an inorganic insulating material, and the third sublayer 430 and the second sublayer 420 have different materials. For example, the material of the third sublayer 430 may be the same as the material of the first sublayer 410 .

[0064] Figure 3 A cross-sectional schematic diagram of a display substrate according to some embodiments of the present disclosure is schematically shown.

[0065] According to some exemplary embodiments, referring to Figure 3 The display substrate further includes a planarization layer PLN located between the driving circuit layer 200 and the first electrode layer 310. The planarization layer PLN includes a via hole V0, and the first electrode 311 is electrically connected to the driving circuit layer 200 through the via hole V0. The planarization layer PLN has a groove G, and the groove G is at least partially recessed into the planarization layer PLN in a direction close to the base substrate 100. The orthographic projection of the groove G on the base substrate 100 overlaps at least partially with the orthographic projection of the spacing opening 401 on the base substrate 100, and the surface of the support column PS close to the base substrate 100 is in direct contact with the bottom of the groove G.

[0066] The groove G includes a first side wall G1 facing the spacing opening 401, and one end of the third sublayer 430 facing the spacing opening 401 protrudes toward the side of the spacing opening 401 compared to the first side wall G1. That is, the third sublayer 430 and the planarization layer PLN form a third undercut structure UC3 at the location facing the spacing opening 401. The third undercut structure UC3 is located on the side of the first undercut structure UC1 close to the base substrate 100, and the stacked first undercut structure UC1 and the third undercut structure UC3 can achieve a better isolation effect.

[0067] It should be noted that the material of the planarization layer PLN includes an organic resin material, which is different from the material of the third sub-layer 430. After the third sub-layer 430 is etched, the groove G can be replaced with an etching gas to continue etching the planarization layer PLN, and the etching process parameters can be set so that the etched groove G is retracted compared to the third sub-layer 430.

[0068] Figure 4-Figure 7 Schematically shows a plan view of a display substrate according to some embodiments of the present disclosure. Figure 4 A plan view of the first electrode layer is shown. Figure 5 A plan view of the combination of the first electrode layer and the isolation layer is shown. Figure 6 A plan view of the combination of the first electrode layer, the partition layer and the support column layer is shown. Figure 7 Another plan view of the combination of the first electrode layer, the partition layer and the support column layer is shown.

[0069] According to some exemplary embodiments, in combination with reference Figure 2 , Figure 5 and Figure 6 The shape of the positive projection of the spacing opening 401 on the substrate includes a long strip, at least a portion of the long strip is extended along the edge of the positive projection of the adjacent multiple pixel openings KK on the substrate, at least four adjacent spacing openings 401 can be interconnected to form a cross shape, and the positive projection of the support column PS on the substrate includes a circle and is located at the intersection of the cross.

[0070] According to some exemplary embodiments, in combination with reference Figure 2 , Figure 5 and Figure 7 The shape of the orthographic projection of the support column PS on the substrate includes a long strip, and the support column PS is extended along the edge of at least one adjacent pixel opening KK. Setting the support column PS in a long strip shape is conducive to further extending the path of the lateral leakage current in the charge generation layer CGL being transmitted between adjacent light-emitting devices, thereby further helping to avoid the problem of crosstalk between adjacent light-emitting devices caused by the lateral leakage current in the charge generation layer CGL.

[0071] It should be noted that Figure 7 A schematic diagram shows an arrangement of long strip support columns PS, but the display substrate of the disclosed embodiment is not limited to this. The long strip support columns PS can be reasonably arranged in combination with the supporting effect of the support columns PS on the mask. For example, the long strip support columns PS can be set only between pixel openings KK with smaller spacing.

[0072] exist Figure 7 In the schematic plan view, the orthographic projection of a portion of the support column PS on the base substrate overlaps with the orthographic projection of the partition layer 400 on the base substrate, and the orthographic projection of another portion of the support column PS on the base substrate does not overlap with the orthographic projection of the partition layer 400 on the base substrate. Figure 2, that is, a part of the support column PS is directly arranged on the planarization layer PLN, and another part of the support column PS is directly arranged on the isolation layer 400. Of course, according to actual needs, the support column PS can also be arranged only on the planarization layer PLN, that is, the support column PS is only arranged in the spacing opening 401 of the isolation layer 400.

[0073] According to some exemplary embodiments, in combination with reference Figure 2 and Figure 7 In a direction perpendicular to the extension direction of the support pillar PS, a distance D between an orthographic projection of the support pillar PS on the substrate and an orthographic projection of the adjacent first undercut structure UC1 on the substrate is 2 μm-3 μm.

[0074] According to some exemplary embodiments, in combination with reference Figure 4 and Figure 5 The first electrode 311 includes a first electrode main body 311A ​​and a first electrode connecting portion 311B connected into an integral structure, the pixel opening KK exposes at least a portion of the first electrode main body 311A, and the orthographic projection of the spacing opening 401 on the base substrate is spaced from the orthographic projection of the first electrode connecting portion 311B on the base substrate. That is, the spacing opening 401 needs to be arranged away from the first electrode connecting portion 311B, so that the partition layer 400 covers the portion of the first electrode layer 310 outside the pixel opening KK region, thereby preventing the first electrode 311 from contacting other structures of the upper layer and causing poor display.

[0075] It should be noted that the shape of the first electrode main body 311A ​​is a relatively regular shape, for example, a rectangle, a rounded rectangle, a hexagon, a circle, an ellipse, etc. The first electrode connecting portion 311B is a structure connected to the outside of the first electrode main body 311A ​​and used to be electrically connected to the underlying driving circuit layer. The size of the first electrode connecting portion 311B along the first direction X and / or the second direction Y is smaller than the first electrode main body 311A. The boundary between the first electrode connecting portion 311B and the first electrode main body 311A ​​should be considered to be the position where the shape and size change suddenly.

[0076] According to some exemplary embodiments, in combination with reference Figure 4 and Figure 5 , at least two adjacent spacing openings 401 are connected.

[0077] According to some exemplary embodiments, in combination with reference Figure 4 and Figure 5 At least two adjacent spacing openings 401 are arranged at intervals, and the orthographic projections of two adjacent ones on the base substrate are respectively located on both sides of the orthographic projection of at least one first electrode connecting portion 311B on the base substrate.

[0078] According to some exemplary embodiments, in combination with reference Figure 4 and Figure 5 The plurality of first electrodes 311 include a plurality of first sub-electrodes 311R, a plurality of second sub-electrodes 311G, and a plurality of third sub-electrodes 311B. The first sub-electrode 311R can be used as an anode of a first light-emitting device, which emits red light; the second sub-electrode 311G can be used as an anode of a second light-emitting device, which emits green light; and the third sub-electrode 311B can be used as an anode of a third light-emitting device, which emits blue light.

[0079] The plurality of second sub-electrodes 311G are arranged along the second direction Y to form a first electrode column L1, the plurality of first sub-electrodes 311R and the plurality of third sub-electrodes 311B are alternately arranged along the second direction Y to form a second electrode column L2, and the plurality of first electrode columns L1 and the plurality of second electrode columns L2 are alternately arranged along the first direction X. In adjacent first electrode columns L1 and second electrode columns L2, one second sub-electrode 311G is located between adjacent first sub-electrodes 311R and third sub-electrodes 311B.

[0080] In the first sub-electrode 311R and the third sub-electrode 311B adjacent to each other along the second direction Y, and in the two second sub-electrodes 311G adjacent to the first sub-electrode 311R and the third sub-electrode 311B arranged along the second direction Y, the four spacing openings 401 located between the four first electrodes 311 can be interconnected in a cross shape.

[0081] Figure 8 The flowchart of a method for preparing a display substrate according to some embodiments of the present disclosure is schematically shown.

[0082] At least some embodiments of the present disclosure also provide a method for preparing a display substrate, referring to Figure 8 The preparation method includes the following steps S10 to S50.

[0083] In step S10 , a driving circuit layer is formed on a base substrate.

[0084] In step S20, a first electrode layer is formed on a side of the driving circuit layer away from the base substrate, the first electrode layer includes a first electrode, and the first electrode is electrically connected to the driving circuit layer.

[0085] In step S30, an isolation layer is formed on a side of the first electrode layer away from the base substrate, the isolation layer includes a pixel opening, the pixel opening exposes at least a portion of the first electrode, the isolation layer includes at least one spacing opening, the spacing opening is located between two adjacent pixel openings, and the side of the isolation layer facing the spacing opening has a first undercut structure.

[0086] In step S40, a support column is formed on a side of the driving circuit layer away from the base substrate, the orthographic projection of at least a portion of the support column on the base substrate is located within the orthographic projection of the spacing opening on the base substrate, and the support column is spaced apart from the first undercut structure.

[0087] In step S50, a light-emitting functional layer is formed on the side of the partition layer away from the substrate, a portion of the light-emitting functional layer is located in the pixel opening and in contact with the first electrode, the light-emitting functional layer includes a first light-emitting functional sublayer, a charge generating layer located on the side of the first light-emitting functional sublayer away from the substrate, and a second light-emitting functional sublayer located on the side of the charge generating layer away from the substrate, the charge generating layer is disconnected at the first undercut structure, at least a portion of the charge generating layer is located on the side of the support column away from the substrate, and at least another portion of the charge generating layer is located between the support column and the adjacent first undercut structure.

[0088] Figure 9A-9H The diagram schematically shows a preparation process diagram of a method for preparing a display substrate according to some embodiments of the present disclosure.

[0089] Reference Fig. 9A A driving circuit layer 200 is formed on a base substrate 100, and a planarization layer PLN is formed on a side of the driving circuit layer 200 away from the base substrate 100, wherein the planarization layer PLN includes a via hole V0. A first electrode layer 310 is formed on a side of the planarization layer PLN away from the base substrate 100, wherein the first electrode layer 310 includes a first electrode 311, and the first electrode 311 is electrically connected to the driving circuit layer 200 through a via hole V0 in the planarization layer PLN. A pixel defining film 400' is formed on a side of the first electrode layer 310 away from the base substrate 100, wherein the pixel defining film 400' includes a third sub-film 430', a second sub-film 420' located on a side of the third sub-film 430' away from the base substrate 100, and a first sub-film 410' located on a side of the second sub-film 420' away from the base substrate 100. A photoresist layer PR is formed on a side of the pixel defining film 400' away from the base substrate 100.

[0090] Combined with reference Fig. 9A and Fig. 9B , under the shielding of the photoresist layer PR, the first sub-film 410 ′ is dry-etched to obtain the first sub-layer 410 .

[0091] Combined with reference Fig. 9B and Fig. 9C Under the shielding of the photoresist layer PR, the second sub-film 420' is dry-etched. The gas used to etch the second sub-film 420' is different from the gas used to etch the first sub-film, thereby obtaining the second sub-layer 420, the edge of which is inward compared to the edge of the first sub-layer 410.

[0092] Reference Fig.9D , under the shielding of the photoresist layer PR, the third sub-film 430' is dry-etched, the gas used to etch the third sub-film 430' is different from the gas used to etch the second sub-film, and the power used to etch the third sub-film 430' is less than the power used to etch the second sub-film, so as to obtain the third sub-layer 430, the edge of which protrudes compared to the edge of the second sub-layer 420.

[0093] The obtained stacked first sublayer 410, second sublayer 420 and third sublayer 430 constitute the isolation layer 400, and the isolation layer 400 includes a pixel opening KK and a spacing opening 401, the pixel opening KK exposes at least a portion of the first electrode 311, and the spacing opening 401 is located between adjacent pixel openings KK. One end of the first sublayer 410 facing the spacing opening 401 protrudes compared to one end of the second sublayer 420 facing the spacing opening 401 to form a first undercut structure UC1. One end of the first sublayer 410 facing the pixel opening KK protrudes compared to one end of the second sublayer 420 facing the pixel opening KK to form a second undercut structure UC2.

[0094] Combined with reference Fig.9D and Fig.9E , under the shielding of the photoresist layer PR, the portion of the planarization layer PLN exposed by the spacing opening 401 is dry-etched to form a groove G in the planarization layer PLN, and then the photoresist layer PR is removed. The groove G is at least partially recessed into the planarization layer PLN in the direction close to the base substrate 100, and the orthographic projection of the groove G on the base substrate 100 overlaps at least partially with the orthographic projection of the spacing opening 401 on the base substrate 100. The groove G includes a first side wall G1 facing the spacing opening 401, and one end of the third sublayer 430 facing the spacing opening 401 protrudes toward the side of the spacing opening 401 compared to the first side wall G1, that is, the third sublayer 430 and the planarization layer PLN form a third undercut structure UC3 at the location facing the spacing opening 401.

[0095] Reference Fig.9F A support column PS is formed on the side of the planarization layer PLN away from the base substrate 100 , and the orthographic projection of at least a portion of the support column PS on the base substrate 100 is located within the orthographic projection of the spacing opening 401 on the base substrate 100 , and is spaced apart from the adjacent isolation layer 400 .

[0096] Reference Figure 9GA light-emitting functional layer 320 is formed on the side of the partition layer 400 and the support pillar PS away from the base substrate 100. The light-emitting functional layer 320 includes a first light-emitting functional sublayer 321, a charge generation layer CGL located on the side of the first light-emitting functional sublayer 321 away from the base substrate 100, and a second light-emitting functional sublayer 322 located on the side of the charge generation layer CGL away from the base substrate 100. A portion of the charge generation layer CGL is disconnected at the first undercut structure UC1, and / or the second undercut structure UC2, and / or the third undercut structure UC3. At least a portion of the charge generation layer CGL is located between the support pillar PS and the adjacent partition layer 400, and at least another portion of the charge generation layer CGL is located on the side of the support pillar PS away from the base substrate 100.

[0097] Reference Figure 9H A second electrode layer 330 is formed on the side of the light-emitting functional layer 320 away from the base substrate 100, and a display substrate is prepared.

[0098] At least some embodiments of the present disclosure also provide a display device, which includes a display substrate as described above. The display device may include any device or product having a display function. For example, the display device may be a smart phone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, an electronic clothing, an electronic bracelet, an electronic necklace, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.

[0099] It should be understood that the display device according to some exemplary embodiments of the present disclosure has all the features and advantages of the above-mentioned display substrate, and these features and advantages can be referred to the above description of the display substrate, which will not be repeated here.

[0100] As used herein, the terms "substantially," "approximately," "approximately," and other similar terms are used as terms of approximation rather than as terms of degree, and they are intended to account for the inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. Taking into account factors such as process fluctuations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), "approximately" or "approximately" as used herein include the stated value and mean that the particular value is within an acceptable range of deviation as determined by one of ordinary skill in the art. For example, "approximately" can mean within one or more standard deviations, or within ±10% or ±5% of the stated value.

[0101] Although some embodiments according to the general inventive concept of the present disclosure have been illustrated and described, it will be appreciated by those skilled in the art that changes may be made to these embodiments without departing from the principles and spirit of the general inventive concept of the present disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. A display substrate, wherein: The display substrate comprises: substrate substrate; A driving circuit layer, located on the substrate; A first electrode layer, located at a side of the driving circuit layer away from the base substrate, the first electrode layer comprising a first electrode, and the first electrode is electrically connected to the driving circuit layer; a partition layer, located on a side of the first electrode layer away from the base substrate, the partition layer comprising a pixel opening, the pixel opening exposing at least a portion of the first electrode; and a light-emitting functional layer, located on a side of the partition layer away from the base substrate, a portion of the light-emitting functional layer being located in the pixel opening and in contact with the first electrode, Wherein, the partition layer comprises at least one spacing opening, the spacing opening is located between two adjacent pixel openings, and the side surface of the partition layer facing the spacing opening has a first undercut structure; The light-emitting functional layer comprises a first light-emitting functional sublayer, a charge generation layer located on a side of the first light-emitting functional sublayer away from the substrate, and a second light-emitting functional sublayer located on a side of the charge generation layer away from the substrate, wherein at least a portion of the charge generation layer is disconnected at the first undercut structure; and The display substrate also includes at least one supporting column, which is located on a side of the driving circuit layer away from the base substrate, an orthographic projection of at least a portion of the supporting column on the base substrate is located within an orthographic projection of the spacing opening on the base substrate, and the supporting column is spaced apart from the first undercut structure, at least a portion of the charge generating layer is located on a side of the supporting column away from the base substrate, and at least another portion of the charge generating layer is located between the supporting column and the adjacent first undercut structure.

2. The display substrate according to claim 1, wherein: The isolation layer includes a first sublayer and a second sublayer located on the first sublayer close to the base substrate, and an end of the first sublayer facing the spacing opening is more protruding than an end of the second sublayer facing the spacing opening.

3. The display substrate according to claim 2, wherein: The isolation layer includes a third sublayer located on a side of the second sublayer close to the base substrate, and an end of the third sublayer facing the spacing opening is more protruding than an end of the second sublayer facing the spacing opening.

4. The display substrate according to claim 3, wherein: The display substrate further includes a planarization layer located between the driving circuit layer and the first electrode layer, the planarization layer includes a via hole, and the first electrode is electrically connected to the driving circuit layer through the via hole; as well as The planarization layer has a groove, which is at least partially recessed into the planarization layer in a direction close to the base substrate, and the orthographic projection of the groove on the base substrate at least partially overlaps with the orthographic projection of the spacing opening on the base substrate, and the groove includes a first side wall facing the spacing opening, and an end of the third sub-layer facing the spacing opening protrudes toward one side of the spacing opening compared to the first side wall.

5. The display substrate according to any one of claims 1 to 4, wherein: The shape of the orthographic projection of the support column on the base substrate includes a long strip.

6. The display substrate according to claim 5, wherein: At least a portion of the long strip is extended along an edge of an orthographic projection of at least one adjacent pixel opening on the base substrate.

7. The display substrate according to claim 5 or 6, wherein: In a direction perpendicular to the extension direction of the support pillar, a distance between an orthographic projection of the support pillar on the substrate and an orthographic projection of the adjacent first undercut structure on the substrate is 2 μm-3 μm.

8. The display substrate according to any one of claims 1 to 7, wherein: The side surface of the partition layer facing the pixel opening has a second undercut structure, and at least a portion of the charge generation layer is disconnected at the second undercut structure.

9. The display substrate according to any one of claims 1 to 8, wherein: The first electrode includes a first electrode main body and a first electrode connecting portion connected into an integrated structure, the pixel opening exposes at least a portion of the first electrode main body, and the orthographic projection of the spacing opening on the base substrate is spaced from the orthographic projection of the first electrode connecting portion on the base substrate.

10. The display substrate according to claim 9, wherein: At least two adjacent spacing openings are connected; and / or, At least two adjacent spacing openings are arranged at intervals, and the orthographic projections of two adjacent spacing openings on the base substrate are respectively located on both sides of the orthographic projection of at least one first electrode connecting portion on the base substrate.

11. The display substrate according to claim 3 or 4, wherein: The first sublayer, the second sublayer and the third sublayer all include inorganic insulating materials, and the material of the first sublayer is different from the material of the second sublayer, and the material of the second sublayer is different from the material of the third sublayer.

12. A display device, wherein: The display device comprises the display substrate according to any one of claims 1 to 11.

13. A method for preparing a display substrate, wherein: The preparation method comprises: forming a driving circuit layer on the base substrate; forming a first electrode layer on a side of the driving circuit layer away from the base substrate, wherein the first electrode layer comprises a first electrode, and the first electrode is electrically connected to the driving circuit layer; forming a partition layer on a side of the first electrode layer away from the base substrate, the partition layer comprising a pixel opening, the pixel opening exposing at least a portion of the first electrode, the partition layer comprising at least one spacing opening, the spacing opening being located between two adjacent pixel openings, and a side of the partition layer facing the spacing opening having a first undercut structure; forming a support column on a side of the driving circuit layer away from the base substrate, wherein an orthographic projection of at least a portion of the support column on the base substrate is located within an orthographic projection of the spacing opening on the base substrate, and the support column is spaced apart from the first undercut structure; and A light-emitting functional layer is formed on the side of the partition layer away from the base substrate, a portion of the light-emitting functional layer is located in the pixel opening and in contact with the first electrode, the light-emitting functional layer includes a first light-emitting functional sublayer, a charge generating layer located on the side of the first light-emitting functional sublayer away from the base substrate, and a second light-emitting functional sublayer located on the side of the charge generating layer away from the base substrate, the charge generating layer is disconnected at the first undercut structure, at least a portion of the charge generating layer is located on the side of the support column away from the base substrate, and at least another portion of the charge generating layer is located between the support column and the adjacent first undercut structure.

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