Display device

Abstract

Disclosed is a display device including a substrate including a plurality of pixel areas and a non-pixel area surrounding each of the plurality of pixel areas. The non-pixel region includes a plurality of first regions and a second region surrounding the plurality of first regions. A functional layer is disposed on the substrate, and the functional layer includes a plurality of first holes defined to pass through the functional layer and overlap the plurality of first regions. An element layer is disposed on the functional layer. A pixel defining layer is disposed on the element layer, and the pixel defining layer overlaps the non-pixel region. The pixel defining layer includes a plurality of pixel openings defined through the pixel defining layer. The plurality of pixel openings overlap the plurality of pixel regions. A plurality of light emitting elements are disposed on the element layer, and the plurality of light emitting elements are disposed in the plurality of pixel openings.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority benefit of Korean Patent Application No. 10-2020-0008653 filed on January 22, 2020, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The inventive concept relates to a display device. Background Art

[0004] Many electronic devices include a display device for displaying images to a user, such as a smart phone, a digital camera, a notebook computer, a navigation unit, and a smart TV. The display device generates an image and provides the image to the user through a display screen.

[0005] The display device may provide various functions, such as displaying an image to provide information to a user, or sensing a user's input to communicate with the user. In recent developments, the display device includes a function of sensing a user's fingerprint. For example, the display device may include an optical fingerprint sensor for sensing incident light. The optical fingerprint sensor may be disposed on the rear surface of the display panel and assembled with the display panel. Summary of the invention

[0006] Exemplary embodiments of the inventive concept provide a display device including an optical transmission path through which external light reaches a sensor layer disposed at a lower portion of the display device when the display device is provided with a color filter layer and a pixel defining layer having a black color.

[0007] In an exemplary embodiment of the present invention, a display device includes a substrate, the substrate including a plurality of pixel areas and a non-pixel area surrounding each of the plurality of pixel areas. The non-pixel area includes a plurality of first areas and a second area surrounding the plurality of first areas. A functional layer is provided on the substrate, and the functional layer includes a plurality of first holes, and the plurality of first holes are defined to pass through the functional layer and overlap with the plurality of first areas. An element layer is provided on the functional layer. A pixel defining layer is provided on the element layer, and the pixel defining layer overlaps with the non-pixel area. The pixel defining layer includes a plurality of pixel openings defined to pass through the pixel defining layer, and the plurality of pixel openings overlap with the plurality of pixel areas. A plurality of light-emitting elements are provided on the element layer, and the plurality of light-emitting elements are provided in the plurality of pixel openings.

[0008] In an exemplary embodiment of the present inventive concept, a display device includes a substrate, the substrate including a plurality of pixel areas and a non-pixel area surrounding each of the plurality of pixel areas. The non-pixel area includes a plurality of first areas and a second area surrounding the plurality of first areas. A functional layer is provided on the substrate, and the functional layer includes a plurality of first holes, and the plurality of first holes are defined to pass through the functional layer and overlap with the plurality of first areas. An element layer is provided on the functional layer. A pixel defining layer is provided on the element layer, and the pixel defining layer overlaps with the non-pixel area. The pixel defining layer includes a plurality of pixel openings, and the plurality of pixel openings are defined to pass through the pixel defining layer and overlap with the plurality of pixel areas. A plurality of second holes are defined to pass through the pixel defining layer and overlap with the plurality of first holes. The area of ​​each of the plurality of second holes is greater than the area of ​​each of the plurality of first holes. The area of ​​each of the plurality of first holes and the area of ​​each of the plurality of second holes are defined in a first direction and a second direction parallel to the upper surface of the substrate and intersecting each other. A plurality of light-emitting elements are provided on the element layer, and the plurality of light-emitting elements are provided in the plurality of pixel openings.

[0009] In an exemplary embodiment of the present inventive concept, a display device includes a substrate, the substrate including a plurality of pixel areas and a non-pixel area surrounding each of the plurality of pixel areas. The non-pixel area includes a plurality of first areas and a second area surrounding the plurality of first areas. A functional layer is provided on the substrate, and the functional layer includes a plurality of first holes, and the plurality of first holes are defined to pass through the functional layer and overlap with the plurality of first areas. A sensor layer is provided below the substrate. The sensor layer includes at least one optical fingerprint sensor. A plurality of light-emitting elements are provided on the substrate, and the plurality of light-emitting elements are configured to emit light in a plurality of areas overlapping with the plurality of pixel areas. A pixel-defining layer is provided on the substrate, and the pixel-defining layer overlaps with the non-pixel area. The pixel-defining layer includes a plurality of second holes, and the plurality of second holes are defined to pass through the pixel-defining layer and overlap with the plurality of first holes. A color filter layer is provided on the plurality of light-emitting elements and the pixel-defining layer, and the color filter layer includes a plurality of sub-color filters overlapping with the plurality of first areas. An input sensing unit is provided between the plurality of light-emitting elements and the color filter layer. The input sensing unit includes a first light-transmitting area overlapping with the plurality of first areas. The plurality of first holes, the plurality of second holes, the plurality of sub-color filters, and the first light-transmitting region form an optical transmission path for external light to reach the sensor layer.

[0010] According to the above, external light can easily reach the sensor layer disposed under the substrate through the optical transmission path defined by the first hole and the second hole overlapping the first area defined in the non-pixel area. Therefore, the sensor layer can be stably operated. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other advantages of the present inventive concept will become readily apparent when reference is made to the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 is a perspective view showing a display device according to an exemplary embodiment of the present inventive concept;

[0013] Figure 2 is a cross-sectional view illustrating a display device according to an exemplary embodiment of the present inventive concept;

[0014] Figure 3 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 2 A plan view of the display panel shown in ;

[0015] Figure 4 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 3 A cross-sectional view of a pixel shown in ;

[0016] Figure 5 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 4 A plan view of a structure in which a plurality of pixel regions are arranged;

[0017] Figure 6 is an exemplary embodiment according to the present inventive concept. Figure 5 A cross-sectional view taken along line II';

[0018] Figure 7 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 5 A plan view of the first area shown in ;

[0019] Figure 8 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 5 A cross-sectional view of the first region shown in ;

[0020] Fig. 9 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 2 A plan view of an input sensing unit shown in ;

[0021] Fig.10 is a diagram showing an exemplary embodiment according to the present inventive concept Fig. 9 An enlarged plan view of the configuration of the first sensor portion and the second sensor portion shown in;

[0022] Fig.11 is an exemplary embodiment according to the present inventive concept. Fig.10 A cross-sectional view taken along line II-II' shown in FIG.

[0023] Fig.12 is a diagram showing an exemplary embodiment according to the present inventive concept Fig. 9 An enlarged view of the area E1 shown in FIG.

[0024] Fig.13 is a cross-sectional view illustrating a display device according to an exemplary embodiment of the present inventive concept;

[0025] Fig.14 is a diagram showing an exemplary embodiment according to the present inventive concept Fig.13 A plan view of the first area shown in ;

[0026] Fig.15 is a diagram showing an exemplary embodiment according to the present inventive concept Fig.13 A cross-sectional view of the first region shown in ; and

[0027] Figures 16 to 18 is a cross-sectional view illustrating a display device according to an exemplary embodiment of the inventive concept. DETAILED DESCRIPTION

[0028] In the present inventive concept, it will be understood that when an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it may be directly on, connected to or coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on", "directly connected to" or "directly coupled to" another element or layer, there may be no intervening elements or layers between the element or layer and the other element or layer.

[0029] Throughout the text, the same reference numerals denote the same elements. In the drawings, the thickness, proportion and size of components are exaggerated in order to effectively describe the technical contents.

[0030] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0031] It will be understood that, although the terms first, second, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish an element, component, region, layer or section from another element, component, region, layer or section. Therefore, without departing from the teaching of the present invention, the first element, first component, first region, first layer or first section discussed below may be referred to as the second element, second component, second region, second layer or second section. As used herein, unless the context clearly indicates otherwise, the singular form "one", "an" and "the" are intended to also include plural forms.

[0032] For ease of description, spatially relative terms such as "under", "below", "lower", "over", "upper", etc. may be used herein to describe the relationship of one element or feature to another element or feature as shown in the drawings. However, the display device and associated elements may be flipped, rotated, etc., and the exemplary embodiments of the inventive concept should not be limited by these terms.

[0033] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present invention belongs. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0034] It will also be understood that when the terms "include" and / or "comprising" are used in this specification, they specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0035] Hereinafter, exemplary embodiments of the present inventive concept will be described with reference to the accompanying drawings.

[0036] Figure 1 is a perspective view illustrating a display device DD according to an exemplary embodiment of the inventive concept.

[0037] refer to Figure 1 In an exemplary embodiment of the present invention, the display device DD may have a rectangular shape defined by relatively short sides extending in a first direction DR1 and relatively long sides extending in a second direction DR2 crossing the first direction DR1. However, the shape of the display device DD should not be limited to the rectangular shape, and may have various shapes such as a circular shape, a polygonal shape, a three-dimensional shape, an irregular shape, etc.

[0038] exist Figure 1 In the exemplary embodiment shown in , the first direction DR1 and the second direction DR2 are perpendicular to each other. However, the exemplary embodiments of the present inventive concept are not limited thereto. Hereinafter, a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 may be defined as a third direction DR3. The first direction DR1 and the second direction DR2 may be parallel to the substrate SUB( Figure 4 ). The third direction DR3 may be a thickness direction of the substrate SUB. In the present disclosure, the expression “when viewed in a plane” may mean a state viewed from the third direction DR3.

[0039] The upper surface of the display device DD (for example, in the third direction DR3) may be defined as a display surface DS, and the display surface DS may extend in a plane defined by the first direction DR1 and the second direction DR2. The image IM generated by the display device DD may be provided to the user through the display surface DS. Figure 1 In an exemplary embodiment of the present invention, the image IM displayed on the display surface DS includes a plurality of icons for various software applications. However, exemplary embodiments of the present inventive concept are not limited thereto, and the display surface DS may include one or more still images and / or moving images displaying various different contents.

[0040] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display the image IM. In an exemplary embodiment, the non-display area NDA may define an edge of the display device DD printed in a predetermined color. Figure 1 The exemplary embodiment shown in includes a non-display area NDA surrounding all four sides of a rectangular display area DA, but exemplary embodiments of the inventive concept are not limited thereto. For example, in other exemplary embodiments, the non-display area NDA may surround three sides or less of the display area DA, and the display area DA may extend to the edge of the display device DD.

[0041] Figure 2 is a cross-sectional view schematically illustrating a display device DD according to an exemplary embodiment of the inventive concept.

[0042] refer to Figure 2 In an exemplary embodiment, the display device DD may include a display panel DP, an input sensing unit ISP disposed on the display panel DP, a color filter layer CFL disposed on the input sensing unit ISP, a window WIN disposed on the color filter layer CFL, an adhesive OCA disposed between the color filter layer CFL and the window WIN, and a sensor layer SL disposed under the display panel DP.

[0043] The display panel DP according to the exemplary embodiment of the present inventive concept may be a light-emitting display panel. However, the exemplary embodiment of the present inventive concept is not limited thereto. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots and / or quantum rods. Hereinafter, the organic light-emitting display panel will be described as a representative example of the display panel DP.

[0044] The display panel DP may include a base layer BL, a pixel layer PXL disposed on the base layer BL, and a thin film encapsulation layer TFL disposed on the base layer BL to cover the pixel layer PXL.

[0045] The base layer BL may be disposed in the display area DA and the non-display area NDA. Figure 2 As shown in the exemplary embodiment of FIG. 1 , the base layer BL may be the lowermost portion of the display panel DP (eg, in the third direction DR3 ). In the exemplary embodiment, the base layer BL may have a multi-layer structure.

[0046] The pixel layer PXL may be disposed in the display area DA. The pixel layer PXL may include a plurality of pixels, and each of the pixels may include a light emitting element. The pixel layer PXL may not be disposed in the non-display area NDA.

[0047] In an exemplary embodiment, the thin film encapsulation layer TFL may include at least two inorganic layers and an organic layer disposed between the at least two inorganic layers. However, exemplary embodiments of the inventive concept are not limited thereto, and in other exemplary embodiments, the thin film encapsulation layer TFL may include more than one organic layer. In an exemplary embodiment, the inorganic layer may include an inorganic material and may protect the pixel layer PXL from moisture / oxygen. The organic layer may include an organic material and may protect the pixel layer PXL from foreign matter such as dust particles.

[0048] The input sensing unit ISP may sense an external input (e.g., a user's touch, etc.), may convert the external input into a predetermined input signal, and may provide the input signal to the display panel DP. The input sensing unit ISP may include a plurality of sensing electrodes to sense the external input. In an exemplary embodiment, the sensing electrodes may sense the external input by a capacitive method. The display panel DP may receive an input signal from the input sensing unit ISP, and may generate an image corresponding to the input signal.

[0049] The color filter layer CFL may include a plurality of color filters. The color filters may convert external light into the color of the color filter layer CFL.

[0050] The input sensing unit ISP and the color filter layer CFL will be described in detail later.

[0051] The window WIN may protect the display panel DP and the input sensing unit ISP from external scratches and impacts. The window WIN may be attached to the input sensing unit ISP by an adhesive OCA. The adhesive OCA may include an optically transparent adhesive. An image generated by the display panel DP may be provided to a user after passing through the window WIN.

[0052] The sensor layer SL may be disposed under the base layer BL of the display panel DP. The sensor layer SL may include at least one sensor. For example, the sensor layer SL may include an optical fingerprint sensor. The optical fingerprint sensor may sense light incident thereto through an optical transmission path defined to pass through the color filter layer CFL, the input sensing unit ISP, and the display panel DP. The optical transmission path will be described in detail later.

[0053] Figure 3 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 2 A plan view of the display panel DP shown in FIG.

[0054] refer to Figure 3 According to an exemplary embodiment, the display panel DP may include a driving circuit GDC, a plurality of signal lines SGL, a plurality of signal pads DP-PD, and a plurality of pixels PX.

[0055] The driving circuit GDC may include a scan driving circuit. The scan driving circuit may generate a plurality of scan signals and may sequentially output the scan signals to a plurality of scan lines GL described later. The scan driving circuit may also output other control signals to the pixel driving circuit of the pixel PX.

[0056] In an exemplary embodiment, the scan driving circuit may include a plurality of thin film transistors formed by the same process (eg, a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process) as the pixel driving circuit of the pixel PX. However, exemplary embodiments of the inventive concept are not limited thereto.

[0057] like Figure 3 As shown in the exemplary embodiment of , the signal line SGL may include a scan line GL, a data line DL, a power line PL, and a control signal line CSL. Each of the scan lines GL may be connected to a corresponding pixel in the pixels PX, and each of the data lines DL may be connected to a corresponding pixel in the pixels PX. The power line PL may be connected to the pixel PX. The control signal line CSL may provide a control signal to the scan driving circuit.

[0058] The signal line SGL may include a plurality of portions disposed on different layers from each other. Figure 3 In the exemplary embodiment shown in , the data line DL includes four portions P1, P2, P3, and P4. The four portions P1, P2, P3, and P4 may be disposed on different layers and connected to each other via the contact hole CNT.

[0059] The signal pads DP-PD may be connected to the data line DL, the power line PL, and the control signal line CSL. The signal pads DP-PD may be disposed adjacent to each other in the pad area DP-E defined in a portion of the non-display area NDA (eg, in the first direction DR1). Figure 3 As shown in the exemplary embodiment of FIG. 1 , the pad area DP-E may be defined in the lower portion of the non-display area NDA (eg, in the second direction DR2 ). The signal pads DP-PD may be formed by the same process without distinguishing their stacked structures or constituent materials from each other.

[0060] The display area DA may be defined as an area in which the pixels PX are arranged. A plurality of electronic components are arranged in the display area DA. The electronic components may include an organic light emitting diode disposed in each pixel PX and a pixel driving circuit connected to the organic light emitting diode.

[0061] In an exemplary embodiment, the pixel PX may include a first transistor T1, a second transistor T2, a capacitor CP, and a light emitting diode OLED. Although the pixel driving circuit of the pixel PX includes a switching transistor and a driving transistor, exemplary embodiments of the pixel driving circuit are not limited to Figure 3 The exemplary embodiment shown in FIG. 1 . The first transistor T1 may be connected to the scan line GL and the data line DL. The light emitting diode OLED may receive a power supply voltage provided through the power supply line PL.

[0062] Figure 3 A circuit board PCB electrically connected to the display panel DP according to an exemplary embodiment of the inventive concept is also illustrated. The circuit board PCB may be a rigid circuit board or a flexible circuit board.

[0063] A timing control circuit TC may be provided on the circuit board PCB to control the operation of the display panel DP. In addition, an input sensing circuit ISL-C may be provided on the circuit board PCB to control the input sensor. In an exemplary embodiment, each of the timing control circuit TC and the input sensing circuit ISL-C may be mounted on the circuit board PCB in the form of an integrated chip. For example, in an exemplary embodiment of the present invention, the timing control circuit TC and the input sensing circuit ISL-C may be mounted on the circuit board PCB in the form of an integrated chip. The circuit board PCB may include a circuit board pad PCB-P electrically connected to the signal pad DP-PD. The circuit board PCB may also include a signal line connecting the circuit board pad PCB-P and the timing control circuit TC and / or the input sensing circuit ISL-C. In addition, the circuit board pad PCB-P may be an output pad, and the circuit board PCB may also include an input pad.

[0064] The signal pads DP-PD of the display panel DP may be electrically connected to the circuit board pads PCB-P through a conductive member such as an anisotropic conductive film ACF. However, exemplary embodiments of the inventive concept are not limited thereto. For example, in an exemplary embodiment, the anisotropic conductive film ACF may be replaced with a conductive ball.

[0065] exist Figure 3 The display panel DP shown in the exemplary embodiment may be partially bent. For example, a portion of the non-display area NDA may be bent about a bending axis substantially parallel to the first direction DR1. The bending axis may be defined to overlap with the third portion P3 of the data line DL.

[0066] Figure 4 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 3 2 is a cross-sectional view of a pixel PX shown in FIG.

[0067] refer to Figure 4 According to an exemplary embodiment, the display panel DP may include a base layer BL, an element layer DEL, a pixel defining layer PDL, a plurality of light emitting elements OLED, and a thin film encapsulation layer TFL. Figure 2 As shown in the exemplary embodiment of FIG. 1 , the pixel layer PXL may be defined by the element layer DEL, the pixel defining layer PDL, and the light emitting element OLED disposed between the base layer BL and the thin film encapsulation layer TFL.

[0068] The base layer BL may include multiple layers. Figure 4 As shown in the exemplary embodiment of FIG. 1 , the base layer BL may include a substrate SUB, a functional layer FL, and a buffer layer BFL which are sequentially stacked (eg, in the third direction DR3 ). However, exemplary embodiments of the inventive concept are not limited thereto.

[0069] The substrate SUB may include a plurality of pixel areas PA and a non-pixel area NPA located around each pixel area PA. Figure 4 Only one pixel area PA is shown, however Figure 5 As shown in FIG. 1 , a plurality of pixel areas PA may be defined in a substrate SUB. A non-pixel area NPA may be disposed to surround each pixel area PA.

[0070] In an exemplary embodiment, the substrate SUB may be a transparent substrate and may include a flexible plastic substrate. For example, the substrate SUB may include polyimide (PI). However, exemplary embodiments of the present inventive concept are not limited thereto.

[0071] like Figure 4As shown in the exemplary embodiment of , the lower surface of the functional layer FL may be directly disposed on the upper surface of the substrate SUB. The functional layer FL may block light. For example, the functional layer FL may have a black color that absorbs light. The functional layer FL may block light from being incident on the substrate SUB to prevent components disposed under the substrate SUB from being observed.

[0072] The buffer layer BFL may improve the coupling force between the substrate SUB and the semiconductor pattern. In an exemplary embodiment, the buffer layer BFL may include a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer may be alternately stacked with each other. However, exemplary embodiments of the inventive concept are not limited thereto.

[0073] The semiconductor pattern may be disposed on the buffer layer BFL. In an exemplary embodiment, the semiconductor pattern may include polycrystalline silicon. However, exemplary embodiments of the inventive concept are not limited thereto or thereby. The semiconductor pattern may include amorphous silicon or metal oxide.

[0074] like Figure 4 As shown in the exemplary embodiment of FIG. 1 , the element layer DEL may include a first transistor T1 , a second transistor T2 , a first insulating layer 10 , a second insulating layer 20 , a third insulating layer 30 , a fourth insulating layer 40 , a fifth insulating layer 50 , and a sixth insulating layer 60 .

[0075] The first source S1, the first active electrode A1, and the first drain D1 of the first transistor T1 may be formed using a semiconductor pattern, and the second source S2, the second active electrode A2, and the second drain D2 of the second transistor T2 may be formed using a semiconductor pattern. The first source S1 and the first drain D1 may extend from the first active electrode A1 in opposite directions (e.g., in the first direction DR1), and the second source S2 and the second drain D2 may extend from the second active electrode A2 in opposite directions (e.g., in the first direction DR1). Figure 4 In an exemplary embodiment, although not shown, the connection signal line SCL may be connected to the second drain D2 of the second transistor T2 when viewed in a plane (eg, in a plane defined in the first and second directions DR1 and DR2).

[0076] The first insulating layer 10 may be disposed on the buffer layer BFL. The first insulating layer 10 may overlap with the pixel PX and may cover the semiconductor pattern. Figure 4As shown in the exemplary embodiment of the present invention, the lower surface of the first insulating layer 10 may directly contact the upper surface of the buffer layer BFL and the upper and side surfaces of the first source S1 and the second source S2, the upper and side surfaces of the first drain D1 and the second drain D2, the upper surface of the first active electrode A1 and the upper surface of the second active electrode A2, and the upper and side surfaces of the connection signal line SCL. The first insulating layer 10 may include an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. In an exemplary embodiment, the first insulating layer 10 may include at least one compound selected from aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. However, the exemplary embodiments of the present inventive concept are not limited thereto. In the present exemplary embodiment, the first insulating layer 10 may be a single silicon oxide layer.

[0077] The first gate G1 and the second gate G2 may be disposed on the first insulating layer 10. The first gate G1 and the second gate G2 may be parts of a metal pattern. The first gate G1 and the second gate G2 overlap the first active electrode A1 and the second active electrode A2, respectively (e.g., in the third direction DR3). The first gate G1 and the second gate G2 may be used as masks in a doping process of the semiconductor pattern.

[0078] The second insulating layer 20 may be disposed on the first insulating layer 10 to cover the first gate G1 and the second gate G2. The second insulating layer 20 may overlap the pixel PX together. Figure 4 As shown in the exemplary embodiment of , the lower surface of the second insulating layer 20 may directly contact the upper surface of the first insulating layer 10 and the upper and side surfaces of the first gate G1 and the upper and side surfaces of the second gate G2. The second insulating layer 20 may include an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. In the exemplary embodiment, the second insulating layer 20 may be a single silicon oxide layer. However, the exemplary embodiments of the inventive concept are not limited thereto.

[0079] An upper electrode UE may be disposed on the second insulating layer 20. The upper electrode UE may overlap the second gate G2 of the second transistor T2 (eg, in the third direction DR3). The upper electrode UE may be part of the metal pattern. The portion of the second gate G2 and the upper electrode UE overlapping the portion of the second gate G2 may define a capacitor CP (refer to Figure 3 ). However, exemplary embodiments of the present inventive concept are not limited thereto. For example, in other exemplary embodiments of the present inventive concept, the upper electrode UE may be omitted.

[0080] The third insulating layer 30 may be disposed on the second insulating layer 20 to cover the upper electrode UE. Figure 4As shown in the exemplary embodiment of the present invention, the lower surface of the third insulating layer 30 may directly contact the upper surface of the second insulating layer 20 and the upper surface and side surface of the upper electrode UE. In the exemplary embodiment, the third insulating layer 30 may be a single silicon oxide layer. The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the connection signal line SCL through a first contact hole CNT-1 that penetrates the first insulating layer 10 to the third insulating layer 30.

[0081] The fourth insulating layer 40 may be disposed on the third insulating layer 30. For example, Figure 4 As shown in the exemplary embodiment of the present invention, the lower surface of the fourth insulating layer 40 may directly contact the upper surface of the third insulating layer 30 and the upper surface and side surface of the first connection electrode CNE1. In the exemplary embodiment, the fourth insulating layer 40 may be a single silicon oxide layer. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. In the exemplary embodiment, the fifth insulating layer 50 may be an organic layer. The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through the second contact hole CNT-2 penetrating the fourth insulating layer 40 and the fifth insulating layer 50.

[0082] The sixth insulating layer 60 may be disposed on the fifth insulating layer 50 to cover the second connection electrode CNE2. Figure 4 As shown in the exemplary embodiment of , the lower surface of the sixth insulating layer 60 may directly contact the upper surface of the fifth insulating layer 50 and the upper surface and side surface of the second connection electrode CNE2. In an exemplary embodiment, the sixth insulating layer 60 may be an organic layer. The light emitting element OLED may be disposed on the sixth insulating layer 60. The first electrode AE ​​of the light emitting element OLED may be connected to the second connection electrode CNE2 through the third contact hole CNT-3 penetrating the sixth insulating layer 60. A plurality of pixel openings OP may be defined to pass through the pixel defining layer PDL. At least a portion of the first electrode AE ​​may be exposed through the pixel opening OP of the pixel defining layer PDL.

[0083] The pixel defining layer PDL may be disposed on the element layer DEL. For example, the pixel defining layer PDL may be disposed on the lateral end of the first electrode AE ​​and the sixth insulating layer 60. The pixel defining layer PDL may overlap with the non-pixel area NPA of the substrate SUB. A plurality of pixel openings OP may be defined to pass through the pixel defining layer PDL to overlap with the pixel area PA.

[0084] In the present exemplary embodiment, the pixel defining layer PDL may block light incident thereto. For example, the pixel defining layer PDL may have a black color.

[0085] The light emitting element OLED may be disposed in a pixel opening OP defined through the pixel defining layer PDL. Figure 4 As shown in the exemplary embodiment of FIG. 1 , the light emitting element OLED may include a first electrode AE, a hole control layer HCL, a light emitting layer EML, an electron control layer ECL, and a second electrode CE.

[0086] The hole control layer HCL may be collectively disposed to overlap with the pixel area PA and the non-pixel area NPA of the substrate SUB. In an exemplary embodiment, the hole control layer HCL may include a hole transport layer, and may further include a hole injection layer. The light emitting layer EML may be disposed on the hole control layer HCL. The light emitting layer EML may be disposed in an area corresponding to the pixel opening OP. For example, the light emitting layer EML may be formed in each of the pixels PX after being divided into a plurality of parts.

[0087] The electron control layer ECL may be disposed on the light emitting layer EML. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. In an exemplary embodiment, the hole control layer HCL and the electron control layer ECL may be formed together in a plurality of pixels PX using an open mask. The second electrode CE may be disposed on the electron control layer ECL. The second electrode CE may have a single integral form and may be disposed together in a plurality of pixels PX. The thin film encapsulation layer TFL may be disposed on the second electrode CE.

[0088] Figure 5 It is shown Figure 4 The pixel area PA shown in FIG. 1 is arranged in a plan view of a structure in which a plurality of pixel areas PA are provided, and Figure 6 is along Figure 5 A cross-sectional view taken along line II' shown in FIG.

[0089] For ease of explanation, Figure 6 The element layer DEL and the light emitting element OLED are schematically shown.

[0090] refer to Figure 5 In an exemplary embodiment of the present invention, the pixel areas PA may be arranged in a diagonal direction. For example, the pixel areas PA may be arranged in a first diagonal direction DDR1 or a second diagonal direction DDR2 to be spaced apart from each other.

[0091] The first diagonal direction DDR1 may be defined as a direction inclined relative to the first direction DR1 and the second direction DR2 on a plane defined by the first direction DR1 and the second direction DR2. The second diagonal direction DDR2 may be defined as a direction crossing the first diagonal direction DDR1 on a plane defined by the first direction DR1 and the second direction DR2. For example, in an exemplary embodiment, the first direction DR1 and the second direction DR2 may cross each other perpendicularly, and the first diagonal direction DDR1 and the second diagonal direction DDR2 may cross each other perpendicularly. However, exemplary embodiments of the inventive concept are not limited thereto.

[0092] The pixel area PA may include a first pixel area PA1, a second pixel area PA2, and a third pixel area PA3. In an exemplary embodiment, the display panel DP may emit light of different colors from each other in the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3, respectively. For example, in an exemplary embodiment, the display panel DP may emit red light in the first pixel area PA1, the display panel DP may emit green light in the second pixel area PA2, and the display panel DP may emit blue light in the third pixel area PA3. However, exemplary embodiments of the inventive concept are not limited thereto, and the colors of the light emitted by the display panel DP in the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3 may vary.

[0093] When viewed in a plane (e.g., in a plane defined by the first direction DR1 and the second direction DR2), each of the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3 may have a polygonal shape. For example, when viewed in a plane, each of the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3 may have a rhombus shape. However, exemplary embodiments of the inventive concept are not limited thereto, and the shape of the pixel area PA may vary.

[0094] In an exemplary embodiment, the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3 may have sizes different from each other. Figure 5 As shown in the exemplary embodiment of the present invention, the third pixel area PA3 may have a maximum size (e.g., an area in a plane defined by the first direction DR1 and the second direction DR2), the second pixel area PA2 may have a minimum size, and the first pixel area PA1 may have an intermediate size between the second pixel area PA2 and the third pixel area PA3. However, the exemplary embodiments of the present inventive concept are not limited thereto, and the size relationship between the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3 may vary. For example, when viewed in a plane, the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3 may have the same size.

[0095] The non-pixel area NPA may surround the pixel area PA. The non-pixel area NPA may include a plurality of first areas NPA-1 and second areas NPA-2.

[0096] The first area NPA-1 of the non-pixel area NPA may be defined in a partial portion of an area between the first pixel area PA1 and the second pixel area PA2. However, the first area NPA-1 may not be disposed in the entire space between the first pixel area PA1 and the second pixel area PA2. In an exemplary embodiment, the first area NPA-1 may be designed and arranged in a predetermined number per unit area.

[0097] refer to Figure 6 According to an exemplary embodiment, the light emitting element OLED may include a first light emitting element OLED1, a second light emitting element OLED2, and a third light emitting element OLED3.

[0098] The first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3 may generate light having different colors from each other. For example, in an exemplary embodiment, the first light emitting element OLED1 may generate light having red, the second light emitting element OLED2 may generate light having green, and the third light emitting element OLED3 may generate light having blue. However, the exemplary embodiments of the present inventive concept are not limited thereto, and the color of the light generated by the first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3 may vary. For example, in another exemplary embodiment, the first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3 may generate light having magenta, cyan, or white.

[0099] The light emitting element OLED may overlap with the pixel area PA of the substrate SUB (eg, in the third direction DR3). Figure 6 As shown in the exemplary embodiment of , the first light emitting element OLED1 may overlap the first pixel area PA1, the second light emitting element OLED2 may overlap the second pixel area PA2, and the third light emitting element OLED3 may overlap the third pixel area PA3. The pixel defining layer PDL may overlap the non-pixel area NPA (e.g., in the third direction DR3).

[0100] A plurality of first holes H1 (reference Figure 5 ) may be defined to pass through the functional layer FL. The first hole H1 may overlap the first area NPA-1 of the non-pixel area NPA of the substrate SUB.

[0101] A plurality of second holes H2 may be defined to pass through the pixel defining layer PDL. The second holes H2 may overlap the first holes H1 and the first area NPA-1 of the substrate SUB (e.g., in the third direction DR3). In an exemplary embodiment, each of the first holes H1 and each of the second holes H2 has a polygonal shape or a circular shape when viewed in a plane (e.g., a plane defined by the first direction DR1 and the second direction DR2).

[0102] Each of the second holes H2 may include a first portion HP1 and a second portion HP2. The first portion HP1 may be located on a lower end of the second hole H2 (eg, in the third direction DR3), and the second portion HP2 may be located on an upper end of the second hole H2 (eg, in the third direction DR3). Figure 6 As shown in the exemplary embodiment of the present invention, the width of the second portion HP2 in the first direction DR1 or the second direction DR2 may be greater than the width of the first portion HP1 in the first direction DR1 or the second direction DR2. For example, each of the second holes H2 may have a shape in which the width of each of the second holes H2 becomes narrower as the distance from the substrate SUB (for example, in the third direction DR3) decreases from the second portion HP2 to the first portion HP1. In an exemplary embodiment, the second hole H2 may be filled with a transparent insulating material. For example, the second hole H2 may be filled with an insulating material such as a spacer SR.

[0103] According to the present exemplary embodiment, the first area NPA-1 may be defined as a light-transmitting area. Light incident to the first area NPA-1 may reach the sensor layer SL (refer to FIG. 1 ) disposed under the substrate SUB after passing through the second hole H2 and the first hole H1. Figure 2 ). In the display panel DP, the first hole H1 and the second hole H2 may define an optical transmission path.

[0104] According to an exemplary embodiment of the present invention, a spacer SR may be disposed on the pixel defining layer PDL. The spacer SR may include a transparent material. For example, in an exemplary embodiment, the spacer SR may include a transparent organic insulating material. The spacer SR may protect the first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3 and the element layer DEL to prevent the display characteristics of the display panel DP from being degraded. For example, the spacer SR may buffer external forces acting on the first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3. Although Figure 6 The exemplary embodiment includes a spacer SR disposed on the pixel defining layer PDL and overlapping both the first area NPA-1 and the second area NPA-2 (for example, in the third direction DR3), but the exemplary embodiments of the inventive concept are not limited thereto. In the exemplary embodiment, the spacer SR may be disposed on the pixel defining layer PDL and overlap at least one area selected from the first area NPA-1 and the second area NPA-2.

[0105] Figure 7 is a diagram showing the direction of the first direction DR1 and the second direction DR2 when viewed in a plane defined Figure 5 A view of the first area NPA-1 shown in FIG. 1 , and Figure 8 It is shown Figure 5 A cross-sectional view of the first area NPA-1 is shown in FIG.

[0106] refer to Figure 7 and Figure 8 In an exemplary embodiment, the first hole H1 defined to pass through the functional layer FL and the second hole H2 defined to pass through the pixel defining layer PDL may overlap with the first area NPA-1 of the substrate SUB (e.g., in the third direction DR3). When viewed in a plane (e.g., a plane defined by the first direction DR1 and the second direction DR2), the size of each of the second holes H2 may be larger than the size of each of the first holes H1. For example, in the plane defined by the first direction DR1 and the second direction DR2, the area of ​​the second hole H2 may be larger than the area of ​​the first hole H1.

[0107] like Figure 7 As shown in the exemplary embodiment of , the first hole H1 may have a first width W1 in the first direction DR1. The first width W1 may have a predetermined size. For example, the first width W1 may be several micrometers. For example, the first width W1 may be 2 to 7 micrometers. However, exemplary embodiments of the inventive concept are not limited thereto.

[0108] The first portion HP1 and the second portion HP2 of the second hole H2 may have a second width W2 and a third width W3 in the first direction DR1, respectively. Figure 7 As shown in the exemplary embodiment of , the third width W3 may be greater than the second width W2. In the exemplary embodiment, the second width W2 and the third width W3 may be determined according to the size of the first width W1, the distance from the first hole H1, and the maximum incident angle θ of light.

[0109] For example, the second width W2 and the third width W3 may satisfy the following Relational Expression 1 and Relational Expression 2.

[0110] Relational expression 1

[0111] W2>W1+2×L1×tan(θ)

[0112] Relational expression 2

[0113] W3>W1+2×L2×tan(θ)

[0114] In relational expressions 1 and 2, W1 represents the width of the first hole H1 in the first direction DR1. W2 represents the width of the first portion HP1 of the second hole H2 in the first direction DR1. W3 represents the width of the second portion HP2 of the second hole H2 in the first direction DR1.

[0115] The first distance L1 may be a vertical distance from the upper end of the first hole H1 to the first portion HP1 (e.g., a length in the third direction DR3). For example, the first distance L1 may be a vertical distance from the upper surface of the functional layer FL to the lower end of the pixel defining layer PDL. The second distance L2 may be a vertical distance from the upper end of the first hole H1 to the second portion HP2. For example, the second distance L2 may be a vertical distance from the upper surface of the functional layer FL to the upper end of the pixel defining layer PDL.

[0116] The maximum incident angle θ may be a maximum angle formed by the light incident to the first hole H1 and the vertical direction (eg, the third direction DR3). Figure 8 As shown in the exemplary embodiment of , the first path LI1 of the first light and the second path LI2 of the second light may form a maximum incident angle θ with a vertical direction (e.g., a third direction DR3). In the path of the light incident to the first hole H1, the first path LI1 of the first light and the second path LI2 of the second light may form a maximum angle. The light incident to the first hole H1 and the second hole H2 may be incident along a path defined between the first path LI1 and the second path LI2.

[0117] The light incident through the optical transmission path may be light generated by the first light emitting element OLED1 , the second light emitting element OLED2 , and the third light emitting element OLED3 and incident again on the display panel DP after being reflected from an external object.

[0118] In an exemplary embodiment, the widths of the first portion HP1 and the second portion HP2 of the second hole H2 in the second direction DR2 may similarly satisfy Relational Expression 1 and Relational Expression 2.

[0119] For example, the widths of the first portion HP1 and the second portion HP2 in the second direction DR2 may be determined based on the width of the first hole H1 in the second direction DR2, the distance from the upper end of the first hole H1 to the first portion HP1 or the second portion HP2, and the maximum angle formed by light incident to the first hole H1 and the vertical direction.

[0120] Fig. 9 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 2 A plan view of the input sensing unit ISP shown in FIG.

[0121] refer to Fig. 9 In an exemplary embodiment, the input sensing unit ISP may include a plurality of first and second sensing electrodes SE1 and SE2, a plurality of first and second lines SL1 and SL2, and a plurality of pads PD. The first and second sensing electrodes SE1 and SE2, the first and second lines SL1 and SL2, and the pads PD may be disposed on the thin film encapsulation layer TFL.

[0122] When viewed in a plane (e.g., a plane defined in the first direction DR1 and the second direction DR2), the input sensing unit ISP may include an active area AA and a non-active area NAA surrounding the active area AA. The first sensing electrode SE1 and the second sensing electrode SE2 may be disposed in the active area AA, and the pad PD may be disposed in the non-active area NAA. The first line SL1 and the second line SL2 may be connected to the first sensing electrode SE1 and the second sensing electrode SE2, and may extend to the non-active area NAA to be connected to the pad PD.

[0123] In an exemplary embodiment, the pad PD may be connected to a driver driving the input sensing unit ISP through a flexible printed circuit board.

[0124] The first sensing electrodes SE1 and the second sensing electrodes SE2 may include a plurality of first sensing electrodes SE1 extending in the second direction DR2 and arranged in the first direction DR1 and a plurality of second sensing electrodes SE2 extending in the first direction DR1 and arranged in the second direction DR2. The first lines SL1 and the second lines SL2 may include a plurality of first lines SL1 connected to the first sensing electrodes SE1 and a plurality of second lines SL2 connected to the second sensing electrodes SE2.

[0125] The second sensing electrode SE2 may extend to cross the first sensing electrode SE1 and may be insulated from the first sensing electrode SE1. In an exemplary embodiment, the first sensing electrode SE1 may be defined as an output sensing electrode, and the second sensing electrode SE2 may be defined as an input sensing electrode.

[0126] Each of the first sensing electrodes SE1 may include a plurality of first sensor parts SP1 arranged in the second direction DR2 and a plurality of first connection parts CP1 connecting the first sensor parts SP1. Each of the first connection parts CP1 may be disposed between two first sensor parts SP1 adjacent to each other (e.g., in the second direction DR2), and may electrically connect the two first sensor parts SP1.

[0127] Each of the second sensing electrodes SE2 may include a plurality of second sensor portions SP2 arranged in the first direction DR1 and a plurality of second connection portions CP2 connecting the second sensor portions SP2. Each of the second connection portions CP2 may be disposed between two second sensor portions SP2 adjacent to each other (e.g., in the first direction DR1), and may electrically connect the two second sensor portions SP2.

[0128] In an exemplary embodiment, the first sensor part SP1 and the second sensor part SP2 may have a grid shape. The first sensor part SP1 and the second sensor part SP2 may not overlap each other (e.g., in the third direction DR3), may be spaced apart from each other (e.g., in the first direction DR1 and the second direction DR2), and may be alternately arranged with each other. The second connection part CP2 may be insulated from the first connection part CP1 while crossing the first connection part CP1.

[0129] In an exemplary embodiment, the first and second sensor parts SP1 and SP2 and the first connection part CP1 may be disposed on the same layer. The second connection part CP2 may be disposed on a layer different from the layer on which the first and second sensor parts SP1 and SP2 and the first connection part CP1 are disposed.

[0130] The first lines SL1 may be connected to the first ends of the first sensing electrodes SE1, respectively, and may extend to the non-active area NAA to be connected to the pads PD. Fig. 9 As shown in the exemplary embodiment of FIG. 1 , the first end of the first sensing electrode SE1 may be the lower end of the first sensing electrode SE1 (for example, in the second direction DR2). However, the exemplary embodiments of the present inventive concept are not limited thereto. The second lines SL2 may be connected to the first ends of the second sensing electrodes SE2, respectively, and may extend to the non-active area NAA to be connected to the pad PD. For example, as Fig. 9 As shown in the exemplary embodiment of FIG. 1 , the first end of the second sensing electrode SE2 may be the leftmost end (eg, in the first direction DR1 ) of the second sensing electrode SE2 . However, exemplary embodiments of the inventive concept are not limited thereto.

[0131] Fig.10 It is shown Fig. 9 An enlarged view of the configuration of the first sensor portion SP1 and the second sensor portion SP2 shown in FIG. 1 , and Fig.11 is along Fig.10 A cross-sectional view taken along line II-II' shown in FIG.

[0132] Fig.10 Two first sensor parts SP1 adjacent to each other and two second sensor parts SP2 adjacent to each other are shown as a representative example.

[0133] refer to Fig.10 In an exemplary embodiment, the first sensor part SP1 and the second sensor part SP2 may have a grid shape. For example, each of the first sensor part SP1 and the second sensor part SP2 may include a plurality of first branch parts BP1 extending in a first diagonal direction DDR1 and a plurality of second branch parts BP2 extending in a second diagonal direction DDR2.

[0134] The first branch portion BP1 of each of the first sensor portion SP1 and the second sensor portion SP2 may intersect with the second branch portion BP2 and may be formed integrally with the second branch portion BP2. An opening TOP each having a rhombus shape may be defined by the first branch portion BP1 and the second branch portion BP2 intersecting each other. The first branch portion BP1 and the second branch portion BP2 may be defined as grid lines, and each grid line may have a line width of several micrometers.

[0135] Adjacent first sensor portions SP1 may be connected to each other through first connection portions CP1. The first sensor portions SP1 may be integrally formed with the first connection portions CP1. In an exemplary embodiment, the first connection portions CP1 may have a mesh shape and may extend from the first sensor portions SP1.

[0136] The second sensor parts SP2 may be electrically connected to each other through the second connection parts CP2. In an exemplary embodiment, the second sensor parts SP2 may not be integrally formed with the second connection parts CP2. The second connection parts CP2 may be connected to the second sensor parts SP2 through a plurality of contact holes TS-CH.

[0137] refer to Fig.11 In an exemplary embodiment, the second connection portion CP2 may be disposed on the thin film encapsulation layer TFL. Fig.11 As shown in the exemplary embodiment of FIG. 1 , the lower surface of the second connection portion CP2 may directly contact the upper surface of the thin film encapsulation layer TFL. A seventh insulating layer 70 may be disposed on the thin film encapsulation layer TFL to cover the second connection portion CP2. Fig.11 As shown in the exemplary embodiment of FIG. 1 , the lower portion of the seventh insulating layer 70 directly contacts the upper portion of the thin film encapsulation layer TFL and the upper portion and the side portion of the second connection portion CP2. The first connection portion CP1 and the second sensor portion SP2 may be disposed on the seventh insulating layer 70. The first sensor portion SP1 integrally connected to the first connection portion CP1 may also be disposed on the seventh insulating layer 70. An eighth insulating layer 80 may be disposed on the seventh insulating layer 70 to cover the first connection portion CP1 and the second sensor portion SP2. For example, as Fig.11 In the exemplary embodiment shown in FIG. 8 , the lower surface of the eighth insulating layer 80 may directly contact the upper and side surfaces of the first connection portion CP1 and the upper and side surfaces of the second sensor portion SP2 .

[0138] The second connection portion CP2 may be connected to the second sensor portion SP2 through a contact hole TS-CH defined through the seventh insulating layer 70. Opposite lateral sides of the second connection portion CP2 may be connected to the second sensor portion SP2 through the contact hole TS-CH.

[0139] Fig.12 is a diagram showing an exemplary embodiment according to the present inventive concept Fig. 9 An enlarged plan view of the area E1 shown in FIG.

[0140] Fig.12 is a diagram showing an exemplary embodiment according to the present inventive concept Figure 5 FIG. 4 is a diagram of an arrangement of sensing electrodes SE1 and SE2 between pixel areas PA shown in FIG.

[0141] refer to Fig.12 In an exemplary embodiment, the input sensing unit ISP may include a first sensing electrode SE1 and a second sensing electrode SE2 overlapping the non-pixel area NPA. For example, the first sensing electrode SE1 and the second sensing electrode SE2 may be disposed between the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3.

[0142] The first sensing electrode SE1 and the second sensing electrode SE2 may overlap with the second area NPA-2 of the non-pixel area NPA (for example, in the third direction DR3), and may not overlap with the first area NPA-1, wherein the first area NPA-1 overlaps with the first hole H1 and the second hole H2. For example, the first sensing electrode SE1 and the second sensing electrode SE2 may be disposed in an area of ​​the input sensing unit ISP that overlaps with the second area NPA-2. The first sensing electrode SE1 and the second sensing electrode SE2 may not be disposed in an area of ​​the input sensing unit ISP that overlaps with the first area NPA-1. According to the present exemplary embodiment, since the first sensing electrode SE1 and the second sensing electrode SE2 are not disposed in an area that overlaps with the first area NPA-1, a first light-transmitting area PP1 that overlaps with the first area NPA-1 (for example, in the third direction DR3) may be defined on the input sensing unit ISP.

[0143] Fig.13 is a cross-sectional view illustrating a display device DD according to an exemplary embodiment of the inventive concept.

[0144] Fig.13 The input sensing unit ISP, the color filter layer CFL and the window WIN are shown in FIG. Figure 6 The structure on the display panel DP shown in the exemplary embodiment of FIG. Figure 6 Any further repeated description of the same elements.

[0145] refer to Fig.12 and Fig.13In an exemplary embodiment, the first sensing electrode SE1 and the second sensing electrode SE2 of the input sensing unit ISP may be disposed to overlap with the second area NPA-2 of the non-pixel area NPA (e.g., in the third direction DR3). The first sensing electrode SE1 and the second sensing electrode SE2 may not be disposed in an area overlapping with the first area NPA-1 of the non-pixel area NPA. Fig.13 It is shown that the second sensing electrode SE2 is disposed on (eg, directly disposed on) the seventh insulating layer 70, and the first sensing electrode SE1 may not be disposed in the region overlapping with the first region NPA-1 (refer to Fig.12 ).

[0146] The color filter layer CFL may include a color filter CF, and the color filter CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The first color filter CF1 may be arranged to overlap with the first light emitting element OLED1 (for example, in the third direction DR3). The second color filter CF2 may be arranged to overlap with the second light emitting element OLED2 (for example, in the third direction DR3). The third color filter CF3 may be arranged to overlap with the third light emitting element OLED3 (for example, in the third direction DR3). For example, the first color filter CF1 may be a red color filter that transmits red light, the second color filter CF2 may be a green color filter that transmits green light, and the third color filter CF3 may be a blue color filter that transmits blue light.

[0147] The color filter layer CFL may further include a black matrix BM and a ninth insulating layer 90. The black matrix BM may be disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3. The black matrix BM may be disposed to overlap the first sensing electrode SE1 and the second sensing electrode SE2. For example, the black matrix BM may be disposed to overlap the second area NPA-2 of the non-pixel area NPA. The black matrix BM may not be disposed in an area overlapping the first area NPA-1.

[0148] The black matrix BM may block light incident to the second area NPA-2 of the non-pixel area NPA. For example, the black matrix BM may have a black color. According to the present exemplary embodiment, since the black matrix BM that blocks light is not disposed in the area overlapping the first area NPA-1, a second light-transmitting area PP2 overlapping the first area NPA-1 may be defined in the color filter layer CFL.

[0149] A sub-color filter SCF may be provided in an area overlapping with the first area NPA-1 (e.g., in the third direction DR3). The sub-color filter SCF may extend from the second color filter CF2 provided adjacent to the first area NPA-1 to the first pixel area PA1. In an exemplary embodiment, the sub-color filter SCF may be the same color filter as the second color filter CF2. For example, the sub-color filter SCF may be a green color filter. When viewed in a plane, the sub-color filter SCF may have substantially the same area as the first area NPA-1. When viewed in a plane (e.g., in a plane defined in the first direction DR1 and the second direction DR2), the first hole H1 and the second hole H2 may overlap with the sub-color filter SCF (e.g., in the third direction DR3).

[0150] Fig.14 is a diagram showing an exemplary embodiment according to the present inventive concept when viewed in a plane Fig.13 A plan view of the first area NPA-1 shown in FIG. Fig.15 is a diagram showing an exemplary embodiment according to the present inventive concept Fig.13 A cross-sectional view of the first area NPA-1 is shown in FIG.

[0151] refer to Fig.14 and Fig.15 In an exemplary embodiment, the first area NPA-1 of the non-pixel area NPA may be defined as a light-transmitting area. The optical transmission path may be defined by the first hole H1 and the second hole H2 overlapping the first area NPA-1, the first light-transmitting area PP1 defined in the input sensing unit ISP, and the second light-transmitting area PP2 defined in the color filter layer CFL. When viewed in a plane, the first light-transmitting area PP1 and the second light-transmitting area PP2 may have a polygonal shape. For example, the first light-transmitting area PP1 and the second light-transmitting area PP2 may have a rectangular shape. However, exemplary embodiments of the inventive concept are not limited thereto.

[0152] External light may be incident to the first area NPA-1 and may reach the sensor layer SL after passing through the optical transmission path. When viewed in a plane, the sub-color filter SCF of the color filter layer CFL, at least a portion of the input sensing unit ISP, the second hole H2 of the pixel defining layer PDL, and the first hole H1 of the functional layer FL may be exposed through the first area NPA-1.

[0153] In an exemplary embodiment, the first hole H1 and the second hole H2 are regions in which substantially no material exists, and the insulating layers 70, 80, and 90 and the sub-color filter SCF may be disposed in the first light-transmitting region PP1 and the second light-transmitting region PP2, respectively. However, the first light-transmitting region PP1 and the second light-transmitting region PP2 may transmit light incident to the first region NPA-1 downward (e.g., in a direction toward the substrate SUB).

[0154] The fourth width W4 of the first light-transmitting region PP1 and the fifth width W5 of the second light-transmitting region PP2 may satisfy the following relational expressions 3 and 4. In relational expressions 3 and 4, Fig.14 and Fig.15 As shown in , the fourth width W4 represents the width of the first light-transmitting region PP1 in the first direction DR1, and the fifth width W5 represents the width of the second light-transmitting region PP2 in the first direction DR1. For example, the fourth width W4 may represent the width of the first light-transmitting region PP1 on the upper surface of the input sensing unit ISP, and the fifth width W5 may represent the width of the second light-transmitting region PP2 on the upper surface of the sub-color filter SCF of the color filter layer CFL.

[0155] Relational expression 3

[0156] W4>W1+2×L3×tan(θ)

[0157] Relational Expression 4

[0158] W5>W1+2×L4×tan(θ)

[0159] In the above Relational Expression 3 and Relational Expression 4, W1 represents the width of the first hole H1 in the first direction DR1, W4 represents the width of the first light-transmitting region PP1 in the first direction DR1, and W5 represents the width of the second light-transmitting region PP2 in the first direction DR1.

[0160] The third distance L3 may be a vertical distance from the upper end of the first hole H1 to the upper surface of the input sensing unit ISP (e.g., a length in the third direction DR3). The fourth distance L4 may be a vertical distance from the upper end of the first hole H1 to the upper surface of the color filter layer CFL (e.g., a length in the third direction DR3).

[0161] The maximum incident angle θ may be a maximum angle formed by the light incident to the first hole H1 and the vertical direction (e.g., in the third direction DR3). For example, the first path LI1 of the first light and the second path LI2 of the second light may form a maximum incident angle θ with the vertical direction. In the path of the light incident to the first hole H1, the first path LI1 of the first light and the second path LI2 of the second light may form a maximum angle. The light incident to the first hole H1 and the second hole H2 may be incident along an optical transmission path defined between the first path LI1 and the second path LI2.

[0162] In example embodiments, widths of the first and second light-transmitting regions PP1 and PP2 in the second direction DR2 may similarly satisfy the above Relational Expression 3 and Relational Expression 4.

[0163] According to an exemplary embodiment of the inventive concept, in a display device DD including a color filter layer CFL and a pixel defining layer PDL having a black color, an optical transmission path is formed by the first hole H1 of the functional layer FL, the second hole H2 of the pixel defining layer PDL, the first light-transmitting area PP1 of the input sensing unit ISP, and the second light-transmitting area PP2 of the color filter layer CFL, and thus, external light can easily reach the sensor layer SL. Therefore, the sensor layer SL can be stably operated.

[0164] Figures 16 to 18 is a cross-sectional view showing display devices DD-1 and DD-2 according to an exemplary embodiment of the inventive concept. Figures 16 to 18 Display devices DD-1 and DD-2 according to exemplary embodiments different from the above-described embodiments are described.

[0165] exist Figures 16 to 18 In the exemplary embodiment of the present invention, the same reference numerals denote the same elements of the above-mentioned embodiment, and therefore, detailed description of the same elements will be omitted. Figures 16 to 18 Components disposed on the display panels DP-1 and DP-2, such as an input sensing unit, a window, etc., are omitted.

[0166] refer to Fig.16 In an exemplary embodiment, the display device DD-1 may not include the spacer SR in the area overlapping with the first area NPA-1 (refer to Figure 6 ). As described above, the first area NPA-1 may be defined as a light-transmitting area.

[0167] In the present exemplary embodiment, the second hole H2-1 may be filled with a portion of the thin film encapsulation layer TFL and a portion of the second electrode CE-1 of the light emitting element OLED. For example, a portion of the second electrode CE-1 overlapping the second hole H2-1 may be disposed on the inclined surface IF of the pixel defining layer PDL and an upper portion of the element layer DEL. The upper portion of the element layer DEL may be a sixth insulating layer 60 (refer to Figure 4 ).

[0168] The portion of the thin film encapsulation layer TFL may be disposed on the portion of the second electrode CE-1 disposed in the second hole H2-1. Therefore, the portion of the thin film encapsulation layer TFL overlapping the second hole H2-1 may protrude more downward toward the substrate SUB in the third direction DR3 than other portions of the thin film encapsulation layer TFL. For example, the portion of the thin film encapsulation layer TFL overlapping the second hole H2-1 may have the lowest height of the thin film encapsulation layer TFL.

[0169] The second electrode CE-1 and the thin film encapsulation layer TFL disposed to overlap the second hole H2-1 may include a transparent material. Therefore, part of the light incident to the display panel DP-1 may reach the sensor layer SL through the second hole H2-1 and the first hole H1 (refer to Figure 2 ).

[0170] refer to Fig.17 and Fig.18 In an exemplary embodiment, the display device DD-2 may include an encapsulation substrate ES. The encapsulation substrate ES may be disposed on the base layer BL. For example, the encapsulation substrate ES may be spaced apart from the pixel layer PXL disposed on the base layer BL in an upward direction (e.g., a third direction DR3). The encapsulation substrate ES may be a transparent substrate. For example, the encapsulation substrate ES may include a glass substrate.

[0171] like Fig.17 As shown in the exemplary embodiment of , the color filter layer CFL-2 may be disposed between the encapsulation substrate ES and the pixel layer PXL (eg, in the third direction DR3). The color filter layer CFL-2 may be disposed on a first surface facing the base layer BL among the opposite surfaces of the encapsulation substrate ES.

[0172] like Fig.18 As shown in the exemplary embodiment of FIG. 1 , the color filter layer CFL-2 may include first, second and third color filters CF1-2, CF2-2 and CF3-2, a black matrix BM-2 and an insulating film INF.

[0173] The first color filter CF1-2, the second color filter CF2-2, and the third color filter CF3-2 may be disposed under the encapsulation substrate ES. Each of the first color filter CF1-2, the second color filter CF2-2, and the third color filter CF3-2 may overlap with a corresponding light emitting element of the first light emitting element OLED1, the second light emitting element OLED2, and the third light emitting element OLED3.

[0174] The black matrix BM-2 may be disposed between the first color filter CF1-2, the second color filter CF2-2, and the third color filter CF3-2. However, the black matrix BM-2 may not be disposed in a region overlapping the first region NPA-1.

[0175] The sub-color filter SCF-2 may be disposed in a region of the color filter layer CFL-2 that overlaps the first region NPA-1. The sub-color filter SCF-2 may extend from the second color filter CF2-2. For example, when viewed in a plane, the sub-color filter SCF-2 may have the same area as that of the first region NPA-1 and may overlap the first hole H1 and the second hole H2.

[0176] The insulating film INF may be disposed below the first color filter CF1-2, the second color filter CF2-2, and the third color filter CF3-2 and the black matrix BM-2. The insulating film INF may compensate for the step difference between the first color filter CF1-2, the second color filter CF2-2, and the third color filter CF3-2 and the black matrix BM-2 to allow one surface (e.g., the lower surface in the third direction DR3) of the color filter layer CFL-2 to be flat.

[0177] exist Fig.18 In the exemplary embodiment of the present invention, the color filter layer CFL-2 is disposed under the encapsulation substrate ES. However, the exemplary embodiments of the present inventive concept are not limited thereto, and the position of the color filter layer CFL-2 may vary. The color filter layer CFL-2 may be disposed on the encapsulation substrate ES.

[0178] The display panel DP-2 of the display device DD-2 may include a sealing portion SEL. The sealing portion SEL may be disposed between the base layer BL and the encapsulation substrate ES. The sealing portion SEL may surround the pixel layer PXL. For example, the sealing portion SEL may be disposed to overlap the non-display area NDA.

[0179] A gap may be formed between the sealing portion SEL, the base layer BL, and the encapsulation substrate ES. The gap may be filled with air or an inert gas. The sealing portion SEL may protect the pixel layer PXL disposed on the base layer BL.

[0180] Although exemplary embodiments of the inventive concept have been described, it should be understood that the inventive concept should not be limited to these exemplary embodiments, but that a person skilled in the art may make various changes and modifications within the spirit and scope of the present disclosure. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein.

Claims

1. A display device, comprising: A plurality of light-emitting elements, each comprising a first electrode, a second electrode and a light-emitting layer between the first electrode and the second electrode; a pixel defining layer including a plurality of pixel openings and a hole, the plurality of pixel openings each exposing at least a portion of the first electrode, the hole being spaced apart from the pixel openings and located between two of the first electrodes adjacent to each other; as well as a color filter layer disposed on the light emitting element and comprising a first color filter overlapping one of the pixel openings, extending toward the hole and overlapping the hole, Wherein, the second electrode is formed integrally and overlaps with the hole. 2 . The display device according to claim 1 , further comprising a thin film encapsulation layer disposed between the plurality of light emitting elements and the color filter layer.

3. The display device according to claim 2, further comprising an input sensing unit disposed between the thin film encapsulation layer and the color filter layer, wherein: The input sensing unit includes a plurality of sensing electrodes spaced apart from the pixel opening and the hole in a plan view.

4. The display device according to claim 1, wherein: The plurality of light emitting elements include: a plurality of first light emitting elements, each overlapping with a first pixel opening of the pixel opening and each configured to generate light having a red color; a plurality of second light emitting elements, each overlapping with a second pixel opening spaced apart from the first pixel opening and each configured to generate light having a green color; and A plurality of third light emitting elements overlap with third pixel openings spaced apart from the first pixel opening and the second pixel opening, respectively, and are each configured to generate light having a blue color.

5. The display device according to claim 4, wherein: The hole is provided in a partial portion of a region between the first pixel opening and the second pixel opening.

6. The display device according to claim 4, wherein: The color filter layer comprises: a plurality of first color filters respectively overlapping the first light emitting elements, each of the first color filters being a red color filter; a plurality of second color filters respectively overlapping the second light emitting elements, each of the second color filters being a green color filter; a plurality of third color filters respectively overlapping the third light emitting elements, each of the third color filters being a blue color filter; and a black matrix disposed between the first color filter, the second color filter and the third color filter, and Wherein, the black matrix is ​​spaced apart from the hole in a plan view.

7. The display device according to claim 4, further comprising a spacer disposed on the pixel defining layer, wherein: The spacer is spaced apart from the pixel opening in a plan view. The display device according to claim 1 , further comprising a sensor layer overlapping the hole.

9. The display device according to claim 8, wherein: The sensor layer detects light incident on the sensor layer through the hole. 10 . The display device according to claim 9 , further comprising a functional layer overlapping with the second electrode in a plan view.

11. The display device according to claim 10, wherein: At least one of the pixel defining layer and the functional layer has a black color.

12. The display device according to claim 10, further comprising: a substrate, located below the functional layer, The sensor layer is disposed below the substrate, and the sensor layer includes at least one optical fingerprint sensor overlapping the hole.

13. The display device according to claim 12, wherein: The sensor layer overlaps the pixel opening.

14. The display device according to claim 12, wherein: The functional layer also includes a first hole defined through the functional layer.

15. The display device according to claim 14, wherein: The first hole overlaps the hole.

16. The display device according to claim 15, wherein: In a plan view, the area of ​​the hole is larger than the area of ​​the first hole.

17. The display device according to claim 15, wherein: The hole comprises: a first portion located on a lower end of the hole; and The second part, located on the upper end of the hole, Wherein, in a plan view, the second portion has an area larger than an area of ​​the first portion, and the area of ​​the first portion and the area of ​​the second portion are defined in a first direction and a second direction which are parallel to an upper surface of the substrate and intersect each other.

18. The display device according to claim 17, wherein: The hole has a width that gradually decreases from the second portion to the first portion.

19. The display device according to claim 17, wherein: The width of the first portion and the width of the second portion satisfy the following equations 1 and 2: <Equation 1> W2>W1+2×L1×tan(θ) <Equation 2> W3>W1+2×L2×tan(θ) Wherein, W1 is the width of the first hole, W2 is the width of the first part, W3 is the width of the second part, L1 is the vertical distance from the first hole to the first part, L2 is the vertical distance from the first hole to the second part, and θ is the maximum angle defined by the light incident on the first hole and the vertical direction.

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