Differential input and differential output type inverting amplifier circuit and measurement device

Abstract

According to the invention, high-frequency common-mode voltage is removed. An inverting amplifier circuit (1) provided with a signal input unit and a signal output unit, the inverting amplifier circuit (1) being provided with: operational amplifiers (OP1-OP4); resistors (R1, R2) connected in series between the signal input units; and a resistor (R3) connected between the connection point (P1) and the intermediate potential, and the operational amplifier (OP1) is configured such that the inverting input terminal is connected to the signal input unit via a resistor (R4) and to the output terminal via a resistor (R5), the non-inverting input terminal is connected to the connection point (P1), and the output terminal is connected to the signal output unit. The operational amplifier (OP2) is configured such that the inverting input terminal is connected to the signal input unit via a resistor (R6) and to the output terminal via a resistor (R7), the non-inverting input terminal is connected to the connection point (P1), and the output terminal is connected to the signal output unit.

Description

Technical Field

[0001] The present invention relates to a differential input differential output type inverting amplifier circuit and a measuring device. The differential input differential output type inverting amplifier circuit inputs a pair of differential input signals, inverts and amplifies the pair of differential input signals and outputs them as a pair of differential output signals. The measuring device is equipped with the differential input differential output type inverting amplifier circuit and measures physical quantities. Background Art

[0002] As a differential input differential output type amplifier circuit that inputs a pair of differential input signals, amplifies the pair of differential input signals, and outputs them as a pair of differential output signals, a differential input differential output type non-inverting amplifier circuit disclosed in the following patent document is known.

[0003] The following are extracted from the patent literature Figure 2 as part of Figure 3 For explanation. Figure 3 As shown, the existing non-inverting amplifier circuit 1X is constructed as follows: a pair of differential input signals SINX+ and SINX- can be input via a signal input unit IS1X and a signal input unit IS2X, and the pair of differential input signals SINX+ and SINX- are non-invertedly amplified and output as a pair of differential output signals SOUTX+ and SOUTX- from a signal output unit OS1X and a signal output unit OS2X.

[0004] Specifically, the non-inverting amplifier circuit 1X is configured to include operational amplifiers OP1X and OP2X. In this case, the operational amplifier OP1X is configured such that the non-inverting input terminal is connected to the signal input unit IS1X, the inverting input terminal is connected to the output terminal via the resistor R1X, and the output terminal is connected to the signal output unit OS1X. In addition, the operational amplifier OP2X is configured such that the non-inverting input terminal is connected to the signal input unit IS2X, the inverting input terminal is connected to the output terminal via the resistor R2X, and the output terminal is connected to the signal output unit OS2X. In addition, a resistor R3X is connected between the inverting input terminal of the operational amplifier OP1X and the inverting input terminal of the operational amplifier OP2X.

[0005] In the non-inverting amplifier circuit 1X, the operational amplifier OP1X amplifies the differential input signal SINX+ of one of the pair of differential input signals SINX+ and SINX- inputted with a predetermined gain and outputs it as a differential output signal SOUTX+ from the signal output unit OS1X. In addition, the operational amplifier OP2X amplifies the differential input signal SINX- of the other of the pair of differential input signals SINX+ and SINX- inputted with a predetermined gain and outputs it as a differential output signal SOUTX- from the signal output unit OS2X. According to the non-inverting amplifier circuit 1X, a non-inverting amplifier circuit with excellent high-frequency characteristics can be formed while only symmetrically configuring two operational amplifiers with a simple structure. It should be noted that by symmetrically configuring two operational amplifiers, an inverting amplifier circuit and a differential amplifier circuit can also be formed.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Publication No. 2020-25254 (pp. 16-48, Figure 2 ) Summary of the invention

[0009] Problems to be solved by the invention

[0010] However, in the above-mentioned existing non-inverting amplifier circuit 1X, there is the following improvement: although a non-inverting amplifier circuit with excellent high-frequency characteristics can be simply constructed, since only two operational amplifiers are symmetrically configured, when the differential input signals SINX+ and SINX- contain a high-frequency common-mode voltage (non-inverting voltage), the common-mode voltage cannot be removed.

[0011] The present invention is completed in view of the above-mentioned improvements, and its main purpose is to provide a differential input differential output type inverting amplifier circuit that can fully remove the high-frequency common mode voltage contained in the differential input signal and output a differential output signal, and a measuring device having such a differential input differential output type inverting amplifier circuit.

[0012] Solutions for solving problems

[0013] In order to achieve the above-mentioned purpose, the differential input differential output type inverting amplifier circuit of the present invention inverts and amplifies a pair of differential input signals inputted via a first signal input part and a second signal input part and outputs the signals as a pair of differential output signals from the first signal output part and the second signal output part, wherein the differential input differential output type inverting amplifier circuit comprises: a first operational amplifier, a second operational amplifier, a third operational amplifier and a fourth operational amplifier; a first resistor and a second resistor connected in series between the first signal input part and the second signal input part; and a third resistor connected between a connection point between the first resistor and the second resistor and an intermediate potential, wherein the first operational amplifier is configured as follows: an inverting input terminal is connected to the first signal input part via a fourth resistor and is connected to an output terminal via a fifth resistor, a non-inverting input terminal is connected to the connection point via a first capacitor, and an output terminal is connected to the first signal output part, wherein the The second operational amplifier is configured as follows: the inverting input terminal is connected to the second signal input part via the sixth resistor and is connected to the output terminal via the seventh resistor, the non-inverting input terminal is connected to the connection point via the second capacitor, and the output terminal is connected to the second signal output part. The third operational amplifier is configured as follows: the inverting input terminal is connected to the inverting input terminal of the first operational amplifier via the eighth resistor and is connected to the output terminal via the third capacitor, the non-inverting input terminal is connected to the intermediate potential, and the output terminal is connected to the non-inverting input terminal of the first operational amplifier via the ninth resistor. The fourth operational amplifier is configured as follows: the inverting input terminal is connected to the inverting input terminal of the second operational amplifier via the tenth resistor and is connected to the output terminal via the fourth capacitor, the non-inverting input terminal is connected to the intermediate potential, and the output terminal is connected to the non-inverting input terminal of the second operational amplifier via the eleventh resistor.

[0014] According to the differential input differential output inverting amplifier circuit, by having a first operational amplifier to a fourth operational amplifier and a first resistor to a seventh resistor, the third operational amplifier is added to the first operational amplifier for compounding, and the fourth operational amplifier is added to the second operational amplifier for compounding, so that the high-frequency common-mode voltage contained in a pair of differential input signals can be removed and output as a pair of differential output signals, and the low-frequency performance can be improved.

[0015] In addition, in the differential input differential output inverting amplifier circuit of the present invention, the resistance values ​​of the first resistor and the second resistor are both specified as a value RX, the resistance value of the third resistor is specified as a value RY, the resistance values ​​of the fourth resistor and the sixth resistor are both specified as a value RA, the resistance values ​​of the fifth resistor and the seventh resistor are both specified as a value RB, and the relationship (RX=2×RY×(RA / RB)) is satisfied.

[0016] According to the differential input differential output inverting amplifier circuit, by defining the resistance values ​​of the first to seventh resistors in the above manner, the high-frequency common-mode voltage contained in a pair of differential input signals can be fully removed and output as a pair of differential output signals, and the low-frequency performance can be fully improved.

[0017] In addition, in the differential input differential output type inverting amplifier circuit of the present invention, it is stipulated that: the resistance values ​​of the eighth resistor and the tenth resistor are equal to each other, the resistance values ​​of the ninth resistor and the eleventh resistor are equal to each other, the capacitance value of the first capacitor and the capacitance value of the second capacitor are equal to each other, and the capacitance value of the third capacitor and the capacitance value of the fourth capacitor are equal to each other.

[0018] According to the differential input differential output type inverting amplifier circuit, by specifying the resistance values ​​of the eighth to eleventh resistors and the capacitance values ​​of the first to fourth capacitors in the above manner, the high-frequency common-mode voltage contained in a pair of differential input signals can be further fully removed and output as a pair of differential output signals, and the low-frequency performance can be further fully improved.

[0019] In addition, in order to achieve the above-mentioned purpose, the differential input differential output type inverting amplifier circuit of the present invention inverts and amplifies a pair of differential input signals input via a first signal input part and a second signal input part and outputs them as a pair of differential output signals from a first signal output part and a second signal output part, wherein the differential input differential output type inverting amplifier circuit comprises: a first operational amplifier and a second operational amplifier; a first resistor and a second resistor connected in series between the first signal input part and the second signal input part; and a third resistor connected between a connection point between the first resistor and the second resistor and an intermediate potential, the first operational amplifier being configured as follows: an inverting input terminal being connected to the first signal input part via a fourth resistor and to an output terminal via a fifth resistor, a non-inverting input terminal being connected to the connection point, and an output terminal being connected to the first signal output part, and the second operational amplifier being configured as follows: an inverting input terminal being connected to the second signal input part via a sixth resistor and to an output terminal via a seventh resistor, a non-inverting input terminal being connected to the connection point, and an output terminal being connected to the second signal output part.

[0020] According to the differential input differential output inverting amplifier circuit, by having a first operational amplifier, a second operational amplifier and first to seventh resistors and being constructed in the above manner, the high-frequency common mode voltage contained in a pair of differential input signals can be removed and output as a pair of differential output signals.

[0021] In addition, in the differential input differential output inverting amplifier circuit of the present invention, the resistance values ​​of the first resistor and the second resistor are both specified as a value RX, the resistance value of the third resistor is specified as a value RY, the resistance values ​​of the fourth resistor and the sixth resistor are both specified as a value RA, the resistance values ​​of the fifth resistor and the seventh resistor are both specified as a value RB, and the relationship (RX=2×RY×(RA / RB)) is satisfied.

[0022] According to this differential input differential output inverting amplifier circuit, by defining the resistance values ​​of the first to seventh resistors as described above, the high frequency common mode voltage included in a pair of differential input signals can be sufficiently removed and output as a pair of differential output signals.

[0023] Furthermore, in order to achieve the above object, a measuring device of the present invention comprises any of the differential input differential output inverting amplifier circuits described above, and the measuring device measures a physical quantity based on the pair of differential output signals output from the differential input differential output inverting amplifier circuit.

[0024] According to this measuring device, by measuring a physical quantity based on a pair of differential output signals from which a high-frequency common mode voltage is removed, the physical quantity can be measured with high accuracy.

[0025] Effects of the Invention

[0026] The differential input differential output inverting amplifier circuit of the present invention can fully remove the high frequency common mode voltage included in a pair of differential input signals and output a pair of differential output signals. In addition, the measuring device of the present invention can measure physical quantities with high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 2 is a circuit diagram of the inverting amplifier circuit 1.

[0028] Figure 2 is a circuit diagram of an inverting amplifier circuit 1A.

[0029] Figure 3 1 is a circuit diagram of a conventional non-inverting amplifier circuit 1X. DETAILED DESCRIPTION

[0030] Hereinafter, embodiments of a measuring device and a differential-input differential-output inverting amplifier circuit will be described with reference to the drawings.

[0031] Figure 1 The measuring device 100 shown is configured to include a current sensor S, an inverting amplifier circuit 1, and a processing unit PU, and can measure a current as a physical quantity.

[0032] As an example, the current sensor S is a current sensor as disclosed in Japanese Patent Publication No. 2014-215065, which is composed of a current sensor that detects the current value of the current flowing through the detection conductor (measured wire) in a zero flux mode (having a magnetic core, a magnetoelectric conversion unit (Hall element, fluxgate element, etc.), a feedback coil, a voltage-current conversion circuit, a detection resistor circuit that converts a negative feedback current into a voltage and outputs it, and an amplifier circuit that amplifies the voltage output from the detection resistor circuit and outputs it as an output voltage), and detects the current flowing through the detection conductor and outputs it as a pair of differential input signals SIN-, SIN+. However, it is not limited to this structure, and a current sensor of any structure can be used. In addition, the current sensor S can also be configured as a clamp type that can clamp the detection conductor.

[0033] In addition, the inverting amplifier circuit 1 is configured to function as a differential input differential output type inverting amplifier circuit, which inputs a pair of differential input signals SIN-, SIN+ output from the current sensor S via the signal input unit IS1 (first signal input unit) and the signal input unit IS2 (second signal input unit), inverts and amplifies the pair of differential input signals SIN-, SIN+ and outputs them as a pair of differential output signals SOUT+, SOUT- from the signal output unit OS1 (first signal output unit) and the signal output unit OS2 (second signal output unit) to the processing unit PU.

[0034] Specifically, the inverting amplifier circuit 1 is configured to include an operational amplifier OP1 having good high-frequency characteristics (for example, good broadband characteristics) functioning as a first operational amplifier, an operational amplifier OP2 having good high-frequency characteristics (for example, good broadband characteristics) functioning as a second operational amplifier, an operational amplifier OP3 having good low-frequency characteristics functioning as a third operational amplifier, and an operational amplifier OP4 having good low-frequency characteristics functioning as a fourth operational amplifier. In this case, each of the operational amplifiers OP1 to OP4 operates, for example, using a positive voltage and a negative voltage having equal absolute values ​​relative to a ground potential as an intermediate potential as a power supply voltage.

[0035] In addition, the inverting amplifier circuit 1 includes a resistor R1 connected in series between the signal input part IS1 and the signal input part IS2 and functioning as a first resistor, a resistor R2 functioning as a second resistor, and a resistor R3 connected between a connection point P1 between the resistor R1 and the resistor R2 and an intermediate potential and functioning as a third resistor.

[0036] The operational amplifier OP1 is configured such that the inverting input terminal (first inverting input terminal) is connected to the signal input unit IS1 via the resistor R4 (fourth resistor), and is connected to the output terminal (first output terminal) via the resistor R5 (fifth resistor), the non-inverting input terminal (first non-inverting input terminal) is connected to the connection point P1 via the capacitor C1 (first capacitor), and the output terminal (first output terminal) is connected to the signal output unit OS1. In addition, the operational amplifier OP2 is configured such that the inverting input terminal (second inverting input terminal) is connected to the signal input unit IS2 via the resistor R6 (sixth resistor), and is connected to the output terminal (second output terminal) via the resistor R7 (seventh resistor), the non-inverting input terminal (second non-inverting input terminal) is connected to the connection point P1 via the capacitor C2 (second capacitor), and the output terminal (second output terminal) is connected to the signal output unit OS2.

[0037] In addition, the operational amplifier OP3 is configured such that the inverting input terminal (third inverting input terminal) is connected to the inverting input terminal of the operational amplifier OP1 via the resistor R8 (eighth resistor), and is connected to the output terminal (third output terminal) via the capacitor C3 (third capacitor), the non-inverting input terminal (third non-inverting input terminal) is connected to the intermediate potential, and the output terminal (third output terminal) is connected to the non-inverting input terminal of the operational amplifier OP1 via the resistor R9 (ninth resistor). In addition, the operational amplifier OP4 is configured such that the inverting input terminal (fourth inverting input terminal) is connected to the inverting input terminal of the operational amplifier OP2 via the resistor R10 (tenth resistor), and is connected to the output terminal (fourth output terminal) via the capacitor C4 (fourth capacitor), the non-inverting input terminal (fourth non-inverting input terminal) is connected to the intermediate potential, and the output terminal (fourth output terminal) is connected to the non-inverting input terminal of the operational amplifier OP2 via the resistor R11 (eleventh resistor).

[0038] In this case, in the inverting amplifier circuit 1, the resistance values ​​of the resistor R1 and the resistor R2 are both specified as the value RX, the resistance value of the resistor R3 is specified as the value RY, the resistance values ​​of the resistor R4 and the resistor R6 are both specified as the value RA, the resistance values ​​of the resistor R5 and the resistor R7 are both specified as the value RB, and the relationship (RX=2×RY×(RA / RB)) is satisfied, and it is specified that: the resistance values ​​of the resistor R8 and the resistor R10 are equal to each other, the resistance values ​​of the resistor R9 and the resistor R11 are equal to each other, the capacitance values ​​of the capacitor C1 and the capacitor C2 are equal to each other, and the capacitance values ​​of the capacitor C3 and the capacitor C4 are equal to each other.

[0039] In addition, the processing unit PU measures the current value of the current flowing through the detection conductor based on a pair of differential output signals SOUT+ and SOUT- output from the signal output units OS1 and OS2 of the inverting amplifier circuit 1. Specifically, the processing unit PU samples the pair of differential output signals SOUT+ and SOUT-, generates waveform data, and measures the current value of the current flowing through the detection conductor based on the waveform data. In addition, the processing unit PU displays the current value on the display unit or stores it in the storage unit by outputting the current value data representing the measured current value to the display unit and the storage unit outside the figure.

[0040] Next, the operation of the measuring device 100 and the inverting amplifier circuit 1 will be described.

[0041] First, the operation of the inverting amplifier circuit 1 when the differential input signals SIN- and SIN+ output from the current sensor S are high-frequency signals (hereinafter also referred to as "high-frequency signals") is described. When the differential input signals SIN- and SIN+ are high-frequency signals, the impedance of the capacitors C1 and C2 becomes extremely small, so in the inverting amplifier circuit 1, the connection point P1 and the non-inverting input terminal of the operational amplifier OP1 are short-circuited, and the connection point P1 and the non-inverting input terminal of the operational amplifier OP2 are short-circuited. In addition, in the inverting amplifier circuit 1, the impedance of the capacitors C3 and C4 becomes extremely small, so it is equivalent to a circuit configuration in which the operational amplifiers OP3 and OP4 do not function.

[0042] Therefore, if Figure 2 As shown, when the differential input signals SIN- and SIN+ are high-frequency signals, the inverting amplifier circuit 1 is equivalently represented as an inverting amplifier circuit 1A. Therefore, in the inverting amplifier circuit 1A, the operational amplifier OP1 is configured as follows: the inverting input terminal is connected to the signal input part IS1 via the resistor R4A, and is connected to the output terminal via the resistor R5, the non-inverting input terminal is connected to the connection point P1, and the output terminal is connected to the signal output part OS1. In addition, in the inverting amplifier circuit 1A, the operational amplifier OP2 is configured as follows: the inverting input terminal is connected to the signal input part IS2 via the resistor R6, and is connected to the output terminal via the resistor R7, the non-inverting input terminal is connected to the connection point P1, and the output terminal is connected to the signal output part OS2. It should be noted that in Figure 2 In the figure, the current sensor S and the processing unit PU are omitted.

[0043] In the inverting amplifier circuit 1A, when the voltage value of the high frequency common mode voltage superimposed on the differential input signal SIN- is defined as VCM, the voltage V1 at the connection point P1 is expressed by the following equation (1).

[0044] V1=VCM / (1+(RX / (2×RY)))……Formula (1)

[0045] In addition, when the open-loop gain of the operational amplifiers OP1 and OP2 is large enough, the voltage value VOUT+ of the differential output signal SOUT+ is expressed by the following formula (2). It should be noted that, hereinafter, the voltage value of the differential input signal SIN- is set to VIN-, and the voltage values ​​of the differential output signals SOUT+ and SOUT- are set to VOUT+ and VOUT-, respectively.

[0046] VOUT+=-(RB / RA)×VIN-+(1+(RB / RA))×V1……Formula (2)

[0047] Here, in order to eliminate the high-frequency common-mode voltage superimposed on the differential input signal SIN-, when the voltage value VIN- is the voltage value VCM, the voltage value VOUT+ needs to be set to 0V. Therefore, the following formula (3) is derived from the above formula (2).

[0048] (RB / RA)×VIN-=(1+RB / RA)×V1…Equation (3)

[0049] Furthermore, the following equation (4) is derived from equation (1) and equation (3).

[0050] RX=2×RY×(RA / RB)……Formula (4)

[0051] Similarly, when a high frequency common mode voltage of voltage value VCM is superimposed on differential input signal SIN+, when equation (4) is satisfied, the voltage value of the high frequency common mode voltage included in differential output signal SOUT- also becomes 0V.

[0052] That is, even if a high frequency common mode voltage is superimposed on a pair of differential input signals SIN-, SIN+, by setting the resistance values ​​of the resistors R1, R2 to RX, the resistance value of the resistor R3 to RY, the resistance values ​​of the resistors R4, R6 to RA, and the resistance values ​​of the resistors R5, R7 to RB, and setting the resistance values ​​of the resistors R1 to R7 in such a manner as to satisfy the relationship (RX=2×RY×(RA / RB)) of the above-mentioned formula (4), the voltage value of the high frequency common mode voltage included in the pair of differential output signals SOUT+, SOUT- can be set to 0 V. In other words, according to the inverting amplifier circuit 1A, the common mode rejection ratio can be sufficiently improved.

[0053] It should be noted that the absolute values ​​of the differential input signal components of the pair of differential input signals SIN- and SIN+ are equal and the polarities are opposite, so the voltage value VIN- becomes the voltage value -VIN+, and the voltage V1 of the connection point P1 becomes 0 V. Therefore, the gain of the inverting amplifier circuit 1A with respect to the differential input signal components of the pair of differential input signals SIN- and SIN+ is expressed by the following equations (5) and (6). As a result, even if the values ​​of the resistors are specified so as to satisfy the relationship of the above equation (4), the gain of the differential input signal components with respect to the pair of differential input signals SIN- and SIN+ will not be affected.

[0054] VOUT+=-(RB / RA)×VIN-……Formula (5)

[0055] VOUT-=-(RB / RA)×VIN+……Formula (6)

[0056] Thus, according to the inverting amplifier circuit 1A, by specifying the resistance values ​​of the resistors R1 to R7 in a manner satisfying the above-mentioned formula (4), the high-frequency common-mode voltage contained in a pair of differential input signals SIN-, SIN+ can be fully removed and output as a pair of differential output signals SOUT+, SOUT-.

[0057] Next, refer to Figure 1 , the operation of the inverting amplifier circuit 1 when the differential input signals SIN-, SIN+ are DC signals or signals with sufficiently low frequencies (hereinafter, both are collectively referred to as “DC signals”) is described.

[0058] like Figure 1 As shown, when the differential input signals SIN- and SIN+ are DC signals, the impedances of the capacitors C1 and C3 are extremely large. Therefore, the inverting amplifier circuit 1 adds an operational amplifier OP3 with good low-frequency characteristics to the operational amplifier OP1 to form a composite inverting amplifier circuit, and adds an operational amplifier OP4 with good low-frequency characteristics to the operational amplifier OP2 to form a composite inverting amplifier circuit.

[0059] In this case, the operational amplifier OP3 improves the low-frequency characteristics of the operational amplifier OP1, and the operational amplifier OP4 improves the low-frequency characteristics of the operational amplifier OP2. Specifically, the operational amplifier OP3 performs a negative feedback operation such as canceling the offset voltage and 1 / f noise generated between the inverting terminal and the non-inverting terminal of the operational amplifier OP1 by inverting and amplifying the voltage of the inverting input terminal of the operational amplifier OP1 with a high gain and feeding it forward to the non-inverting input terminal of the operational amplifier OP1, thereby reducing the offset voltage and 1 / f noise. Thus, the low-frequency characteristics of the operational amplifier OP1 are compensated by the operational amplifier OP3 with good low-frequency characteristics, thereby fully improving the low-frequency characteristics of the operational amplifier OP1. In addition, the operational amplifier OP4 performs a negative feedback operation such as canceling the offset voltage and 1 / f noise generated between the inverting terminal and the non-inverting terminal of the operational amplifier OP2 by inverting and amplifying the voltage of the inverting input terminal of the operational amplifier OP2 with a high gain and feeding it forward to the non-inverting input terminal of the operational amplifier OP2, thereby reducing the offset voltage and 1 / f noise. Thus, the low-frequency characteristics of the operational amplifier OP2 are compensated by the operational amplifier OP4 having good low-frequency characteristics, so that the low-frequency characteristics of the operational amplifier OP2 are fully improved. It should be noted that the gain of the inverting amplifier circuit 1 relative to the differential input signal component when the differential input signals SIN- and SIN+ are DC signals is expressed by the above-mentioned equations (5) and (6).

[0060] Next, in the measuring device 100, the processing unit PU measures the current value of the current flowing through the detection conductor as described above based on the pair of differential output signals SOUT+ and SOUT- output from the inverting amplifier circuit 1 (inverting amplifier circuit 1A). In addition, the processing unit PU displays the current value on the display unit or stores it in the storage unit by outputting current value data indicating the measured current value to the display unit or storage unit outside the figure.

[0061] Thus, according to the inverting amplifier circuit 1, by having operational amplifiers OP1 to OP4 and resistors R1 to R7, an operational amplifier OP3 with good low-frequency characteristics is added to the operational amplifier OP1 with good high-frequency characteristics to be compounded, and an operational amplifier OP4 with good low-frequency characteristics is added to the operational amplifier OP2 with good high-frequency characteristics to be compounded, so that the high-frequency common-mode voltage contained in a pair of differential input signals SIN-, SIN+ can be removed and output as a pair of differential output signals SOUT+, SOUT-, and the low-frequency performance can be improved.

[0062] In addition, according to the inverting amplifier circuit 1, by specifying the resistance values ​​of the resistors R1 to R7 in the above manner, the high-frequency common-mode voltage contained in a pair of differential input signals SIN-, SIN+ can be fully removed and output as a pair of differential output signals SOUT+, SOUT-, and the low-frequency performance can be fully improved.

[0063] In addition, according to the inverting amplifier circuit 1, by specifying the resistance values ​​of the resistors R8 to R11 and the capacitance values ​​of the capacitors C1 to C4 in the above manner, the high-frequency common-mode voltage contained in a pair of differential input signals SIN-, SIN+ can be further fully removed and output as a pair of differential output signals SOUT+, SOUT-, and the low-frequency performance can be further fully improved.

[0064] Furthermore, according to the above-described measuring device 100 , a physical quantity (current value in this example) is measured based on a pair of differential output signals SOUT+ and SOUT− from which a high-frequency common mode voltage is removed, and thus the physical quantity can be measured with high accuracy.

[0065] It should be noted that the present invention is not limited to the above-mentioned embodiments and can be appropriately modified. For example, when it is necessary to give priority to reducing the common mode voltage of high frequency over good low frequency characteristics in the operational amplifiers OP1 and OP2, the operational amplifiers OP3 and OP4, the resistors R8 to R11 and the capacitors C1 to C4 can be omitted and reference can be made to Figure 2 The configuration of the inverting amplifier circuit 1A described above is adopted.

[0066] According to the inverting amplifier circuit 1A, by having operational amplifiers OP1, OP2, and resistors R1 to R7 and being configured as described above, it is possible to remove the high frequency common mode voltage included in a pair of differential input signals SIN-, SIN+ and output them as a pair of differential output signals SOUT+, SOUT-.

[0067] Furthermore, according to the inverting amplifier circuit 1A, by defining the resistance values ​​of the resistors R1 to R7 as described above, the high-frequency common-mode voltage included in the pair of differential input signals SIN-, SIN+ can be sufficiently removed and output as a pair of differential output signals SOUT+, SOUT-.

[0068] Furthermore, according to the measuring device 100 including the inverting amplifier circuit 1A, the physical quantity can be measured with high accuracy by measuring the physical quantity based on a pair of differential output signals from which the high frequency common mode voltage is removed.

[0069] In the inverting amplifier circuit 1, it is stipulated that the resistance values ​​of the resistors R8 and R10 are equal to each other, the resistance values ​​of the resistors R9 and R11 are equal to each other, the capacitance values ​​of the capacitors C1 and C2 are equal to each other, and the capacitance values ​​of the capacitors C3 and C4 are equal to each other, but some errors and differences can be allowed for these resistors and capacitors. In addition, in the inverting amplifier circuits 1 and 1A, in order to make the common mode rejection ratio infinite, it is most preferable to stipulate that the resistance values ​​of the resistors R1 and R2 are infinitely equal to each other, the resistance values ​​of the resistors R4 and R6 are infinitely equal to each other, and the resistance values ​​of the resistors R5 and R7 are infinitely equal to each other, but as long as the desired common mode rejection ratio can be obtained, the error in the resistance value of each resistor can be allowed.

[0070] Furthermore, in the above-described embodiment, an example in which the inverting amplifier circuit 1 is applied to the measuring device 100 for measuring current is described, but the present invention is not limited thereto and may be applied to measuring devices for measuring various physical quantities such as voltage, temperature, pressure, and light.

[0071] Industrial Applicability

[0072] According to the present invention, a pair of differential output signals can be outputted by fully removing the high frequency common mode voltage contained in a pair of differential input signals. Therefore, the present invention can be widely applied to such differential input differential output type inverting amplifier circuits and measuring devices having such differential input differential output type inverting amplifier circuits.

[0073] Description of Reference Numerals

[0074] 100: measuring device;

[0075] 1. 1A: Inverting amplifier circuit;

[0076] C1~C4: capacitors;

[0077] IS1, IS2: signal input part;

[0078] OS1, OS2: signal output part;

[0079] OP1~OP4: operational amplifier;

[0080] P1: connection point;

[0081] R1~R11: resistance;

[0082] SIN-, SIN+: differential input signal;

[0083] SOUT+, SOUT-: differential output signal.

Claims

1. A differential input differential output type inverting amplifier circuit, wherein the differential input differential output type inverting amplifier circuit amplifies a pair of differential input signals inputted via a first signal input unit and a second signal input unit and outputs the signals as a pair of differential output signals from the first signal output unit and the second signal output unit, wherein: The differential input differential output type inverting amplifier circuit comprises: a first operational amplifier, a second operational amplifier, a third operational amplifier, and a fourth operational amplifier; A first resistor and a second resistor are connected in series between the first signal input portion and the second signal input portion; and A third resistor is connected between a connection point between the first resistor and the second resistor and an intermediate potential. The first operational amplifier is configured such that an inverting input terminal is connected to the first signal input unit via a fourth resistor and is connected to an output terminal via a fifth resistor, a non-inverting input terminal is connected to the connection point via a first capacitor, and an output terminal is connected to the first signal output unit. The second operational amplifier is configured such that: an inverting input terminal is connected to the second signal input unit via a sixth resistor and is connected to an output terminal via a seventh resistor, a non-inverting input terminal is connected to the connection point via a second capacitor, and an output terminal is connected to the second signal output unit, The third operational amplifier is configured such that: an inverting input terminal is connected to the inverting input terminal of the first operational amplifier via an eighth resistor, and is connected to an output terminal via a third capacitor, a non-inverting input terminal is connected to the intermediate potential, and an output terminal is connected to the non-inverting input terminal of the first operational amplifier via a ninth resistor, The fourth operational amplifier is configured as follows: an inverting input terminal is connected to the inverting input terminal of the second operational amplifier via a tenth resistor, and is connected to an output terminal via a fourth capacitor, a non-inverting input terminal is connected to the intermediate potential, and an output terminal is connected to the non-inverting input terminal of the second operational amplifier via an eleventh resistor.

2. The differential input differential output type inverting amplifier circuit according to claim 1, wherein: The resistance values ​​of the first resistor and the second resistor are both specified as a value RX, the resistance value of the third resistor is specified as a value RY, the resistance values ​​of the fourth resistor and the sixth resistor are both specified as a value RA, the resistance values ​​of the fifth resistor and the seventh resistor are both specified as a value RB, and the relationship RX=2×RY×(RA / RB) is satisfied.

3. The differential input differential output type inverting amplifier circuit according to claim 2, wherein: It is stipulated that the resistance values ​​of the eighth resistor and the tenth resistor are equal to each other, the resistance values ​​of the ninth resistor and the eleventh resistor are equal to each other, the capacitance value of the first capacitor and the capacitance value of the second capacitor are equal to each other, and the capacitance value of the third capacitor and the capacitance value of the fourth capacitor are equal to each other.

4. A differential input differential output type inverting amplifier circuit, wherein the differential input differential output type inverting amplifier circuit inverts and amplifies a pair of differential input signals inputted via a first signal input unit and a second signal input unit and outputs the signals as a pair of differential output signals from the first signal output unit and the second signal output unit, wherein: The differential input differential output type inverting amplifier circuit comprises: a first operational amplifier and a second operational amplifier; A first resistor and a second resistor are connected in series between the first signal input portion and the second signal input portion; and A third resistor is connected between a connection point between the first resistor and the second resistor and an intermediate potential. The first operational amplifier is configured such that: an inverting input terminal is connected to the first signal input unit via a fourth resistor and is connected to an output terminal via a fifth resistor, a non-inverting input terminal is connected to the connection point, and an output terminal is connected to the first signal output unit, The second operational amplifier is configured such that an inverting input terminal is connected to the second signal input unit via a sixth resistor and to an output terminal via a seventh resistor, a non-inverting input terminal is connected to the connection point, and an output terminal is connected to the second signal output unit.

5. The differential input differential output type inverting amplifier circuit according to claim 4, wherein: The resistance values ​​of the first resistor and the second resistor are both specified as a value RX, the resistance value of the third resistor is specified as a value RY, the resistance values ​​of the fourth resistor and the sixth resistor are both specified as a value RA, the resistance values ​​of the fifth resistor and the seventh resistor are both specified as a value RB, and the relationship RX=2×RY×(RA / RB) is satisfied.

6. A measuring device comprising the differential input differential output type inverting amplifier circuit according to any one of claims 1 to 5, wherein the measuring device measures a physical quantity based on the pair of differential output signals output from the differential input differential output type inverting amplifier circuit.

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