Accelerometer and manufacturing method thereof

By using a piezoelectric film and conductor layer in the sealing cavity of the accelerometer, the exhaust effect of the metal electrode is avoided, and the high-temperature bonding process is adopted, the problem of poor sealing properties of the sealing cavity in the prior art is solved, and a high-reliability accelerometer is achieved.

CN120028575APending Publication Date: 2025-05-23GUANGZHOU LEYI INVESTMENT CO LTD
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Patent Information

Application Number
CN202311570906.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-22
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

In the prior art, there are technical difficulties in integrating piezoelectric thin film materials into resonant MEMS accelerometers. The main reason is that metal electrodes are prone to exhaust effects and cannot withstand high-temperature bonding processes, resulting in poor sealing properties of the sealing cavity, affecting the long-term reliability of the sensor.

Method used

By not using metal in the sealing cavity of the accelerometer, a sealing cavity is formed using a piezoelectric film and a conductor layer to avoid the exhaust effect of the metal electrodes, and a high-temperature bonding process is adopted to improve the sealing property of the sealing cavity.

Benefits of technology

An accelerometer with low manufacturing difficulty, low oscillation circuit noise and high reliability is realized.

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Abstract

The embodiment of the invention provides an accelerometer and a manufacturing method of the accelerometer. The accelerometer comprises a frame; the core function part comprises a mass block and a core function part; a plurality of beam structures comprising at least one second beam structure (BM71, BM81); and a plurality of fixed blocks including at least one second fixed block (AC11, AC21) connected to the mass block via the second beam structure, the frame and the plurality of fixed blocks being supported on a lower substrate, the beam structure and the mass block structure being movable relative to the lower substrate. As a result, it is possible to obtain an accelerometer having low manufacturing difficulty, low oscillation circuit noise, and high reliability.
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Description

Technical Field

[0001] The present application relates to the field of electronic circuits, and in particular to an accelerometer and a method for manufacturing the accelerometer. Background Art

[0002] Resonant micro-electromechanical system (MEMS) accelerometers have the advantages of high accuracy and the ability to directly output frequency signals compared to other types of MEMS accelerometers. However, most resonant MEMS accelerometers currently use electrostatic force excitation and capacitors to detect the vibration of the resonant beam, which is difficult to manufacture and has high oscillation circuit noise.

[0003] In the prior art, the manufacturing difficulty can be reduced by using piezoelectric excitation and detecting the vibration of the resonant beam, thereby reducing the noise of the oscillation circuit and further improving the accuracy of the MEMS accelerometer.

[0004] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0005] The inventors have found that in the prior art, there are technical difficulties in integrating piezoelectric thin film materials into resonant MEMS accelerometers. The main reason is that metal electrodes are prone to out-gassing effect and cannot withstand high-temperature bonding processes, resulting in poor sealing of the sealed cavity. It is easy to cause changes in the environment inside the sealed cavity, thereby affecting the long-term reliability of the sensor.

[0006] In order to solve at least one of the above problems or other similar problems, the embodiments of the present application provide an accelerometer and a method for manufacturing the accelerometer, thereby obtaining an accelerometer with low manufacturing difficulty, low oscillation circuit noise, and high reliability.

[0007] According to a first aspect of an embodiment of the present application, an accelerometer is provided, the accelerometer comprising:

[0008] a frame having a space formed therein; and

[0009] A core functional unit, which is located in the space,

[0010] The core functional units include:

[0011] Mass block;

[0012] a plurality of beam structures, including at least one second beam structure (BM12-BM82); and

[0013] A plurality of fixed blocks, including at least one second fixed block (AC11, AC21), wherein the second fixed block is connected to the mass block via the second beam structure,

[0014] wherein the frame and the plurality of fixing blocks are supported on a lower substrate and / or a cover structure,

[0015] The surface of the second beam structure is covered with a piezoelectric film, and the surface of the piezoelectric film is covered with a conductor layer.

[0016] In at least one embodiment, the mass is movable relative to the lower substrate or cover structure.

[0017] In at least one embodiment, the mass block has a plurality of through holes.

[0018] In at least one embodiment,

[0019] The plurality of beam structures further comprises at least one first beam structure (BM51, BM61),

[0020] The plurality of fixing blocks further include at least one first fixing block (AC31, AC41),

[0021] The first fixing block is connected to the mass block through the first beam structure.

[0022] In at least one embodiment, the core functional unit further includes:

[0023] The second beam structure is connected to the mass block via the lever structure, and the lever structure is movable relative to the lower substrate or the cover structure.

[0024] In at least one embodiment, the material of the conductor layer is polysilicon.

[0025] In at least one embodiment, the plurality of fixing blocks further include a third fixing block (AC12, AC13, AC22, AC23),

[0026] The conductor layer is guided from the second beam structure (BM71, BM81) to at least one of the third fixed block surfaces via extension beams (BM72, BM73, BM82, BM83),

[0027] There is a gap between the extending beam and the second beam structure, and the conductor layer is formed across the gap.

[0028] In at least one embodiment, the accelerometer further comprises:

[0029] A cover structure (B01); and

[0030] at least one isolated island structure formed in the capping structure and electrically isolated from the capping structure in a laterally direction,

[0031] The lower surface of the cover structure is bonded to the upper surface of the frame,

[0032] The lower surface of each of the island structures is bonded to the upper surface of one of the second fixing block and the third fixing block to form an electrical connection.

[0033] In at least one embodiment, a gap is formed between each of the isolated island structures and the cover structure and is formed around the isolated island structure, and the gap is filled with insulating material.

[0034] In at least one embodiment, a metal layer (CT11, CT22, CT23) is formed on the top of each of the isolated island structures.

[0035] In at least one embodiment, a cavity structure is formed below the cover structure (B01), and the cavity structure is located at least above the mass block, the beam structure and the lever structure.

[0036] In at least one embodiment, the number of the island structures is the same as the number of the plurality of fixed blocks.

[0037] In at least one embodiment, the frame and the plurality of fixing blocks are connected to the lower substrate through a buried oxide layer.

[0038] In at least one embodiment, the lower substrate, the frame and the cover structure enclose a sealed cavity, the sealed cavity includes at least a piezoelectric film and a conductor layer, and the sealed cavity does not include metal.

[0039] According to a second aspect of the embodiment of the present application, a method for manufacturing an accelerometer is provided, which is used to manufacture the accelerometer described in the above embodiment. The method for manufacturing an accelerometer has the following steps:

[0040] forming a first through groove in a first device layer substrate (D01) of a first wafer;

[0041] Bonding a second device layer substrate (D02) of a second wafer to the first device layer substrate (D01);

[0042] forming a piezoelectric film in a region corresponding to the beam structure on a surface of the second device layer substrate (D02) that is away from the first device layer substrate (D01), and forming a conductor layer on a surface of the piezoelectric film; and

[0043] The second device layer substrate (D02) and the first device layer substrate (D01) form at least one of the mass block structure, the beam structure, the lever structure and the extended beam structure of the accelerometer.

[0044] In at least one embodiment, the method for manufacturing the accelerometer further comprises:

[0045] The lower substrate of the second SOI wafer is removed, and the buried oxide layer (X02) of the second SOI wafer is thinned to a target thickness.

[0046] In at least one embodiment, the method for manufacturing the accelerometer further comprises:

[0047] A second through groove and / or through hole is formed in the buried oxide layer (X02) of the second SOI wafer, the second device layer substrate (D02) and the first device layer substrate (D01), and the second through groove and / or the through hole terminates at the buried oxide layer (X01) of the first wafer.

[0048] In at least one embodiment, the method for manufacturing the accelerometer further comprises:

[0049] An oxide layer (X03) is deposited on the surface of the buried oxide layer (X02) of the second SOI wafer, wherein the oxide layer covers the second through groove and / or the through hole.

[0050] In at least one embodiment, the steps of forming a piezoelectric film in a region corresponding to the beam structure on a surface of the second device layer substrate (D02) away from the first device layer substrate (D01), and forming a conductor layer on the surface of the piezoelectric film include:

[0051] At least the oxide layer on the surface of the second device layer substrate (D02) above the first through groove and the buried oxide layer (X03) of the second SOI wafer are removed, the piezoelectric film is formed on the surface of the exposed second device layer substrate (D02) facing away from the first device layer substrate (D01), and the conductor layer is formed on the surface of the piezoelectric film.

[0052] In at least one embodiment, the step of forming at least one of the mass structure, the beam structure, the lever structure and the extended beam structure of the accelerometer by using the second device layer substrate (D02) and the first device layer substrate (D01) comprises:

[0053] Through the release process, the remaining oxide layer and the buried oxide layer (X03) of the second SOI wafer are removed to form the mass block structure, the beam structure, the lever structure and the extended beam structure, and the buried oxide layer (X01) of the first SOI wafer at the bottom of the lever structure is removed.

[0054] In at least one embodiment, the method for manufacturing the accelerometer further comprises:

[0055] A capping structure and at least one island structure are fixed to a surface of the second device layer substrate (D02) facing away from the first device layer substrate (D01).

[0056] In at least one embodiment, in the step of removing the oxide layer on the surface of the second device layer substrate (D02) above the first through groove and the buried oxide layer (X03) of the second SOI wafer, a portion of the oxide layer on the surface of the second device layer substrate (D02) supported by the first device layer substrate (D01) around the first through groove and the buried oxide layer (X03) of the second SOI wafer is also removed.

[0057] In the step of forming the piezoelectric film and the conductor layer,

[0058] The piezoelectric film is also formed on the surface of the extended beam structure,

[0059] Furthermore, the conductor layer extends from the surface of the piezoelectric film to the exposed surface of the second device layer substrate (D02) around the first through groove and supported by the first device layer substrate (D01).

[0060] In at least one embodiment, the method of forming the conductor layer includes:

[0061] Polycrystalline silicon is formed on the surface of the piezoelectric film as the conductor layer by chemical vapor deposition (CVD) or epitaxy (EPI).

[0062] One of the beneficial effects of the embodiments of the present application is that an accelerometer with low manufacturing difficulty, low oscillation circuit noise and high reliability can be obtained.

[0063] With reference to the following description and accompanying drawings, the specific embodiments of the present application are disclosed in detail, indicating the way in which the principles of the present application can be adopted. It should be understood that the embodiments of the present application are not limited in scope. Within the scope of the spirit and clauses of the appended claims, the embodiments of the present application include many changes, modifications and equivalents.

[0064] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0065] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] The elements and features described in one figure or one implementation of the present application embodiment may be combined with the elements and features shown in one or more other figures or implementations. In addition, in the accompanying drawings, similar reference numerals represent corresponding parts in several figures and can be used to indicate corresponding parts used in more than one implementation.

[0067] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0068] Figure 1 is a top view of the accelerometer of the embodiment of the present invention after the top cover structure B01 is removed;

[0069] Figure 2 yes Figure 1 A schematic diagram of a substructure F100 of an accelerometer in FIG.

[0070] Figure 3 yes Figure 1 A schematic diagram of another substructure AM100 of the accelerometer in FIG.

[0071] Figure 4 Is Figure 1 A schematic diagram of the resulting gap / hole TH100;

[0072] Figure 5 yes Figure 3 A schematic diagram of details not described in;

[0073] Figure 6 yes Figure 1 A schematic diagram cut along the line AA';

[0074] Figure 7 yes Figure 1 A schematic diagram of a section along the line BB';

[0075] Figures 8 to 24 is through Figure 1 A partial cross-sectional view of the processing technology;

[0076] Fig.25 It is a flow chart of a method for manufacturing an accelerometer. DETAILED DESCRIPTION

[0077] The foregoing and other features of the present application will become apparent through the following description with reference to the accompanying drawings. In the description and the accompanying drawings, specific embodiments of the present application are specifically disclosed, which show some embodiments in which the principles of the present application can be adopted. It should be understood that the present application is not limited to the described embodiments. On the contrary, the present application includes all modifications, variations and equivalents falling within the scope of the attached claims. Various embodiments of the present application are described below in conjunction with the accompanying drawings. These embodiments are exemplary only and are not limitations of the present application.

[0078] In the embodiments of the present application, the terms "first", "second", etc. are used to distinguish different elements in terms of title, but do not indicate the spatial arrangement or temporal order of these elements, etc., and these elements should not be limited by these terms. The term "and / or" includes any one and all combinations of one or more of the associated listed terms. The terms "comprising", "including", "having", etc. refer to the presence of the stated features, elements, components or components, but do not exclude the presence or addition of one or more other features, elements, components or components.

[0079] In the embodiments of the present application, the singular forms "a", "the", etc. include plural forms and should be broadly understood as "a kind" or "a type" rather than being limited to the meaning of "one"; in addition, the term "said" should be understood to include both singular and plural forms, unless the context clearly indicates otherwise. In addition, the term "according to" should be understood as "at least in part according to...", and the term "based on" should be understood as "at least in part based on...", unless the context clearly indicates otherwise.

[0080] The embodiments of the present application are described below with reference to the accompanying drawings.

[0081] In each embodiment of the present application, the direction perpendicular to the surface of the lower substrate is called the height direction, that is, the Z direction; in the height direction, the direction from the lower substrate to the capping structure is the "up" direction, and the direction opposite to the "up" direction is the "down" direction; the dimension in the height direction is called thickness or height. The above description of the direction is only for the convenience of explanation and does not represent the direction of the actual manufacture and use of the accelerometer.

[0082] Example 1

[0083] Embodiment 1 provides an accelerometer.

[0084] Figure 1 is a top view of the accelerometer of the embodiment of the present invention after the top cover structure B01 is removed. Figure 2 yes Figure 1 A schematic diagram of a substructure F100 of the accelerometer in FIG. Figure 3 yes Figure 1A schematic diagram of another substructure AM100 of the accelerometer in FIG. Figure 4 Is Figure 1 A schematic diagram of the resulting gap / hole TH100, Figure 5 yes Figure 3 A partial enlarged schematic diagram of a detail not described in Figure 6 yes Figure 1 A schematic diagram cut along the line AA'. Figure 7 yes Figure 1 A schematic diagram of a section taken along line BB'.

[0085] like Figure 1 , 2 As shown in 3, Figure 1 The structure 100 shown may include Figure 2 The substructures F100 and Figure 3 Substructure AM100 shown.

[0086] like Figure 2 As shown, the substructure F100 includes frames FR10, FR11 and FR12, and a space SP01 is formed in the frames FR10, FR11 and FR12. Among the frames of the substructure F100, FR10 can be called a peripheral frame, and FR11 and FR12 can be called island frames.

[0087] like Figure 3 and Figure 5 The substructure AM100 shown is also referred to as the core functional unit. The core functional unit AM100 includes: a mass block MA11; lever structures BM12-BM11, BM22-BM21, BM32-BM31 and BM42-BM41 connected to the mass block MA11; a plurality of beam structures, wherein the plurality of beam structures include at least one first beam structure BM51, BM61 and at least one second beam structure BM71, BM81; a plurality of fixed blocks AC11, AC21, AC31, AC41, AC12, AC13, AC22 and AC23, wherein the plurality of fixed blocks include at least one first fixed block AC31 and AC41 and at least one second fixed block AC11 and AC21. In the present application, the lever structure is an optional structure, that is, the core functional unit AM100 may not have the lever structures BM12-BM11, BM22-BM21, BM32-BM31 and BM42-BM41. The embodiment of the present application is described by taking the core functional unit AM100 having a lever structure as an example.

[0088] In the present application, the mass block MA11 is connected to the first fixed blocks AC31 and AC41 through the first beam structures BM51 and BM61, and the second fixed blocks AC11 and AC21 are respectively connected to the intersection of BM11 and BM21 and the intersection of BM31 and BM41 through the second beam structures BM71 and BM81 and the lever structures BM12-BM11, BM22-BM21 and BM32-BM31, BM42-BM41.

[0089] In addition, if Figure 3 As shown, BM12-BM11, BM22-BM21 and MA11 enclose a gap SP11, and BM32-BM31, BM42-BM41 and MA11 enclose a gap SP12.

[0090] like Figure 6 and Figure 7 As shown, frames FR10, FR11 and FR12 and a plurality of fixing blocks AC11, AC21, AC31, AC41, AC12, AC13, AC22 and AC23 are supported on a lower substrate H01 and / or a cover structure B01 ( Figure 6 , Figure 7 As shown), for example, an oxide layer X01 is connected between the frame and the multiple fixed blocks and the lower substrate H01, and the oxide layer X01 is, for example, a buried oxide layer of silicon on insulator (SOI). The mass block MA11 and the lever structures BM12-BM11, BM22-BM21, BM32-BM31, BM42-BM41 can move relative to the lower substrate H01, that is, the mass block structure and the lever structure are not connected to the lower substrate, so they can move relative to the lower substrate H01 and / or the capping structure B01, for example, there is no oxide layer X01 between the mass block structure and the lever structure and the lower substrate H01. In addition, there may also be no oxide layer X01 between the beam structure and the lower substrate H01.

[0091] The lower substrate, frame and cover structure enclose a sealed cavity, which includes at least a piezoelectric film and a conductor layer, but does not include metal. Therefore, the out-gassing effect of the metal electrode can be avoided, and the manufacturing method is compatible with the high-temperature bonding process, ensuring that the sealed cavity has high sealing performance, and the environment in the sealed cavity is not easy to change, thereby ensuring the long-term reliability of the sensor.

[0092] In addition, the mass block MA11 and the lever structure can also move or deform relative to the fixed blocks.

[0093] Therefore, through the embodiments of the present application, an accelerometer with low manufacturing difficulty, low oscillation circuit noise and high reliability can be obtained.

[0094] In some embodiments, the surfaces of the second beam structures BM71, BM81 connected to the second fixed blocks AC11, AC21 and the lever structures BM12-BM11, BM21-BM22 and BM31-BM32, BM41-BM42 are covered with piezoelectric films PZ11 and PZ21, and the surface of the piezoelectric film PZ11 is covered with conductor layers PS11 and PS12, while the surface of the piezoelectric film PZ21 is covered with conductor layers PS21 and PS22.

[0095] In some embodiments, the material of the conductor layers PS21 and PS22 is polysilicon.

[0096] In some embodiments, the plurality of fixing blocks AC11, AC21, AC31, AC41, AC12, AC13, AC22 and AC23 further include a third fixing block AC12, AC13, AC22, AC23, and the conductor layers PS21, PS22 are guided from the second beam structures BM71, BM81 to the surface of at least one third fixing block AC12, AC13, AC22, AC23 through extension beams BM72, BM73, BM82, BM83. There is a gap between the extension beams BM72, BM73, BM82, BM83 and the second beam structures BM71, BM81, and the conductor layers PS21, PS22 are formed across the gap. For example, Figure 5 and Figure 7 As shown, the piezoelectric film PZ11 and the conductor layers PS11 and PS12 located on the surface of BM71 extend across the gap G2 to the surfaces of BM72 and BM73, respectively, and the extended end of PS11 exceeds the end of PZ11 located at the edge of the fixed block AC12 and overlaps the surface of AC12, and the extended end of PS12 exceeds the end of PZ11 located at the edge of the fixed block AC13 and overlaps the surface of AC13. The piezoelectric film PZ21 and the conductor layers PS21 and PS22 located on the surface of BM81 extend across the gap G2 to the surfaces of BM82 and BM83, respectively, and the extended end of PS21 exceeds the end of PZ21 located at the edge of the fixed block AC22 and overlaps the surface of AC22, and the extended end of PS22 exceeds the end of PZ21 located at the edge of the fixed block AC23 and overlaps the surface of AC23.

[0097] In the present application, the material of the piezoelectric film PZ11 includes polycrystalline or single crystal aluminum nitride and doped aluminum nitride (such as scandium doped aluminum nitride). The materials of the mass block MA11, the lever structures BM12-BM11, BM22-BM21, BM32-BM31 and BM42-BM41, the beam structures BM51, BM61, BM71, BM81 and the fixed blocks AC31, AC41, AC11, AC21 are all made of single crystal silicon, and the conductor material is polycrystalline silicon.

[0098] In this way, through the above structure, the second beam structure BM71, the piezoelectric film PZ11, the conductor layers PS11 and PS12 constitute a group of piezoelectric resonance-detection structures; the second beam structure BM81, the piezoelectric film PZ21, the conductor layers PS21 and PS22 constitute another group of piezoelectric resonance-detection structures. Among them, for the left structure, the second beam structure BM71 acts as a common ground electrode, the conductor layer PS12 acts as an excitation input electrode, and the conductor layer PS11 acts as a signal output electrode; for the right structure, the beam structure BM81 acts as a common ground electrode, the conductor layer PS22 acts as an excitation input electrode, and the conductor layer PS21 acts as a signal output electrode. During operation, taking the structure on the left as an example, an excitation signal is applied between the input electrode PS12 and the common ground electrode BM71. Based on the piezoelectric effect and inverse piezoelectric effect of the piezoelectric film PZ11, a resonant frequency signal can be obtained between the output end PS11 and the common ground electrode BM71. When the system in which the accelerometer is located generates acceleration in the XY plane, an inertial force field will be generated in the system in the XY plane. The mass block MA11 applies the inertial force to the second beam structures BM71 and BM81 through the lever structures BM11-BM12 and BM21-BM22, thereby causing the resonant frequency of the second beam structures BM71 and BM81 to change. The acceleration can be measured by measuring and reading the resonant frequency change through the circuit.

[0099] In some embodiments, Figure 4 As shown, Figure 4 Is Figure 1 The obtained gap / hole TH100 is extracted and marked as V1, V2, V3 and V4 according to the connectivity of the gap / hole (V4 is the through hole of the mass block MA11). In addition, in order to ensure the accuracy and process reliability of the accelerometer, the width L11 of the above gaps and holes is in the same size order, such as between 2 microns and 20 microns.

[0100] In some embodiments, Figure 6 and Figure 7 As shown, the accelerometer further includes a capping structure B01 and at least one island structure B11, B22 and B23, wherein the island structures B11, B22 and B23 are formed in the top capping structure B01 and are electrically isolated from the top capping structure B01 in the lateral direction, for example, Figure 6As shown, the island structure B11 is obtained by an etching process of the capping structure B01, and the electrical isolation of the island structure B11 from the surrounding structures is achieved through the gap G11 between the island structure B11 and the capping structure B01 in a direction parallel to the back of the lower substrate H01, that is, in a direction parallel to the XY plane. The lower surface of the capping structure B01 is bonded to the upper surface of the frames FR10, FR11, and FR12, and the lower surface of each of the island structures B11, B22, and B23 is bonded to the upper surface of the second fixed blocks AC11, AC21 and the third fixed blocks AC12, AC13, AC22, and AC23 to form an electrical connection. In at least one example, the number of island structures can be the same as the number of multiple fixed blocks, and the position of each island structure can correspond to the position of each fixed block.

[0101] In some embodiments, Figure 7 As shown, a gap G23 is formed between each of the island structures B11, B22 and B23 and the top cover B01, and the gap G23 is filled with insulating material X04. Thus, the island structures B11, B22 and B23 can be electrically isolated from the surrounding structures in the direction parallel to the XY plane.

[0102] In some embodiments, metal layers CT11, CT22, and CT23 are formed on top of each of the island structures B11, B22, and B23, respectively.

[0103] For example, the oxide layer X04 on the top of the island structure B11 has an opening, and the metal layer CT11 is attached to the upper surface of the island structure B11 through the opening and acts as an electrode contact. The lower surface of the protrusion under B01 is bonded to the upper surface of the frame FR10 through a silicon-silicon bonding process, and the lower surface of the protrusion under the island structure B11 is bonded and sealed and electrically connected to the upper surface of the second fixing block AC11, thereby achieving the goal of directing the electrical signal of the resonant structure to the outside of the cover structure.

[0104] In some embodiments, Figure 7 As shown, a cavity structure E0 is formed under the cover structure B01, and the cavity structure E0 is located at least above the mass block MA11, the beam structures BM71, BM81 and the lever structures BM11-BM12, BM21-BM22, BM31-BM32 and BM41-BM42. Thus, the cover structure B01 can avoid the movable structure and improve the reliability of electrical isolation.

[0105] Example 2

[0106] Embodiment 2 provides a method for manufacturing an accelerometer, which is used to manufacture the accelerometer in Embodiment 1.

[0107] Fig.25 FIG. 2 is a flow chart of the manufacturing method of the accelerometer of Example 2. Fig.25 As shown, the manufacturing method includes:

[0108] Operation 2401, forming a first through groove in a first device layer substrate D01 of a first wafer;

[0109] Operation 2402 , bonding the second device layer substrate D02 of the second wafer to the first device layer substrate D01 ;

[0110] Operation 2403, forming a piezoelectric film on a region of the second device layer substrate (D02) corresponding to the beam structure on a surface away from the first device layer substrate (D01), and forming a conductor layer on the surface of the piezoelectric film; and

[0111] In operation 2404, the second device layer substrate (D02) and the first device layer substrate (D01) form at least one of a mass structure, a beam structure, a lever structure, and an extended beam structure of the accelerometer.

[0112] like Fig.25 As shown, the manufacturing method also has:

[0113] Operation 2405 : remove the lower substrate of the second SOI wafer, and thin the buried oxide layer X02 of the second SOI wafer to a target thickness.

[0114] like Fig.25 As shown, the manufacturing method also has:

[0115] Operation 2406 , forming a second through groove and / or through hole in the buried oxide layer X02 of the second SOI wafer, the second device layer substrate D02 and the first device layer substrate D01 , wherein the second through groove and / or through hole terminates at the buried oxide layer X01 of the first wafer.

[0116] like Fig.25 As shown, the manufacturing method also has:

[0117] Operation 2407 , depositing an oxide layer X03 on the surface of the buried oxide layer X02 of the second SOI wafer, wherein the oxide layer covers the second through grooves and / or through holes.

[0118] like Fig.25 As shown, the manufacturing method of the accelerometer also has:

[0119] Operation 2408 : Fix the capping structure and the at least one island structure to a surface of the second device layer substrate D02 that faces away from the first device layer substrate ( D01 ).

[0120] In some embodiments of operation 2403, the step of forming a piezoelectric film in a region corresponding to the beam structure on a surface of the second device layer substrate (D02) away from the first device layer substrate (D01), and forming a conductor layer on the surface of the piezoelectric film includes:

[0121] At least the oxide layer on the surface of the second device layer substrate (D02) above the first through groove and the buried oxide layer (X03) of the second SOI wafer are removed, a piezoelectric film is formed on the surface of the exposed second device layer substrate (D02) facing away from the first device layer substrate (D01), and a conductor layer is formed on the surface of the piezoelectric film.

[0122] In some embodiments of operation 2403, the method of forming the conductor layer includes performing chemical vapor deposition (CVD) or epitaxy (EPI) on the surface of the piezoelectric film to form polysilicon as the conductor layer;

[0123] In some embodiments of operation 2403, the step of forming at least one of a mass structure, a beam structure, a lever structure, and an extended beam structure of the accelerometer using the second device layer substrate (D02) and the first device layer substrate (D01) includes:

[0124] Through the release process, the remaining oxide layer and the buried oxide layer X032 of the second SOI wafer are removed to form a mass block structure, a beam structure, a lever structure and an extended beam structure, and the buried oxide layer X01 of the first SOI wafer at the bottom of the lever structure is removed.

[0125] Next, combine Figures 8 to 24 The manufacturing method of Example 2 is described.

[0126] Figures 8 to 24 Respectively through Figure 1 A partial cross-sectional view of the processing technology is a schematic diagram. Figure 8-11 , 13, 15, 17, 19, 21, 23 are schematic diagrams cut along the straight line AA' direction, Fig.12 , 14 , 16, 18, 20, 22, and 24 are schematic diagrams cut along the straight line BB' direction.

[0127] like Figures 8 to 24 As shown, the manufacturing method of the accelerometer includes:

[0128] S01, forming a first through groove V01 in a first device layer substrate D01 of a first wafer;

[0129] For example, Figure 8As shown, the first SOI (Silicon-On-Insulator) wafer includes a single crystal silicon lower substrate H01, a buried oxide layer X01 and a single crystal silicon device layer substrate D01. Through grooves are processed in the device layer substrate D01 by patterning and deep silicon etching processes.

[0130] S02, bonding the second device layer substrate D02 of the second wafer to the first device layer substrate D01;

[0131] For example, Fig. 9 As shown, the second SOI wafer is turned over and the second device layer substrate D02 is aligned with the substrate. Figure 1 Since the thickness of the second device layer substrate D01 and the first device layer substrate D02 is directly related to the device performance, the thickness control of the first device layer substrate D01 and the second device layer substrate D02 can be achieved through product customization or grinding.

[0132] S03, removing the lower substrate of the second SOI wafer, and thinning the buried oxide layer X02 of the second SOI wafer to a target thickness;

[0133] For example, Fig.10 As shown, the lower substrate H02 of the second SOI wafer can be removed by grinding and etching processes, and its buried oxide layer X02 can be thinned to a target thickness by grinding processes.

[0134] S04, forming second through grooves V1, V2 and / or through holes V4 in the buried oxide layer X02 of the second SOI wafer, the second device layer substrate D02 and the first device layer substrate D01, wherein the second through grooves V1, V2 and / or through holes V4 terminate at the buried oxide layer X01 of the first wafer;

[0135] For example, Fig.11 , Fig.12 As shown, the thinned buried oxide layer X02 is patterned, and the second through grooves V1 and V2 or through holes V4 penetrating the first device layer substrate D01 and the second device layer substrate D02 are processed through a deep silicon etching process. The second through grooves V1 and V2 or through holes V4 basically end at the buried oxide layer X01. Depending on the specific process conditions, the buried oxide layer X01 may also be partially etched in the above-mentioned deep silicon etching process.

[0136] S05, depositing an oxide layer X03 on the surface of the buried oxide layer X02 of the second SOI wafer, wherein the oxide layer X03 covers the second through grooves V1, V2 and / or through holes V4;

[0137] For example, Fig.13As shown, an oxide layer X03 of a certain thickness is deposited on the surface of the patterned buried oxide layer X02, and X03 does not completely fill the second through grooves V1 and V2 or through holes V4 located in the second device layer substrate D02.

[0138] S06, removing at least the oxide layer X02 on the surface of the second device layer substrate D02 above the first through groove V01 and the buried oxide layer X03 of the second SOI wafer, forming a piezoelectric film PZ11 on the exposed surface of the second device layer substrate D02, and forming conductor layers PS11 and PS12 on the surface of the piezoelectric film PZ11;

[0139] For example, Figures 14 to 19 As shown in the process, the oxide layer X02 and the buried oxide layer X03 on the surface of the beam structure having only the second device layer substrate D02 material are removed by a patterning process, and a piezoelectric film PZ11 is formed on the surface of the second beam structures BM71 and BM81 by a deposition and patterning process. Depending on the specific process conditions, the edge of the piezoelectric film PZ11 may cover a small amount of the edge of the surrounding oxide layer X02.

[0140] S07. Through a release process, the remaining oxide layer X03 and the buried oxide layer X03 of the second SOI wafer are removed to form a mass block MA11 structure, beam structures BM11-BM81, BM12-BM82, lever structures BM12-BM11, BM21-BM22, BM31-BM32, BM41-BM42, and extended beams BM72, BM73, BM82, BM83 structures, and the buried oxide layer X01 of the first SOI wafer at the bottom of the lever structures BM12-BM11, BM21-BM22, BM31-BM32, BM41-BM42 is removed;

[0141] For example, Figure 20 to Figure 22 As shown in the process, through a release process (the etchant is preferably gaseous hydrofluoric acid), the oxide layer X03 and the buried oxide layer X02 are completely removed, and the buried oxide layer X01 is partially removed to form a mass block structure MA11, a resonant beam BM71 and lever structures BM12-BM11, BM21-BM22 and BM31-BM32, BM41-BM42.

[0142] S08 , fixing the capping structure B01 and at least one island structure B11 , B22 , B23 to the surface of the second device layer substrate D02 .

[0143] For example, Figure 23 to Figure 24 As shown in the process, the cover B01 (including the auxiliary structure) is fixed to the surface of the second device layer substrate D02 through a silicon-silicon bonding process to form a final packaging and electrical connection structure.

[0144] In some embodiments, in the step of removing the oxide layer X02 on the surface of the second device layer substrate D02 above the first through groove V01 and the buried oxide layer X03 of the second SOI wafer, part of the oxide layer X02 on the surface of the second device layer substrate D02 supported by the first device layer substrate D01 around the first through groove V01 and the buried oxide layer X02 of the second SOI wafer are also removed, and in the step of forming the piezoelectric film PZ11 and the conductor layers PS11 and PS12, the piezoelectric film PZ11 is also formed on the surface of the extended beams BM72, BM73, BM82, and BM83 structure, and the conductor layers PS11 and PS12 extend from the surface of the piezoelectric film PZ11 to the exposed surface of the second device layer substrate D02 supported by the first device layer substrate D01 around the first through groove V01.

[0145] The preferred embodiments of the present application are described above with reference to the accompanying drawings. Many features and advantages of these embodiments are clear from this detailed description, and therefore the appended claims are intended to cover all such features and advantages of these embodiments that fall within their true spirit and scope. In addition, since many modifications and changes are easily conceivable to those skilled in the art, the embodiments of the present application are not intended to be limited to the precise structures and operations illustrated and described, but all suitable modifications and equivalents that fall within their scope may be covered.

Claims

1. An accelerometer, It is characterized in that The accelerometer comprises: a frame having a space formed therein; and A core functional unit, which is located in the space, The core functional units include: Mass block; a plurality of beam structures, including at least one second beam structure (BM71, BM81); and A plurality of fixed blocks, including at least one second fixed block (AC11, AC21), wherein the second fixed block is connected to the mass block via the second beam structure, wherein the frame and the plurality of fixing blocks are supported on a lower substrate and / or a cover structure, The surface of the second beam structure is covered with a piezoelectric film, and the surface of the piezoelectric film is covered with a conductor layer.

2. The accelerometer according to claim 1, It is characterized in that The mass is movable relative to the lower substrate and / or cover structure.

3. The accelerometer according to claim 1, It is characterized in that The mass block has a plurality of through holes.

4. The accelerometer according to claim 1, It is characterized in that The plurality of beam structures further comprises at least one first beam structure (BM51, BM61), The plurality of fixing blocks further include at least one first fixing block (AC31, AC41), The first fixing block is connected to the mass block through the first beam structure.

5. The accelerometer according to claim 4, It is characterized in that The core functional unit also includes: A lever structure, wherein the second beam structure is connected to the mass block via the lever structure, and the lever structure is capable of moving relative to the lower substrate or the cover structure.

6. The accelerometer according to claim 5, It is characterized in that The material of the conductor layer is polysilicon.

7. The accelerometer according to claim 5, It is characterized in that The plurality of fixing blocks further include a third fixing block (AC12, AC13, AC22, AC23), The conductor layer is guided from the second beam structure (BM71, BM81) to at least one of the third fixed block surfaces via extension beams (BM72, BM73, BM82, BM83), There is a gap between the extending beam and the second beam structure, and the conductor layer is formed across the gap.

8. The accelerometer according to claim 7, It is characterized in that The accelerometer further comprises: The sealing structure (B01); and at least one island structure formed in the cover structure and electrically isolated from the cover structure in a lateral direction, wherein the lower surface of the cover structure is bonded to the upper surface of the frame, The lower surface of each of the island structures is bonded to the upper surface of one of the second fixing block and the third fixing block to form an electrical connection.

9. The accelerometer according to claim 8, It is characterized in that A gap is formed between each of the isolated island structures and the cover structure to surround the isolated island structure, and the gap is filled with insulating material.

10. The accelerometer according to claim 8, It is characterized in that A metal layer (CT11, CT22, CT23) is formed on the top of each of the isolated island structures.

11. The accelerometer according to claim 8, It is characterized in that A cavity structure is formed below the cover structure (B01), and the cavity structure is at least located above the mass block, the beam structure and the lever structure.

12. The accelerometer according to claim 8, It is characterized in that The number of the island structures is the same as the number of the plurality of fixing blocks.

13. The accelerometer according to claim 1, It is characterized in that The frame and the plurality of fixing blocks are connected to the lower substrate through a buried oxide layer.

14. The accelerometer according to claim 1, It is characterized in that The lower substrate, the frame and the cover structure enclose a sealed cavity, the sealed cavity at least includes a piezoelectric film and a conductor layer, and the sealed cavity does not include metal.

15. A method for manufacturing an accelerometer, for manufacturing the accelerometer according to any one of claims 1 to 14, It is characterized in that The manufacturing method of the accelerometer comprises: forming a first through groove in a first device layer substrate (D01) of a first wafer; Bonding a second device layer substrate (D02) of a second wafer to the first device layer substrate (D01); forming a piezoelectric film in a region corresponding to the beam structure on a surface of the second device layer substrate (D02) that is away from the first device layer substrate (D01), and forming a conductor layer on a surface of the piezoelectric film; as well as The second device layer substrate (D02) and the first device layer substrate (D01) are used to form at least one of the mass block structure, the beam structure, the lever structure and the extended beam structure of the accelerometer.

16. The method for manufacturing an accelerometer according to claim 15, It is characterized in that The manufacturing method of the accelerometer also comprises: The lower substrate of the second SOI wafer is removed, and the buried oxide layer (X02) of the second SOI wafer is thinned to a target thickness.

17. The method for manufacturing an accelerometer according to claim 16, It is characterized in that The manufacturing method of the accelerometer also comprises: A second through groove and / or through hole is formed in the buried oxide layer (X02) of the second SOI wafer, the second device layer substrate (D02) and the first device layer substrate (D01), and the second through groove and / or the through hole terminates at the buried oxide layer (X01) of the first wafer.

18. The method for manufacturing an accelerometer according to claim 17, It is characterized in that The manufacturing method of the accelerometer also comprises: An oxide layer (X03) is deposited on the surface of the buried oxide layer (X02) of the second SOI wafer, wherein the oxide layer covers the second through groove and / or the through hole.

19. The method for manufacturing an accelerometer according to claim 17, It is characterized in that The steps of forming a piezoelectric film in a region corresponding to the beam structure on a surface of the second device layer substrate (D02) away from the first device layer substrate (D01), and forming a conductor layer on the surface of the piezoelectric film include: At least the oxide layer on the surface of the second device layer substrate (D02) above the first through groove and the buried oxide layer (X03) of the second SOI wafer are removed, the piezoelectric film is formed on the surface of the exposed second device layer substrate (D02) facing away from the first device layer substrate (D01), and the conductor layer is formed on the surface of the piezoelectric film.

20. The method for manufacturing an accelerometer according to claim 19, It is characterized in that The step of forming at least one of the mass structure, the beam structure, the lever structure and the extended beam structure of the accelerometer by using the second device layer substrate (D02) and the first device layer substrate (D01) comprises: Through the release process, the remaining oxide layer and the buried oxide layer (X03) of the second SOI wafer are removed to form the mass block structure, the beam structure, the lever structure and the extended beam structure, and the buried oxide layer (X01) of the first SOI wafer at the bottom of the lever structure is removed.

21. The method for manufacturing an accelerometer according to claim 20, It is characterized in that The manufacturing method of the accelerometer also comprises: A capping structure and at least one island structure are fixed to a surface of the second device layer substrate (D02) facing away from the first device layer substrate (D01).

22. The method for manufacturing an accelerometer according to claim 21, It is characterized in that In the step of removing the oxide layer on the surface of the second device layer substrate (D02) above the first through groove and the buried oxide layer (X03) of the second SOI wafer, part of the oxide layer on the surface of the second device layer substrate (D02) supported by the first device layer substrate (D01) around the first through groove and the buried oxide layer (X02) of the second SOI wafer are also removed.

23. The method for manufacturing an accelerometer according to claim 21, It is characterized in that In the step of forming the piezoelectric film and the conductor layer, The piezoelectric film is also formed on the surface of the extended beam structure, Furthermore, the conductor layer extends from the surface of the piezoelectric film to the exposed surface of the second device layer substrate (D02) around the first through groove and supported by the first device layer substrate (D01).

24. The method for manufacturing an accelerometer according to claim 15, It is characterized in that The method of forming the conductor layer includes: Polycrystalline silicon is formed on the surface of the piezoelectric film as the conductor layer by chemical vapor deposition (CVD) or epitaxy (EPI).