Synchronous rectification driving circuit applied to multiple parallel switch tubes

Abstract

The invention discloses a synchronous rectification driving circuit applied to multiple parallel switch tubes, which comprises a voltage sampling unit, a turn-on threshold comparison unit, a turn-off threshold comparison unit, a logic control unit, first to (m-1) th parallel control units and first to mth driving units, m is greater than or equal to n, and n is the number of the parallel switch tubes. The input side of the voltage sampling unit is connected with a voltage sampling port, and the output side is connected with the input side of the opening and closing threshold comparison unit; the output side of the turn-on and turn-off threshold comparison unit is connected with the input side of the logic control unit; the output side of the logic control unit is connected with the input side of the ith driving unit through the ith parallel control unit, and i = 1,..., m-1; the output side of the logic control unit is also connected with the input side of the mth driving unit; the output sides of the first to nth driving units are connected with the grid electrodes of the switching tubes; and the voltage sampling ports are connected in parallel to the two sides of the parallel switch tube. And the parallel synchronous rectifier tubes working under large current are enabled to efficiently and stably work in a synchronous rectification state at the same time.

Description

Technical Field

[0001] The invention relates to a synchronous rectification drive circuit applied to multiple parallel switch tubes, belonging to the technical field of switch power supply and drive control. Background Art

[0002] In recent years, with the continuous updating and iteration of power semiconductor technology, switching power supplies have been continuously developing towards high power, high energy density and integration, and are widely used in low-voltage environments. Among them, the rectifier circuit, as a common link in the switching power supply, is composed of diodes connected according to the circuit structure, and plays a vital role in the normal operation of the switching power supply. At the same time, under low-voltage environments, the rectifier circuit often operates in a continuous high current mode. Considering that the conduction loss of the diode due to the clamping voltage is too high, which reduces the efficiency of the switching power supply, a switch tube with a smaller on-resistance is used. The switch tube operates according to the diode conduction logic, which is called a synchronous rectifier tube, and then a new type of synchronous rectifier circuit is constructed. However, in actual application, considering the limited current carrying capacity of a single synchronous rectifier tube, multiple synchronous rectifier tubes with the same parameters need to be operated in parallel. Due to the limitations of the existing driving circuits of parallel synchronous rectifier tubes, there are some technical problems that need to be solved in practical applications.

[0003] First of all, the synchronous rectification circuit constructed by the synchronous rectifier is an important improvement measure for improving the efficiency of the switching power supply because of its low conduction loss. In order to improve the current-carrying capacity of the synchronous rectification circuit, multiple synchronous rectifiers are connected in parallel, which has become the main means. However, since the synchronous rectifier is essentially a switching device and needs to be driven by a driving signal, the synchronization and consistency of the synchronous rectifier driving signal have become the focus of research. The inconsistency of the driving signal will cause the conduction state of different synchronous rectifiers to be different, which will seriously cause thermal breakdown of the synchronous rectifier, seriously affect the normal operation of the equipment, and even cause safety accidents. The existing technology mainly controls the consistency of the switching state of the synchronous rectifier by setting a liaison control link in each synchronous rectifier driving circuit. The liaison control link is located between the driving link and the synchronous rectifier.

[0004] In addition, the driving signal of the synchronous rectification circuit comes from a single-chip microcomputer or a synchronous rectification chip. Among them, the synchronous rectification chip is widely used because it is small, does not require editing complex programs, and is easy to use. The market includes NCP4308, FAN6208, etc. However, the output driving signal of this type of chip can only act on a single synchronous rectifier tube, and the driving signal power cannot meet the driving requirements of multiple synchronous rectifier tubes, which limits the use of the chip. In the prior art, it is recommended to use a single-chip microcomputer output signal to connect an external power amplifier circuit to achieve the driving requirements of multiple synchronous rectifier tubes.

[0005] To sum up, the synchronous rectification drive circuit still has shortcomings in the synchronization and consistency of the switching state of the synchronous rectifier tube, the circuit driving capability and other issues. Designing a synchronous rectification drive circuit for multiple parallel switching tubes has important application value, which can improve the stability and reliability of the parallel operation of the synchronous rectifier tubes and help improve the efficiency and power capacity of the switching power supply. Summary of the invention

[0006] The technical problem to be solved by the present invention is to provide a synchronous rectification drive circuit applied to multiple parallel switch tubes, which can enable the parallel synchronous rectifier tubes working under large current to work efficiently and stably in the synchronous rectification state at the same time.

[0007] The present invention adopts the following technical solutions to solve the above technical problems:

[0008] A synchronous rectification driving circuit applied to multiple parallel switch tubes, the number of the parallel switch tubes is n, n is a positive integer greater than or equal to 2, the synchronous rectification driving circuit comprises a voltage sampling unit, a turn-on threshold comparison unit, a turn-off threshold comparison unit, a logic control unit, first to m-1th parallel control units, first to mth drive units, a voltage sampling port VS, a parallel enable port TRG and a drive signal output bus Drive Bus, m is a positive integer, and m≥n;

[0009] The input side of the voltage sampling unit is connected to the voltage sampling port VS, and the output side is connected to the input side of the turn-on threshold comparison unit and the turn-off threshold comparison unit; the output side of the turn-on threshold comparison unit and the turn-off threshold comparison unit are connected to the input side of the logic control unit; the output side of the logic control unit is connected to the input side of the i-th driving unit via the i-th parallel control unit, i=1,…,m-1; the output side of the logic control unit is also connected to the input side of the m-th driving unit; the input sides of the first to m-1-th parallel control units are also connected to the parallel enable port TRG; the output sides of the 1st to n-th driving units, i.e., the drive signal output bus Drive Bus of the synchronous rectification driving circuit, are connected to the gates of each switch tube; the voltage sampling port VS of the synchronous rectification driving circuit is connected in parallel to both sides of the parallel switch tube.

[0010] As a preferred solution of the present invention, the voltage sampling unit includes a reference level V bias , clamping diode Z 1 and Z 2 、Diode D 1 , resistor R 1 And transistor Q 1 , the input side of the voltage sampling unit is connected to the input value of the voltage sampling port VS, and the output side Out1 is connected to the input sides of the turn-on threshold comparison unit and the turn-off threshold comparison unit;

[0011] Diode D 1 and resistor R 1 Parallel connection, diode D 1 The anode of the diode D is connected to the voltage sampling port VS. 1 The cathode of the three-stage tube Q 1 The collector connection of bias Cathode, clamping diode Z 1 and Z 2 The anodes of the two terminals are connected together and connected to the ground GND; the reference level V bias Anode and clamping diode Z 1 The cathode of transistor Q 1 The base connection of transistor Q 1 The emitter and clamping diode Z 2 The cathodes are respectively connected to the output side Out1.

[0012] As a preferred solution of the present invention, the turn-on threshold comparison unit includes a first voltage comparator; the positive input side of the first voltage comparator is connected to the reference level V th_on The negative input side is connected to the output side Out1 of the voltage sampling unit, and the output signal On is connected to the input side of the logic control unit;

[0013] The turn-off threshold comparison unit includes a second voltage comparator; the negative input side of the second voltage comparator is connected to the reference level V th_off The positive input side is connected to the output side Out1 of the voltage sampling unit, and the output signal Off is connected to the input side of the logic control unit.

[0014] As a preferred solution of the present invention, the logic control unit includes an anti-shake unit, a NOR gate, first to second RS triggers and first to third NOR gates;

[0015] The output signal On of the threshold comparison unit is connected to the input side of the anti-shake unit, and the output side V blank The output signal Off of the turn-off threshold comparison unit is connected to the second input terminal of the NOR gate via the first NOR gate; the output side of the NOR gate is connected to the R input terminal of the first RS trigger; the Q output terminal of the first RS trigger obtains the logic control unit output signal Pulse_down via the second NOR gate, and the Q output terminal of the first RS trigger is connected to the R input terminal of the second RS trigger via the second NOR gate; the Q output terminal of the second RS trigger obtains the logic control unit output signal Pulse_up via the third NOR gate.

[0016] As a preferred solution of the present invention, the anti-shake unit includes an AND gate, a fourth NOT gate, a third voltage comparator, a capacitor C 1 , power supply level VCC, PNP transistor Q 4 And NPN transistor Q 5 ;

[0017] The output signal On of the turn-on threshold comparison unit is connected to the PNP transistor Q 4 The base of NPN transistor Q 5 The base of the PNP transistor Q is connected to the first input terminal of the AND gate; 4 The emitter is connected to the power supply level VCC, and the collector is connected to the NPN transistor Q 5 The collector of the capacitor C is connected to the negative input side of the third voltage comparator; 1 Connect in parallel to the NPN transistor Q 5 The positive input side of the third voltage comparator is connected to the reference voltage V bref The output terminal of the third voltage comparator is connected to the second input terminal of the AND gate; the AND gate outputs a signal V blank As the output side of the anti-shake unit.

[0018] As a preferred solution of the present invention, the first to the (m-1)th parallel control units have the same structure, and each parallel control unit includes a pull-down circuit and a pull-up circuit;

[0019] The pull-down circuit includes resistor R 2 and R 3 , transistor Q 6 And diode D 2 ; Resistance R 2 One side is connected to the logic control unit output signal Pulse_down, and the other side is connected to the transistor Q 6 Collector and diode D 2 Anode connection; transistor Q 6 The base is connected to the parallel enable port TRG, and the emitter is connected to the resistor R 3 One side connected; diode D 2 The cathode is connected to the parallel control unit signal output terminal Pulse_down1; the resistor R 3 The other side is connected to ground GND;

[0020] The pull-up circuit includes a resistor R 4 and R 5 , transistor Q 7 And diode D 3 ; Resistance R 4 One side is connected to the logic control unit output signal Pulse_up, and the other side is connected to the transistor Q7 Collector connection; transistor Q 7 The base is connected to the parallel enable port TRG, and the emitter is connected to the resistor R 5 One side and diode D 2 Anode side connected to diode D 2 The cathode is connected to the parallel control unit signal output terminal Pulse_up1; the resistor R 5 The other side is connected to ground GND.

[0021] As a preferred solution of the present invention, the first to m-th driving units have the same structure and all include a PNP transistor Q 2 、NPN transistor Q 3 And power supply VCC1; PNP transistor Q 2 The emitter is connected to the power supply VCC1; NPN transistor Q 3 The emitter is connected to the ground GND;

[0022] The signal output terminal Pulse_up1 of the i-th parallel control unit and the PNP transistor Q 2 The base of the ith parallel control unit is connected to the signal output terminal Pulse_down1 of the ith driving unit and the NPN transistor Q 3 The base connection of , i = 1, ..., m-1;

[0023] The logic control unit outputs a signal Pulse_up and a PNP transistor Q in the mth drive unit. 2 The logic control unit outputs a signal Pulse_down which is connected to the base of the NPN transistor Q in the mth drive unit. 3 The base connection of

[0024] In the first to nth driving units, each driving unit corresponds to a switch tube, that is, the PNP transistor Q in each driving unit 2 The collector and NPN transistor Q 3 The collectors are connected to the gates of the corresponding switching tubes.

[0025] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects:

[0026] 1. The present invention can ensure that multiple parallel synchronous rectification circuits work stably in a synchronous rectification state at the same time by applying the synchronous rectification driving circuit to multiple parallel switching tubes, which helps to improve the efficiency and power capacity of the switching power supply.

[0027] 2. The present invention controls the consistency of the switch states of the power tubes in the synchronous rectification circuit through a parallel control unit.

[0028] 3. The present invention helps meet the design requirements of compact and miniaturized synchronous rectification circuits through the application of synchronous rectification chips.

[0029] 4. The present invention effectively solves the problem that a single synchronous rectification chip cannot meet the driving capacity of multiple parallel tubes by combining a synchronous rectification chip and a driving control unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a schematic diagram of a synchronous rectification driving circuit applied to multiple parallel switch tubes proposed by the present invention;

[0031] Figure 2 It is the principle diagram of the voltage sampling unit proposed by the present invention;

[0032] Figure 3 It is a circuit diagram of a turn-on threshold comparison unit and a turn-off threshold comparison unit proposed by the present invention;

[0033] Figure 4 is a schematic diagram of a logic control unit proposed by the present invention;

[0034] Figure 5 is a schematic diagram of the anti-shake unit proposed by the present invention;

[0035] Figure 6 is a schematic diagram of a parallel control unit proposed by the present invention;

[0036] Figure 7 is a schematic diagram of a driving unit proposed by the present invention;

[0037] Figure 8 is the simulation result of the voltage sampling unit proposed by the present invention;

[0038] Fig. 9 It is the simulation result of the logic control unit proposed by the present invention;

[0039] Fig.10 This is the simulation result of the anti-shake unit proposed in the present invention. DETAILED DESCRIPTION

[0040] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be interpreted as limiting the present invention.

[0041] like Figure 1 FIG. 1 is a schematic diagram of a synchronous rectification driving circuit for multiple parallel switch tubes proposed by the present invention. The multiple parallel switch tube circuit includes a primary switch network, a transformer T, a capacitor C o , resistor Rload And multiple power field effect tubes connected in parallel. The primary switch network and the primary winding L of the transformer T p The secondary winding L of transformer T is connected in parallel. s One side of the capacitor C o One side is connected, capacitor C o The other side is connected to the drain of the power field effect tubes connected in parallel, and the source of the power field effect tubes connected in parallel is connected to the secondary winding L of the transformer T. s The other side of the capacitor C o With resistor R load Connect in parallel.

[0042] Taking the number of power field effect tubes n=3 as an example, m=3. The synchronous rectification driving circuit includes a voltage sampling unit, a turn-on threshold comparison unit, a turn-off threshold comparison unit, a logic control unit, two parallel control units, three driving units, a voltage sampling port VS, a parallel enable port TRG and a drive signal output bus Drive Bus; the parallel enable port TRG is connected to the high level VCC, and the drive signal output bus Drive Bus is connected to the gate of each power field effect tube; the voltage sampling port VS is connected in parallel to both sides of the parallel power field effect tube.

[0043] The input side of the voltage sampling unit is connected to the voltage sampling port VS, and the output side is connected to the input side of the turn-on threshold comparison unit and the turn-off threshold comparison unit; the output side of the turn-on threshold comparison unit and the turn-off threshold comparison unit are connected to the input side of the logic control unit; the output side of the logic control unit is directly connected to the input side of one of the drive units, and the output side of the logic control unit is also connected to the input side of the parallel control unit respectively; the input side of the parallel control unit is also connected to the parallel enable port TRG; one parallel control unit corresponds to one drive unit, and the output side of the parallel control unit is connected to the drive unit.

[0044] like Figure 2 As shown, in this embodiment, the voltage sampling unit includes a reference level V bias , two clamping diodes Z of the same specification 1 and Z 2 、Diode D 1 , resistor R 1 And transistor Q 1 , the input side of the voltage sampling unit is connected to the input value of the voltage sampling port VS, and the output side Out1 is connected to the input sides of the turn-on threshold comparison unit and the turn-off threshold comparison unit;

[0045] Diode D 1 and resistor R 1 In parallel, the anode of the diode is connected to the voltage sampling port VS, and the cathode of the diode is connected to the triode Q 1The collector connection of bias Cathode, clamping diode Z 1 and Z 2 The anodes of the two terminals are connected together and connected to the ground GND; the reference level V bias Anode and clamping diode Z 1 The cathode of the transistor Q 1 Base connection of the clamping diode Z 2 The cathode of the transistor Q 1 The emitter and output side Out1 are connected.

[0046] like Figure 8 As shown in the figure, the functional simulation of the voltage sampling circuit is given, setting V bias The voltage detected by the voltage sampling port VS varies from -5V to +12V. When the VS voltage exceeds 5V, the sampling output always remains at 5V, achieving the sampling purpose while protecting the circuit from voltage shock.

[0047] like Figure 3 As shown, in this embodiment, the start threshold comparison unit includes a first voltage comparator; the positive input side of the first voltage comparator is connected to the reference level V th_on Connection, reference level V th_on The negative input side is connected to the output side Out1 of the voltage sampling unit, and the output signal On is connected to the input side of the logic control unit. The turn-off threshold comparison unit includes a second voltage comparator; the negative input side of the second voltage comparator is connected to the reference level V th_off Connection, reference level V th_off Take -40mV, connect the positive input side to the output side Out1 of the voltage sampling unit, and connect the output signal Off to the input side of the logic control unit.

[0048] like Figure 4 As shown, in this embodiment, the logic control unit includes an anti-shake unit, two RS triggers, three NOT gates and one NOR gate; the output signal On of the threshold comparison unit is connected to the input side of the anti-shake unit, and the output side V blank It is connected to the S input of RS trigger 1, the input of the NOR gate, and the S input of RS trigger 2; the output signal Off of the shutdown threshold comparison unit is connected to the other side of the NOR gate through the NOR gate; the output side of the NOR gate is connected to the R input of RS trigger 1; the Q output of RS trigger 1 obtains Pulse_down through the NOR gate and is connected to the R input of RS trigger 2; the Q output of RS trigger 2 outputs Pulse_up through the NOR gate.

[0049] The output signal On of the threshold comparison unit is turned on and then passes through the anti-shake unit for logic operation. When On is high, the blanking output is high, the RS trigger R is set to a low level, the S end is high, and the output end Q outputs a high level, which generates an on signal; when Off is high, the blanking signal is low, the R end is high, and the output end Q is low, which generates a shut-down signal. The specific logic test results are as follows: Fig. 9 shown.

[0050] Each RS trigger includes two NAND gates; the input end of NAND gate 1 is connected to the input side S and the output side of NAND gate 2; the input end of NAND gate 2 is connected to the input side R and the output side of NAND gate 1.

[0051] like Figure 5 As shown, in this embodiment, the anti-shake unit includes a NOT gate, an AND gate, a third voltage comparator, a capacitor C 1 , a power supply level VCC, a PNP transistor Q 4 and an NPN transistor Q 5 ; Turn on the threshold comparison unit output signal On through the NOT gate and the transistor Q 4 Base, transistor Q 5 The base is connected to one of the input terminals of the AND gate; transistor Q 4 The emitter is connected to the power supply level VCC, and the collector is connected to the transistor Q 5 Collector, the negative input terminal of the third voltage comparator is connected; capacitor C 1 Connected in parallel to transistor Q 5 Between collector and emitter; the positive input of the voltage comparator and V bref The output terminal is connected to the other input terminal of the AND gate; the AND gate output signal V blank .

[0052] When the input signal is high, Q 4 Open, C 1 With continuous charging, the voltage at the negative input of the voltage comparator continues to rise. When it does not exceed the reference voltage, the output voltage remains at a high level; when it exceeds the reference voltage, the comparator outputs a low level, and the output voltage becomes a low level, avoiding the continued influence of subsequent pulses on the circuit. The specific simulation results are as follows Fig.10 As shown, the reference voltage is 1.2V, the capacitance is 4pF, and the current is 12uA.

[0053] like Figure 6 As shown, in this embodiment, the parallel control unit includes a pull-down circuit and a pull-up circuit; the pull-down circuit includes a resistor R 2 , resistor R 3 , transistor Q 6 and diode D 2 ; The pull-up circuit includes resistor R4 , resistor R 5 , transistor Q 7 and diode D 3 The pull-down circuit resistor R 2 One side is connected to the logic control unit output signal Pulse_down, and the other side is connected to the transistor Q 6 Collector, diode D 2 Anode connection; transistor Q 6 The base is connected to the parallel enable port TRG, and the emitter is connected to the resistor R 3 One side connected; diode D 2 The cathode is connected to the signal output terminal Pulse_down1; when TRG is at a high level, the drive signal is set to be consistent with the control signal, otherwise Pulse_down1 is set to a high level.

[0054] The resistance R of the pull-up circuit 4 One side is connected to the logic control unit output signal Pulse_up, and the other side is connected to the transistor Q 7 Collector connection; transistor Q 7 The base is connected to the parallel enable port TRG, and the emitter is connected to the resistor R 5 、Diode D 3 Anode side connected to diode D 3 The cathode is connected to the signal output terminal Pulse_up1. When TRG is high, the drive signal is consistent with the control signal, otherwise Pulse_up1 is set to a low level. The resistor R in the pull-down circuit and the pull-up circuit is recommended. 2 , R 4 It is recommended to use 10Ohm resistor R 3 , R 5 1kOhm is recommended.

[0055] like Figure 7 As shown, in this embodiment, the driving unit includes a PNP transistor Q 2 、An NPN transistor Q 3 And power supply VCC1; power supply VCC1 and transistor Q 2 Collector connection; transistor Q 2 The base is connected to Pulse_up1, and the emitter is connected to the gate of the power field effect tube SR and the transistor Q 3 Collector connection; transistor Q 3 The base is connected to Pulse_down1 and the emitter is connected to ground.

[0056] When Pulse_up1 is set high and Pulse_down1 is set low, a high-level driving signal is output. Conversely, when Pulse_up1 is set low and Pulse_down1 is set high, a low-level driving signal is output.

[0057] The above embodiments are only for illustrating the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. A synchronous rectification driving circuit applied to multiple parallel switch tubes, wherein the number of the parallel switch tubes is n, and n is a positive integer greater than or equal to 2, characterized in that: The synchronous rectification driving circuit comprises a voltage sampling unit, a turn-on threshold comparison unit, a turn-off threshold comparison unit, a logic control unit, first to m-1th parallel control units, first to mth driving units, a voltage sampling port VS, a parallel enabling port TRG and a driving signal output bus Drive Bus, where m is a positive integer and m≥n; The input side of the voltage sampling unit is connected to the voltage sampling port VS, and the output side is connected to the input side of the turn-on threshold comparison unit and the turn-off threshold comparison unit; the output side of the turn-on threshold comparison unit and the turn-off threshold comparison unit are connected to the input side of the logic control unit; the output side of the logic control unit is connected to the input side of the i-th driving unit via the i-th parallel control unit, i=1,…,m-1; the output side of the logic control unit is also connected to the input side of the m-th driving unit; the input sides of the first to m-1-th parallel control units are also connected to the parallel enable port TRG; the output sides of the 1st to n-th driving units, i.e., the drive signal output bus Drive Bus of the synchronous rectification driving circuit, are connected to the gates of each switch tube; the voltage sampling port VS of the synchronous rectification driving circuit is connected in parallel to both sides of the parallel switch tube.

2. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 1, characterized in that: The voltage sampling unit includes a reference level V bias , clamping diodes Z1 and Z2, diode D1, resistor R1 and transistor Q1, the input side of the voltage sampling unit is connected to the input value of the voltage sampling port VS, and the output side Out1 is connected to the input side of the turn-on threshold comparison unit and the turn-off threshold comparison unit; The diode D1 and the resistor R1 are connected in parallel, the anode of the diode D1 is connected to the voltage sampling port VS, and the cathode of the diode D1 is connected to the collector of the transistor Q1; the reference level V bias The cathode and anode of clamping diodes Z1 and Z2 are connected together to GND; the reference level V bias The anode and the cathode of the clamping diode Z1 are respectively connected to the base of the transistor Q1; the emitter of the transistor Q1 and the cathode of the clamping diode Z2 are respectively connected to the output side Out1.

3. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 1, characterized in that: The turn-on threshold comparison unit includes a first voltage comparator; the positive input side of the first voltage comparator is connected to the reference level V th_on The negative input side is connected to the output side Out1 of the voltage sampling unit, and the output signal On is connected to the input side of the logic control unit; The turn-off threshold comparison unit includes a second voltage comparator; the negative input side of the second voltage comparator is connected to the reference level V th_off The positive input side is connected to the output side Out1 of the voltage sampling unit, and the output signal Off is connected to the input side of the logic control unit.

4. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 1, characterized in that: The logic control unit includes an anti-shake unit, a NOR gate, first to second RS triggers and first to third NOR gates; The output signal On of the threshold comparison unit is connected to the input side of the anti-shake unit, and the output side V blank The output signal Off of the turn-off threshold comparison unit is connected to the second input terminal of the NOR gate via the first NOR gate; the output side of the NOR gate is connected to the R input terminal of the first RS trigger; the Q output terminal of the first RS trigger obtains the logic control unit output signal Pulse_down via the second NOR gate, and the Q output terminal of the first RS trigger is connected to the R input terminal of the second RS trigger via the second NOR gate; the Q output terminal of the second RS trigger obtains the logic control unit output signal Pulse_up via the third NOR gate.

5. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 4, characterized in that: The anti-shake unit includes an AND gate, a fourth NOT gate, a third voltage comparator, a capacitor C1, a power supply level VCC, a PNP transistor Q4 and an NPN transistor Q5; The output signal On of the on-threshold comparison unit is connected to the base of the PNP transistor Q4, the base of the NPN transistor Q5 and the first input terminal of the AND gate via the fourth NOT gate; the emitter of the PNP transistor Q4 is connected to the power supply level VCC, and the collector is connected to the collector of the NPN transistor Q5 and the negative input side of the third voltage comparator; the capacitor C1 is connected in parallel between the collector and emitter of the NPN transistor Q5; the positive input side of the third voltage comparator is connected to the reference voltage V bref The output terminal of the third voltage comparator is connected to the second input terminal of the AND gate; the AND gate outputs a signal V blank As the output side of the anti-shake unit.

6. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 1, characterized in that: The first to the (m-1)th parallel control units have the same structure, and each parallel control unit includes a pull-down circuit and a pull-up circuit; The pull-down circuit includes resistors R2 and R3, transistor Q6 and diode D2; one side of the resistor R2 is connected to the logic control unit output signal Pulse_down, and the other side is connected to the transistor Q6 collector and the diode D2 anode; the transistor Q6 base is connected to the parallel enable port TRG, and the emitter is connected to one side of the resistor R3; the cathode of the diode D2 is connected to the parallel control unit signal output terminal Pulse_down1; the other side of the resistor R3 is connected to the ground GND; The pull-up circuit includes resistors R4 and R5, transistor Q7 and diode D3; one side of resistor R4 is connected to the logic control unit output signal Pulse_up, and the other side is connected to the collector of transistor Q7; the base of transistor Q7 is connected to the parallel enable port TRG, and the emitter is connected to one side of resistor R5 and the anode side of diode D2; the cathode of diode D2 is connected to the parallel control unit signal output terminal Pulse_up1; the other side of resistor R5 is connected to the ground GND.

7. The synchronous rectification driving circuit for multiple parallel switch tubes according to claim 1, characterized in that: The structures of the first to m-th driving units are the same, and all include a PNP transistor Q2, an NPN transistor Q3 and a power supply VCC1; the emitter of the PNP transistor Q2 is connected to the power supply VCC1; the emitter of the NPN transistor Q3 is connected to the ground GND; The i-th parallel control unit signal output terminal Pulse_up1 is connected to the base of the PNP transistor Q2 in the i-th driving unit, and the i-th parallel control unit signal output terminal Pulse_down1 is connected to the base of the NPN transistor Q3 in the i-th driving unit, i=1,…,m-1; The logic control unit output signal Pulse_up is connected to the base of the PNP transistor Q2 in the m-th driving unit, and the logic control unit output signal Pulse_down is connected to the base of the NPN transistor Q3 in the m-th driving unit; In the first to nth driving units, each driving unit corresponds to a switch tube, that is, the collector of the PNP transistor Q2 and the collector of the NPN transistor Q3 in each driving unit are both connected to the gate of the corresponding switch tube.

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