PCIe switch multicast processing system and method giving consideration to efficiency and resources

Abstract

The invention discloses a PCIe switch multicast processing system and method giving consideration to efficiency and resources, and the system comprises a unicast control module which is used for receiving the target port information of a unicast TLP packet, a TLP indication signal, TLP header information and TLP load data, and transmitting a unicast request; the multicast control module is used for receiving a target port list of a multicast TLP packet, a TLP indication signal, TLP header information and TLP load data, and sending a multicast request; the target port arbitration module is used for receiving a unicast request and a multicast request, and sending a request packet corresponding to the unicast request or the multicast request to the sending cache module; and the sending cache module is used for receiving the authorized unicast TLP packet or multicast TLP packet, caching the unicast TLP packet or multicast TLP packet, and sending and outputting the unicast TLP packet or multicast TLP packet to the egress end of the target port. According to the invention, the processing of the multicast packet is centralized at the ingress end of the PCIe port, the unicast packet and the multicast packet are separately processed, meanwhile, two parallel processing channels are opened up in the multicast control module, and the copying of the multicast packet is realized through a roll back FIFO read-write pointer mode, so that the design is simplified, the resources are saved, and the efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of PCIe design, and in particular to a PCIe switch multicast processing system and method that take both efficiency and resources into consideration. Background Art

[0002] PCIe is a point-to-point high-speed data transmission mechanism. Multicast technology can logically enable PCIe to achieve point-to-multipoint transmission. When a PCIe device needs to transmit the same data to multiple PCIe devices, if it is transmitted through unicast, the same data needs to be copied multiple times at the source end and then sent to the destination devices one by one. By configuring the multicast transmission mode, a copy of the data is sent at the source end, and the PCIe switch device in the middle will automatically copy the data multiple times and send it to all the destination devices. The PCIe multicast transmission mode enables PCIe to break through the physical point-to-point transmission limitation and logically achieve point-to-multipoint data transmission, which greatly improves bandwidth utilization and reduces the source end load.

[0003] Regarding the implementation of multicast in PCIe switch, the patent with authorization announcement number CN117749706B - "A PCIe switch multicast processing method and device" proposes a method for implementing multicast in PCIe switch. This method divides the ports of PCIe switch into multiple groups, first determines whether the received message is unicast or multicast through arbitration at the source port, and if it is multicast, then conducts inter-group arbitration among the port groups to determine all the destination groups where the destination port of the multicast is located. After all the destination groups are ready, the multicast packet is sent to all the destination groups, and then the multicast packet is sent to each destination port within each destination group. During the process of sending the multicast packet, other requests of the destination group are suspended. The patent states that the multicast implementation method of grouping ports is to divide the cross-route of multiple ports into cross-route of fewer ports for PCIe switches with a particularly large number of ports, which has certain advantages in area control. However, this implementation method, in addition to the complexity of control logic and the increase of message processing delay, also has a potential problem: for ports divided into a group, if there is a destination port of a certain multicast in the group, this group is the destination group of a certain multicast, but not all ports in the destination group are necessarily the destination ports of a certain multicast. If other ports in the group are the destination ports of another multicast, then it is necessary to wait for the current multicast to be processed before processing the other multicast. Although the two multicasts do not conflict in the destination port, they cannot be processed in parallel just because they are assigned to the same group, which affects the processing efficiency of multicast to a certain extent. Summary of the invention

[0004] To solve the defects of the above-mentioned prior art, the present invention provides a PCIe switch multicast processing system and method that take into account both efficiency and resources. The present invention concentrates the processing of multicast packets on the ingress end of the PCIe port, separates the processing of unicast packets and multicast packets, and opens two parallel processing channels in the multicast control module. The multicast packet replication is achieved by means of the rollback FIFO read-write pointer, which simplifies the design, saves resources and improves efficiency.

[0005] In order to achieve the above technical objectives, the present invention adopts the following technical solutions: A PCIe switch multicast processing system that takes both efficiency and resources into consideration, comprising: A unicast control module is used to receive the target port information, TLP indication signal, TLP header information and TLP payload data of the unicast TLP packet, and assign the TLP indication signal, TLP header information and TLP payload data to the target port corresponding to the target port information, and issue a unicast request; wherein the TLP indication signals of non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; A multicast control module, used for receiving a target port list of a multicast TLP packet, as well as a TLP indication signal, TLP header information and TLP payload data, and copying and sending the multicast TLP packet to each target port corresponding to the target port list, and issuing a multicast request; A target port arbitration module is used to receive the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, send the request packet corresponding to the unicast request or the multicast request to the sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; The sending cache module is used to receive the authorized unicast TLP packet or the multicast TLP packet and cache it, and after obtaining the authorization of the egress end of the target port, send the unicast TLP packet or the multicast TLP packet to the egress end of the target port.

[0006] Furthermore, the unicast TLP packet has N groups of the TLP indication signals and a group of the TLP header information and TLP payload data; the unicast control module is provided with N outputs for corresponding to N ports, N being a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of the TLP indication signals, and share a group of the TLP header information and TLP payload data.

[0007] Furthermore, the multicast TLP packet has N groups of the TLP indication signals and N groups of the TLP header information and TLP payload data; the multicast control module has two built-in multicast channels, namely multicast channel 1 and multicast channel 2, and the two multicast channels are respectively provided with N outputs corresponding to N ports, where N is a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of the TLP indication signals and a group of the TLP header information and TLP payload data.

[0008] Furthermore, the multicast control module is built-in with: Channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2 are used to store the TLP indication signal and the carried TLP payload data of the multicast TLP packet; The mc_fifo1 read-write control module and the mc_fifo2 read-write control module are used to implement the read-write control of the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively; info_fifo, used to store multicast target port information and the TLP header information of the multicast TLP packet; The info_fifo read-write control module is used to implement read-write control of info_fifo; The target port management module to be sent is used to manage the target ports that have not been sent or have not completed sending; The channel 1 request authorization module and the channel 2 request authorization module are used to provide a target port indication for sending multicast TLP packets for multicast channel 1 and multicast channel 2 respectively; Channel 1 sending module, used for assigning the TLP indication signal, TLP payload data output by channel 1 buffer mc_fifo1 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to channel 1, and sending it to the target port arbitration module; The channel 2 sending module is used to assign the TLP indication signal, TLP payload data output by the channel 2 buffer mc_fifo2 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to the channel 2, and send it to the target port arbitration module.

[0009] Furthermore, the target port arbitration module has N built-in arbitration sub-modules, and the N arbitration sub-modules are respectively associated with a port; the arbitration sub-module receives the unicast request or the multicast request directed to the associated port from a unicast channel of the unicast control module and two multicast channels of the multicast control module, and performs arbitration on the requests of the three channels.

[0010] A PCIe switch multicast processing method taking into account both efficiency and resources includes the following steps: Determine whether the TLP packet is unicast or multicast; For unicast TLP packet processing, the target port information, TLP indication signal, TLP header information and TLP payload data of the unicast TLP packet are received, and the TLP indication signal, TLP header information and TLP payload data are assigned to the target port corresponding to the target port information, and a unicast request is issued; wherein the TLP indication signals of non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; For multicast TLP packet processing, a target port list of the multicast TLP packet, a TLP indication signal, TLP header information and TLP payload data are received, and the multicast TLP packet is copied and sent to each target port corresponding to the target port list, and a multicast request is issued; receiving the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, sending the request packet corresponding to the unicast request or the multicast request to the sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; The authorized unicast TLP packet or the multicast TLP packet is received and cached, and after obtaining authorization from the egress end of the target port, the unicast TLP packet or the multicast TLP packet is sent and output to the egress end of the target port.

[0011] Further, the multicast TLP packet processing specifically includes the following sub-steps: Get List: Get the initial list of destination ports to be sent; Authorization writing: Generate a sending request list for multicast channel 1 and a sending request list for multicast channel 2 according to the initial list of target ports to be sent, and perform authorization operations on the sending request list of multicast channel 1 and the sending request list of multicast channel 2 in order of priority, and write the authorized target port number into the mc_fifo1 read-write control module of the channel 1 cache mc_fifo1 and the mc_fifo2 read-write control module of the channel 2 cache mc_fifo2 respectively; Send data: According to the authorized target port numbers received by the two multicast channels, the multicast TLP packet data is read from the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively, and sent to their corresponding target ports.

[0012] Furthermore, the obtaining of the list includes the following sub-steps: Determine whether info_fifo is empty. If it is not empty, it indicates that a multicast TLP packet is being processed. At this time, the back pressure signal is set high and output to notify the external multicast packet request to hold and wait for reception; if info_fifo is empty, the multicast target port information and the TLP header information of the multicast TLP packet are written into info_fifo, and the TLP indication signal and TLP payload data of the multicast TLP packet are written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, and the multicast target port information is recorded as the initial list of target ports to be sent.

[0013] Furthermore, the authorization writing includes the following sub-steps: In multicast, the sending request list of channel 1 excludes the authorized target port being sent by multicast channel 2, and the sending request list of multicast channel 2 excludes the authorized target port being sent by multicast channel 1; multicast channel 1 polls and authorizes the sending target port request list in order of priority from low to high, and the authorized target port number notifies the read-write control module of channel 1 cache mc_fifo1; multicast channel 2 polls and authorizes the sending target port request list in order of priority from high to low, and the authorized target port number notifies the read-write control module of channel 2 cache mc_fifo2.

[0014] Furthermore, the sending of data includes the following sub-steps: When all multicast TLP packets have been written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, the two channels read the multicast TLP packet data from mc_fifo1 and mc_fifo2 respectively according to the authorized target port numbers they received, and send them to their corresponding target ports. When the two channels finish sending the multicast packets, they roll back their read pointers to address 0, which is the starting position of the multicast packet storage. After the multicast TLP packet is sent, the list of target ports to be sent is updated. If there are still unsent target ports, repeat the above process to perform target port authorization and multicast packet read and send operations on the two channels; if all target ports have been sent, rollback the write pointers of mc_fifo1 and mc_fifo2 to address 0 respectively.

[0015] In summary, the present invention has achieved the following technical effects: The present invention concentrates the processing of multicast packets on the ingress end of the PCIe port, and it is no longer necessary to identify unicast packets and multicast packets on the egress end, and the design and implementation are simple; inside the ingress end, unicast packets and multicast packets are processed separately, so that the processing of multicast packets does not block the transmission of unicast packets, thereby improving the overall efficiency of the system for TLP packet processing; at the same time, the ingress ends of all ports can process the sending requests of multicast packets in parallel, and if the target ports do not overlap, they will not block each other; The present invention opens two independent channels for multicast packet processing inside the ingress, and each channel faces all possible target ports. The two channels process and send multicast packets in parallel, and dynamically cooperate to complete the sending of all target ports. Compared with the single-channel processing method, this dual-channel method doubles the performance; compared with the processing method of binding each channel to a fixed set of ports, this method in which each channel serves all target ports and dynamically adapts to the target ports avoids the possibility that the target port is not in the channel binding port sequence, avoids idle resource waste, and improves the comprehensive processing efficiency of the two channels; compared with the design of reserving a multicast channel for each port, this dual-channel method saves a lot of resources, avoids the situation where the resources of non-target ports are idle, and improves the efficiency of resource utilization; The present invention simultaneously opens two parallel processing channels in the multicast control module, and realizes the replication of multicast packets by means of rollback FIFO read-write pointers, thus quickly realizing the replication of multicast packets logically, and compared with the replication of physical data transport, simplifies the design, saves resources and improves the efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of a PCIe switch multicast processing system that takes into account both efficiency and resources; Figure 2 This is a diagram of the dual-channel processing structure inside the multicast control module; Figure 3 This is the multicast packet processing flow. DETAILED DESCRIPTION

[0017] The present invention is further described in detail below in conjunction with the accompanying drawings.

[0018] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed. However, as long as they are within the scope of the claims of the present invention, they are protected by the patent law.

[0019] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0020] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0021] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0023] Embodiment: Figure 1 This is a schematic diagram of a PCIe switch multicast processing system that takes into account both efficiency and resources, including: A unicast control module is used to receive the target port information, TLP indication signal, TLP header information and TLP payload data of the unicast TLP packet, and assign the TLP indication signal, TLP header information and TLP payload data to the target port corresponding to the target port information, and issue a unicast request; wherein the TLP indication signals of non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; A multicast control module, used for receiving a target port list of a multicast TLP packet, as well as a TLP indication signal, TLP header information and TLP payload data, and copying and sending the multicast TLP packet to each target port corresponding to the target port list, and issuing a multicast request; A target port arbitration module is used to receive the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, send the request packet corresponding to the unicast request or the multicast request to the sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; The sending cache module is used to receive the authorized unicast TLP packet or the multicast TLP packet and cache it, and after obtaining the authorization of the egress end of the target port, send the unicast TLP packet or the multicast TLP packet to the egress end of the target port.

[0024] In the present invention, at the structural level, the processing of multicast packets is concentrated on the ingress end of the PCIe port. When the TLP packet arrives at the egress end of the PCIe port, it is no longer necessary to distinguish between unicast packets and multicast packets, and all TLP packets are processed uniformly. Inside the ingress of the PCIe port, the unicast packet and the multicast packet are processed separately, and the unicast packet and the multicast packet take independent processing paths respectively, and then are aggregated to the arbitration module and sent to the egress end of the target port after arbitration.

[0025] Among them, the unicast TLP packet has N groups of TLP indication signals and a group of TLP header information and TLP payload data; the unicast control module is provided with N outputs for corresponding to N ports, N is a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of TLP indication signals, and share a group of TLP header information and TLP payload data.

[0026] The multicast TLP packet has N groups of TLP indication signals and N groups of TLP header information and TLP payload data; the multicast control module has two built-in multicast channels, namely multicast channel 1 and multicast channel 2, and the two multicast channels are respectively provided with N outputs for corresponding to N ports, where N is a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of TLP indication signals and a group of TLP header information and TLP payload data. N refers to the number of PCIe switch ports.

[0027] The present invention sets a processing channel for the unicast control module to process only unicast packets, and sets two processing channels for the multicast control module to jointly process multicast packets. Compared with a method of processing multicast packets with only one channel, the present invention has doubled efficiency, fast speed and high precision.

[0028] After the TLP packet is output from the PCIe controller, unicast routing and multicast routing are executed at the same time. If the TLP packet is a memory write request or a Msg request for address routing, and the address of the packet falls within the multicast address range, the TLP packet is executed according to the multicast routing result first, otherwise, it is executed according to the unicast routing result.

[0029] For TLP packets that are determined to be unicast packets, the target port information pointed to by the unicast routing result, as well as the TLP indication signal, TLP header information and TLP payload data are sent to the unicast control module. The unicast control module assigns the original TLP indication signal, TLP header information and TLP payload data to the TLP indication signal, TLP header information signal and TLP payload data corresponding to the target port according to the target port pointed to by the unicast. The TLP indication signals of other non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet.

[0030] For TLP packets that are determined to be multicast packets, the target port list pointed to by the multicast routing result, as well as the TLP indication signal, TLP header information and TLP payload data are sent to the multicast control module. The multicast control module copies the TLP packet and sends it to each target port according to the target port list. After all target ports are sent in place, the next multicast packet can be received for processing. There are two processing channels inside the multicast control module, which are respectively oriented to all possible target ports and have independent output interfaces.

[0031] The target port arbitration module receives the output requests from the unicast control module and the multicast control module, authorizes the unicast request or multicast request according to the rules, and then sends the authorized request packet to the corresponding target port. The unicast TLP packet output by the unicast control module is oriented to the egress end of all ports, and the multicast TLP packets of the two channels output by the multicast control module are also oriented to the egress end of all ports. If the PCIe switch has N ports, then the unicast control module will have N outputs. These N outputs refer to TLP indication signals (including header valid signals, data valid signals and end signals). The egress end of each port of the PCIe switch corresponds to a set of TLP indication signals. As for the TLP header information and TLP payload data, there is only one set, which is shared by the egress ends of all ports. Having N outputs does not mean that all N outputs are valid. Only the TLP indication signal corresponding to the number of the target port pointed to by the unicast packet will be valid. The TLP indication signals corresponding to the numbers of other ports are all 0, indicating that no valid TLP packets are sent to the egress end of the port at this time. The same is true for the outputs of the two channels corresponding to the multicast control module. Each channel has N outputs, each corresponding to the egress end of a port. Different from the unicast control module output, the independent N outputs of the two channels of the multicast control module are not limited to the TLP indication signal being independent for the egress end of each port, but also the TLP header information and TLP payload data are independent for the egress end of each port, because multicast packets may involve address conversion and ECRC recalculation, resulting in different header information and ECRC of different target ports.

[0032] The target port arbitration module has N arbitration sub-modules built in, and the N arbitration sub-modules are respectively associated with one port; the arbitration sub-module receives the unicast request or the multicast request directed to the associated port from one unicast channel of the unicast control module and two multicast channels of the multicast control module, and performs arbitration on the requests of the three channels.

[0033] Among them, the target port arbitration module contains N arbitration sub-modules (as above, N also refers to the number of PCIeswitch ports), and each arbitration sub-module is associated with a specific port. Each sub-module bound to a target port receives the output pointing to this target port from the two channels of the unicast control module and the multicast control module, and then performs arbitration for these three requests. According to application requirements, the specific arbitration strategy can choose fixed priority arbitration, RR polling arbitration, or WRR weighted polling arbitration. The target port arbitration module converges unicast sending requests and multicast sending requests, authorizes these requests in turn, and then outputs them to the sending buffer module.

[0034] The sending buffer module receives the TLP packets output by the target port arbitration module, buffers them, and sends the TLP packets out after obtaining the authorization of the egress end of the target port. After the TLP packets enter the sending buffer module, they are no longer distinguished between unicast packets and multicast packets, and all subsequent processing flows are shared by unicast packets and multicast packets.

[0035] The present invention concentrates multicast packet processing on the ingress end and separates unicast and multicast processing structures, which is beneficial to improving the overall processing efficiency of the system.

[0036] If unicast packets and multicast packets share the same processing channel and are processed together, the multicast packet may block the unicast packet, even if the destination port of the multicast packet does not conflict with the destination port of the unicast packet. Multicast packets are destined for multiple destination ports. Before all destination ports are sent, the multicast packet needs to be saved for copying and sending. If a unicast packet is sent at this time, but the multicast packet is still being processed, the unicast packet cannot pass through and can only wait passively. Even if the destination port pointed by the unicast packet does not overlap with the destination port pointed by the multicast packet, the sending action cannot be completed.

[0037] This situation can be avoided by separating unicast and multicast and using different processing channels. When the destination port of a unicast packet does not conflict with the destination port of a multicast packet, the unicast packet and the multicast packet can be processed in parallel without blocking each other. New multicast processing can also be started at the ingress end of other PCIe switch ports. If the destination ports of different multicast groups do not overlap, they are sent independently at the egress end of each destination port. If the destination ports of different multicast groups overlap, arbitration will be performed at the egress end of the overlapping destination ports to authorize sending.

[0038] Furthermore, at the specific processing level of multicast packets, two multicast processing channels are simultaneously opened inside the multicast control module, each channel sets up an independent cache, and the output of each channel is not bound to the egress end of the fixed port group, but faces the egress end of all possible target ports. The two channels poll the multicast target port list in parallel and send multicast packets to different target ports in parallel. The two channels cooperate to jointly complete the sending of all multicast target ports. Compared with the single-channel processing method, the performance of this dual-channel method is doubled; compared with the processing method of binding each channel to a fixed group of ports, this method of each channel serving all target ports and dynamically adapting to the target port avoids the possibility that the target port is not in the channel binding port sequence, avoids idle waste of resources, and improves the comprehensive processing efficiency of the two channels; compared with the processing method of reserving a multicast channel for each port, this dual-channel method saves a lot of resources, avoids the situation where the resources of non-target ports are idle, and improves the utilization efficiency of resources.

[0039] Furthermore, when moving multicast packet data to different target ports, the rollback internal cache FIFO read-write pointer is used to achieve one-time write and repeated read. Compared with physically writing and reading the multicast packet data repeatedly to achieve the replication effect, it simplifies the design, saves resources and improves efficiency.

[0040] Figure 2 is a dual-channel processing structure diagram inside the multicast control module, the multicast control module is built-in, Channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2 are used to store the TLP indication signal and the carried TLP payload data of the multicast TLP packet; The mc_fifo1 read-write control module and the mc_fifo2 read-write control module are used to implement the read-write control of the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively; info_fifo, used to store multicast target port information and the TLP header information of the multicast TLP packet; The info_fifo read-write control module is used to implement read-write control of info_fifo; The target port management module to be sent is used to manage the target ports that have not been sent or have not completed sending; The channel 1 request authorization module and the channel 2 request authorization module are used to provide a target port indication for sending a multicast TLP packet for the multicast channel 1 and the multicast channel 2 respectively; Channel 1 sending module, used for assigning the TLP indication signal, TLP payload data output by channel 1 buffer mc_fifo1 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to channel 1, and sending it to the target port arbitration module; The channel 2 sending module is used to assign the TLP indication signal, TLP payload data output by the channel 2 buffer mc_fifo2 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to the channel 2, and send it to the target port arbitration module.

[0041] Combination Figure 2 The caches integrated in the multicast control module are all implemented with FIFO, including: channel 1 cache mc_fifo1, channel 2 cache mc_fifo2 and info_fifo. mc_fifo1 and mc_fifo2 are used to store the indication signal of multicast TLP and the carried TLP payload data. The capacity opened up can meet the data storage of a maximum payload TLP packet; info_fifo is used to store multicast target port information and multicast TLP header information. All of this information is listed together as an entry of data storage, and the depth of the FIFO can be set to 1.

[0042] Among them, other modules integrated inside the multicast control module are used to realize control and management functions.

[0043] The info_fifo read-write control module, as the name implies, implements read-write control of info_fifo.

[0044] Info_fifo write enable conditions: a valid multicast packet is received and info_fifo is not full; Info_fifo read enable conditions: info_fifo is not empty and the multicast packet has been sent to all multicast destination ports. At this time, the info_fifo can be read. After reading empty, it means that new multicast packets can be received for processing.

[0045] The mc_fifo1 read-write control module, as the name implies, implements read-write control of channel 1 cache mc_fifo1.

[0046] Conditions for enabling mc_fifo1 writing: mc_fifo1 is not full and a valid multicast packet is received; Conditions for mc_fifo1 read enable startup: the multicast packet has been completely written into m_fifo1 and the target port assigned to channel 1 is in idle state and can receive TLP packets; The conditions for ending the mc_fifo1 read enable and rolling back the read pointer are: when the end indication signal of the multicast packet is read, that is, the multicast packet has been completely read out and sent, the read pointer is rolled back to the address 0 to prepare for starting the next round of read operations to send to another target port.

[0047] The condition for mc_fifo1 to rollback the write pointer is: the multicast packet has been sent to all the target ports. At this time, the write pointer is rolled back to the address 0 to prepare for receiving new multicast packets.

[0048] As the name implies, the mc_fifo2 read-write control module implements read-write control of channel 2 cache mc_fifo2. The read-write control of mc_fifo2 is different from that of mc_fifo1 in implementation details, but the design ideas are consistent, so I will not go into details here.

[0049] The target port management module to be sent is used to manage the target ports that have not been sent or have not been sent. This module is the core hub of the entire multicast control module, which is equivalent to the progress bar of the multicast task processing. As long as there are target ports that have not been sent or have not been sent, the two multicast processing channels or at least one multicast processing channel will be in working state until the list of target ports to be sent shows 0, that is, all the target ports pointed to by the multicast have been sent, and the processing of the multicast packet is declared complete. The list of target ports to be sent is from the beginning of receiving the multicast packet and before the sending operation is executed. Figure 1 The result of the multicast routing module matching in the multicast routing module is the multicast destination port. The list of destination ports to be sent is sent to the channel 1 request authorization module and the channel 2 request authorization module respectively, which indicate the destination port numbers that need to be sent for channel 1 and channel 2 respectively. According to the information of the end of sending the multicast packet provided by the mc_fifo1 read-write control module and the mc_fifo2 read-write control module, indicating that the currently allocated destination port has been sent, the list of destination ports to be sent is updated, and the destination ports that have been sent are cleared from the list of destination ports to be sent. The updated list of destination ports to be sent is then sent to the channel 1 request authorization module and the channel 2 authorization request module to perform a new round of authorization sending operations. When the list of destination ports to be sent is 0, it means that the processing of the multicast packet is completed, and the cache (mc_fifo1 / mc_fifo2 / info_fifo) in the module can be cleared to receive new multicast packets for processing.

[0050] The channel 1 request authorization module provides the multicast channel 1 with the destination port indication for sending the multicast packet, and the channel 2 request authorization module provides the multicast channel 2 with the destination port indication for sending the message. These two modules receive the initial request list from the port management module to be sent. For the channel 1 request authorization module, it is necessary to remove the destination port number that channel 2 is sending from the initial list of destination ports to be sent, because the sending process of channel 2 for the destination port has not been completed, and the number of the destination port still exists in the list of destination ports to be sent. In order to avoid repeated authorization of the same destination port by two channels, it is necessary to remove the destination port that channel 2 is processing from the request list to be authorized of channel 1. Similarly, for the channel 2 request authorization module, it is also necessary to remove the destination port that channel 1 is processing from the request list to be authorized. For the channel 1 request authorization list and the channel 2 request authorization list, the unprocessed destination ports of the two are basically overlapped. In order to avoid the two channels from authorizing the same destination port at the same time, the two modules can be designed to poll the request list for authorization from different directions. For example, the channel 1 request authorization module queries authorization from the low position to the high position of the target port request list, while the channel 2 request authorization module queries authorization from the high position to the low position of the target port request list. The two channels simultaneously push forward the target port sending task from different directions. If the two channels simultaneously process the sending of the previous target port, and there is only one target port left to be sent, a specific channel can be specified to complete the sending of the last target port.

[0051] The channel 1 sending module assigns the TLP indication signal, TLP payload data, and TLP header information output by the channel 1 cache mc_fifo1 to the TLP information corresponding to the target port corresponding to channel 1, and then outputs it to Figure 1 The next level module indicated is the target port arbitration module. The processing idea of ​​the channel 2 sending module is the same as that of the channel 1 sending module.

[0052] In another embodiment, a PCIe switch multicast processing method taking into account both efficiency and resources is provided, comprising the following steps: S100, judging whether the TLP packet is unicast or multicast; the judging method is: after the TLP packet is output from the PCIe controller, unicast routing and multicast routing are executed simultaneously. If the TLP packet is a memory write request or a Msg request for address routing, and the address of the packet falls within the multicast address interval, the TLP packet is executed according to the multicast routing result first, otherwise, it is executed according to the unicast routing result.

[0053] S210, for unicast TLP packet processing, receiving the target port information of the unicast TLP packet, as well as the TLP indication signal, the TLP header information and the TLP payload data, and assigning the TLP indication signal, the TLP header information and the TLP payload data to the target port corresponding to the target port information, and issuing a unicast request; wherein the TLP indication signals of the non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; S220, for multicast TLP packet processing, receiving a target port list of the multicast TLP packet, as well as a TLP indication signal, TLP header information and TLP payload data, and copying and sending the multicast TLP packet to each target port corresponding to the target port list, and issuing a multicast request; S300, receiving the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, sending the request packet corresponding to the unicast request or the multicast request to a sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; S400, receiving the authorized unicast TLP packet or the multicast TLP packet, and caching it, and after obtaining authorization from the egress end of the target port, sending the unicast TLP packet or the multicast TLP packet to the egress end of the target port.

[0054] Wherein, the multicast TLP packet processing specifically includes the following sub-steps: Get List: Get the initial list of destination ports to be sent; Authorization writing: Generate a sending request list for multicast channel 1 and a sending request list for multicast channel 2 according to the initial list of target ports to be sent, and perform authorization operations on the sending request list of multicast channel 1 and the sending request list of multicast channel 2 in order of priority, and write the authorized target port number into the mc_fifo1 read-write control module of the channel 1 cache mc_fifo1 and the mc_fifo2 read-write control module of the channel 2 cache mc_fifo2 respectively; Send data: According to the authorized target port numbers received by the two multicast channels, the multicast TLP packet data is read from the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively, and sent to their corresponding target ports.

[0055] The obtaining list comprises the following sub-steps: Determine whether info_fifo is empty. If it is not empty, it indicates that a multicast TLP packet is being processed. At this time, the back pressure signal is set high and output to notify the external multicast packet request to hold and wait for reception; if info_fifo is empty, the multicast target port information and the TLP header information of the multicast TLP packet are written into info_fifo, and the TLP indication signal and TLP payload data of the multicast TLP packet are written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, and the multicast target port information is recorded as the initial list of target ports to be sent.

[0056] The authorization writing comprises the following sub-steps: In multicast, the sending request list of channel 1 excludes the authorized target port being sent by multicast channel 2, and the sending request list of multicast channel 2 excludes the authorized target port being sent by multicast channel 1; multicast channel 1 polls and authorizes the sending target port request list in order of priority from low to high, and the authorized target port number notifies the read-write control module of channel 1 cache mc_fifo1; multicast channel 2 polls and authorizes the sending target port request list in order of priority from high to low, and the authorized target port number notifies the read-write control module of channel 2 cache mc_fifo2.

[0057] The sending of data comprises the following sub-steps: When all multicast TLP packets have been written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, the two channels read the multicast TLP packet data from mc_fifo1 and mc_fifo2 respectively according to the authorized target port numbers they received, and send them to their corresponding target ports. When the two channels finish sending the multicast packets, they roll back their read pointers to address 0, which is the starting position of the multicast packet storage. After the multicast TLP packet is sent, the list of target ports to be sent is updated. If there are still unsent target ports, repeat the above process to perform target port authorization and multicast packet read and send operations on the two channels; if all target ports have been sent, rollback the write pointers of mc_fifo1 and mc_fifo2 to address 0 respectively.

[0058] Among them, TLP package Figure 1 The PCIe controller output is shown as Figure 1 The multicast routing module shown matches and determines that it is a multicast packet and then transmits it to the multicast control module.

[0059] Figure 3This is the multicast packet processing flow. After receiving the multicast processing request, the multicast control module first determines whether info_fifo is empty. If it is not empty, it means that a multicast packet is being processed. At this time, the multicast control module sets the back pressure signal to high and outputs it to notify the external multicast packet request to hold and wait for reception. If info_fifo is empty, the multicast target port information and multicast TLP header information are written into info_fifo, and the multicast packet TLP indication signal and TLP payload data are written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2. At the same time, the multicast target port information is recorded as the initial list of target ports to be sent.

[0060] According to the initial list of the target ports to be sent, the sending request list of channel 1 and the sending request list of channel 2 are generated respectively. The sending request list of channel 1 excludes the authorized target ports being sent by channel 2, and the sending request list of channel 2 excludes the authorized target ports being sent by channel 1. Channel 1 polls and authorizes the sending target port request list in the order of priority from low to high, and the authorized target port number notifies the read-write control module of channel 1 cache mc_fifo1; channel 2 polls and authorizes the sending target port request list in the order of priority from high to low, and the authorized target port number notifies the read-write control module of channel 2 cache mc_fifo2.

[0061] When all multicast packets have been written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, the two channels read the multicast packet data from mc_fifo1 and mc_fifo2 respectively according to the authorized target port numbers they received, and send them to their corresponding target ports. When the two channels finish sending the multicast packets, they rollback their respective read pointers to address 0, which is the starting position of the multicast packet storage.

[0062] After the multicast packet is sent, the list of target ports to be sent is updated. If there are still unsent target ports, the above process is repeated to perform the target port authorization of the two channels and the read and send operations of the multicast packet; if all the target ports have been sent, the write pointers of mc_fifo1 and mc_fifo2 are rolled back to the address position 0 respectively. Before the write pointer is rolled back to the address position 0, the read pointer has also been rolled back to the address position 0. At this time, it is equivalent to clearing the cache mc_fifo1 / mc_fifo2 of the two channels and restoring to the initial state of waiting to receive a new multicast packet. At the same time, info_fifo is also read empty, so that the entire system returns to the initial state of waiting for the reception of the multicast packet, and the processing of the new multicast packet can be started. It should be noted that the above embodiments are only used to illustrate the technical solution of the present invention and are not limited. Although the present invention is described in detail with reference to the preferred embodiments, it should be understood by ordinary technicians in the field that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A PCIe switch multicast processing system that takes into account both efficiency and resources, characterized in that: include, A unicast control module is used to receive the target port information, TLP indication signal, TLP header information and TLP payload data of the unicast TLP packet, and assign the TLP indication signal, TLP header information and TLP payload data to the target port corresponding to the target port information, and issue a unicast request; wherein the TLP indication signals of non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; A multicast control module, used for receiving a target port list of a multicast TLP packet, as well as a TLP indication signal, TLP header information and TLP payload data, and copying and sending the multicast TLP packet to each target port corresponding to the target port list, and issuing a multicast request; A target port arbitration module is used to receive the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, send the request packet corresponding to the unicast request or the multicast request to the sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; The sending cache module is used to receive the authorized unicast TLP packet or the multicast TLP packet and cache it, and after obtaining the authorization of the egress end of the target port, send the unicast TLP packet or the multicast TLP packet to the egress end of the target port.

2. A PCIe switch multicast processing system that takes into account both efficiency and resources according to claim 1, characterized in that: The unicast TLP packet has N groups of TLP indication signals and one group of TLP header information and TLP payload data; The unicast control module is provided with N outputs corresponding to N ports, where N is a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of the TLP indication signals, and share a group of the TLP header information and TLP payload data.

3. The PCIe switch multicast processing system taking into account both efficiency and resources according to claim 1, characterized in that: The multicast TLP packet has N groups of TLP indication signals and N groups of TLP header information and TLP payload data; The multicast control module has two built-in multicast channels, namely multicast channel 1 and multicast channel 2. The two multicast channels are respectively provided with N outputs for corresponding to N ports, where N is a natural number greater than 1; the egress ends of the N ports respectively correspond to a group of the TLP indication signals and a group of the TLP header information and TLP payload data.

4. The PCIe switch multicast processing system taking into account both efficiency and resources according to claim 3, characterized in that: The multicast control module is built-in with: Channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2 are used to store the TLP indication signal and the carried TLP payload data of the multicast TLP packet; The mc_fifo1 read-write control module and the mc_fifo2 read-write control module are used to implement the read-write control of the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively; info_fifo, used to store multicast target port information and the TLP header information of the multicast TLP packet; The info_fifo read-write control module is used to implement read-write control of info_fifo; The target port management module to be sent is used to manage the target ports that have not been sent or have not completed sending; The channel 1 request authorization module and the channel 2 request authorization module are used to provide a target port indication for sending a multicast TLP packet for the multicast channel 1 and the multicast channel 2 respectively; Channel 1 sending module, used for assigning the TLP indication signal, TLP payload data output by channel 1 buffer mc_fifo1 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to channel 1, and sending it to the target port arbitration module; The channel 2 sending module is used to assign the TLP indication signal, TLP payload data output by the channel 2 buffer mc_fifo2 and the TLP header information output by info_fifo to the TLP information corresponding to the target port corresponding to the channel 2, and send it to the target port arbitration module.

5. The PCIe switch multicast processing system taking into account both efficiency and resources according to claim 1, characterized in that: The target port arbitration module has N arbitration submodules built in it, and each of the N arbitration submodules is associated with a port; The arbitration submodule receives the unicast request or the multicast request directed to the associated port from one unicast channel of the unicast control module and two multicast channels of the multicast control module respectively, and performs arbitration on the requests of the three channels.

6. A PCIe switch multicast processing method that takes into account both efficiency and resources, characterized in that: A PCIe switch multicast processing system that takes both efficiency and resources into consideration as described in any one of claims 1 to 5, The following steps are included: Determine whether the TLP packet is unicast or multicast; For unicast TLP packet processing, the target port information, TLP indication signal, TLP header information and TLP payload data of the unicast TLP packet are received, and the TLP indication signal, TLP header information and TLP payload data are assigned to the target port corresponding to the target port information, and a unicast request is issued; wherein the TLP indication signals of non-target ports are all set to 0, indicating that the corresponding port has not received the TLP packet; For multicast TLP packet processing, a target port list of the multicast TLP packet, a TLP indication signal, TLP header information and TLP payload data are received, and the multicast TLP packet is copied and sent to each target port corresponding to the target port list, and a multicast request is issued; receiving the unicast request and the multicast request, and after authorizing the unicast request or the multicast request, sending the request packet corresponding to the unicast request or the multicast request to the sending buffer module, wherein the request packet refers to the unicast TLP packet or the multicast TLP packet; The authorized unicast TLP packet or the multicast TLP packet is received and cached, and after obtaining authorization from the egress end of the target port, the unicast TLP packet or the multicast TLP packet is sent and output to the egress end of the target port.

7. A PCIe switch multicast processing method taking into account both efficiency and resources according to claim 6, characterized in that: The multicast TLP packet processing specifically includes the following sub-steps: Get List: Get the initial list of destination ports to be sent; Authorization writing: Generate a sending request list for multicast channel 1 and a sending request list for multicast channel 2 according to the initial list of target ports to be sent, and perform authorization operations on the sending request list of multicast channel 1 and the sending request list of multicast channel 2 in order of priority, and write the authorized target port number into the mc_fifo1 read-write control module of the channel 1 cache mc_fifo1 and the mc_fifo2 read-write control module of the channel 2 cache mc_fifo2 respectively; Send data: According to the authorized target port numbers received by the two multicast channels, the multicast TLP packet data is read from the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2 respectively, and sent to their corresponding target ports.

8. The PCIe switch multicast processing method taking into account both efficiency and resources according to claim 7, characterized in that: The acquisition list includes the following sub-steps: judging whether info_fifo is empty, if not empty, it indicates that a multicast TLP packet is being processed, and at this time, the back pressure signal is set high for output to notify the external multicast packet request to be maintained and wait for reception; if info_fifo is empty, the multicast target port information and the TLP header information of the multicast TLP packet are written into info_fifo, the TLP indication signal and TLP payload data of the multicast TLP packet are written into the channel 1 cache mc_fifo1 and the channel 2 cache mc_fifo2, and the multicast target port information is recorded as the initial list of the target ports to be sent.

9. The PCIe switch multicast processing method taking into account both efficiency and resources according to claim 7, characterized in that: The authorization writing comprises the following sub-steps: In multicast, the sending request list of channel 1 excludes the authorized target port being sent by multicast channel 2, and the sending request list of multicast channel 2 excludes the authorized target port being sent by multicast channel 1; multicast channel 1 polls and authorizes the sending target port request list in order of priority from low to high, and the authorized target port number notifies the read-write control module of channel 1 cache mc_fifo1; multicast channel 2 polls and authorizes the sending target port request list in order of priority from high to low, and the authorized target port number notifies the read-write control module of channel 2 cache mc_fifo2.

10. The PCIe switch multicast processing method taking into account both efficiency and resources according to claim 7, characterized in that: The sending of data comprises the following sub-steps: When all multicast TLP packets have been written into channel 1 cache mc_fifo1 and channel 2 cache mc_fifo2, the two channels read the multicast TLP packet data from mc_fifo1 and mc_fifo2 respectively according to the authorized target port numbers they received, and send them to their corresponding target ports. When the two channels finish sending the multicast packets, they roll back their read pointers to address 0, which is the starting position of the multicast packet storage. After the multicast TLP packet is sent, the list of target ports to be sent is updated. If there are still unsent target ports, repeat the above process to perform target port authorization and multicast packet read and send operations on the two channels; if all target ports have been sent, rollback the write pointers of mc_fifo1 and mc_fifo2 to address 0 respectively.

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