Data scanning method, flash memory device and computer readable storage medium

Abstract

The embodiment of the invention relates to the technical field of storage management, and discloses a data scanning method, flash memory equipment and a computer readable storage medium. According to the data scanning method, when effective data is scanned, offset addresses are added to physical addresses of physical pages of physical blocks of a super block one by one; therefore, the distribution of effective data during scanning is relatively balanced, and the garbage collection speed is relatively stable, so that the performance consistency of the flash memory equipment is improved.

Description

Technical Field

[0001] This application relates to the technical field of storage management, and in particular, to a data scanning method, a flash memory device, and a computer-readable storage medium. Background Art

[0002] A flash memory device refers to a storage device manufactured based on flash memory technology (Flash Memory). Flash is an electronic storage medium that stores and reads data using an electric current in semiconductor transistors. For example, NAND flash is a type of flash memory composed of multiple memory cells, where each cell can store a data bit (0 or 1). A flash memory device can be an independent storage unit, such as a USB flash drive, a solid-state drive (SSD), etc., or a storage module embedded in other devices, such as eMMC or UFS storage in a smartphone.

[0003] Currently, user data is usually a mixture of sequential write IOs and random write IOs, which are written into the flash memory device at intervals, resulting in a situation where a part of the continuous space in the flash memory device stores random IOs, and a part of the continuous space stores sequential write IOs. This causes the distribution of valid data in the NAND flash to be uneven. Due to the uneven distribution of valid data, when performing valid data scanning and data relocation to reclaim garbage space, it is easy to cause a large fluctuation in the garbage collection speed, thereby causing a large up and down jitter in the performance of the host side, resulting in insufficient performance consistency of the flash memory device. Summary of the Invention

[0004] Embodiments of this application provide a data scanning method, a flash memory device, and a computer-readable storage medium, which can improve the performance consistency of the flash memory device.

[0005] To solve the above technical problems, the embodiments of this application provide the following technical solutions:

[0006] In a first aspect, an embodiment of this application provides a data scanning method applied to a flash memory device. The flash memory device includes multiple storage chips, each storage chip includes multiple physical blocks, and each physical block includes multiple physical pages. Among them, one physical block of each storage chip among the multiple storage chips is combined into a super block. The method includes:

[0007] When performing data scanning on the super block, starting from the first storage chip, taking the first storage chip as the currently scanned storage chip, and determining the first physical address of a physical page of the currently scanned storage chip;

[0008] Determine the second physical address of a physical page of the next storage chip according to the first physical address, and use the next storage chip as the currently scanned storage chip to repeat the step of determining the second physical address of a physical page of the next storage chip until the last storage chip is reached;

[0009] After determining the physical address of the last storage chip, return to the first storage chip to scan the physical pages of each physical block of each storage chip one by one until all the physical pages of all the physical blocks of the super block are scanned, where the second physical address = the first physical address + the offset address.

[0010] In some embodiments, the method further includes:

[0011] Calculate the offset address, where the offset address = the offset * the number of logical pages corresponding to one physical page * the number of physical blocks of one super block.

[0012] In some embodiments, the method further includes:

[0013] Calculate the number of logical pages corresponding to one physical page, where the number of logical pages corresponding to one physical page = the spatial size of one physical page / the spatial size of one logical page.

[0014] In some embodiments, the method further includes:

[0015] Calculate the offset, where the offset = the number of physical pages of one physical block / the number of storage chips corresponding to one super block.

[0016] In some embodiments, returning to the first storage chip to scan the physical pages of each physical block of each storage chip one by one includes:

[0017] In the first storage chip, determine the first physical page as the physical page to be scanned first;

[0018] Determine the physical address of the next physical page of the first physical page, use the physical address of the next physical page of the first physical page as the first physical address, and determine the second physical address of a physical page of the next storage chip according to the first physical address to scan the physical pages of each physical block of each storage chip one by one.

[0019] In some embodiments, the flash memory device includes multiple super blocks;

[0020] The method further includes:

[0021] Taking one super block as a unit, parallelly scan the data of multiple super blocks.

[0022] In some embodiments, the method further includes:

[0023] During the data scanning process, move the valid data in the superblock;

[0024] After all the valid data in the superblock has been moved, determine the first superblock, where the first superblock is the superblock to be recycled;

[0025] Recycle all the physical blocks corresponding to the first superblock.

[0026] In some embodiments, determining the first superblock includes:

[0027] Calculate the number of valid physical pages of each superblock, where the number of valid physical pages of each superblock = the sum of the number of valid physical pages of all the physical blocks of the superblock;

[0028] Determine the first superblock according to the number of valid physical pages of all the superblocks, where the first superblock is the superblock with the least number of valid physical pages.

[0029] In a second aspect, an embodiment of the present application provides a flash memory device, including:

[0030] A processor and a memory, where the processor is configured to execute the executable program code in the memory. When the executable program code is executed, the processor executes the instructions of the data scanning method as in the first aspect.

[0031] In a third aspect, an embodiment of the present application provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed, the data scanning method as in the first aspect is implemented.

[0032] The beneficial effects of the embodiments of the present application are as follows: Different from the prior art, a data scanning method provided by the embodiments of the present application is applied to a flash memory device. The flash memory device includes multiple storage chips, each storage chip includes multiple physical blocks, and each physical block includes multiple physical pages. Among them, one physical block of each storage chip among the multiple storage chips is combined into a super block. The method includes: when scanning data of the super block, starting from the first storage chip, taking the first storage chip as the currently scanned storage chip, and determining the first physical address of a physical page of the currently scanned storage chip. According to the first physical address, determining the second physical address of a physical page of the next storage chip, and taking the next storage chip as the currently scanned storage chip to repeat the step of determining the second physical address of a physical page of the next storage chip until reaching the last storage chip. After determining the physical address of the last storage chip, returning to the first storage chip to scan the physical pages of one physical block of each storage chip one by one until scanning all the physical pages of all the physical blocks of the super block, where the second physical address = the first physical address + the offset address.

[0033] By sequentially increasing the offset address for the physical addresses of the physical pages of each physical block of the super block when scanning valid data, the distribution of valid data during scanning is relatively balanced, and the speed of garbage collection is relatively stable, thereby improving the performance consistency of the flash memory device. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplary illustrations do not limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the drawings in the figures do not constitute a proportional limitation.

[0035] Figure 1 is a schematic diagram of data writing into a flash memory device in a sequential write mode provided by the embodiments of the present application;

[0036] Figure 2 is a schematic diagram of data writing into a flash memory device in a random write mode provided by the embodiments of the present application;

[0037] Figure 3 is a schematic flowchart of a data scanning method provided by the embodiments of the present application;

[0038] Figure 4 is a schematic diagram of data distribution in a flash memory device provided by the embodiments of the present application;

[0039] Figure 5 is a schematic flowchart of determining an offset address provided by the embodiments of the present application;

[0040] Figure 6 It is a schematic flow chart for determining the number of logical pages corresponding to a physical page provided by an embodiment of the present application;

[0041] Figure 7 It is a schematic flow chart for determining an offset provided by an embodiment of the present application;

[0042] Figure 8 is Figure 3 a refined schematic flow chart of step S303 of

[0043] Figure 9 It is a schematic flow chart for parallelly scanning multiple super blocks provided by an embodiment of the present application;

[0044] Figure 10 It is a schematic flow chart for recycling physical blocks provided by an embodiment of the present application;

[0045] Figure 11 is Figure 10 a refined schematic flow chart of step S1002 of

[0046] Figure 12 It is a schematic structural diagram of a flash memory device provided by an embodiment of the present application.

[0047] Explanation of the reference numerals in the drawings:

[0048] Label Name Label Name 1200 Flash device 1202 Memory 1201 Processor Detailed implementation manners

[0049] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0050] It should be noted that if there is no conflict, the various features in the embodiments of the present application can be combined with each other, and all are within the protection scope of the present application. In addition, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flow chart, in some cases, the steps shown or described can be executed in a different order from the module division in the device or the flow chart. Furthermore, the terms "first", "second", "third", etc. used in the present application do not limit the data and the execution order, but are only used to distinguish the same items or similar items with basically the same functions and effects.

[0051] In addition, the technical features involved in each embodiment of the present application described below can be combined with each other as long as they do not conflict with each other.

[0052] Before introducing the embodiments of the present application, a brief introduction to the prior art known to the inventors of the present application is given first, so as to facilitate the subsequent understanding of the embodiments of the present application.

[0053] Flash storage devices, such as: USB flash drives, SD cards, microSD cards, CF cards, solid state drives (SSDs), etc. Flash storage devices are storage devices using semiconductor flash memory (NAND Flash) as the medium. Its main components include flash memory media, flash memory controllers, dynamic random access memory (DRAM), etc. Among them, an important function of the flash memory controller is to act as a driver for the flash memory chip for storage operations, and its main operations include erasing, writing, and reading.

[0054] The flash memory media, as the storage medium of the flash storage device, is also called flash memory, Flash, NAND Flash memory, or Flash particles. The flash memory media serves as a storage unit for application data, system data, etc.

[0055] Flash storage devices support random writing and sequential writing. In the sequential writing mode, data is continuously written into the flash storage device. For example, please refer to Figure 1 , Figure 1 which is a schematic diagram of data writing into a flash storage device in the sequential writing mode provided by an embodiment of the present application. As shown in Figure 1 , data is sequentially written into the physical pages (Pages) of each physical block, such as Page0 and Page1, so that the data is stored in a specific area.

[0056] In the random writing mode, data is written to any position of the flash storage device. For example, please refer to Figure 2 , Figure 2 which is a schematic diagram of data writing into a flash storage device in the random writing mode provided by an embodiment of the present application. As shown in Figure 2 , data is randomly written into Page0 of physical block 0 of storage chip 0, Page1 of physical block 0 of storage chip 1, Page0 of physical block 0 of storage chip 2, Page1 of physical block 0 of storage chip 3, and Page1 of physical block 0 of storage chip N respectively, so that the data is evenly distributed in the flash storage device.

[0057] In sequential write mode, data is concentrated in a specific area, resulting in all valid data or all invalid data in the entire area, making the distribution of valid data on the flash device uneven. In random write mode, the distribution of valid and invalid data on the flash device is relatively uniform.

[0058] When reclaiming valid data in the flash device, the valid data in the flash device is usually reclaimed in the horizontal direction. For example, the horizontal direction is storage chip 0 - physical block 0 - Page0, storage chip 1 - physical block 0 - Page0, storage chip 2 - physical block 0 - Page0... storage chip N - physical block 0 - Page0, storage chip 0 - physical block 0 - Page1... storage chip N - physical block 0 - Page1. Due to spatial locality when writing data sequentially, when there is no valid data in a certain space of the flash device, during the scan of this space, since there is no or little valid data in this space, the garbage collection operation for this space will be reduced or paused, and the IO requests of the host (computer or server) will be responded to in order to perform the operations corresponding to the IO requests. The IO requests include operations such as data reading and writing.

[0059] Since the resources provided by the flash device are limited, there is a resource competition between the garbage collection operation and the IO requests from the host. If the garbage collection operation increases at a certain time point, the IO request operations of the host at the same time point will decrease. On the contrary, if the garbage collection operation decreases at a certain time point, the IO request operations of the host at the same time point will increase, resulting in inconsistent bandwidth performance per second of the flash device, and further leading to unstable performance of the flash device.

[0060] To address the above problems, the present application provides a data scanning method. When scanning valid data, the physical address of each physical page of each physical block in the superblock is incremented by an offset address one by one, making the distribution of valid data relatively balanced during the scan, making the speed of garbage collection relatively stable, and thus improving the performance consistency of the flash device.

[0061] The technical solution of the present application will be specifically described below in conjunction with the accompanying drawings of the specification:

[0062] Please refer to Figure 3 , Figure 3 which is a schematic flowchart of a data scanning method provided by an embodiment of the present application.

[0063] Among them, the data scanning method is applied to a flash device. Specifically, the execution entity of the data scanning method is one or at least two processors of the flash device.

[0064] As Figure 3 shown, the data scanning method includes:

[0065] Step S301: When scanning data of the super block, start from the first storage chip, take the first storage chip as the currently scanned storage chip, and determine the first physical address of a physical page of the currently scanned storage chip.

[0066] In the embodiment of the present application, the flash memory device includes multiple storage chips (Dies), and the storage chips are used to store data. Each storage chip includes multiple physical blocks (Blocks), and one physical block of each storage chip among the multiple storage chips is combined into a super block.

[0067] Please refer to Figure 4 , Figure 4 which is a schematic diagram of data distribution in a flash memory device provided by an embodiment of the present application.

[0068] As Figure 4 shown, the flash memory device includes multiple storage chips, for example, storage chips 0, 1, 2... N. Each storage chip includes multiple physical blocks, for example, storage chip 0 includes physical blocks 0, 1... n. Each physical block includes multiple physical pages, for example, physical block 0 in storage chip 0 includes physical page 0 (Page0), physical page 1 (Page1), and physical page 2 (Page2). One physical block of each storage chip is combined into a super block, for example, physical blocks 0 in storage chips 0, 1, 2... N together form a super block 0.

[0069] In the embodiment of the present application, when scanning data in the flash memory device, take the super block as a unit to scan the data on the super block one by one.

[0070] In the embodiment of the present application, each super block includes the number of valid physical pages (Valid Page Count, VPC). VPC is a mechanism for recording the number of valid pages on the super block. During the garbage collection process, sort the number of VPCs (the number of valid physical pages) of each super block, and select the super block with the least number of VPCs as the currently scanned super block.

[0071] Among them, garbage collection (GC) is an automatic memory management mechanism that can identify and clean objects no longer used in the program, release the memory space they occupy, so that the program can continue to use this memory space.

[0072] Specifically, when scanning data of the super block, start from the first storage chip, take the first storage chip as the currently scanned storage chip, and determine the first physical address of a physical page of the currently scanned storage chip.

[0073] In an embodiment of the present application, after determining the current storage chip, the physical pages in the physical blocks of the current storage chip are scanned in a sequential scanning manner, and the physical address of the first physical page in the currently scanned physical block is used as the first physical address of a physical page of the currently scanned storage chip.

[0074] For example, please refer to again Figure 4 , such as Figure 4 shown. Assume that the currently scanned superblock is Superblock 0. Starting from Storage Chip 0, the physical block 0 in the storage chip is scanned, and Page0, Page1... PageN in physical block 0 are scanned in sequence. The physical address of Page0 is used as the first physical address.

[0075] In an embodiment of the present application, the flash memory device includes an address mapping table for recording the mapping relationship between logical addresses and physical addresses. When it is necessary to access a certain superblock or physical page, the corresponding physical address can be obtained by querying this mapping table.

[0076] In an embodiment of the present application, the first physical address of a physical page of the currently scanned storage chip can be determined by querying the address mapping table.

[0077] Step S302: According to the first physical address, determine the second physical address of a physical page of the next storage chip, and use the next storage chip as the currently scanned storage chip to repeat the step of determining the second physical address of a physical page of the next storage chip until the last storage chip is reached.

[0078] Specifically, according to the first physical address, determine the second physical address of a physical page of the next storage chip. The second physical address = the first physical address + the offset address. For the specific calculation method of the offset address, please refer to Figure 5 .

[0079] Specifically, after determining the second physical address of a physical page of the next storage chip, use the next storage chip as the currently scanned storage chip and repeat the step of determining the second physical address of a physical page of the next storage chip until the last storage chip is reached.

[0080] For example, please refer to again Figure 4 , such as Figure 4As shown, if the currently scanned superblock is superblock 0, the first physical address is the physical address of Page0 of physical block 0 in storage chip 0. After determining the offset address, the second physical address of a physical page of the next storage chip is determined to be the physical address of PageK of physical block 0 in storage chip 1. Storage chip 1 is used as the currently scanned storage chip, and the physical address of the physical page of the next storage chip is calculated based on the physical address of PageK. For example, the physical address of the physical page of the next storage chip is calculated to be the physical address of Page2K of physical block 0 in storage chip 2. Storage chip 2 is used as the currently scanned storage chip, and the physical address of the physical page of the next storage chip corresponding to Page2K in storage chip 2 is continuously calculated until the physical address of the physical page of the last storage chip is determined.

[0081] Please refer to Figure 5 , Figure 5 which is a schematic flowchart of a process for determining an offset address provided by an embodiment of the present application.

[0082] As Figure 5 shown, the process for determining an offset address includes:

[0083] Step S501: Calculate the offset address.

[0084] Specifically, the offset address = offset * the number of logical pages corresponding to one physical page * the number of physical blocks of one superblock.

[0085] Please refer to Figure 6 , Figure 6 which is a schematic flowchart of a process for determining the number of logical pages corresponding to one physical page provided by an embodiment of the present application.

[0086] As Figure 6 shown, the process for determining the number of logical pages corresponding to one physical page includes:

[0087] Step S601: Calculate the number of logical pages corresponding to one physical page.

[0088] Specifically, the number of logical pages corresponding to one physical page = the space size of one physical page / the space size of one logical page.

[0089] In an embodiment of the present application, one physical page can store a mapping address, and the mapping address is used to convert a logical address into a physical address.

[0090] For example, when the space size of one physical page is 16k and the physical page is mapped to a logical page with a space size of 4k, then the number of logical pages corresponding to this physical page = 16k / 4k = 4.

[0091] Please refer to Figure 7 ,Figure 7 This is a schematic flow chart for determining an offset provided by an embodiment of the present application.

[0092] As Figure 7 shown, the process for determining the offset includes:

[0093] Step S701: Calculate the offset.

[0094] Specifically, the offset = the number of physical pages of a physical block / the number of storage chips corresponding to a super block. For example, if the number of physical pages of a physical block is N and the number of storage chips corresponding to a super block is N, then the offset = N / N = 1.

[0095] In the embodiment of the present application, the offset describes the relative position of data or a data block in the flash memory device, and the offset is used to determine the exact position of the data in the flash memory device for read and write operations.

[0096] In the embodiment of the present application, when scanning starts from the first physical page of a physical block, the offset is positive, and when scanning starts from the last physical page of a physical block, the offset is negative.

[0097] For example, please refer again to Figure 4 , as Figure 4 shown, the currently scanned super block is super block 0. When scanning the physical pages, when the scanning direction is from Page0 to PageN, the offset is positive, and when the scanning direction is from PageN to Page0, the offset is negative.

[0098] Step S303: After determining the physical address of the last storage chip, return to the first storage chip to scan the physical pages of a physical block of each storage chip one by one until all the physical pages of all the physical blocks of the super block are scanned.

[0099] Specifically, when a scan ends, after determining the physical address of the last storage chip, return to the next physical page of the physical page of the first storage chip scanned last time to scan the physical pages of a physical block of each storage chip one by one until all the physical pages of all the physical blocks of the super block are scanned. For the specific process of scanning the physical pages of a physical block of each storage chip one by one, please refer to Figure 8 .

[0100] For example, please refer again to Figure 4, the currently scanned superblock is superblock 0. After the first scan, the physical address of the last storage chip N is determined to be the physical address corresponding to PageMK, and it returns to the next physical page Page1 of Page0 of storage chip 0. Then, a second scan is performed on storage chip 0. Page1 is the currently scanned physical page. Based on the physical address of Page1, the physical address of the next storage chip is calculated. For example, the physical address of the next storage chip is PageK+1 of storage chip 1. Storage chip 1 is taken as the currently scanned storage chip, and the physical address of the next storage chip is continuously calculated until the last storage chip is reached. Then, it returns to storage chip 0 of the current superblock again and continues to scan the next physical page of storage chip 0 until all physical pages of all physical blocks of the superblock are scanned.

[0101] Please refer to again Figure 8 , Figure 8 is Figure 3 the detailed flowchart of step S303.

[0102] As Figure 8 shown, this step S303 includes:

[0103] Step S331: In the first storage chip, the first physical page to be scanned is determined as the first physical page.

[0104] Specifically, in the first storage chip, the first physical page to be scanned is determined as the first physical page. For example Figure 4 in storage chip 0 of superblock 0 in , the first physical page scanned is Page0, so Page0 is the first physical page.

[0105] Step S332: Determine the physical address of the next physical page of the first physical page, take the physical address of the next physical page of the first physical page as the first physical address, and based on the first physical address, determine the second physical address of a physical page of the next storage chip to scan the physical pages of each physical block of each storage chip one by one.

[0106] Specifically, after determining the physical address of the next physical page of the first physical page, take the physical address of the next physical page of the first physical page as the first physical address, and based on the first physical address, determine the second physical address of a physical page of the next storage chip to scan the physical pages of each physical block of each storage chip one by one.

[0107] For example, as Figure 4As shown, the currently scanned superblock is Superblock 0, and the first physical page to be scanned is Page0 of Physical Block 0 of Storage Chip 0. According to the calculation formula of the second physical address, calculate the physical address of the next physical page of Page0 to obtain the physical address of PageK. Take the physical address of PageK as the first physical address, continue to calculate the physical address of the next physical page of PageK to obtain the physical address of Page2K, and continue to calculate the physical address of the next physical page of Page2K until the physical address of the last storage chip is calculated. Then return to Storage Chip 0 in Superblock 0 and continue the second scan. The physical page for the second scan is Page1 of Physical Block 0 of Storage Chip 0, and continue to execute the process of the first scan. After determining the physical address of the last storage chip, return to Storage Chip 0 in Superblock 0 again and continue the third scan. Repeat the above steps until all physical pages of physical blocks in all storage chips in the superblock are scanned.

[0108] In the embodiment of the present application, after adding an offset address to the physical address, the physical address of the next physical page of the current storage chip of the current physical page is obtained, so that during the data scanning process, the scanning is no longer carried out in the horizontal direction. Since the scanning is no longer carried out in the horizontal direction, the physical address of the next physical page of the current storage chip of the current physical page calculated currently is not the physical address of the physical page in the same horizontal direction as the current physical page. For example, please refer to Figure 4 , the currently scanned physical page is Page0 of Storage Chip 0, and the physical address of the next physical page of Page0 is the physical address of PageK.

[0109] Since the size of each physical block is limited, that is, the number of physical pages is fixed. If the physical address of the next physical page of the current storage chip of the current physical page exceeds the range of the physical block of the next storage chip, directly jump to the first physical page of the physical block of the next storage chip of the current storage chip, and continue to execute the calculation of the physical address of the next physical page of the current physical page. For example, please refer to Figure 4 , the currently scanned physical page is PageN of Physical Block 0 of Storage Chip 0. Adding the offset address to the physical address of PageN to obtain the physical address of the next physical page exceeds the range of Physical Block 0 of Storage Chip 1, then directly jump to Page0 of Physical Block 0 of Storage Chip 1.

[0110] In the embodiment of the present application, after scanning a superblock, according to the sorting of the number of VPCs in each superblock, determine the superblock with the fewest un-scanned VPCs as the currently scanned superblock, and continue to execute as Figure 3 shown in each step until all superblocks are scanned.

[0111] In an embodiment of the present application, when scanning the data of the superblock, by adding an offset address to calculate the physical address of the next physical page of the currently scanned physical page, the traditional sequential scanning method of physical addresses can be broken, so as to achieve balanced scanning of the superblock, effectively avoiding a large amount of access to a certain space during a specific period of time while other spaces are idle, and improving the consistency of the flash memory device.

[0112] In an embodiment of the present application, multiple superblocks can also be scanned in parallel. For the specific process, please refer to Figure 9 。

[0113] Please refer to Figure 9 , Figure 9 which is a schematic flow chart of parallel scanning of multiple superblocks provided by an embodiment of the present application.

[0114] As Figure 9 shown, the parallel scanning of multiple superblocks includes:

[0115] Step S901: Taking one superblock as a unit, parallelly scan the data of multiple superblocks.

[0116] Specifically, taking superblocks as units, parallelly scan the data of multiple superblocks.

[0117] For example, as Figure 4 shown, the flash memory device includes superblock 0, superblock 1, superblock 2... superblock n. When scanning the superblocks, superblock 0 and superblock 1 can be scanned simultaneously, or more superblocks can be scanned.

[0118] In an embodiment of the present application, by parallelly scanning the superblocks, the processing speed of processing large-scale data can be improved, and the performance of the flash memory device can be enhanced.

[0119] In an embodiment of the present application, during the process of scanning the superblock, it is necessary to move the valid data in the superblock in order to recycle all free physical blocks. For the specific process, please refer to Figure 10 。

[0120] Please refer to Figure 10 , Figure 10 which is a schematic flow chart of recycling physical blocks provided by an embodiment of the present application.

[0121] As Figure 10 shown, the recycling of physical blocks includes:

[0122] Step S1001: During the data scanning process, move the valid data in the superblock.

[0123] Specifically, during the data scanning process, when it is scanned that the physical page in the superblock stores valid data, the valid data on the physical page is moved to a new location, and the next physical page is continued to be scanned to ensure that all the valid data in the superblock is moved.

[0124] Step S1002: After all the valid data in the superblock is moved, determine the first superblock, where the first superblock is the superblock to be recycled.

[0125] Specifically, after all the valid data in the superblock is moved, based on the number of valid pages in the superblock, determine the first superblock, and the first superblock is the superblock to be recycled. For the specific process of determining the first superblock, please refer to Figure 10 。

[0126] Please refer to again Figure 11 , Figure 11 is Figure 10 the detailed flowchart of step S1002 of

[0127] As Figure 11 shown, this step S1002 includes:

[0128] Step S1021: Calculate the number of valid physical pages of each superblock, where the number of valid physical pages of each superblock = the sum of the number of valid physical pages of all physical blocks of the superblock.

[0129] Specifically, calculate the number of valid physical pages of each superblock, and the number of valid physical pages of each superblock = the sum of the number of valid physical pages of all physical blocks of the superblock.

[0130] Step S1022: Determine the first superblock according to the number of valid physical pages of all superblocks.

[0131] Specifically, count the number of valid physical pages of each superblock, sort them, and determine the superblock with the least number of valid physical pages as the first superblock.

[0132] In the embodiment of the present application, the number of the first superblocks can be more than two. At this time, at least two first superblocks can be determined according to the number of valid physical pages to recycle at least two first superblocks.

[0133] Step S1003: Recycle all physical blocks corresponding to the first superblock.

[0134] Specifically, after determining the first superblock, recycle all physical blocks corresponding to the first superblock.

[0135] In the embodiments of the present application, recycling the superblock with the least number of valid physical pages first can release large contiguous memory spaces more quickly, so as to improve the memory utilization rate of the flash device.

[0136] Please refer to Figure 12 , Figure 12 which is a schematic structural diagram of a flash device provided by an embodiment of the present application.

[0137] As Figure 12 shown, the flash device 1200 includes one or more processors 1201 and a memory 1202. Among them, Figure 12 one processor 1201 is taken as an example herein.

[0138] The processor 1201 and the memory 1202 can be connected through a bus or other means, Figure 12 and taking the connection through a bus as an example herein.

[0139] The processor 1201 is used to provide computing and control capabilities to control the flash device 1200 to execute corresponding tasks. For example, controlling the flash device 1200 to execute the data scanning method in any one of the above method embodiments. The method includes: when performing data scanning on the superblock, starting from the first storage chip, taking the first storage chip as the currently scanned storage chip, and determining the first physical address of a physical page of the currently scanned storage chip. According to the first physical address, determining the second physical address of a physical page of the next storage chip, and taking the next storage chip as the currently scanned storage chip to repeat the step of determining the second physical address of a physical page of the next storage chip until reaching the last storage chip. After determining the physical address of the last storage chip, returning to the first storage chip to scan each physical page of a physical block of each storage chip one by one until all physical pages of all physical blocks of the superblock are scanned, where the second physical address = the first physical address + the offset address.

[0140] By sequentially increasing the offset address for the physical addresses of the physical pages of each physical block of the superblock during the scanning of valid data, the distribution of valid data during scanning is relatively balanced, the speed of garbage collection is relatively stable, and thus the performance consistency of the flash device is improved.

[0141] The processor 1201 may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), a hardware chip, or any combination thereof; it may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The above PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0142] The memory 1202, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the data scanning method in the embodiments of the present application. By running the non-transitory software programs, instructions, and modules stored in the memory 1202, the processor 1201 can implement the data scanning method in any of the above method embodiments. Specifically, the memory 1202 may include a volatile memory (VM), such as a random access memory (RAM); the memory 1202 may also include a non-volatile memory (NVM), such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD), or other non-transitory solid-state storage devices; the memory 1202 may further include a combination of the above types of memories.

[0143] The memory 1202 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage devices. In some embodiments, the memory 1202 may optionally include a memory remotely located relative to the processor 1201, and these remote memories may be connected to the processor 1201 through a network. Examples of the above networks include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.

[0144] One or more modules are stored in the memory 1202 and, when executed by one or more processors 1201, perform the data scanning method in any of the above method embodiments. For example, perform each of the steps described above. Figure 3 shown steps.

[0145] In the embodiments of the present application, the flash memory device 1200 may further have components such as a wired or wireless network interface, a keyboard, and an input / output interface for input / output. The flash memory device 1200 may further include other components for implementing the functions of the device, which will not be elaborated here.

[0146] The embodiments of the present application also provide a non-volatile computer-readable storage medium, such as a memory including program code, and the above program code can be executed by a processor to complete the data scanning method in the above embodiments. For example, the non-volatile computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CDROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0147] The embodiments of the present application also provide a computer program product, which includes one or more pieces of program code, and the program code is stored in a non-volatile computer-readable storage medium. The processor of the flash memory device reads the program code from the non-volatile computer-readable storage medium, and the processor executes the program code to complete the method steps of the data scanning method provided in the above embodiments.

[0148] Those of ordinary skill in the art can understand that all or part of the steps to implement the above embodiments can be completed by hardware, or can be completed by hardware related to program code. The program can be stored in a non-volatile computer-readable storage medium, and the above-mentioned storage medium can be a read-only memory, a magnetic disk, or an optical disc, etc.

[0149] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a general hardware platform, and of course, can also be implemented by hardware. Based on such an understanding, the essence of the above technical solution, or the part that contributes to the related technology, can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disc, etc., and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0150] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than limiting them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order, and there are many other variations in different aspects of the present application as above, and for the sake of brevity, they are not provided in detail; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A data scanning method, characterized in that: Applied to a flash memory device, the flash memory device includes a plurality of memory chips, each memory chip includes a plurality of physical blocks, each physical block includes a plurality of physical pages, wherein a physical block of each memory chip in the plurality of memory chips is combined into a super block, the method includes: When scanning data on the super block, starting from the first memory chip, the first memory chip is used as the currently scanned memory chip, and a first physical address of a physical page of the currently scanned memory chip is determined; Determine a second physical address of a physical page of a next memory chip according to the first physical address, and use the next memory chip as the currently scanned memory chip to repeat the step of determining the second physical address of a physical page of the next memory chip until the last memory chip is reached; After determining the physical address of the last memory chip, return to the first memory chip to scan the physical pages of a physical block of each memory chip one by one until all physical pages of all physical blocks of the super block are scanned, wherein the second physical address = the first physical address + the offset address.

2. The method according to claim 1, characterized in that The method further comprises: The offset address is calculated, wherein the offset address=offset amount*the number of logical pages corresponding to one physical page*the number of physical blocks of one super block.

3. The method according to claim 2, characterized in that The method further comprises: The number of logical pages corresponding to the one physical page is calculated, wherein the number of logical pages corresponding to the one physical page=the space size of one physical page / the space size of one logical page.

4. The method according to claim 2, characterized in that: The method further comprises: The offset is calculated, wherein the offset=the number of physical pages of a physical block / the number of storage chips corresponding to a super block.

5. The method according to claim 1, characterized in that The returning to the first memory chip to scan the physical pages of a physical block of each memory chip one by one includes: In the first storage chip, a physical page that is scanned first is determined as a first physical page; Determine the physical address of the next physical page of the first physical page, take the physical address of the next physical page of the first physical page as the first physical address, and determine the second physical address of a physical page of the next storage chip based on the first physical address, so as to scan the physical pages of a physical block of each storage chip one by one.

6. The method according to claim 1, characterized in that The flash memory device includes a plurality of super blocks; The method further comprises: Taking a super block as a unit, data scanning is performed on a plurality of super blocks in parallel.

7. The method according to claim 1, characterized in that The method further comprises: During the data scanning process, valid data in the super block is moved; After all valid data in the super block is moved, determining a first super block, wherein the first super block is a super block to be recycled; All physical blocks corresponding to the first super block are recycled.

8. The method according to claim 7, characterized in that The determining of the first super block comprises: Calculate the number of valid physical pages of each super block, wherein the number of valid physical pages of each super block=the sum of the numbers of valid physical pages of all physical blocks of the super block; A first super block is determined according to the number of valid physical pages of all super blocks, wherein the first super block is a super block having the least number of valid physical pages.

9. A flash memory device, characterized in that: include: A processor and a memory, wherein the processor is used to execute an executable program code in the memory, and when the executable program code is executed, the processor executes instructions of the data scanning method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed, the data scanning method according to any one of claims 1 to 8 is implemented.

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