Hardware control system, method and device, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a hardware control system, method and device, a storage medium and electronic equipment, and the system comprises a processor which is used for generating a hardware control signal of hardware equipment; the information distribution module is used for generating interface address information; the first end of the multiplexer is connected with the information distribution module, the second end of the multiplexer is connected with the processor, the third end of the multiplexer is connected with the receiving end of the interface switching module, and the multiplexer is used for conducting the first end and the third end under the condition that the first control signal is received so as to transmit interface address information; the first terminal is used for conducting a second terminal and a third terminal under the condition of receiving a second control signal so as to transmit a hardware control signal; and the output end of the interface switching module is connected with the plurality of interfaces. According to the method and the device, the problem of relatively low expandability of hardware equipment in related technologies is solved, so that the effect of improving the flexibility and expandability of the system is achieved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of server hardware design. Specifically, the present application relates to a hardware control system, method, device, storage medium, and electronic device. Background Art

[0002] With the continuous development of server technology, the requirements for the scalability and compatibility of hardware devices are increasing day by day. The communication architecture between the server motherboard and expansion devices, especially the signal distribution of high-speed signal connectors, has become a key challenge in the design.

[0003] Traditional signal transmission schemes use multiple address pins to distinguish different high-speed interfaces. Although this method is feasible, in high-density hardware configurations, the use of address pins will increase rapidly, occupying valuable signal resources and restricting the expandable functions of the connector, resulting in low expandability of hardware devices in related technologies. Summary of the Invention

[0004] The embodiments of the present application provide a hardware control system, method, device, storage medium, and electronic device to at least solve the problem of low expandability of hardware devices in related technologies.

[0005] According to an embodiment of the present application, there is provided a hardware control system, including: a processor configured to generate hardware control signals for a hardware device; an information distribution module configured to generate interface address information, where the interface address information is used to represent the correspondence between multiple interfaces and multiple hardware devices; a multiplexer, a first end of the multiplexer is connected to the information distribution module, a second end of the multiplexer is connected to the processor, and a third end of the multiplexer is connected to a receiving end of an interface switching module. The multiplexer is configured to conduct the first end and the third end to transmit the interface address information when receiving a first control signal, and conduct the second end and the third end to transmit the hardware control signal when receiving a second control signal; an interface switching module, an output end of the interface switching module is connected to multiple interfaces, and is configured to transmit the interface address information and the hardware control signals to the multiple interfaces, so as to control a target interface corresponding to the hardware device in the multiple interfaces to respond to the hardware control signals according to the interface address information.

[0006] Further, the system further includes: a first expander connected to a preset interface among the multiple interfaces, configured to receive the interface address information and convert the interface address information into multiple address signals; a second expander connected to the first expander, configured to send the hardware control signals to the target interface according to the multiple address signals.

[0007] Further, the system further includes: a baseboard management controller, a first end of the baseboard management controller is connected to the processor, and a second end of the baseboard management controller is connected to the interface switching module, configured to receive device status information of a hardware device sent by the processor, and generate a status control signal according to the device status information, so as to transmit the status control signal to a status display device corresponding to the hardware device through the interface switching module, wherein the status display information is used to represent the working status of the hardware device.

[0008] Further, the system further includes: a status display device, connected to the interface switching module, configured to receive the status control signal, and perform status display according to a status display mode corresponding to the status control signal.

[0009] According to another embodiment of the present application, a hardware control method is provided, including: controlling an information distribution module in the hardware control system to generate interface address information, and controlling a processor in the hardware control system to generate a hardware control signal; in response to receiving a first control signal, controlling a multiplexer in the hardware control system to transmit the interface address information to an interface switching module in the hardware control system; in response to receiving a second control signal, controlling the multiplexer to transmit the hardware control signal to the interface switching module; controlling the interface switching module to transmit the interface address information and the hardware control signal to a plurality of interfaces, so as to control a target interface corresponding to a hardware device among the plurality of interfaces to respond to the hardware control signal according to the interface address information.

[0010] Further, controlling the interface switching module to transmit the interface address information and the hardware control signal to a plurality of interfaces, so as to control a target interface corresponding to a hardware device among the plurality of interfaces to respond to the hardware control signal according to the interface address information, includes: converting the interface address information into a plurality of address signals; sending the hardware control signal to the target interface according to the plurality of address signals, so as to control the target interface to respond to the hardware control signal.

[0011] Further, the method further includes: obtaining device status information of the hardware device; generating a status control signal according to the device status information, and controlling a status display device corresponding to the hardware device based on the status control signal, wherein the status display device is used to represent the working status of the hardware device; wherein, controlling the status display device corresponding to the hardware device based on the status control signal includes: converting the status control signal according to a display format of the status display device to obtain a converted signal; encoding the converted signal to obtain a display mode of the hardware device; controlling the status display device to perform display based on the display mode; the display mode includes one of the following: a first display mode, a second display mode, and a third display mode, the first display mode is used to represent that the working status of the hardware device is a normal working status, the second display mode is used to represent that the working status of the hardware device is an abnormal working status, and the third display mode is used to represent that the hardware device is not in a working state.

[0012] According to another embodiment of the present application, a hardware control device is provided, including: a first control module, configured to control an information distribution module in a hardware control system to generate interface address information, and control a processor in the hardware control system to generate a hardware control signal; a second control module, configured to, in response to receiving a first control signal, control a multiplexer in the hardware control system to transmit the interface address information to an interface switching module in the hardware control system; a third control module, configured to, in response to receiving a second control signal, control the multiplexer to transmit the hardware control signal to the interface switching module; a fourth control module, configured to control the interface switching module to transmit the interface address information and the hardware control signal to a plurality of interfaces, so as to control a target interface corresponding to a hardware device among the plurality of interfaces to respond to the hardware control signal according to the interface address information.

[0013] According to still another embodiment of the present application, a computer-readable storage medium is further provided. A computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute the steps in any one of the above method embodiments when running.

[0014] According to still another embodiment of the present application, an electronic device is further provided, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0015] According to still another embodiment of the present application, a computer program product is further provided, including a computer program, and the computer program realizes the steps in any one of the above method embodiments when executed by a processor.

[0016] In an embodiment of the present application, a hardware control system including a processor, an information distribution module, a multiplexer, and an interface switching module is designed. Among them, the processor is configured to generate a hardware control signal for a hardware device; the information distribution module is configured to generate interface address information; three ports of the multiplexer are respectively responsible for the on-off states with the information distribution module, the processor, and the interface switching module; the interface switching module is configured to transmit the interface address information and the hardware control signal to a plurality of interfaces, so as to control a target interface corresponding to a hardware device among the plurality of interfaces to respond to the hardware control signal according to the interface address information. It is easy to note that the present application proposes a hardware control system that dynamically allocates and controls hardware control signals and interface address information through a multiplexer and an interface switching module. By combining the interface address information generated by the information distribution module and the hardware control signal generated by the processor, and integrating the multiplexer and the interface switching module, precise control and efficient signal transmission between multiple interfaces and hardware devices are achieved, thereby improving the flexibility and scalability of the system, reducing the complexity of hardware design, and further solving the problem of low expandability of hardware devices in the related art. Brief Description of the Drawings

[0017] Figure 1 is a hardware structure block diagram of a server device for a hardware control method according to an embodiment of the present application;

[0018] Figure 2 is a schematic diagram of a hardware control system according to an embodiment of the present application;

[0019] Figure 3 is a flowchart of a hardware control method according to an embodiment of the present application;

[0020] Figure 4 is a structure block diagram of a hardware control device according to an embodiment of the present application. Detailed Embodiments

[0021] Embodiments of the present application will be described in detail below with reference to the drawings and in conjunction with the embodiments.

[0022] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence.

[0023] The method embodiments provided in the embodiments of the present application can be executed on a server device or a similar computing device. Taking running on a server device as an example, Figure 1 is a hardware structure block diagram of a server device for a hardware control method according to an embodiment of the present application. As Figure 1 shown, the server device may include one or more ( Figure 1 only one is shown in the figure) processors 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. Among them, the above server device may further include a transmission device 106 for communication functions and an input / output device 108. Those of ordinary skill in the art can understand that, Figure 1 the structure shown in the figure is only schematic, and it does not limit the structure of the above server device. For example, the server device may further include more or fewer components than Figure 1 shown in the figure, or have a different configuration from Figure 1 shown in the figure.

[0024] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the hardware control method in the embodiments of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implements the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid-state memories. In some instances, the memory 104 may further include a memory remotely disposed relative to the processor 102, and these remote memories can be connected to the server device through a network. Examples of the above network include but are not limited to the Internet, intranet, local area network, mobile communication network, and combinations thereof.

[0025] The transmission device 106 is used to receive or send data via a network. Specific examples of the above network may include a wireless network provided by a communication provider of the server device. In one instance, the transmission device 106 includes a network adapter (Network Interface Controller, abbreviated as NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0026] In this embodiment, a hardware control system is provided. Figure 2 It is a schematic diagram of a hardware control system according to an embodiment of the present application, as Figure 2 shown. The hardware control system includes:

[0027] A processor 202, configured to generate a hardware control signal for a hardware device;

[0028] An information distribution module 204, configured to generate interface address information, where the interface address information is used to represent the corresponding relationship between a plurality of interfaces 210 and a plurality of hardware devices;

[0029] A multiplexer 206, the first end of the multiplexer is connected to the information distribution module, the second end of the multiplexer is connected to the processor, and the third end of the multiplexer is connected to the receiving end of the interface switching module. The multiplexer is configured to conduct the first end and the third end to transmit the interface address information when receiving a first control signal, and conduct the second end and the third end to transmit the hardware control signal when receiving a second control signal;

[0030] An interface switching module 208, the output end of the interface switching module is connected to multiple interfaces 210, and is used to transmit interface address information and hardware control signals to the multiple interfaces, so as to control a target interface corresponding to a hardware device in the multiple interfaces to respond to the hardware control signal according to the interface address information.

[0031] The above-mentioned processor can be regarded as the brain of the hardware control system. The types of processors can include but are not limited to a central processing unit (CPU for short), a microcontroller based on the advanced reduced instruction set computer (ARM for short) architecture, a field-programmable gate array (FPGA for short), or a digital signal processor (DSP for short), etc. The specific processor needs to be determined according to the system design and is not limited here. The processor can be used to execute control logic, parse instructions, generate hardware control signals, etc.

[0032] The above-mentioned hardware device can refer to physical components that need to be controlled and managed in the system. The types of hardware devices can include but are not limited to memories, input / output devices, network interface cards, processors, sensors, and actuators, etc. The hardware device is the basis for the realization of system functions and can be used to execute specific tasks, such as data storage, signal input / output, network communication, etc.

[0033] The above-mentioned hardware control signal can refer to an electrical signal generated by a processor or control logic and is used to directly control the state and behavior of a hardware device. The types of hardware control signals can include but are not limited to start / stop signals, configuration signals, status query signals, etc. The specific type of hardware control signal needs to be determined according to different hardware requirements and is not limited here. The hardware control signal can be used as a communication bridge between the hardware control system and the hardware device, and the system guides the hardware device to execute specific operations through the hardware control signal.

[0034] The above-mentioned signal distribution module can refer to a key module responsible for communication between the hardware device and the processor, and is used to ensure that the hardware control signal can be correctly directed to the target hardware device. The types of information distribution modules can include but are not limited to complex programmable logic devices (CPLD for short), dedicated hardware circuits, software modules executed by microcontrollers, etc. The specific signal distribution module needs to be determined according to the system design and is not limited here. The signal distribution module can be used to be responsible for generating information about the interface address.

[0035] The above interface address information may refer to data in the system used to identify and distinguish the connection relationships between multiple interfaces and hardware devices. The interface address information may include, but is not limited to, I / O port addresses, device identifiers, network addresses, etc. The specific interface address information needs to be determined according to the system design and is not limited here. The interface address information can be used to ensure that the hardware control signals can be correctly routed to the target hardware device.

[0036] The above multiple interfaces may refer to physical or virtual connection points in the system used to connect the processor, information distribution module, and hardware devices. The interface types may include, but are not limited to, two-wire serial bus (Inter-Integrated Circuit, abbreviated as I2C) interfaces, Ethernet interfaces, etc. The specific interface types need to be determined according to actual requirements and are not limited here. Each interface may be connected to one or more hardware devices. Through the control of the interface switching module, the hardware control signals and address information can be accurately directed to specific hardware devices.

[0037] The above multiplexer may refer to a signal switching device. The types of multiplexers may include, but are not limited to, analog and digital multiplexers in simple digital circuits, or more complex intelligent multiplexers with fault detection and signal enhancement functions, etc. The specific multiplexer needs to be determined according to the system requirements and is not limited here. The multiplexer allows the system to switch signal transmission between multiple signal sources (processor, information distribution module) and a common target (interface switching module). In this system, the multiplexer selectively transmits the interface address information or hardware control signals from the information distribution module or processor to the interface switching module according to the received control signals.

[0038] In an alternative embodiment, a multiplexer is used in the hardware control system to be responsible for signal switching and management. The three ports of the multiplexer are respectively connected to the information distribution module, the processor, and the interface switching module, and intelligently select the conduction path according to the received control signals, so as to switch between transmitting the interface address information and the hardware control signals. This design reduces the number of signal lines and improves the system integration and signal management efficiency.

[0039] The above first control signal may refer to a signal in the hardware control system used to instruct the multiplexer to perform a transmission operation. The first control signal can be used to control the channel selection of the multiplexer and determine whether to transmit the interface address information to the interface switching module, etc.

[0040] The above-mentioned second control signal may refer to an instruction signal in a hardware control system used to instruct a multiplexer to transfer a hardware control signal from a processor to an interface switching module. When the processor generates a hardware control signal and needs to perform real-time control on a hardware device through the interface switching module, the central control unit issues the second control signal. This signal will guide the multiplexer to select the hardware control signal as its input source, ensuring that the hardware control signal can be correctly transmitted to the interface switching module.

[0041] The above-mentioned interface switching module may refer to a module responsible for correctly distributing interface address information and hardware control signals to multiple interfaces, ensuring that the signals can reach the associated hardware devices. The types of interface switching modules may include, but are not limited to, two-wire serial bus (Inter-Integrated Circuit, abbreviated as I2C) interface switching modules, signal switches at the physical layer, network switches with intelligent routing functions, or software-controlled virtual interface managers, etc. The specific interface switching module needs to be determined according to actual requirements and is not limited here. The interface switching module can be used to identify the target interface based on the interface address information and control the target interface to respond to the hardware control signal.

[0042] In an optional embodiment, by connecting the output end of the interface switching module to multiple interfaces, the interface switching module can receive signals from the multiplexer and transmit the hardware control signal to the corresponding hardware device interface according to the interface address information, thus ensuring the accurate distribution of signals, avoiding device misoperations caused by signal mismatches, and enhancing the scalability and flexibility of the system.

[0043] In an optional embodiment, a hardware control system including a processor, a signal distribution module, a multiplexer, and an interface switching module is constructed. Among them, the introduction of the multiplexer significantly reduces the number of signal lines. The interface address information generated by the information distribution module ensures the accurate transmission of the hardware control signal. Through the collaborative action of the processor, the information distribution module, the multiplexer, and the interface switching module, the optimization of the control of the hardware device is realized, not only improving the efficiency and accuracy of signal transmission, but also simplifying system management, providing strong support for building a highly integrated and highly flexible hardware system.

[0044] In an embodiment of the present application, a hardware control system including a processor, an information distribution module, a multiplexer, and an interface switching module is designed. Among them, the processor is used to generate hardware control signals for hardware devices; the information distribution module is used to generate interface address information; three ports of the multiplexer are respectively responsible for the on-off states with the information distribution module, the processor, and the interface switching module; the interface switching module is used to transmit the interface address information and the hardware control signals to multiple interfaces, so as to control the target interface corresponding to the hardware device in the multiple interfaces to respond to the hardware control signals according to the interface address information. It is easy to notice that the present application proposes a hardware control system that dynamically distributes and controls hardware control signals and interface address information through a multiplexer and an interface switching module. Through the interface address information generated by the information distribution module and the hardware control signals generated by the processor, combined with the multiplexer and the interface switching module, precise control and efficient signal transmission between multiple interfaces and hardware devices are achieved, thereby improving the flexibility and scalability of the system, reducing the complexity of hardware design, and further solving the problem of low expandability of hardware devices in related technologies.

[0045] Optionally, the system further includes: a first expander connected to a preset interface among the multiple interfaces, configured to receive the interface address information and convert the interface address information into multiple address signals; a second expander connected to the first expander, configured to send the hardware control signals to the target interface according to the multiple address signals.

[0046] The above-mentioned first expander may refer to a component in the system that is used to receive the interface address information and convert it into multiple address signals. The type of the first expander may include but is not limited to an Inter-Integrated Circuit expander (abbreviated as I2C expander), a programmable logic circuit of a microcontroller, or a hardware-based dedicated circuit, etc. The specific first expander needs to be determined according to the system circuit design and is not limited here. The first expander can be used to connect to a preset interface, receive the interface address information generated by the information distribution module, and then through specific logical conversion, generate multiple parallel address signals, thereby providing a basis for subsequent signal distribution and device control.

[0047] The above-mentioned preset interface may refer to a specially designated interface in the system for communicating with the first expander and receiving the interface address information. The type of the preset interface may include but is not limited to an Inter-Integrated Circuit (abbreviated as I2C) interface, a serial peripheral interface, an Ethernet interface, etc. The specific interface type needs to be determined according to the system design and communication requirements and is not limited here. The preset interface can be used to ensure the correctness and consistency of signal transmission.

[0048] The above-mentioned multiple address signals may refer to the output after the first expander converts the interface address information. The multiple address signals may be parallel digital signals, with each signal corresponding to one or a group of hardware devices. The multiple address signals can be used to identify the specific locations or identities of multiple hardware devices in the system, so that the second expander can accurately send the hardware control signal to the target interface. The type and quantity of the address signals need to be designed according to the quantity and type of the hardware devices in the system, so as to ensure the uniqueness and reliability of the signals.

[0049] The above-mentioned second expander may refer to a component used to send the hardware control signal to the target interface according to multiple address signals. The types of the second expander may include but are not limited to two-wire serial bus expanders (Inter-Integrated Circuit expanders, abbreviated as I2C expanders), programmable logic circuits of microcontrollers, or dedicated circuits based on hardware, etc. The specific first expander needs to be determined according to the system circuit design, which is not limited here. The second expander can be used to receive the address signals converted from the first expander, and combine with the hardware control signal to accurately route the control signal to the corresponding hardware device according to the content of the address signal.

[0050] The above-mentioned target interface may refer to an interface in the system that needs to receive the hardware control signal to drive or control a specific hardware device. Through the cooperation of the first expander and the second expander, the hardware control signal can be accurately sent to the target interface, ensuring that the hardware device responds correctly according to the control instruction.

[0051] In an optional embodiment, by introducing the first expander and the second expander, the hardware control system realizes the precise control and efficient management of multiple hardware devices. The first expander receives the interface address information and converts it into multiple address signals, which not only simplifies the data transmission between the information distribution module and the multiplexer, but also provides a clear indication for subsequent signal distribution. At the same time, the second expander sends the hardware control signal to the target interface according to the address signal, ensuring the accurate routing of the signal and avoiding signal conflicts and device misoperations. The use of the first expander and the second expander reduces the system's demand for traditional address signals, saves hardware resources, and at the same time, through conversion into address signals, more complex and precise identification and control of hardware devices can be achieved. This method reduces the signal resource occupation on the host side, reduces the material cost, and improves the configurability and operation efficiency of the system.

[0052] Optionally, the system further includes: a baseboard management controller, the first end of the baseboard management controller is connected to the processor, and the second end of the baseboard management controller is connected to the interface switching module, configured to receive the device status information of the hardware device sent by the processor, and generate a status control signal according to the device status information, so as to transmit the status control signal to the status display device corresponding to the hardware device through the interface switching module, wherein the status display information is used to represent the working status of the hardware device.

[0053] The above-mentioned baseboard management controller (abbreviated as BMC) may refer to a dedicated microcontroller, mainly used to monitor and manage the health status and operating status of a server or other computing device. In this system, the first end of the BMC is connected to the processor to receive the device status information of the hardware device sent by the processor, and the second end is connected to the interface switching module, configured to generate a status control signal, and transmit the status control signal to the status display device corresponding to the hardware device through the interface switching module.

[0054] The above-mentioned device status information may refer to data generated by the processor for describing the current working status of the hardware device. The device status information may include, but is not limited to, the operating temperature, voltage, fan speed, hard disk status, network connection status, etc. of the device. The specific device status information needs to be determined according to actual requirements and is not limited here.

[0055] The above-mentioned status control signal may refer to a signal generated according to the device status information for controlling the status display device to display the current status of the hardware device. The type of the status control signal may include, but is not limited to, a digital status control signal or an analog status control signal. The specific status control signal needs to be determined according to the input type and communication protocol of the status display device and is not limited here. The status control signal may include, but is not limited to, a normal operating status signal, a warning status signal, and a fault status signal, etc. The specific status signal needs to be determined according to the status information of the hardware device and is not limited here. Through the status control signal, the status display device can reflect the operating conditions of the hardware device in real time, facilitating maintenance personnel to monitor and troubleshoot faults.

[0056] The above-mentioned status display device may refer to a device used to intuitively display the status of a hardware device. The types of status display devices may include, but are not limited to, light-emitting diodes (LEDs), organic light-emitting diode displays (OLED displays), etc. The specific status display device needs to be determined according to the system design and is not limited here. The status display device can be used to display the working status of the hardware device, such as normal operation, warning, failure, etc., according to the status control signal sent by the BMC, and intuitively display the status of the hardware device.

[0057] In an alternative embodiment, the baseboard management controller receives the status information of the hardware device and generates a status control signal, which is transmitted to the status display device through the interface switching module, enabling the system to automatically perform status display control based on the status of the device. The above process enables the system to monitor the status of the hardware device in real time, such as the working status and health status of the device, and intuitively display it to the user through the status display device. This not only improves the management level and user experience of the system but also ensures the timely feedback of the device status, facilitating maintenance and problem diagnosis.

[0058] Optionally, the system further includes: a status display device, connected to the interface switching module, for receiving the status control signal and performing status display according to the status display mode corresponding to the status control signal.

[0059] The above-mentioned status display mode may refer to the rules or algorithms for how the status display device parses and presents the status control signal. The status display mode defines the display styles and contents corresponding to different statuses. For example, for an LED light, the status display mode may involve indications of different colors or blinking frequencies; for a display screen, the status display mode may include the presentation of different icons, texts, or interface layouts. The status display mode depends on the type of the status display device and the design requirements of the system. It can be a predefined static mode, a dynamically adjustable mode, or even a user-defined mode to provide more personalized or more refined status display. The specific status display mode needs to be determined according to the actual requirements and system design and is not limited here.

[0060] In an alternative embodiment, the introduction of the status display device and its diverse status display modes significantly improves the monitoring efficiency and management intuitiveness of the server hardware system. By receiving and parsing the status control signals from the interface switching module, the status display device can immediately and accurately reflect the operating status of the hardware devices within the server. Whether it is the simple status indication of the LED lights or the detailed information display on the LCD or OLED display screens, it provides a fast and intuitive means of fault detection for system maintenance personnel, reducing the time cost of equipment troubleshooting and repair. In addition, the diversity of the status display modes, such as color coding, icon display, text information, etc., makes the transmission of status information clearer and more explicit, enabling even non-professionals to quickly understand the health status of the devices, thus improving the system's usability and user-friendliness.

[0061] In an alternative embodiment, the status display device can visually represent the operating status of the hardware devices based on the status control signals, for example, in the form of the color or blinking mode of the LEDs, thereby improving the visibility and comprehensibility of the device status. For users, this enables them to quickly determine whether the device is operating normally. For system administrators, it enables them to promptly discover and handle potential problems, enhancing the system's operational stability and management efficiency.

[0062] In this embodiment, a hardware control method is provided. Figure 3 It is a flowchart of a hardware control method according to an embodiment of the present application, as Figure 3 shown. The process includes the following steps:

[0063] Step S302, control the information distribution module in the hardware control system to generate interface address information, and control the processor in the hardware control system to generate hardware control signals.

[0064] In an alternative embodiment, the hardware control system achieves efficient and orderly device management and status monitoring through precise scheduling of the information distribution module and the processor. First, control the information distribution module to generate interface address information, which clarifies the unique location and identity of each hardware component in the network. Then, control the processor to generate corresponding hardware control signals according to the system requirements and device status. These signals contain precise control instructions for the hardware devices, such as device startup, configuration change, status query, etc. This control architecture ensures the precise generation and orderly transmission of signals, avoiding signal conflicts and device misoperations, and enhancing the overall stability and response speed of the system. At the same time, by generating interface address information and hardware control signals, the system can adapt to the dynamic changes of hardware devices, such as device plugging and unplugging, fault replacement, etc., enhancing the flexibility and scalability of the system.

[0065] Step S304, in response to receiving the first control signal, control the multiplexer in the hardware control system to transmit the interface address information to the interface switching module in the hardware control system.

[0066] In an alternative embodiment, through the precise control of the multiplexer by the first control signal, the dynamic transmission of the interface address information is achieved, avoiding the resource waste and design complexity caused by the need to allocate a large number of address pins in the traditional method. This dynamic allocation mechanism adapts to the flexible plugging and unplugging and dynamic reorganization of hardware in devices such as servers, significantly improving the scalability and resource utilization efficiency of the system. At the same time, the introduction of the first control signal enables the system to manage hardware devices more intelligently, reducing misconfigurations and device identification delays, and enhancing the overall operating efficiency and stability of the system.

[0067] Step S306, in response to receiving the second control signal, control the multiplexer to transmit the hardware control signal to the interface switching module.

[0068] In an alternative embodiment, when the processor generates the hardware control signal, the second control signal can quickly switch the operating state of the multiplexer to ensure that these control signals can be transmitted to the interface switching module in a timely and accurate manner, and then reach the target hardware device. This design avoids redundancy in the signal transmission path, reduces signal delay, and enhances the real-time performance and flexibility of the system.

[0069] Step S308, control the interface switching module to transmit the interface address information and the hardware control signal to multiple interfaces, so as to control the target interface corresponding to the hardware device in the multiple interfaces to respond to the hardware control signal according to the interface address information.

[0070] In an alternative embodiment, when the system needs to identify and control multiple hardware devices, the interface address information and the hardware control signal received from the central control unit are distributed to the interfaces corresponding to each hardware device through the interface switching module. This technical mechanism ensures that each hardware device can correctly receive and respond to the hardware control signal through its unique interface address, thus realizing the intelligent identification and remote control of the device. The above process not only saves address pin resources, reduces the complexity of hardware design, but also significantly reduces signal delay, improves the response speed and overall efficiency of the system.

[0071] The above steps, through the interface address information generated by the information distribution module and the hardware control signal generated by the processor, combined with the multiplexer and the interface switching module, achieve precise control and efficient signal transmission between multiple interfaces and hardware devices, thereby improving the flexibility and scalability of the system, reducing the complexity of hardware design, and further solving the problem of low expandability of hardware devices in related technologies.

[0072] Optionally, the control interface switching module transmits interface address information and hardware control signals to multiple interfaces, so as to control a target interface corresponding to a hardware device among the multiple interfaces to respond to the hardware control signal according to the interface address information, including: converting the interface address information into multiple address signals; sending the hardware control signal to the target interface according to the multiple address signals to control the target interface to respond to the hardware control signal.

[0073] The above-mentioned multiple address signals may refer to a set of signals that can be directly recognized and responded to by a hardware device after the interface switching module in a hardware control system decodes and converts the received interface address information. The types of the multiple address signals may be parallel digital signals or encoded serial signals, which are transmitted through a single signal line and then decoded by the hardware device. The specific address signals need to be determined according to system requirements and are not limited here. The multiple address signals can be used to ensure that the hardware control signal can be accurately sent to the correct hardware device interface.

[0074] In an alternative embodiment, the interface switching module converts the interface address information into multiple address signals and sends the hardware control signal to the target interface according to these address signals. Among them, through the decoding and conversion of the serial address signal, each hardware device can accurately identify its own address, ensuring the accurate delivery of the hardware control signal and avoiding errors and conflicts in signal transmission. This method not only simplifies the system design, reduces the number of address pins, but also improves the signal transmission speed, enabling the server to quickly and accurately respond to various hardware control requirements, further ensuring the stable operation and efficient transmission of the system.

[0075] Optionally, the method further includes: obtaining device status information of the hardware device; generating a status control signal according to the device status information, and controlling a status display device corresponding to the hardware device based on the status control signal, where the status display device is used to represent the working status of the hardware device; among them, controlling the status display device corresponding to the hardware device based on the status control signal includes: converting the status control signal according to the display format of the status display device to obtain a converted signal; encoding the converted signal to obtain a display mode of the hardware device; controlling the status display device to display based on the display mode; the display mode includes one of the following: a first display mode, a second display mode, and a third display mode. The first display mode is used to represent that the working status of the hardware device is a normal working status, the second display mode is used to represent that the working status of the hardware device is an abnormal working status, and the third display mode is used to represent that the hardware device is not in a working state.

[0076] The above display format may refer to the way the status display device receives and processes signals. The display format defines the structure of the signal, the decoding logic, and the display rules, enabling the status control signal to be displayed in a form that can be understood by the hardware device. The types of display formats can include, but are not limited to, various forms such as numbers, text, graphics, color coding, etc. The specific display format needs to be determined according to the design and application environment of the status display device, and is not limited here. The display format can be used to convert the information of the status control signal into a form that the status display device can recognize and present, ensuring that the working status of the hardware device can be intuitively and accurately displayed to maintenance personnel or system monitoring software.

[0077] The above converted signal may refer to the signal obtained after the status display device processes the status control signal according to the display format. It is the direct input signal for the hardware device to display the working status. The types of converted signals can include, but are not limited to, analog signals, digital pulse signals, encoded serial data signals, etc. The specific converted signal needs to be determined according to the signal input interface and display principle of the status display device, and is not limited here. The converted signal can be used to provide specific operation instructions for the status display device, such as turning on or off an LED light, displaying a specific graphic or text, etc., to reflect the working status of the hardware device.

[0078] The above display mode may refer to a set of specific display rules used by the status display device to represent the working status of the hardware device according to the encoding rules of the converted signal. The types of display modes can include, but are not limited to, the first display mode, the second display mode, and the third display mode, which respectively correspond to different working states of the hardware device. Specifically, they can be represented by different colors, blinking frequencies, graphics, text information, etc. For example, the first display mode (normal working state) can be a stable green light; the second display mode (abnormal working state) can be a flashing red light; the third display mode (not in the working state) can be no light or a specific warning symbol. Here, the display mode is only an example, and the actual display mode needs to be determined according to user requirements and system design, and is not limited here.

[0079] In an alternative embodiment, the working status of the hardware device further includes that for the "normal" state, the LED constant-on mode may be selected; for the "warning" state, the blinking mode is selected; and for the "fault" state, fast blinking or a specific color display may be adopted.

[0080] In an alternative embodiment, through the conversion and encoding of the status control signal and the use of different display modes to visually represent the operating status of the hardware device, the present application provides an efficient and intuitive hardware status monitoring mechanism. This mechanism not only simplifies the signal processing logic of the status display system but also significantly improves the fault diagnosis efficiency and accuracy of server maintenance personnel through the visual feedback of the status display device. For example, the display of a steady green light (the first display mode) quickly confirms the normal operation of the hardware device; the display of a flashing red light (the second display mode) promptly alerts the abnormal status of the device, facilitating maintenance personnel to take measures; and the display of no light or a specific warning symbol (the third display mode) clearly indicates the state of the device not being started or not being connected, which helps with system initialization and fault troubleshooting. This status display technology can instantaneously and accurately feedback the operating status of the hardware device, which is an important part of building a highly reliable and efficient server system, greatly enhancing the operation and maintenance efficiency of the server and the user experience.

[0081] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disc) and includes several instructions for causing a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.

[0082] In this embodiment, a hardware control device is also provided. This device is used to implement the above embodiments and preferred implementation manners, and those that have been described will not be repeated. As used hereinafter, the term "module" can be a combination of software and / or hardware that can achieve a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.

[0083] Figure 4 is a structural block diagram of a hardware control device according to an embodiment of the present application. As Figure 4 shown, the device includes: a first control module 402, a second control module 404, a third control module 406, and a fourth control module 408.

[0084] The first control module 402 is configured to control the information distribution module in the hardware control system to generate interface address information, and control the processor in the hardware control system to generate hardware control signals; the second control module 404 is configured to, in response to receiving a first control signal, control the multiplexer in the hardware control system to transmit the interface address information to the interface switching module in the hardware control system; the third control module 406 is configured to, in response to receiving a second control signal, control the multiplexer to transmit the hardware control signals to the interface switching module; the fourth control module 408 is configured to control the interface switching module to transmit the interface address information and the hardware control signals to multiple interfaces, so as to control the target interface corresponding to the hardware device among the multiple interfaces to respond to the hardware control signals according to the interface address information.

[0085] Optionally, the fourth control module includes: a conversion unit configured to convert the interface address information into multiple address signals; a control unit configured to send the hardware control signals to the target interface according to the multiple address signals, so as to control the target interface to respond to the hardware control signals.

[0086] Optionally, the device further includes: an acquisition module configured to acquire the device status information of the hardware device; a generation module configured to generate a status control signal according to the device status information, and control the status display device corresponding to the hardware device based on the status control signal, where the status display device is configured to represent the working status of the hardware device; wherein, controlling the status display device corresponding to the hardware device based on the status control signal includes: converting the status control signal according to the display format of the status display device to obtain a converted signal; encoding the converted signal to obtain a display mode of the hardware device; controlling the status display device to perform a display based on the display mode; the display mode includes one of the following: a first display mode, a second display mode, and a third display mode, the first display mode is configured to represent that the working status of the hardware device is a normal working status, the second display mode is configured to represent that the working status of the hardware device is an abnormal working status, and the third display mode is configured to represent that the hardware device is not in a working state.

[0087] It should be noted that the above-mentioned various modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited thereto: the above-mentioned modules are all located in the same processor; or, the above-mentioned various modules are respectively located in different processors in any combination form.

[0088] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, where the computer program is configured to execute the steps in any one of the above method embodiments when running.

[0089] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: various media that can store computer programs such as USB flash drives, read-only memory (ROM for short), random access memory (RAM for short), mobile hard disks, magnetic disks, or optical discs.

[0090] An embodiment of the present application further provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0091] In an exemplary embodiment, the above electronic device may further include a transmission device and an input / output device. Among them, the transmission device is connected to the above processor, and the input / output device is connected to the above processor.

[0092] An embodiment of the present application further provides a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0093] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0094] An embodiment of the present application further provides a computer program. The computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the steps in any one of the above method embodiments.

[0095] Specific examples in this embodiment may refer to the examples described in the above embodiments and exemplary embodiments, and will not be repeated here.

[0096] Obviously, those skilled in the art should understand that the various modules or steps of the present application described above can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. They can be implemented by program codes executable by the computing device. Thus, they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a different order from here, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module for implementation. In this way, the present application is not limited to any specific combination of hardware and software.

[0097] The foregoing is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application shall be included within the protection scope of the present application.

Claims

1. A hardware control system, characterized in that: include: A processor, for generating hardware control signals for hardware devices; An information allocation module, used to generate interface address information, wherein the interface address information is used to indicate a correspondence between a plurality of interfaces and a plurality of hardware devices; A multiplexer, wherein the first end of the multiplexer is connected to the information allocation module, the second end of the multiplexer is connected to the processor, and the third end of the multiplexer is connected to the receiving end of the interface switching module, and is used to conduct the first end and the third end to transmit the interface address information when a first control signal is received, and to conduct the second end and the third end to transmit the hardware control signal when a second control signal is received; the interface switching module, wherein the output end of the interface switching module is connected to multiple interfaces, and is used to transmit the interface address information and the hardware control signal to the multiple interfaces, so as to control the target interface corresponding to the hardware device among the multiple interfaces to respond to the hardware control signal according to the interface address information.

2. The system according to claim 1, characterized in that Also includes: A first expander, connected to a preset interface among the multiple interfaces, for receiving the interface address information and converting the interface address information into multiple address signals; The second expander is connected to the first expander and is used to send the hardware control signal to the target interface according to the multiple address signals.

3. The system according to claim 1, characterized in that Also includes: A baseboard management controller, wherein a first end of the baseboard management controller is connected to the processor, and a second end of the baseboard management controller is connected to the interface switching module, and is used to receive device status information of the hardware device sent by the processor, and generate a status control signal according to the device status information, so as to transmit the status control signal to a status display device corresponding to the hardware device through the interface switching module, wherein the status display information is used to indicate the working status of the hardware device.

4. The system according to claim 3, characterized in that Also includes: The status display device is connected to the interface switching module, and is used to receive the status control signal and perform status display according to the status display mode corresponding to the status control signal.

5. A hardware control method, characterized in that: include: Controlling an information distribution module in a hardware control system to generate interface address information, and controlling a processor in the hardware control system to generate a hardware control signal; In response to receiving a first control signal, controlling a multiplexer in the hardware control system to transmit the interface address information to an interface switching module in the hardware control system; In response to receiving a second control signal, controlling the multiplexer to transmit the hardware control signal to the interface switching module; The interface switching module is controlled to transmit the interface address information and the hardware control signal to the multiple interfaces, so as to control the target interface corresponding to the hardware device among the multiple interfaces to respond to the hardware control signal according to the interface address information.

6. The method according to claim 5, characterized in that controlling the interface switching module to transmit the interface address information and the hardware control signal to the multiple interfaces, so as to control the target interface corresponding to the hardware device among the multiple interfaces to respond to the hardware control signal according to the interface address information, include: Converting the interface address information into a plurality of address signals; The hardware control signal is sent to the target interface according to the plurality of address signals to control the target interface to respond to the hardware control signal.

7. The method according to claim 6, characterized in that The method further comprises: Obtaining device status information of the hardware device; Generate a status control signal according to the device status information, and control a status display device corresponding to the hardware device based on the status control signal, wherein the status display device is used to indicate the working status of the hardware device; Wherein, controlling the status display device corresponding to the hardware device based on the status control signal includes: Converting the state control signal based on the display format of the state display device to obtain a conversion signal; Encoding the conversion signal to obtain a display mode of the hardware device; Controlling the status display device to display based on the display mode; The display mode includes one of the following: a first display mode, a second display mode and a third display mode, the first display mode is used to indicate that the working state of the hardware device is a normal working state, the second display mode is used to indicate that the working state of the hardware device is an abnormal working state, and the third display mode is used to indicate that the hardware device is not in the working state.

8. A hardware control device, characterized in that: include: A first control module, used to control the information distribution module in the hardware control system to generate interface address information, and control the processor in the hardware control system to generate a hardware control signal; a second control module, configured to control the multiplexer in the hardware control system to transmit the interface address information to the interface switching module in the hardware control system in response to receiving the first control signal; a third control module, configured to control the multiplexer to transmit the hardware control signal to the interface switching module in response to receiving a second control signal; The fourth control module is used to control the interface switching module to transmit the interface address information and the hardware control signal to the multiple interfaces, so as to control the target interface corresponding to the hardware device among the multiple interfaces to respond to the hardware control signal according to the interface address information.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 5 to 7 when executed by a processor.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 5 to 7 are implemented.

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