Liquid crystal display panel and display device

Abstract

The embodiment of the invention provides a liquid crystal display panel and a display device.The liquid crystal display panel comprises a time sequence controller and an electric field control unit, and the time sequence controller sends a time sequence signal to the liquid crystal display panel; the electric field control unit responds to a reset signal of the time schedule controller and is converted from the first level to the second level, and an electric field used for driving liquid crystal to deflect in the liquid crystal display panel is released. According to the scheme, the internal electric field of the liquid crystal display panel is reduced during the resetting period of the time schedule controller, the potential difference between the two ends of the liquid crystal can be reduced, and the polarization phenomenon caused by the fact that the liquid crystal does not deflect for a long time in the Demura process is avoided.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a liquid crystal display panel and a display device. Background Art

[0002] After the screen is produced, non-uniform light transmittance may occur on the display panel. In response to this situation, the display panel is compensated for brightness through the screen brightness compensation (Demura) technology. In the actual Demura process, in order to load Demura data, the timing controller stops outputting signals within 1 second. When both the data signal and the scan signal stop outputting for 1 second, the electric field magnitudes of all pixel capacitors in the entire display panel remain unchanged, resulting in the polarization of the liquid crystal.

[0003] After the display panel resumes normal display, when the driving chip changes an electric field with the same magnitude and opposite direction for each frame of the pixel, since the liquid crystal has been polarized, the deflection angles of the liquid crystal in the two electric fields are inconsistent, and further the brightness on the display panel is inconsistent. Thus, when the brightness of the entire display panel changes once per frame, visible flicker will occur to the naked eye, which will further affect the judgment of the Demua effect in the subsequent process flow. Summary of the Invention

[0004] Embodiments of this application provide a liquid crystal display panel and a display device to solve the problem of display panel flicker caused by liquid crystal polarization in the Demura process of related technologies.

[0005] To solve the above problems, an embodiment of this application provides a liquid crystal display panel, including a timing controller and an electric field control unit. The timing controller is configured to send timing signals to the liquid crystal display panel. The electric field control unit releases the electric field for driving the liquid crystal deflection in the liquid crystal display panel in response to the reset signal of the timing controller changing from a first level to a second level, where the first level and the second level are different.

[0006] In one embodiment, the timing controller and the electric field control unit are respectively connected to a machine for compensating the brightness of the liquid crystal display panel to receive a first control signal sent by the machine. The timing controller changes the reset signal from the first level to the second level according to the first control signal. The electric field control unit releases the electric field of the liquid crystal display panel according to the first control signal.

[0007] In one embodiment, the electric field control unit is further connected to the timing controller to perform a power-off operation on the timing controller and the electrodes driving the liquid crystal according to the first control signal; wherein, the power-off duration of the electrodes is equal to that of the timing controller. The liquid crystal display panel is further configured to: perform a power-off according to the first control signal; wherein, the power-off duration of the liquid crystal display panel is equal to that of the timing controller.

[0008] In one embodiment, the electric field control unit includes a discharge circuit for discharging the electric field according to a discharge signal; wherein, the discharge signal of the discharge circuit is inverse to the first control signal.

[0009] In one embodiment, the discharge circuit includes an inverter connected to the machine platform, and the inverter inverts the first control signal to output the discharge signal.

[0010] In one embodiment, the discharge circuit further includes: a first transistor, a first pole of the first transistor accesses a first voltage through a first resistor, a second pole of the first transistor accesses a constant low potential signal, and a control pole of the first transistor is connected to a first node through a second resistor; a second transistor, a first pole of the second transistor accesses a second voltage through a third resistor and accesses a third voltage through a fourth resistor, a second pole of the second transistor accesses the constant low potential signal, and a control pole of the second transistor is connected to the first node through a fifth resistor; a third transistor, a first pole of the third transistor accesses a fourth voltage through a sixth resistor, a second pole of the first transistor accesses the constant low potential signal, and a control pole of the first transistor is connected to the first node through a seventh resistor; a first capacitor, a first pole of the first capacitor is connected to the first node and accesses a power management control signal (VLC) through an eighth resistor, the first pole of the first capacitor further accesses the constant low potential signal through a ninth resistor, and a second pole of the first capacitor accesses the constant low potential signal; and a fourth transistor, a first pole of the fourth transistor accesses a constant high potential signal (Vhigh) through R10, a second pole of the fourth transistor is connected to the first node, and a control pole of the fourth transistor accesses the first control signal (Vsignal); wherein, the first transistor, the second transistor and the third transistor are NMOS transistors, the fourth transistor is a PMOS transistor, the fourth transistor constitutes the inverter, and the voltage value of the constant high potential signal is the same as the high potential voltage value of the first control signal.

[0011] In one embodiment, the electric field control unit includes a first pin for receiving the first control signal; the electric field control unit is further configured to: according to the first control signal, turn off the driving power supply of the electrode to release the electric field.

[0012] In one embodiment, the timing controller is further configured to: receive the first control signal and generate a second control signal according to the first control signal; the electric field control unit is further configured to: receive the second control signal and control the release of the electric field of the liquid crystal display panel according to the second control signal.

[0013] In one embodiment, the electric field control unit further includes a second pin; the second pin is further configured to: receive the first control signal and the second control signal; the power management chip is further configured to: according to the first control signal, turn off the driving power supply of the electrode; and release the electric field according to the second control signal.

[0014] In one embodiment, the electric field control unit is further configured to: receive the second control signal (IIC instruction) through a first communication protocol and release the electric field according to the second control signal.

[0015] In one embodiment, the timing controller is further configured to: control the liquid crystal display panel to display a preset grayscale image according to the first control signal; after the liquid crystal display panel displays the preset grayscale image, the reset signal of the timing controller changes from a second level to a first level.

[0016] In one embodiment, the timing controller is further configured to: receive the first control signal through a third pin or a second communication protocol.

[0017] In one embodiment, the electric field control unit is the power management chip of the display device.

[0018] An embodiment of the present application further provides a display device, including the liquid crystal display panel described in any of the above embodiments.

[0019] The embodiments of the present application provide a liquid crystal display panel and a display device. Among them, the liquid crystal display panel includes a timing controller and an electric field control unit. The timing controller sends timing signals to the liquid crystal display panel; in response to the reset signal of the timing controller changing from the first level to the second level, the electric field control unit releases the electric field used to drive the liquid crystal deflection in the liquid crystal display panel. Through the above solution, the internal electric field of the liquid crystal display panel can be reduced during the reset of the timing controller, the potential difference across the liquid crystal can be reduced, the polarization phenomenon caused by the liquid crystal not deflecting for a long time during the Demura process can be avoided, and further, the misjudgment of the Demura effect caused by flicker during the subsequent detection process can be avoided, and the screen brightness compensation effect can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0021] Figure 1 It is a schematic structural diagram of a liquid crystal display panel provided in some embodiments of the present application;

[0022] Figure 2 It is a schematic structural diagram of a discharge circuit provided in the related art;

[0023] Figure 3 It is a schematic structural diagram of a discharge circuit provided in some embodiments of the present application;

[0024] Figure 4 It is a schematic structural diagram of a display device provided in some embodiments of the present application.

[0025] 10. Display device; 100. Liquid crystal display panel; 110. Timing controller; 120. Electric field control unit; 121. Discharge circuit; 121a. Inverter; 200. Machine platform. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some, rather than all, embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0027] It will be understood that although terms such as "first" and "second" may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are only used to distinguish these components or signals.

[0028] After the display panel is produced, the light transmittance on the display panel is uneven. In response to this situation, in the related art, a camera is used to photograph the entire screen and detect the brightness data of the entire screen. Then, according to the brightness data, compensation data for different regions of the entire surface of the display panel is produced and stored in the program used by the display panel. During use, the timing controller of the display device will enhance or weaken the brightness of the uneven brightness region according to the compensation data in the program, thereby achieving the effect of uniform screen brightness.

[0029] The brightness compensation method in the related art generally includes the following steps:

[0030] S1: Power on the screen to light it up.

[0031] S2: The machine empties the part of the storage chip Flash that stores the brightness compensation (Demura) data to prevent the screen from not being in the original state. Among them, the machine is the brightness compensation machine used in the production process of the display panel.

[0032] S3: The machine pulls down the reset signal of the timing controller Tcon to turn off the timing controller, and then pulls it up after one second to restart the timing controller. Then, the timing controller will reload the program in the storage chip Flash. Thus, the initialization of the storage chip and the timing controller is completed.

[0033] S4: The machine starts the camera, collects the brightness data of the display panel at multiple gray levels, and generates compensation data.

[0034] S5: The machine writes the compensation data to a fixed position in the storage chip Flash.

[0035] S6: The machine pulls down the reset signal of the timing controller Tcon to turn off the timing controller, and then pulls it up after one second to restart the timing controller. Then, the timing controller will reload the program in the storage chip Flash.

[0036] S7: The timing controller Tcon uses the program with the brightness compensation data to check the effect of the final brightness compensation of the screen display.

[0037] In this brightness compensation method, when the machine pulls down the reset signal of the timing controller, the entire timing controller stops outputting signals, including the data signal output to the driver chip DriverIC and the gate drive signal output to the power management chip PMIC. When the timing controller stops outputting the data signal to the driver chip DriverIC, the driver chip will stop outputting a new voltage to the pixels; when the timing controller stops outputting the gate drive signal to the power management chip PMIC, all the capacitance switches of the pixels will be turned off.

[0038] It should be noted that when the liquid crystal is in an electric field of constant magnitude for a long time, irreversible polarization will occur, and the deflection angle will always tend to a certain direction. When the above two situations are superimposed, it will cause the electric field magnitude of all pixel capacitors in the entire display panel to remain unchanged within one second when the reset signal of the timing controller is pulled down, and within this one second, the liquid crystal will already show a polarization phenomenon.

[0039] In the related art, in order to avoid the liquid crystal polarization phenomenon in general cases, in the circuit drive, a voltage of the same magnitude and opposite direction is changed for each frame of the pixel, so as to avoid liquid crystal polarization and ensure that the light transmittance of the pixel is the same in both cases. However, for the liquid crystal polarization caused during the above-mentioned brightness compensation process, after the display panel is normally displayed subsequently, when the drive provides an electric field of the same magnitude and opposite direction for each frame change of the pixel, the deflection angles of the liquid crystal in the two electric fields are inconsistent, which will cause the brightness of the display panel to be inconsistent, that is, the brightness of the display panel will change once per frame, resulting in visible flicker to the naked eye.

[0040] In the case where the display panel has screen flicker, in step S7, if the brightness compensation effect is checked manually, it will be difficult to judge. Even if the brightness compensation effect is checked by a camera, due to the shutter time of camera shooting, when the display panel switches between high brightness and low brightness for each frame, the camera shooting time will not be consistent with the switching rate of the high brightness frame and the low brightness frame, resulting in different ratios of high brightness frames and low brightness frames within the shutter time, and the brightness data collected at each gray level is inconsistent with that during normal display, so the final judged brightness compensation effect will be biased.

[0041] Figure 1 This is a schematic structural diagram of a liquid crystal display panel provided in some embodiments of the present application. Refer to Figure 1 As shown, the present application provides a liquid crystal display panel, including a timing controller and an electric field control unit. Among them, the timing controller is used to send timing signals to the liquid crystal display panel; the electric field control unit responds to the reset signal of the timing controller changing from the first level to the second level, and releases the electric field used to drive the liquid crystal deflection in the liquid crystal display panel.

[0042] It should be noted that the first level and the second level are different. That is, the first level is the stop level of the timing controller, and the second level is the working level of the timing controller. In some more specific examples, the first level is a low level and the second level is a high level. Based on the defects in the foregoing brightness compensation process, the flicker of the display panel is caused by the fact that there is still an electric field in the liquid crystal display panel within 1 second when the timing controller stops working, and the liquid crystal is polarized under the electric field. Therefore, in the display device of the present application, within the period from when the reset signal of the timing controller is pulled low to when it is pulled high, the electric field in the liquid crystal display panel is minimized as much as possible. It should be noted that the electric field in the liquid crystal display panel refers to the electric field applied in the liquid crystal layer for controlling the arrangement and direction of liquid crystal molecules. Reducing the potential difference across the liquid crystal can reduce the electric field in the liquid crystal display panel.

[0043] It should be understood that the electric field release involved in the embodiments of the present application includes releasing a part of the electric field to reduce the potential difference across the liquid crystal, and also includes completely releasing the electric field. For example, powering off the liquid crystal display panel can be achieved by turning off the power supply to the common electrode and the pixel electrode.

[0044] As the core control unit of the liquid crystal display panel, the timing controller generates and sends precise timing signals to the electric field control unit according to the input image signal and control instructions. For example, when displaying a static image, the timing controller sends timing signals at a fixed refresh rate to ensure stable image display; while when displaying a dynamic video, it dynamically adjusts the timing signals according to the frame rate of the video to achieve a smooth visual effect.

[0045] When the timing controller receives a reset signal, for example, the signal changes from the first level (such as a high level) to the second level (such as a low level), or before the timing controller receives the reset signal, the electric field control unit releases the electric field used to drive the liquid crystal deflection in the liquid crystal display panel. For example, when switching the displayed content, the electric field control unit responds to the change of the reset signal and quickly releases the original electric field to prepare for the new liquid crystal deflection state.

[0046] The above solution is to solve problems in the liquid crystal display panel due to problems in previous processes. For example, when the machine pulls down the reset signal of the timing controller, the liquid crystal will be polarized, resulting in problems such as screen flicker. Through the above solution, reducing the internal electric field of the liquid crystal display panel during the reset of the timing controller can reduce the potential difference across the liquid crystal, avoid the polarization phenomenon caused by the liquid crystal having no deflection for a long time in the Demura process, and further avoid misjudgment of the Demura effect due to flicker during subsequent detection, which can effectively improve the screen brightness compensation effect.

[0047] In some embodiments, the timing controller and the electric field control unit are respectively connected to a machine for performing brightness compensation on the liquid crystal display panel to receive a first control signal sent by the machine; the timing controller converts a reset signal from a first level to a second level according to the first control signal; and the electric field control unit releases the electric field of the liquid crystal display panel according to the first control signal.

[0048] It should be noted that the first control signal can be a control signal sent by the machine during the brightness compensation process or other signals synchronized with the machine signal. Among them, the timing controller and the electric field control unit are respectively connected to a machine for performing brightness compensation on the liquid crystal panel to receive the first control signal sent by the machine. The timing controller converts the reset signal from a first level to a second level according to the first control signal, and the electric field control unit also releases the electric field of the liquid crystal display panel according to the first control signal. In the working process of the liquid crystal display device, the machine plays a role of control and coordination in the whole system. For example, in the Demura process during the screen production, the machine needs to perform a series of operations to ensure the brightness uniformity of the screen. Here, the machine controls the timing controller and the electric field control unit simultaneously by sending the first control signal. After receiving this signal, the timing controller changes the level of the reset signal, thereby triggering the electric field control unit to perform the operation of releasing the electric field. This design can effectively control the electric field in the liquid crystal panel in different working states (such as during brightness compensation operations) of the whole display device, avoid bad phenomena such as liquid crystal polarization, and ensure the stability of the display effect.

[0049] In some embodiments, the liquid crystal display panel has a fast discharge function, and the electric field control unit is further connected to the timing controller to perform a power-off operation on the timing controller and the electrode for driving the liquid crystal respectively according to the first control signal; wherein, the power-off duration of the electrode is equal to that of the timing controller. In this embodiment, by changing the connection between the machine and the display device, the machine can change the operation of pulling down the reset signal of the timing controller for 1 second to power off the whole panel for 1 second. While realizing fast discharge, the timing controller can also reload the program in the storage chip flash.

[0050] The electric field control unit is also connected to the timing controller, and performs a power-off operation on the timing controller and the electrodes driving the liquid crystal according to the first control signal, and the power-off duration of the electrodes is equal to that of the timing controller. In the liquid crystal display device, both the electrodes and the timing controller play crucial roles in the display control of the liquid crystal. For example, after the machine platform issues the first control signal, the electric field control unit performs a power-off operation on the electrodes and the timing controller simultaneously. This simultaneous and equal-duration power-off operation is to ensure that the electric field state in the liquid crystal panel remains consistent throughout the operation process. If the power-off durations of the electrodes and the timing controller are inconsistent, it may lead to an imbalance in the electric field state in the liquid crystal panel. For instance, if the electrodes are powered off first and the timing controller is powered off later, liquid crystal polarization may occur during this process because the electric field environment of the liquid crystal changes unevenly during the asynchronous power-off process.

[0051] In some embodiments of the present application, the electric field control unit includes a discharge circuit for discharging the electric field according to a discharge signal; wherein, the discharge signal of the discharge circuit is inverted with respect to the first control signal.

[0052] In the electric field control system of the liquid crystal display device, the discharge circuit is a key part for realizing the electric field release. For example, in the liquid crystal display panel, when it is necessary to release the electric field, due to the characteristics of the first control signal sent by the machine platform, an inverted discharge signal is required to accurately control the operation of the discharge circuit. Assume that the first control signal is at a high level to represent a certain operation state (such as not performing a discharge operation), then the inverted discharge signal is at a low level, and at this time the discharge circuit starts to discharge the electric field according to this low-level discharge signal. This inverted design is to ensure that the discharge circuit can perform the discharge operation at the appropriate time and match the control logic of the entire display device. If the discharge signal is not inverted with respect to the first control signal, it may cause the discharge circuit to discharge at the wrong time, unable to effectively release the electric field, and thus unable to avoid problems such as liquid crystal polarization, affecting the normal display effect of the liquid crystal.

[0053] When it is detected that the power supply is less than 75%, the liquid crystal display panel will be discharged. Figure 2 It is a schematic diagram of a discharge circuit structure provided in the related art. In some embodiments, the discharge circuit refers to Figure 2 as shown, and includes a first transistor Q1, a second transistor Q2, a third transistor Q3, and a first capacitor C1.

[0054] The first pole of the first transistor Q1 is connected to the first voltage VCC1 through the first resistor R1, the second pole of the first transistor Q1 is connected to a constant low-potential signal, and the control pole of the first transistor Q1 is connected to the first node A through the second resistor R2; wherein, the constant low-potential signal can be a ground signal.

[0055] The first pole of the second transistor Q2 is connected to the second voltage VCC2 through the third resistor R3 and to the third voltage VCC3 through the fourth resistor R4. The second pole of the second transistor Q2 is connected to a constant low potential signal. The control pole of the second transistor Q2 is connected to the first node A through the fifth resistor R5.

[0056] The first pole of the third transistor Q3 is connected to the fourth voltage VCC4 through the sixth resistor R6. The second pole of the first transistor Q1 is connected to a constant low potential signal. The control pole of the first transistor Q1 is connected to the first node A through the seventh resistor R7. It should be noted that VCC1, VCC2, VCC3, and VCC4 are all power supply voltages in the display device, used to provide necessary power for the drive circuit, logic circuit, backlight system, control chip, etc. in the display device.

[0057] The first pole of the first capacitor C1 is connected to the first node A and is connected to the power management control signal (VLC) through the eighth resistor R8. The first pole of the first capacitor C1 is also connected to a constant low potential signal through the ninth resistor R9. The second pole of the first capacitor C1 is connected to a constant low potential signal.

[0058] When it is detected that the power supply of the entire display panel is less than 75%, the power management control signal (VLC) will be pulled high. In addition to being connected to the discharge circuit, the power management control signal also controls the entire liquid crystal display panel. When the power management control signal is pulled high, the liquid crystal display panel will quickly release the charge in the pixel capacitor and dissipate the electric field therein. At the same time, after the power management control signal is divided, it will turn on the first transistor Q1, the second transistor Q2, and the third transistor Q3, and quickly release the charge of VCC1, VCC2, VCC3, and VCC4 to the ground through the resistors. In the related art, since the control signal of the machine is from high to low, therefore, in this embodiment, the machine also needs to be modified to a certain extent. By changing the connection between the machine and the display device, the machine changes the reset signal of the timing controller to pull low for 1 second to power off the entire panel for one second. While quickly discharging through the aforementioned discharge circuit, it can also reload the program in the storage chip flash.

[0059] In some other embodiments, if the machine is not modified, the aforementioned discharge circuit needs to be improved to connect the first control signal of the machine to the discharge circuit. The discharge circuit includes an inverter connected to the machine. The inverter inverts the first control signal and outputs a discharge signal. Figure 3 It is a schematic structural diagram of a discharge circuit provided in some embodiments of the present application. Refer to Figure 3 As shown, compared with the discharge circuit in the foregoing embodiment, the discharge circuit in this embodiment further includes a fourth transistor Q4 for forming an inverter.

[0060] The first pole of the fourth transistor Q4 is connected to a constant high-potential signal V through a tenth resistor. HIGH The second pole of the fourth transistor Q4 is connected to the first node, and the control pole of the fourth transistor Q4 receives a first control signal V. SIGNAL Among them, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are all NMOS transistors, the fourth transistor Q4 is a PMOS transistor, and the first control signal V SIGNAL is a machine platform signal, and the constant high-potential signal V HIGH is a voltage signal equal to the voltage of the high-level signal of the machine platform, and VIN is the power input of the entire circuit. When the first control signal V SIGNAL is pulled low, the fourth transistor Q4 conducts, and the constant high-potential signal V HIGH is transmitted to the first transistor Q1 to turn on the first transistor Q1. VIN is short-circuited to the ground through the first resistor R1, and the voltage starts to drop. When the voltage drops below 75% of the original voltage value of VIN, the panel discharge function of the power chip is triggered, thereby discharging the entire panel.

[0061] It should be noted that since VIN discharges to the ground through R1 within one second when the first control signal V SIGNAL is pulled low. The resistance value of R1 needs to be relatively large to control the magnitude of the entire current. After the first control signal V SIGNAL is pulled high again, Q4 turns off, Q1 turns off, and VIN returns to normal. The entire circuit restarts and reloads the program.

[0062] It should also be noted that the transistors used in the embodiments of the present application can be thin-film transistors or field-effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between their source and drain. In the embodiments of the present application, to distinguish the source and drain of the transistors, one pole is called the first pole and the other pole is called the second pole. In addition, the gate of the transistor is called the control pole. In addition, according to the characteristics of the transistors, the transistors can be divided into N-type and P-type. In the following embodiments, the N-type transistors are used for illustration. When N-type transistors are used, the first pole is the source of the N-type transistor, the second pole is the drain of the N-type transistor, and when a high level is input to the gate, the source and drain are conducting. The P-type is the opposite. It can be imagined that implementing with P-type transistors is something that those skilled in the art can easily think of without creative labor, so it is also within the protection scope of the embodiments of the present application.

[0063] In some embodiments of the present application, the electric field control unit can be implemented by a power management chip. The following takes the power management chip as an example for illustration. In a liquid crystal display device, the power management chip, as the electric field control unit, is of great significance. The power management chip is originally responsible for functions such as power management and distribution in the entire display device. For example, during the operation of a liquid crystal display panel, the power management chip controls the power supply situation of each part. When it serves as the electric field control unit, it can utilize its power control ability to achieve the control of the electric field in the liquid crystal panel. For instance, by controlling the on / off of the driving power supply of the electrode to release the electric field. This design of using the power management chip as the electric field control unit combines the electric field control and power management functions, simplifies the circuit structure, and improves the integration and control efficiency of the entire display device.

[0064] The power management chip also has a first pin for receiving a first control signal. Then, the power management chip is also used to turn off the driving power supply of the liquid crystal display panel according to the first control signal and control the discharge of the liquid crystal display panel.

[0065] In this embodiment, the first pin can be the enable pin (Enable PIN) of the power management chip. This pin can control the switch of the entire power management chip. Therefore, the fast discharge function of the liquid crystal display panel can be bound to this enable pin for separate control, not limited to detecting the magnitude of the VIN voltage. When it is detected that this pin is activated, the power management chip turns off all driving power supplies and waits to restart after this pin is turned off. In this case, the first control signal is directly connected to this pin. When the first control signal is pulled low, the power management chip turns off all driving power supplies and activates the fast discharge function. When the first control signal is pulled high, the entire circuit is powered on again, the timing controller reloads the program, and since the discharge has been performed, the electric field in the panel disappears, and the polarization effect on the liquid crystal disappears.

[0066] Of course, there are also some power management chips that cannot bind the fast discharge function of the display panel to the first pin. Therefore, in some embodiments of the present application, the timing controller is also used to receive the first control signal and generate a second control signal according to the first control signal; the power management chip is also used to receive the second control signal and control the discharge of the liquid crystal display panel according to the second control signal. On this basis, the power management chip further includes a second pin, and the second pin is also used to receive the first control signal and the second control signal. Then, the power management chip is also used to turn off the driving power supply of the liquid crystal display panel according to the first control signal; and control the discharge of the liquid crystal display panel according to the second control signal.

[0067] In this embodiment, the first control signal is simultaneously input into the power management chip and the timing controller, and then the signal input into the power management chip can be delayed through a delay circuit. When the first control signal is pulled low, after the timing controller receives it, a signal is sent to the power management chip to separately activate the fast discharge function. Subsequently, the first control signal is transmitted to the voltage switch of the power management chip to turn off all voltages. Subsequently, when the first control signal is turned off, the power management chip restarts all voltages, and the timing controller powers on again to load the program. It should be noted that the fast discharge of the display panel is an instantaneous function and does not require long-term control by the first control signal. As long as the timing controller turns off the power of the timing controller after issuing the fast discharge command.

[0068] In some other embodiments of the present application, when the fast discharge function of the power management chip cannot be bound to the first pin, the power management chip can also be instructed to perform the fast discharge function and turn off all driving voltages through a protocol instruction, that is, the power management chip is further configured to receive a second control signal through the first communication protocol and control the discharge of the liquid crystal display panel according to the second control signal. Specifically, in this embodiment, the first communication protocol can be the IIC communication protocol between the timing controller and the power management chip. At this time, the first control signal is input into the voltage switch pins of the timing controller and the power management chip, and through a delay circuit or the like, the time when the timing controller receives the first control signal is earlier than the time when the power management chip receives the first control signal. After the timing controller receives the first control signal, an IIC instruction is sent to the power management chip to activate the fast discharge function. Subsequently, when the power management chip receives the first control signal again, all driving voltages are turned off when the first control signal is pulled low, and all driving voltages are turned on after the first control signal is pulled high again, so that the timing controller can reload the program.

[0069] In the foregoing embodiments, the electric fields within the entire liquid crystal display panel are all released during the reset stage of the timing controller. In some liquid crystal display panels, there may also be a situation where the electric fields within the liquid crystal display panel cannot be released. Therefore, in some other examples of the present application, the timing controller is further configured to: control the liquid crystal display panel to display a preset gray-scale picture according to a first control signal; after the liquid crystal display panel displays the preset gray-scale picture, the reset signal of the timing controller changes from a second level to a first level. In this embodiment, within one second of the reset of the timing controller, if the screen is in a bright state, it indicates that the electric field inside the display panel is relatively large, and thus the influence on the liquid crystal polarization is relatively large. If the picture of the liquid crystal display panel can be stabilized in the state of the preset gray-scale picture and then the reset of the timing controller is started, it can be ensured that the electric field within the liquid crystal display panel is relatively small and the influence on the liquid crystal polarization is even smaller. It should be noted that according to the type of the liquid crystal display panel, the arrangement of liquid crystal molecules will also be different. In some liquid crystal display panels, the preset gray-scale picture can be a pure black picture.

[0070] On this basis, in some embodiments of the present application, the timing controller has a third pin for receiving the first control signal. This third pin can be the built-in self-test (BIST) pin of the timing controller. When the BIST pin receives a signal, the timing controller can output a black picture for the liquid crystal display panel. In this case, the first control signal can be directly connected to the BIST pin and the reset pin of the timing controller. In some cases, since the potential level change of the first control signal is fixed, if the high and low potential levels of the first control signal do not correspond to those of the reset signal of the timing controller, the first control signal can be connected to the reset signal of the timing controller through an inverter. In this embodiment, it is also necessary to delay the reset signal of the timing controller through a delay circuit so that the BIST pin of the timing controller receives the first control signal first. After the timing controller issues an instruction to output a black picture to the liquid crystal display panel, the reset signal of the timing controller is then connected to the first control signal, and then the timing controller is turned off. Within one second when the first control signal is pulled low, the liquid crystal display panel is in a black picture state. At this time, the electric field within the liquid crystal display panel is relatively small, and the influence on the liquid crystal polarization is also relatively small, and it will not cause the phenomenon of picture flickering of the display panel.

[0071] In some other embodiments, if the timing controller does not have a BIST pin, a separate programmable pin can also be set, so as to integrate the output black picture of the timing controller with the reloaded program. When the timing controller receives the first control signal, it will control the liquid crystal display panel to first display a black picture and then reload the program in the storage chip flash.

[0072] In addition, in some other embodiments, if the timing controller does not have a BIST pin or a programmable pin, the timing controller can also receive the first control signal through a second communication protocol. It should be noted that in this embodiment, although the timing controller may not have a BIST pin, the timing controller has the basic function of self-detection. Therefore, the first control signal can be input into the video signal of the timing controller. When the timing controller receives an incorrect video signal, it will automatically enter the self-detection screen, so that the liquid crystal display panel displays a black screen.

[0073] More specifically, there are two types of video signals received by the timing controller: the point-to-point protocol and the LVDS protocol. The point-to-point protocol generally has a handshake signal (a series of signal exchanges used by two devices or systems to establish a connection, synchronize, and negotiate communication parameters before starting communication). When the video signal is of the point-to-point protocol, the handshake signal is changed through the first control signal, and the timing controller will enter the self-detection state. When the video signal is of the LVDS protocol, since the clock of the LVDS signal is external, the external clock is pulled low through the machine signal. After the timing controller fails to receive the clock signal, it will consider the video signal incorrect and thus enter the self-detection state, causing the liquid crystal display panel to enter a black screen.

[0074] Figure 4 It is a schematic structural diagram of a display device provided in some embodiments of the present application. Refer to Figure 4 As shown, an embodiment of the present application further provides a display device 10, including the liquid crystal display panel 100 described in any of the above embodiments.

[0075] Classified by application scenarios, display devices can include consumer electronic display devices, industrial display devices, medical display devices, etc. Among them, consumer electronic display devices can include mobile phone screens, TV screens, computer monitors, etc. Industrial display devices can include industrial control panels, instrument and meter display screens, etc. Medical display devices can include medical diagnostic displays and operating room displays, etc.

[0076] In summary, although the present application has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application shall be subject to the scope defined by the claims.

Claims

1. A liquid crystal display panel, characterized in that: Including a timing controller and an electric field control unit, The timing controller is used to send a timing signal to the liquid crystal display panel; The electric field control unit releases the electric field for driving liquid crystal deflection in the liquid crystal display panel in response to the reset signal of the timing controller being changed from the first level to the second level; The first level and the second level are different.

2. The liquid crystal display panel according to claim 1, characterized in that: The timing controller and the electric field control unit are respectively connected to a machine for performing brightness compensation on the liquid crystal display panel to receive a first control signal sent by the machine; The timing controller converts the reset signal from a first level to a second level according to the first control signal; The electric field control unit releases the electric field of the liquid crystal display panel according to the first control signal.

3. The liquid crystal display panel according to claim 2, characterized in that: The electric field control unit is also connected to the timing controller to perform power-off operations on the timing controller and the electrodes driving the liquid crystal according to the first control signal; The power-off duration of the electrode is equal to the power-off duration of the timing controller.

4. The liquid crystal display panel according to claim 2, characterized in that: The electric field control unit includes a discharge circuit for discharging the electric field according to a discharge signal; Wherein, the discharge signal of the discharge circuit is in antiphase with the first control signal.

5. The liquid crystal display panel according to claim 4, characterized in that: The discharge circuit includes an inverter connected to the machine, and the inverter inverts the first control signal and then outputs the discharge signal.

6. The liquid crystal display panel according to claim 5, characterized in that: The discharge circuit further comprises: a first transistor, wherein a first electrode of the first transistor is connected to a first voltage through a first resistor, a second electrode of the first transistor is connected to a constant low potential signal, and a control electrode of the first transistor is connected to a first node through a second resistor; a second transistor, wherein a first electrode of the second transistor is connected to the second voltage through a third resistor and is connected to the third voltage through a fourth resistor, a second electrode of the second transistor is connected to the constant low potential signal, and a control electrode of the second transistor is connected to the first node through a fifth resistor; a third transistor, wherein a first electrode of the third transistor is connected to a fourth voltage through a sixth resistor, a second electrode of the first transistor is connected to a constant low potential signal, and a control electrode of the first transistor is connected to a first node through a seventh resistor; a first capacitor, wherein a first electrode of the first capacitor is connected to the first node and connected to a power management control signal (VLC) through an eighth resistor, the first electrode of the first capacitor is further connected to the constant low potential signal through a ninth resistor, and a second electrode of the first capacitor is connected to the constant low potential signal; and a fourth transistor, wherein a first electrode of the fourth transistor is connected to a constant high potential signal (Vhigh) through R10, a second electrode of the fourth transistor is connected to the first node, and a control electrode of the fourth transistor is connected to the first control signal (Vsignal); Among them, the first transistor, the second transistor and the third transistor are NMOS transistors, the fourth transistor is a PMOS transistor, the fourth transistor constitutes the inverter, and the voltage value of the constant high potential signal is the same as the high potential voltage value of the first control signal.

7. The liquid crystal display panel according to claim 3, characterized in that: The electric field control unit comprises a first pin, configured to receive the first control signal; The electric field control unit is further used to: turn off the driving power supply of the electrode according to the first control signal to release the electric field.

8. The liquid crystal display panel according to claim 3, characterized in that: The timing controller is further used to: receive the first control signal, and generate a second control signal according to the first control signal; The electric field control unit is further used to: receive the second control signal, and control the electric field of the liquid crystal display panel to release according to the second control signal.

9. The liquid crystal display panel according to claim 8, characterized in that: The electric field control unit also includes a second pin; The second pin is further used to: receive the first control signal and the second control signal; The power management chip is also used to: turn off the driving power of the electrode according to the first control signal; and release the electric field according to the second control signal.

10. The liquid crystal display panel according to claim 8, characterized in that: The electric field control unit is further used to: receive the second control signal (IIC instruction) through the first communication protocol, and release the electric field according to the second control signal.

11. The liquid crystal display panel according to any one of claims 1 to 10, characterized in that: The timing controller is also used for: According to the first control signal, controlling the liquid crystal display panel to display a preset grayscale image; After the liquid crystal display panel displays the preset grayscale image, the reset signal of the timing controller is converted from the second level to the first level.

12. The liquid crystal display panel according to claim 11, characterized in that: The timing controller is also used for: The first control signal is received through a third pin or a second communication protocol.

13. The liquid crystal display panel according to any one of claims 1 to 10, characterized in that: The electric field control unit is a power management chip of the display device.

14. A display device, characterized in that: A liquid crystal display panel comprising any one of claims 1 to 13.

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