Output control circuit, flyback converter, chip and electronic equipment

Abstract

The invention provides an output control circuit, a flyback converter, a chip and electronic equipment. The first output voltage can be obtained from the first output circuit through the output control circuit, the second output voltage can be obtained from the second output circuit through the output control circuit, and the first output circuit and the second output circuit are controlled to be sequentially switched on according to the first output voltage and the second output voltage in each switching period. Therefore, the output control circuit can determine a first follow current loop and a second follow current loop in the first output circuit and the second output circuit, so that an excitation inductor of a transformer in the flyback converter transmits energy to the first follow current loop and the second follow current loop respectively in a secondary follow current stage; in other words, the excitation inductor transmits energy in a high-frequency chopping mode in each switching period, so that the high-frequency chopping frequency of the first output circuit and the second output circuit is equal to the switching frequency. As the switching frequency is generally higher than the hearing range of human ears, the problem of audio noise can be solved, and the performance of the flyback converter is improved.

Description

Technical Field

[0001] This application relates to the technical field of power management chips, and particularly to an output control circuit, a flyback converter, a chip, and an electronic device. Background Art

[0002] A flyback converter is a DC-DC converter that is widely used in AC / DC and DC / DC conversions and provides isolation between the input stage and the output stage. It is a type of switching power supply. Flyback converters are widely used in electronic devices such as medical equipment, laptops, USB chargers, and high-voltage power supplies for cathode ray tubes due to their simple structure and diverse functions.

[0003] In related technologies, there are significant differences in the power of the two outputs of the flyback converter, causing the flyback converter to switch back and forth between two different operating points. Among them, different operating points refer to different switching frequencies of the flyback converter. The switching frequency is determined by the loads of the two outputs.

[0004] In this way, when the switching frequency enters the audible range of the human ear (20 Hz to 20 kHz), it causes the problem of audio noise in the flyback converter. Therefore, when a flyback converter is installed in an electronic device sensitive to noise interference, additional noise interference will be generated. Thus, the performance of the flyback converter is affected. Summary of the Invention

[0005] This application provides an output control circuit, a flyback converter, a chip, and an electronic device, which can solve the problem of audio noise and improve the performance of the flyback converter.

[0006] In a first aspect, this application provides an output control circuit. The output control circuit is applied to a flyback converter, and the flyback converter includes: a first output circuit and a second output circuit; a first input end of the output control circuit is electrically connected to an output end of the first output circuit, a second input end of the output control circuit is electrically connected to an output end of the second output circuit, and an output end of the output control circuit is respectively electrically connected to a control end of the first output circuit and a control end of the second output circuit;

[0007] The output control circuit is configured to obtain a first output voltage from the first output circuit and a second output voltage from the second output circuit, and determine a first freewheeling loop and a second freewheeling loop in the first output circuit and the second output circuit according to the first output voltage and the second output voltage in each switching period.

[0008] Through the output control circuit provided by the first aspect, the first output voltage can be obtained from the first output circuit, and the second output voltage can be obtained from the second output circuit through the output control circuit. And within each switching cycle, according to the first output voltage and the second output voltage, the first output circuit and the second output circuit are controlled to conduct successively. Thus, the output control circuit can determine a first freewheeling loop and a second freewheeling loop in the first output circuit and the second output circuit, so that the magnetizing inductance of the transformer in the flyback converter transfers energy to the first freewheeling loop and the second freewheeling loop respectively during the secondary freewheeling stage. That is to say, the magnetizing inductance transfers energy in the way of high-frequency chopping within each switching cycle, so that the high-frequency chopping frequencies of the first output circuit and the second output circuit are equal to the switching frequency. Since the switching frequency is usually higher than the audible range of the human ear, therefore, the problem of audio noise can be solved and the performance of the flyback converter can be improved.

[0009] In a possible design, the output control circuit includes: a freewheeling sequence determination circuit and a first comparator;

[0010] The first input terminal of the first comparator is electrically connected to the output terminal of the first output circuit, the second input terminal of the first comparator is electrically connected to the output terminal of the second output circuit, the output terminal of the first comparator is electrically connected to the input terminal of the freewheeling sequence determination circuit, and the output terminal of the freewheeling sequence determination circuit is respectively electrically connected to the control terminal of the first output circuit and the control terminal of the second output circuit;

[0011] The first comparator is configured to compare the magnitudes of the first output voltage and the second output voltage to obtain a first comparison result, and transmit the first comparison result to the freewheeling sequence determination circuit;

[0012] The freewheeling sequence determination circuit is configured to determine the first freewheeling loop and the second freewheeling loop in the first output circuit and the second output circuit according to the first comparison result.

[0013] In a possible design, when the first comparison result indicates that the first output voltage is less than the second output voltage, the freewheeling sequence determination circuit is configured to determine the first output circuit as the first freewheeling loop and the second output circuit as the second freewheeling loop, or determine the second output circuit as the first freewheeling loop and the first output circuit as the second freewheeling loop;

[0014] Or,

[0015] The freewheeling sequence determination circuit is used to determine that the second output circuit is the first freewheeling loop and the first output circuit is the second freewheeling loop, or determine that the first output circuit is the first freewheeling loop and the second output circuit is the second freewheeling loop when the first comparison result indicates that the first output voltage is greater than the second output voltage.

[0016] In a possible design, the output control circuit includes: a freewheeling sequence determination circuit, a power determination circuit, and a first comparator;

[0017] The first input terminal of the first comparator and the first input terminal of the power determination circuit are both electrically connected to the output terminal of the first output circuit. The second input terminal of the first comparator and the second input terminal of the power determination circuit are both electrically connected to the output terminal of the second output circuit. The output terminal of the first comparator is electrically connected to the first input terminal of the freewheeling sequence determination circuit. The output terminal of the power determination circuit is electrically connected to the second input terminal of the freewheeling sequence determination circuit. The output terminal of the freewheeling sequence determination circuit is respectively electrically connected to the control terminal of the first output circuit and the control terminal of the second output circuit;

[0018] The first comparator is used to compare the magnitudes of the first output voltage and the second output voltage, obtain a first comparison result, and transmit the first comparison result to the freewheeling sequence determination circuit;

[0019] The power determination circuit is used to obtain a power determination result based on the first output voltage and the second output voltage, and transmit the power determination result to the freewheeling sequence determination circuit;

[0020] The freewheeling sequence determination circuit is used to determine the first freewheeling loop and the second freewheeling loop in the first output circuit and the second output circuit according to the first comparison result and the power determination result.

[0021] In a possible design, the power determination circuit includes: a first power determination circuit and a second power determination circuit;

[0022] The input terminal of the first power determination circuit is electrically connected to the output terminal of the first output circuit. The input terminal of the second power determination circuit is electrically connected to the output terminal of the second output circuit. The output terminals of the first power determination circuit and the second power determination circuit are both electrically connected to the second input terminal of the freewheeling sequence determination circuit. The first terminal of the first power determination circuit is electrically connected to the first terminal of the second power determination circuit. The second terminal of the first power determination circuit is electrically connected to the second terminal of the second power determination circuit;

[0023] The first power determination circuit is configured to obtain a first feedback voltage based on the first output voltage, and the first feedback voltage is used to characterize the magnitude of the power of the first output circuit;

[0024] The second power determination circuit is configured to obtain a second feedback voltage based on the second output voltage, and the second feedback voltage is used to characterize the magnitude of the power of the second output circuit;

[0025] The first power determination circuit is further configured to compare the magnitude of the first feedback voltage and the first preset voltage when the first output voltage is greater than the second output voltage, to obtain a second comparison result. The power determination result includes: the second comparison result and a third comparison result. The first preset voltage is used to determine whether the load of the first output circuit or the load of the second output circuit is a heavy load;

[0026] The second power determination circuit is further configured to compare the magnitude of the second feedback voltage and the second preset voltage when the first output voltage is greater than the second output voltage, to obtain the third comparison result. The second preset voltage is used to determine whether the load of the first output circuit or the load of the second output circuit is a light load;

[0027] Or,

[0028] The first power determination circuit is further configured to obtain the second feedback voltage from the second power determination circuit and compare the magnitude of the second feedback voltage and the first preset voltage when the first output voltage is less than the second output voltage, to obtain the second comparison result;

[0029] The second power determination circuit is further configured to obtain the first feedback voltage from the first power determination circuit and compare the magnitude of the first feedback voltage and the second preset voltage when the first output voltage is less than the second output voltage, to obtain the third comparison result.

[0030] In a possible design, the freewheeling sequence determination circuit is specifically configured to determine whether the second comparison result and the third comparison result satisfy a second preset condition when the first comparison result satisfies a first preset condition;

[0031] If the second preset condition is satisfied, the second output circuit is determined as the first freewheeling loop, and the first output circuit is determined as the second freewheeling loop;

[0032] If the second preset condition is not satisfied, the first output circuit is determined as the first freewheeling loop, and the second output circuit is determined as the second freewheeling loop;

[0033] Or,

[0034] The freewheeling sequence determination circuit is specifically configured to determine whether the second comparison result and the third comparison result satisfy a third preset condition when the first comparison result does not satisfy the first preset condition;

[0035] If the third preset condition is satisfied, the first output circuit is determined as the first freewheeling loop, and the second output circuit is determined as the second freewheeling loop;

[0036] If the third preset condition is not satisfied, the second output circuit is determined as the first freewheeling loop, and the first output circuit is determined as the second freewheeling loop.

[0037] In a possible design, the first power determination circuit includes: a first operational amplifier, a second comparator, a first capacitor, a first resistor, a first switching tube, and a second switching tube;

[0038] The positive input terminal of the first operational amplifier is used to connect to a first reference voltage. The negative input terminal of the first operational amplifier and the first plate of the first capacitor are both electrically connected to the output terminal of the first output circuit. The second plate of the first capacitor is electrically connected to the first end of the first resistor. The output terminal of the first operational amplifier is electrically connected to the first end of the first switching tube, the first end of the second switching tube, and the second end of the first resistor. The second end of the first switching tube is electrically connected to the positive input terminal of the second comparator and the first end of the second power determination circuit. The negative input terminal of the second comparator is used to connect to the first preset voltage. The output terminal of the second comparator is electrically connected to the second input terminal of the freewheeling sequence determination circuit. The second end of the second switching tube is electrically connected to the second end of the second power determination circuit. The control terminals of the first switching tube and the second switching tube are used to connect to a first control signal, and the first control signal is used to control the conduction or cutoff of the first switching tube and the second switching tube according to the first comparison result;

[0039] The first operational amplifier is configured to amplify the voltage difference between the first output voltage and the first reference voltage, and obtain the first feedback voltage under the compensation of the first resistor and the first capacitor, and transmit the first feedback voltage to the second comparator;

[0040] The second comparator is configured to compare the magnitudes of the first feedback voltage and the first preset voltage to obtain the second comparison result, or obtain the second feedback voltage from the second power determination circuit and compare the magnitudes of the second feedback voltage and the first preset voltage to obtain the second comparison result.

[0041] In a possible design, the second power determination circuit includes: a second operational amplifier, a third comparator, a second capacitor, a second resistor, a third switching transistor, and a fourth switching transistor;

[0042] The non-inverting input terminal of the second operational amplifier is used to connect to a second reference voltage. The inverting input terminal of the second operational amplifier and the first plate of the second capacitor are both electrically connected to the output terminal of the second output circuit. The second plate of the second capacitor is electrically connected to the first end of the second resistor. The output terminal of the second operational amplifier is respectively electrically connected to the first end of the third switching transistor, the first end of the fourth switching transistor, and the second end of the second resistor. The second end of the third switching transistor is electrically connected to the first end of the first power determination circuit. The second end of the fourth switching transistor is respectively electrically connected to the inverting input terminal of the third comparator and the second end of the first power determination circuit. The inverting input terminal of the third comparator is used to connect to the second preset voltage. The output terminal of the second comparator is electrically connected to the third input terminal of the freewheeling sequence determination circuit. The control terminals of the third switching transistor and the fourth switching transistor are used to connect to a second control signal, and the second control signal is used to control the conduction or cutoff of the third switching transistor and the fourth switching transistor according to the first comparison result;

[0043] The second operational amplifier is used to amplify the voltage difference between the second output voltage and the second reference voltage, and obtain the second feedback voltage under the compensation of the second resistor and the second capacitor, and transmit the second feedback voltage to the third comparator;

[0044] The third comparator is used to compare the magnitudes of the second feedback voltage and the second preset voltage to obtain the third comparison result, or obtain the first feedback voltage from the first power determination circuit and compare the magnitudes of the first feedback voltage and the second preset voltage to obtain the third comparison result.

[0045] In a possible design, the first preset condition is that the first output voltage is less than the second output voltage; the second preset condition is that the first feedback voltage is less than the second preset voltage and the second feedback voltage is greater than the first preset voltage; the third preset condition is that the first feedback voltage is greater than the first preset voltage and the second feedback voltage is less than the second preset voltage.

[0046] In a possible design, the flyback converter further includes: a first secondary switching transistor, a transformer, and a primary switching transistor;

[0047] The output control circuit is further configured to, after the exciting inductance current in the transformer passes through zero and before the primary switching transistor changes from off to on, control the second freewheeling circuit to reverse-excite the transformer for a preset duration while the first secondary switching transistor is on.

[0048] In a second aspect, the present application provides a flyback converter, which includes: a primary switching transistor, an inductor, an absorption circuit, a primary controller, a secondary controller, a transformer, a first secondary switching transistor, a first output circuit, a second output circuit, an isolation communication circuit, and the output control circuit in the first aspect and each possible design of the first aspect;

[0049] The first end of the inductor and the first end of the absorption circuit are both configured to be connected to an input voltage. The second end of the inductor is electrically connected to the non-corresponding end of the primary winding of the transformer. The first end of the primary switching transistor and the second end of the absorption circuit are both connected to the corresponding end of the primary winding. The control end of the primary switching transistor is connected to the first end of the primary controller. The second end of the primary controller is connected to the first end of the isolation communication circuit. The second end of the isolation communication circuit is connected to the first end of the secondary controller. The second end of the secondary controller is connected to the control end of the first secondary switching transistor. The first end of the first secondary switching transistor is connected to the non-corresponding end of the secondary winding of the transformer. The corresponding ends of the secondary winding are respectively connected to the input ends of the first output circuit and the second output circuit. The output end of the first output circuit is connected to the first input end of the output control circuit. The output end of the second output circuit is connected to the second input end of the output control circuit. The output end of the output control circuit is respectively connected to the control ends of the first output circuit and the second output circuit. The third end of the secondary controller is connected to the first end of the output control circuit. The second ends of the first secondary switching transistor and the primary switching transistor are both grounded. The output end of the first output circuit is further configured to output a first output voltage, and the output end of the second output circuit is further configured to output a second output voltage.

[0050] For the flyback converter provided in the second aspect and each possible design of the second aspect, the beneficial effects can refer to the beneficial effects brought by the first aspect and each possible implementation manner of the first aspect, which will not be elaborated herein.

[0051] In a third aspect, the present application provides a chip, which includes: the output control circuit in the first aspect and each possible design of the first aspect, and / or, the flyback converter in the second aspect.

[0052] Fourthly, the present application provides an electronic device, which includes the chip in the third aspect above.

[0053] The above description is only an overview of the technical solutions of the embodiments of the present application. In order to understand the technical means of the embodiments of the present application more clearly, it can be implemented according to the content of the description. And in order to make the above and other purposes, features and advantages of the embodiments of the present application more obvious and understandable, the following specifically gives the specific implementation manners of the present application. Description of the Drawings

[0054] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0055] Figure 1 Schematic diagram of the structure of the output control circuit in the flyback converter provided by the related art;

[0056] Figure 2 Schematic diagram of the working waveforms of a flyback converter in the related art;

[0057] Figure 3 Schematic diagram of the structure of a flyback converter provided by an embodiment of the present application;

[0058] Figure 4 Schematic diagram of the structure of an output control circuit in the flyback converter provided by an embodiment of the present application;

[0059] Figure 5 For Figure 4 Schematic diagram of the control flow of the output control circuit in

[0060] Figure 6 For Figure 4 Schematic diagram of a working waveform of the flyback converter in

[0061] Figure 7 For Figure 4 Another schematic diagram of the working waveform of the flyback converter in

[0062] Figure 8 For Figure 4 Another schematic diagram of the working waveform of the flyback converter in

[0063] Figure 9 Schematic diagram of the structure of another output control circuit in the flyback converter provided by an embodiment of the present application;

[0064] Figure 10 For Figure 9Schematic diagram of the control flow of the output control circuit;

[0065] Figure 11 For Figure 9 Schematic diagram of the process by which the freewheeling sequence determination circuit in determines the first freewheeling loop and the second freewheeling loop;

[0066] Figure 12 For Figure 9 Schematic diagram of a working waveform of the flyback converter in;

[0067] Figure 13 For Figure 9 Schematic diagram of another working waveform of the flyback converter in;

[0068] Figure 14 For Figure 9 Schematic diagram of yet another working waveform of the flyback converter in. Specific embodiments

[0069] In this application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B may be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item)" or similar expressions thereof refer to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a alone, b alone, or c alone may represent: a alone, b alone, c alone, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b, and c, where a, b, and c may be single or multiple. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0070] The orientation or positional relationship indicated by terms such as "center", "longitudinal", "transverse", "upper", "lower", "left", "right", "front", "rear", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0071] The terms "connected" and "linked" should be understood in a broad sense. For example, the "connection" or "linkage" of a circuit structure can refer not only to a physical connection but also to an electrical connection or a signal connection. For instance, it can be a direct connection, i.e., a physical connection, or an indirect connection through at least one intermediate component, as long as the circuit is electrically connected. It can also be the internal connection of two components. A signal connection can be made not only through a circuit but also through a media medium, such as radio waves. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0072] First, the professional terms involved in the embodiments of this application are explained.

[0073] Discontinuous conduction mode (DCM) means that in certain application scenarios, the inductor current in a flyback converter drops to zero during some switching cycles. In this mode, the load of the flyback converter is a light load.

[0074] Continuous conduction mode (CCM) means that the inductor current in a flyback converter always remains in a continuous state and does not drop to zero during each switching cycle. In this mode, the load of the flyback converter is a heavy load.

[0075] The free resonance state means that the magnetizing inductor in a flyback converter, together with the parasitic diodes of the primary switching transistor and the synchronous rectifier transistor, forms a resonant circuit, enabling the flyback converter to operate in a free resonance mode.

[0076] Among them, the magnetizing inductor refers to the inductor of the transformer in a flyback converter.

[0077] The secondary freewheeling stage refers to the process of demagnetizing the magnetizing inductor of the transformer, that is, the process in which the magnetizing inductor current Imag drops from the peak current.

[0078] Next, in combination with Figure 1 and Figure 2 the problems existing in the flyback converter in the related technology are analyzed as follows:

[0079] Referring to Figure 1 , Figure 1 is a schematic structural diagram of the output control circuit in the flyback converter provided by the related technology. As Figure 1As shown, the flyback converter has two outputs. One output is the output voltage VO1', and the other output is the output voltage VO2'. The output voltage VO1' and the output voltage VO2' are respectively loop-compensated to obtain the voltage VFB1' and the voltage VFB2'. In this way, the diode group can transmit the larger voltage among the voltage VFB1' and the voltage VFB2' to the primary control unit through the isolation communication unit. At the same time, the comparator Compa' can compare the voltage VFB1' and the voltage VFB2' to obtain a comparison result. Thus, within a single switching period, the excitation inductor of the transformer can transmit energy to only one of the two outputs according to the comparison result.

[0080] Among them, these two outputs obtain energy from the excitation inductor in a time-division multiplexing manner. For example, within the first switching period, only one output obtains energy from the excitation inductor. Another example is that within the third switching period, only the other output obtains energy from the excitation inductor.

[0081] Referring to Figure 2 , Figure 2 is a schematic diagram of the working waveform of a flyback converter in the related art. As Figure 2 shown, in the first two switching periods T1 + T2, during the secondary freewheeling stage, the excitation inductor transmits energy to the output where the output voltage VO1' is located. In the third switching period T3, since the voltage VFB1' < the voltage VFB2', therefore, during the secondary freewheeling stage, the excitation inductor transmits energy to the other output where the output voltage VO2' is located. In the fourth switching period T4, since the voltage VFB1' > the voltage VFB2', therefore, during the secondary freewheeling stage, the excitation inductor transmits energy to the output where the output voltage VO1' is located again.

[0082] However, due to the obvious difference in the power of the two outputs, the flyback converter switches back and forth between two different operating points. In this way, when the switching frequency enters the audible range of the human ear, it causes the problem of audio noise in the flyback converter. Therefore, when a flyback converter is installed in an electronic device sensitive to noise interference, additional noise interference will be generated. Thus, it affects the performance of the flyback converter.

[0083] For this reason, the present application provides an output control circuit, a flyback converter, a chip, and an electronic device.

[0084] Among them, the output control circuit and the flyback converter can be a chip or a circuit module, and the embodiments of the present application do not make specific limitations in this regard.

[0085] In addition, the output control circuit and the flyback converter can be integrated in one chip or in different chips, and the embodiments of the present application do not make specific limitations in this regard.

[0086] In this application, the electronic device may include, but is not limited to: a power adapter, a power tool, a household appliance, and an electric vehicle charger.

[0087] In addition, the flyback converter may be a full-bridge flyback converter or a half-bridge flyback converter. Among them, the half-bridge flyback converter may be a symmetric half-bridge flyback converter or an asymmetric half-bridge flyback converter. The embodiments of this application do not make specific limitations on this.

[0088] Referring to Figure 3 , Figure 3 is a schematic structural diagram of a flyback converter provided by an embodiment of this application. As Figure 3 shown, the flyback converter 1000 may include: a primary switching transistor Q1, an inductor Lk, an absorption circuit 700, a primary controller 400, a secondary controller 200, a transformer T, a first secondary switching transistor Q2, a first output circuit 500, a second output circuit 600, an isolation communication circuit 300, and an output control circuit 100.

[0089] The first end of the inductor Lk and the first end of the absorption circuit 700 are both used to access the input voltage Vin. The second end of the inductor Lk is electrically connected to the opposite-named end of the primary winding of the transformer T. The first end of the primary switching transistor Q1 and the second end of the absorption circuit 700 are both electrically connected to the same-named end of the primary winding. The control end of the primary switching transistor Q1 is electrically connected to the first end of the primary controller 400. The second end of the primary controller 400 is electrically connected to the first end of the isolation communication circuit 300. The second end of the isolation communication circuit 300 is electrically connected to the first end of the secondary controller 200. The second end of the secondary controller 200 is electrically connected to the control end of the first secondary switching transistor Q2. The first end of the first secondary switching transistor Q2 is electrically connected to the opposite-named end of the secondary winding of the transformer T. The same-named ends of the secondary winding are respectively electrically connected to the input end of the first output circuit 500 and the input end of the second output circuit 600. The output end of the first output circuit 500 is electrically connected to the first input end of the output control circuit 100. The output end of the second output circuit 600 is electrically connected to the second input end of the output control circuit 100. The output end of the output control circuit 100 is respectively electrically connected to the control end of the first output circuit 500 and the control end of the second output circuit 600. The third end of the secondary controller 200 is electrically connected to the first end of the output control circuit 100. The second ends of the first secondary switching transistor Q2 and the primary switching transistor Q1 are both grounded. The output end of the first output circuit 500 is also used to output the first output voltage V O1 , and the output end of the second output circuit 600 is also used to output the second output voltage V O2 .

[0090] Among them, the primary switch Q1 and the first secondary switch Q2 may include, but are not limited to, gallium nitride transistors, bipolar junction transistors, insulated gate bipolar transistors, metal-oxide semiconductor field effect transistors, field-controlled thyristors, gate turn-off thyristors, and transmission gates.

[0091] For example, when the primary switch Q1 and the first secondary switch Q2 are gallium nitride transistors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the gates of the gallium nitride transistors. The first terminals of the primary switch Q1 and the first secondary switch Q2 can be the drains or sources of the gallium nitride transistors. Correspondingly, the second terminals of the primary switch Q1 and the first secondary switch Q2 can be the sources or drains of the gallium nitride transistors.

[0092] For example, when the primary switch Q1 and the first secondary switch Q2 are bipolar junction transistors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the bases of the bipolar junction transistors. The first terminals of the primary switch Q1 and the first secondary switch Q2 can be the collectors or emitters of the bipolar junction transistors. Correspondingly, the second terminals of the primary switch Q1 and the first secondary switch Q2 can be the emitters or collectors of the bipolar junction transistors.

[0093] For example, when the primary switch Q1 and the first secondary switch Q2 are insulated gate bipolar transistors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the gates of the insulated gate bipolar transistors. The first terminals of the primary switch Q1 and the first secondary switch Q2 can be the collectors or emitters of the insulated gate bipolar transistors. Correspondingly, the second terminals of the primary switch Q1 and the first secondary switch Q2 can be the emitters or collectors of the insulated gate bipolar transistors.

[0094] For example, when the primary switch Q1 and the first secondary switch Q2 are metal-oxide semiconductor field effect transistors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the gates of the metal-oxide semiconductor field effect transistors. The first terminals of the primary switch Q1 and the first secondary switch Q2 can be the drains or sources of the metal-oxide semiconductor field effect transistors. Correspondingly, the second terminals of the primary switch Q1 and the first secondary switch Q2 can be the sources or drains of the metal-oxide semiconductor field effect transistors.

[0095] For example, when the primary switch Q1 and the first secondary switch Q2 are field-controlled thyristors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the gates of the field-controlled thyristors. The first terminals of the primary switch Q1 and the first secondary switch Q2 can be the drains or sources of the field-controlled thyristors. Correspondingly, the second terminals of the primary switch Q1 and the first secondary switch Q2 can be the sources or drains of the field-controlled thyristors.

[0096] For example, when the primary switch Q1 and the first secondary switch Q2 are gate turn-off thyristors, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the gates of the gate turn-off thyristors. The first ends of the primary switch Q1 and the first secondary switch Q2 can be the cathodes or anodes of the gate turn-off thyristors. Correspondingly, the second ends of the primary switch Q1 and the first secondary switch Q2 can be the cathodes or anodes of the gate turn-off thyristors.

[0097] For example, when the primary switch Q1 and the first secondary switch Q2 are transmission gates, the control terminals of the primary switch Q1 and the first secondary switch Q2 refer to the ports of the transmission gates for accessing gate control signals. The first ends of the primary switch Q1 and the first secondary switch Q2 can be the input terminals or output terminals of the transmission gates. Correspondingly, the second ends of the primary switch Q1 and the first secondary switch Q2 can be the input terminals or output terminals of the transmission gates.

[0098] When the primary controller 400 controls the primary switch Q1 to conduct, the excitation inductor Lm of the transformer T is in the excitation process, causing the excitation inductor Lm to rise linearly. When the primary controller 400 controls the primary switch Q1 to turn off, the excitation inductor Lm transfers to the secondary of the flyback converter 1000 for freewheeling, causing the flyback converter 1000 to be in the secondary freewheeling stage.

[0099] The output control circuit 100 can obtain the first output voltage V O1 from the first output circuit 500, and obtain the second output voltage V O2 from the second output circuit 600. Moreover, the output control circuit 100 can control the first output circuit 500 and the second output circuit 600 to conduct successively according to the first output voltage V O1 and the second output voltage V O2 in each switching cycle. In this way, the output control circuit 100 can determine the first output circuit that conducts first as the first freewheeling loop, and the second output circuit that conducts later as the second freewheeling loop.

[0100] Thus, the output control circuit 100 can determine the first freewheeling loop and the second freewheeling loop in the first output circuit 500 and the second output circuit 600, so that the excitation inductor Lm of the transformer T transfers energy to the first freewheeling loop and the second freewheeling loop respectively during the secondary freewheeling stage in each switching cycle. That is to say, the excitation inductor Lm of the transformer T transfers energy in the form of high-frequency chopping in each switching cycle, making the high-frequency chopping frequencies of the first output circuit 500 and the second output circuit 600 equal to the switching frequency. Since the switching frequency is usually higher than the audible range of the human ear, the problem of audio noise can be solved, and the performance of the flyback converter 1000 can be improved.

[0101] Among them, when the first output circuit 500 conducts first and the second output circuit 600 conducts later, the first output circuit 500 is the first freewheeling loop, and the second output circuit 600 is the second freewheeling loop. When the second output circuit 600 conducts first and the first output circuit 500 conducts later, the second output circuit 600 is the first freewheeling loop, and the first output circuit 500 is the second freewheeling loop.

[0102] Among them, the switching frequency refers to the reciprocal of the switching period.

[0103] The output control circuit, flyback converter, chip and electronic device provided by this application can obtain the first output voltage from the first output circuit and the second output voltage from the second output circuit through the output control circuit, and control the first output circuit and the second output circuit to conduct successively according to the first output voltage and the second output voltage in each switching period. Thus, the output control circuit can determine the first freewheeling loop and the second freewheeling loop in the first output circuit and the second output circuit, so that the excitation inductance of the transformer in the flyback converter transfers energy to the first freewheeling loop and the second freewheeling loop respectively during the secondary freewheeling stage. That is to say, the excitation inductance transfers energy in the way of high-frequency chopping in each switching period, so that the high-frequency chopping frequencies of the first output circuit and the second output circuit are equal to the switching frequency. Since the switching frequency is usually higher than the audible range of the human ear, the problem of audio noise can be solved and the performance of the flyback converter can be improved.

[0104] Based on the description of the above embodiments, the output control circuit 100 can adopt two feasible implementation manners. These two feasible implementation manners can include: one feasible implementation manner of the output control circuit 100 and another feasible implementation manner of the output control circuit 100. One feasible implementation manner of the output control circuit 100 and another feasible implementation manner of the output control circuit 100 are in an "or" relationship. That is to say, either through one feasible implementation manner of the output control circuit 100, the purpose of determining the first freewheeling loop and the second freewheeling loop in the first output circuit 500 and the second output circuit 600 is achieved, or through another feasible implementation manner of the output control circuit 100, the purpose of determining the first freewheeling loop and the second freewheeling loop in the first output circuit 500 and the second output circuit 600 is achieved.

[0105] As one feasible implementation manner of the output control circuit 100, refer to Figure 4 , Figure 4 is a schematic structural diagram of an output control circuit in a flyback converter provided by an embodiment of this application. As shown in Figure 4 , the output control circuit 100 may include: a freewheeling sequence determination circuit 110 and a first comparator Compa1.

[0106] The first input terminal of the first comparator Compa1 is electrically connected to the output terminal of the first output circuit 500, the second input terminal of the first comparator Compa1 is electrically connected to the output terminal of the second output circuit 600, the output terminal of the first comparator Compa1 is electrically connected to the input terminal of the freewheeling sequence determination circuit 110, and the output terminal of the freewheeling sequence determination circuit 110 is electrically connected to the control terminals of the first output circuit 500 and the second output circuit 600 respectively.

[0107] Wherein, the freewheeling sequence determination circuit 110 and the first comparator Compa1 can be separately provided or integrally provided, and the embodiments of the present application do not make specific limitations thereto.

[0108] Wherein, the first input terminal of the first comparator Compa1 is the first input terminal of the output control circuit 100, the second input terminal of the first comparator Compa1 is the second input terminal of the output control circuit 100, and the output terminal of the freewheeling sequence determination circuit 110 is the output terminal of the output control circuit 100.

[0109] Wherein, the first input terminal of the first comparator Compa1 can be the non-inverting input terminal or the inverting input terminal, and the embodiments of the present application do not make specific limitations thereto. Correspondingly, the second input terminal of the first comparator Compa1 can be the inverting input terminal or the non-inverting input terminal, and the embodiments of the present application do not make specific limitations thereto.

[0110] The following combines Figure 5 , Figure 5 is Figure 4 the schematic diagram of the control flow of the output control circuit in

[0111] The first comparator Compa1 can compare the magnitudes of the first output voltage V O1 and the second output voltage V O2 to obtain a first comparison result. Moreover, the first comparator Compa1 can transmit the first comparison result to the freewheeling sequence determination circuit 110, enabling the freewheeling sequence determination circuit 110 to obtain the first comparison result.

[0112] In this way, the freewheeling sequence determination circuit 110 can determine the first freewheeling loop and the second freewheeling loop in the first output circuit 500 and the second output circuit 600 according to the first comparison result.

[0113] In some examples, when the first comparison result indicates that the first output voltage V O1 is less than the second output voltage V O2In this case, the freewheeling sequence determination circuit 110 can control the first output circuit 500 to conduct first and the second output circuit 600 to conduct later. In this way, the freewheeling sequence determination circuit 110 can determine that the first output circuit 500 is the first freewheeling loop and the second output circuit 600 is the second freewheeling loop.

[0114] Since the first output voltage V O1 is less than the second output voltage V O2 . Therefore, the first output circuit 500 is the low-voltage loop and the second output circuit 600 is the high-voltage loop. Thus, the freewheeling sequence determination circuit 110 determines that the low-voltage loop is the first freewheeling loop and the high-voltage loop is the second freewheeling loop, so that the voltage Vds across the primary switching transistor Q1 does not trigger the detection threshold. Thereby, it is possible to prevent the flyback converter 1000 from entering an abnormal operating state and improve the anti-interference performance of the flyback converter 1000.

[0115] The freewheeling sequence determination circuit 110 can control the second output circuit 600 to conduct first and the first output circuit 500 to conduct later. Thereby, the freewheeling sequence determination circuit 110 can determine that the second output circuit 600 is the first freewheeling loop and the first output circuit 500 is the second freewheeling loop.

[0116] When the first comparison result indicates that the first output voltage V O1 is greater than the second output voltage V O2 , the freewheeling sequence determination circuit 110 can control the second output circuit 600 to conduct first and the first output circuit 500 to conduct later. In this way, the freewheeling sequence determination circuit 110 can determine that the second output circuit 600 is the first freewheeling loop and the first output circuit 500 is the second freewheeling loop. Since the first output voltage V O1 is greater than the second output voltage V O2 . Therefore, the first output circuit 500 is the high-voltage loop and the second output circuit 600 is the low-voltage loop. Thus, the freewheeling sequence determination circuit 110 determines that the low-voltage loop is the first freewheeling loop and the high-voltage loop is the second freewheeling loop, so that the voltage Vds across the primary switching transistor Q1 does not trigger the detection threshold. Thereby, it is possible to prevent the flyback converter 1000 from entering an abnormal operating state and improve the anti-interference performance of the flyback converter 1000.

[0117] The freewheeling sequence determination circuit 110 can control the first output circuit 500 to conduct first and the second output circuit 600 to conduct later. Thereby, the freewheeling sequence determination circuit 110 can determine that the first output circuit 500 is the first freewheeling loop and the second output circuit 600 is the second freewheeling loop.

[0118] Exemplarily, such as Figure 5As shown, after the exciting inductor current Imag in the transformer T crosses zero, that is, when the flyback converter 1000 is in DCM, before the primary switch Q1 changes from off to on, the output control circuit 100 can control the second freewheeling circuit to reverse-excite the transformer T for a preset duration when the first secondary switch Q2 is on, enabling the first secondary switch Q2 to achieve zero-voltage turn-on. Thus, the losses generated by the flyback converter 1000 can be reduced and the efficiency of the flyback converter 1000 can be improved.

[0119] In summary, the first comparator can compare the magnitudes of the first output voltage and the second output voltage to obtain a first comparison result and transmit the first comparison result to the freewheeling sequence determination circuit, enabling the freewheeling sequence determination circuit to obtain the first comparison result. In this way, the freewheeling sequence determination circuit can determine the first freewheeling circuit and the second freewheeling circuit in the first output circuit and the second output circuit according to the first comparison result. Thus, the output control circuit can determine the first freewheeling circuit and the second freewheeling circuit in the first output circuit and the second output circuit.

[0120] The following combines Figures 6 - 8 , Figures 6 - 8 All show Figure 4 Schematic diagrams of the working waveforms of the flyback converter in. The working process of how the output control circuit 100 controls the flyback converter 1000 when the flyback converter 1000 is in DCM and CCM respectively is described in detail.

[0121] As Figure 6 shown, in DCM, since the first output voltage V O1 < the second output voltage V O2 . Therefore, the output control circuit 100 can determine that the first output circuit 500 is the first freewheeling circuit and the second output circuit 600 is the second freewheeling circuit.

[0122] During the time periods t0 - t1 and t6 - t7, the primary switch Q1 is in the on state and the exciting inductor current Imag rises linearly. During this time period, that is, during the conduction of the primary switch Q1, the second output circuit 600 as the second freewheeling circuit turns off and the first output circuit 500 as the first freewheeling circuit completes conduction.

[0123] At the moments t1 and t7, the primary switch Q1 turns off and the first secondary switch Q2 turns on.

[0124] During the time periods t1 - t2 and t7 - t8, the exciting inductor current Imag supplies energy to the first output circuit 500. During this time period, the voltage Vds across the primary switch Q1 is Vin + Np / Ns * V O1Among them, Vin is the input voltage, Np is the number of turns of the primary winding of transformer T, Ns is the number of turns of the secondary winding of transformer T, and V O1 is the first output voltage.

[0125] At time t2 and t8, the first output circuit 500 is turned off and the second output circuit 600 is turned on.

[0126] During the time period from t2 to t3 and from t8 to t9, the magnetizing inductor current Imag continues to supply energy to the second output circuit 600. During this time period, the voltage Vds across the primary switch Q1 is Vin + Np / Ns * V O2 .

[0127] At time t3 and t9, the magnetizing inductor current Imag crosses zero and the first secondary switch Q2 is turned off.

[0128] During the time period from t3 to t4, the flyback converter 1000 enters the free resonance state.

[0129] During the time period from t4 to t5, before the primary switch Q1 changes from off to on, that is, before the primary switch Q1 conducts again, the first secondary switch Q2 conducts for a preset duration. Since the second output circuit 600 is still in the on state during this time period. Therefore, the output control circuit 100 can control the second output circuit 600 to reverse-excite the magnetizing inductor of the transformer T, enabling the primary switch Q1 to achieve zero-voltage conduction. Among them, this time period is the preset duration.

[0130] As Figure 7 shown, in DCM, since the first output voltage V O1 < the second output voltage V O2 . Therefore, the output control circuit 100 can determine that the second output circuit 600 is the first freewheeling loop and the first output circuit 500 is the second freewheeling loop.

[0131] During the time period from t0 to t1 and from t6 to t7, the primary switch Q1 is in the on state and the magnetizing inductor current Imag rises linearly. During this time period, that is, during the conduction period of the primary switch Q1, the first output circuit 500 as the second freewheeling loop is turned off and the second output circuit 600 as the first freewheeling loop is turned on is completed.

[0132] At time t1 and t7, the primary switch Q1 is turned off and the first secondary switch Q2 is turned on.

[0133] During the time period from t1 to t2 and from t7 to t8, the magnetizing inductor current Imag supplies energy to the second output circuit 600. During this time period, the voltage Vds across the primary switch Q1 is Vin + Np / Ns * V O2 .

[0134] At time t2 and time t8, the second output circuit 600 is turned off and the first output circuit 500 is turned on.

[0135] During the time period from t2 to t3 and from t8 to t9, the exciting inductance current Imag continues to supply energy to the first output circuit 500. During this time period, the voltage Vds across the primary switch Q1 is Vin + Np / Ns * V O1 .

[0136] At time t3 and time t9, the exciting inductance current Imag crosses zero and the first secondary switch Q2 is turned off.

[0137] During the time period from t3 to t4, the flyback converter 1000 enters the free resonance state.

[0138] During the time period from t4 to t5, before the primary switch Q1 changes from off to on, that is, before the primary switch Q1 is turned on again, the first secondary switch Q2 conducts for a preset duration. Since the first output circuit 500 is still in the on state during this time period. Therefore, the output control circuit 100 can control the first output circuit 500 to reverse-excite the exciting inductance of the transformer T, enabling the primary switch Q1 to achieve zero-voltage turn-on. Among them, this time period is the preset duration.

[0139] As Figure 8 shown, in CCM, due to the first output voltage V O1 < the second output voltage V O2 . Therefore, the output control circuit 100 determines that the first output circuit 500 is the first freewheeling loop and the second output circuit 600 is the second freewheeling loop.

[0140] During the time periods from t0 to t1, from t3 to t4, and from t6 to t7, the primary switch Q1 is in the on state and the exciting inductance current Imag rises linearly. During this time period, that is, during the conduction period of the primary switch Q1, the second output circuit 600 as the second freewheeling loop is turned off and the first output circuit 500 as the first freewheeling loop is turned on and completed.

[0141] At time t1, time t4, and time t7, the primary switch Q1 is turned off and the first secondary switch Q2 is turned on.

[0142] During the time periods from t1 to t2, from t4 to t5, and from t7 to t8, the exciting inductance current Imag supplies energy to the first output circuit 500. During this time period, the voltage Vds across the primary switch Q1 is Vin + Np / Ns * V O1 .

[0143] At time t2, time t5, and time t8, the first output circuit 500 is turned off and the second output circuit 600 is turned on.

[0144] During the time periods of t2 - t3, t5 - t6, and t8 - t9, the exciting inductance current Imag continues to supply energy to the second output circuit 600. During this time period, the voltage Vds across the primary switching transistor Q1 is Vin + Np / Ns*V O2 .

[0145] At the moments of t3, t6, and t9, the exciting inductance current Imag does not demagnetize to zero, the first secondary switching transistor Q2 turns off, and the primary switching transistor Q1 turns on.

[0146] As another feasible implementation manner of the output control circuit 100, referring to Figure 9 , Figure 9 is a schematic structural diagram of another output control circuit in the flyback converter provided by the embodiment of the present application. As Figure 9 shown, the output control circuit 100 may include: a freewheeling sequence determination circuit 110, a power determination circuit 120, and a first comparator Compa1.

[0147] The first input terminal of the first comparator Compa1 and the first input terminal of the power determination circuit 120 are both electrically connected to the output terminal of the first output circuit 500. The second input terminal of the first comparator Compa1 and the second input terminal of the power determination circuit 120 are both electrically connected to the output terminal of the second output circuit 600. The output terminal of the first comparator Compa1 is electrically connected to the first input terminal of the freewheeling sequence determination circuit 110. The output terminal of the power determination circuit 120 is electrically connected to the second input terminal of the freewheeling sequence determination circuit 110. The output terminal of the freewheeling sequence determination circuit 110 is respectively electrically connected to the control terminal of the first output circuit 500 and the control terminal of the second output circuit 600.

[0148] Among them, the freewheeling sequence determination circuit 110, the power determination circuit 120, and the first comparator Compa1 may be separately provided or integrally provided. The embodiment of the present application does not make specific limitations on this.

[0149] Among them, the first input terminal of the first comparator Compa1 and the first input terminal of the power determination circuit 120 are both the first input terminal of the output control circuit 100. The second input terminal of the first comparator Compa1 and the second input terminal of the power determination circuit 120 are both the second input terminal of the output control circuit 100. The output terminal of the freewheeling sequence determination circuit 110 is the output terminal of the output control circuit 100.

[0150] Among them, the first input terminal of the first comparator Compa1 can be the non-inverting input terminal or the inverting input terminal, and the embodiments of the present application do not make specific limitations on this. Correspondingly, the second input terminal of the first comparator Compa1 can be the inverting input terminal or the non-inverting input terminal, and the embodiments of the present application do not make specific limitations on this.

[0151] The following combines Figure 10 , Figure 10 For Figure 9 a schematic diagram of the control flow of the output control circuit in

[0152] The first comparator Compa1 can compare the magnitude of the first output voltage V O1 and the second output voltage V O2 to obtain a first comparison result. Moreover, the first comparator Compa1 can transmit the first comparison result to the freewheeling sequence determination circuit 110, so that the freewheeling sequence determination circuit 110 can obtain the first comparison result.

[0153] The power determination circuit 120 can obtain a power determination result according to the first output voltage V O1 and the second output voltage V O2 . Moreover, the power determination circuit 120 can transmit the power determination result to the freewheeling sequence determination circuit 110, so that the freewheeling sequence determination circuit 110 can obtain the power determination result.

[0154] In this way, the freewheeling sequence determination circuit 110 can determine the first freewheeling loop and the second freewheeling loop in the first output circuit 500 and the second output circuit 600 according to the first comparison result and the power determination result. Thus, the output control circuit 100 can determine the first freewheeling loop and the second freewheeling loop.

[0155] Among them, since the load of the output circuit corresponding to the first freewheeling loop is a heavy load or a medium load, and the load of the output circuit corresponding to the second freewheeling loop is a light load. Therefore, when the exciting inductance current Imag is relatively large, the output voltage ripple caused by the exciting inductance current Imag providing energy to the first freewheeling loop is relatively small, and when the exciting inductance current Imag is relatively small, the output voltage ripple caused by the exciting inductance current Imag providing energy to the second freewheeling loop is relatively small. Thus, the output voltage ripple can be improved.

[0156] Exemplarily, such as Figure 10As shown, after the exciting inductance current Imag in the transformer T crosses zero, that is to say, when the flyback converter 1000 is in DCM, before the primary switch Q1 changes from off to on, the output control circuit 100 can control the second freewheeling circuit to reverse-excite the transformer T for a preset duration when the first secondary switch Q2 is on, so that the first secondary switch Q2 can achieve zero-voltage turn-on. Thus, the losses generated by the flyback converter 1000 can be reduced, and the efficiency of the flyback converter 1000 can be improved.

[0157] In summary, the first comparator can compare the magnitudes of the first output voltage and the second output voltage to obtain a first comparison result and transmit the first comparison result to the freewheeling sequence determination circuit, enabling the freewheeling sequence determination circuit to obtain the first comparison result. The power determination circuit can obtain a power determination result based on the first output voltage and the second output voltage and transmit the power determination result to the freewheeling sequence determination circuit, enabling the freewheeling sequence determination circuit to obtain the power determination result. Furthermore, the freewheeling sequence determination circuit can determine the first freewheeling circuit and the second freewheeling circuit in the first output circuit and the second output circuit according to the first comparison result and the power determination result. Thus, the output control circuit can determine the first freewheeling circuit and the second freewheeling circuit in the first output circuit and the second output circuit.

[0158] Based on the description of the above embodiments, exemplarily, a possible implementation manner of the power determination circuit 120. As Figure 9 shown, the power determination circuit 120 may include: a first power determination circuit 121 and a second power determination circuit 122.

[0159] The input end of the first power determination circuit 121 is electrically connected to the output end of the first output circuit 500, the input end of the second power determination circuit 122 is electrically connected to the output end of the second output circuit 600, the output ends of the first power determination circuit 121 and the second power determination circuit 122 are both electrically connected to the second input end of the freewheeling sequence determination circuit 110, the first end of the first power determination circuit 121 is electrically connected to the first end of the second power determination circuit 122, and the second end of the first power determination circuit 121 is electrically connected to the second end of the second power determination circuit 122.

[0160] Wherein, the input end of the first power determination circuit 121 is the first input end of the power determination circuit 120, the input end of the second power determination circuit 122 is the second input end of the power determination circuit 120, and the output ends of the first power determination circuit 121 and the second power determination circuit 122 are both the output ends of the power determination circuit 120.

[0161] The first power determination circuit 121 can obtain a first feedback voltage V O1 based on the first output voltage V FB1。

[0162] Among them, the first feedback voltage V FB1 is used to characterize the magnitude of the power of the first output circuit 500.

[0163] The second power determination circuit 122 can obtain a second feedback voltage V O2 based on the second output voltage V FB2 。

[0164] Among them, the second feedback voltage V FB2 is used to characterize the magnitude of the power of the second output circuit 600.

[0165] When the first output voltage V O1 is greater than the second output voltage V O2 , the first power determination circuit 121 can compare the magnitudes of the first feedback voltage V FB1 and the first preset voltage V FBH to obtain a second comparison result.

[0166] Among them, the power determination result can include: the second comparison result and the third comparison result. The first preset voltage V FBH is used to determine whether the load of the first output circuit 500 or the load of the second output circuit 600 is a heavy load.

[0167] The second power determination circuit 122 can compare the magnitudes of the second feedback voltage V FB2 and the second preset voltage V FBL to obtain a third comparison result.

[0168] Among them, the second preset voltage V FBL is used to determine whether the load of the first output circuit 500 or the load of the second output circuit 600 is a light load.

[0169] Based on this, the power determination circuit 120 can obtain a power determination result according to the first output voltage V O1 and the second output voltage V O2 .

[0170] When the first output voltage V O1 is less than the second output voltage V O2 , the first power determination circuit 121 can obtain the second feedback voltage V FB2 from the second power determination circuit 122. And the first power determination circuit 121 can compare the magnitudes of the second feedback voltage V FB2 and the first preset voltage V FBH to obtain a second comparison result.

[0171] The second power determination circuit 122 can obtain the first feedback voltage V from the first power determination circuit 121FB1 Moreover, the second power determination circuit 122 can compare the first feedback voltage V FB1 and the second preset voltage V FBL to obtain a third comparison result.

[0172] Based on this, the power determination circuit 120 can obtain a power determination result according to the first output voltage V O1 and the second output voltage V O2 .

[0173] In summary, the first power determination circuit can obtain a first feedback voltage for characterizing the magnitude of the power of the first output circuit according to the first output voltage. The second power determination circuit can obtain a second feedback voltage for characterizing the magnitude of the power of the second output circuit according to the second output voltage. In this way, when the first output voltage is greater than the second output voltage, the first power determination circuit can compare the magnitudes of the first feedback voltage and the first preset voltage to obtain a second comparison result. The second power determination circuit can compare the magnitudes of the second feedback voltage and the second preset voltage to obtain a third comparison result. Alternatively, when the first output voltage is less than the second output voltage, the first power determination circuit can obtain the second feedback voltage from the second power determination circuit and compare the magnitudes of the second feedback voltage and the first preset voltage to obtain the second comparison result. The second power determination circuit can obtain the first feedback voltage from the first power determination circuit and compare the magnitudes of the first feedback voltage and the second preset voltage to obtain the third comparison result. Thus, the power determination circuit can obtain a power determination result according to the first output voltage and the second output voltage.

[0174] Next, in conjunction with Figure 11 , Figure 11 shows Figure 9 a schematic flow chart of how the freewheeling sequence determination circuit determines the first freewheeling loop and the second freewheeling loop in

[0175] When the first comparison result satisfies that the first output voltage V O1 is less than the second output voltage V O2 , that is, in the case of the first preset condition, the freewheeling sequence determination circuit 110 can determine whether the second comparison result and the third comparison result satisfy that the first feedback voltage V FB1 is less than the second preset voltage V FBL , and the second feedback voltage V FB2 is greater than the first preset voltage V FBH , that is, the second preset condition.

[0176] If the second comparison result and the third comparison result satisfy the second preset condition, the freewheeling sequence determination circuit 110 can determine the second output circuit 600 as the first freewheeling loop and the first output circuit 500 as the second freewheeling loop.

[0177] If the second comparison result and the third comparison result do not satisfy the second preset condition, the freewheeling sequence determination circuit 110 can determine the first output circuit 500 as the first freewheeling loop and the second output circuit 600 as the second freewheeling loop.

[0178] Among them, when the second comparison result and the third comparison result do not satisfy the second preset condition, since the first output voltage V O1 is less than the second output voltage V O2 . Therefore, the first output circuit 500 is a low-voltage loop and the second output circuit 600 is a high-voltage loop. In this way, the freewheeling sequence determination circuit 110 determines the low-voltage loop as the first freewheeling loop and the high-voltage loop as the second freewheeling loop, so that the voltage Vds across the primary switch Q1 does not trigger the detection threshold. Thus, it is possible to prevent the flyback converter 1000 from entering an abnormal operating state and improve the anti-interference performance of the flyback converter 1000.

[0179] When the first comparison result does not satisfy the first preset condition, the freewheeling sequence determination circuit 110 can determine whether the second comparison result and the third comparison result satisfy that the first feedback voltage V FB1 is greater than the first preset voltage V FBH , and the second feedback voltage V FB2 is less than the second preset voltage V FBL , that is, the third preset condition.

[0180] If the second comparison result and the third comparison result satisfy the third preset condition, the freewheeling sequence determination circuit 110 can determine the first output circuit 500 as the first freewheeling loop and the second output circuit 600 as the second freewheeling loop.

[0181] If the second comparison result and the third comparison result do not satisfy the third preset condition, the freewheeling sequence determination circuit 110 can determine the second output circuit 600 as the first freewheeling loop and the first output circuit 500 as the second freewheeling loop.

[0182] Among them, when the second comparison result and the third comparison result do not satisfy the third preset condition, the first output voltage V O1 is greater than the second output voltage V O2Therefore, the first output circuit 500 is a high-voltage circuit, and the second output circuit 600 is a low-voltage circuit. In this way, the freewheeling sequence determination circuit 110 determines that the low-voltage circuit is the first freewheeling circuit and the high-voltage circuit is the second freewheeling circuit, so that the voltage Vds across the primary switch Q1 does not trigger the detection threshold. Thus, it is possible to prevent the flyback converter 1000 from entering an abnormal operating state and improve the anti-interference performance of the flyback converter 1000.

[0183] In some examples, the first preset condition is that the first output voltage V O1 is less than the second output voltage V O2 . The second preset condition is that the first feedback voltage V FB1 is less than the second preset voltage V FBL , and the second feedback voltage V FB2 is greater than the first preset voltage V FBH . The third preset condition is that the first feedback voltage V FB1 is greater than the first preset voltage V FBH , and the second feedback voltage V FB2 is less than the second preset voltage V FBL .

[0184] Based on the description of the above embodiments, exemplary, a possible implementation manner of the first power determination circuit 121. As Figure 9 shown, the first power determination circuit 121 may include: a first operational amplifier EA1, a second comparator Compa2, a first capacitor C1, a first resistor R1, a first switch tube S1, and a second switch tube S2.

[0185] The non-inverting input terminal of the first operational amplifier EA1 is used to connect to the first reference voltage Vref1. The inverting input terminal of the first operational amplifier EA1 and the first plate of the first capacitor C1 are both electrically connected to the output terminal of the first output circuit 500. The second plate of the first capacitor C1 is electrically connected to the first end of the first resistor R1. The output terminal of the first operational amplifier EA1 is respectively electrically connected to the first end of the first switch tube S1, the first end of the second switch tube S2, and the second end of the first resistor R1. The second end of the first switch tube S1 is respectively electrically connected to the non-inverting input terminal of the second comparator Compa2 and the first end of the second power determination circuit 122. The inverting input terminal of the second comparator Compa2 is used to connect to the first preset voltage V FBH , the output terminal of the second comparator Compa2 is electrically connected to the second input terminal of the freewheeling sequence determination circuit 110. The second end of the second switch tube S2 is electrically connected to the second end of the second power determination circuit 122. The control terminals of the first switch tube S1 and the second switch tube S2 are used to connect to the first control signal, and the first control signal is used to control the turning on or off of the first switch tube S1 and the second switch tube S2 according to the first comparison result.

[0186] Among them, the negative input terminal of the first operational amplifier EA1 is the input terminal of the first power determination circuit 121, the output terminal of the second comparator Compa2 is the output terminal of the first power determination circuit 121, the second terminal of the first switching transistor S1 is the first terminal of the first power determination circuit 121, and the second terminal of the second switching transistor S2 is the second terminal of the first power determination circuit 121.

[0187] Among them, the first switching transistor S1 and the second switching transistor S2 may include, but are not limited to, gallium nitride transistors, bipolar junction transistors, insulated gate bipolar transistors, metal-oxide semiconductor field effect transistors, field-controlled thyristors, gate turn-off thyristors, and transmission gates.

[0188] For example, when the first switching transistor S1 and the second switching transistor S2 are gallium nitride transistors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the gates of the gallium nitride transistors. The first terminals of the first switching transistor S1 and the second switching transistor S2 may be the drains or sources of the gallium nitride transistors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 may be the sources or drains of the gallium nitride transistors.

[0189] For example, when the first switching transistor S1 and the second switching transistor S2 are bipolar junction transistors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the bases of the bipolar junction transistors. The first terminals of the first switching transistor S1 and the second switching transistor S2 may be the collectors or emitters of the bipolar junction transistors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 may be the emitters or collectors of the bipolar junction transistors.

[0190] For example, when the first switching transistor S1 and the second switching transistor S2 are insulated gate bipolar transistors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the gates of the insulated gate bipolar transistors. The first terminals of the first switching transistor S1 and the second switching transistor S2 may be the collectors or emitters of the insulated gate bipolar transistors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 may be the emitters or collectors of the insulated gate bipolar transistors.

[0191] For example, when the first switching transistor S1 and the second switching transistor S2 are metal-oxide semiconductor field effect transistors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the gates of the metal-oxide semiconductor field effect transistors. The first terminals of the first switching transistor S1 and the second switching transistor S2 may be the drains or sources of the metal-oxide semiconductor field effect transistors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 may be the sources or drains of the metal-oxide semiconductor field effect transistors.

[0192] For example, when the first switching transistor S1 and the second switching transistor S2 are field-controlled thyristors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the gates of the field-controlled thyristors. The first terminals of the first switching transistor S1 and the second switching transistor S2 can be the drains or sources of the field-controlled thyristors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 can be the sources or drains of the field-controlled thyristors.

[0193] For example, when the first switching transistor S1 and the second switching transistor S2 are gate turn-off thyristors, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the gates of the gate turn-off thyristors. The first terminals of the first switching transistor S1 and the second switching transistor S2 can be the cathodes or anodes of the gate turn-off thyristors. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 can be the cathodes or anodes of the gate turn-off thyristors.

[0194] For example, when the first switching transistor S1 and the second switching transistor S2 are transmission gates, the control terminals of the first switching transistor S1 and the second switching transistor S2 refer to the ports for accessing gate control signals of the transmission gates. The first terminals of the first switching transistor S1 and the second switching transistor S2 can be the input terminals or output terminals of the transmission gates. Correspondingly, the second terminals of the first switching transistor S1 and the second switching transistor S2 can be the input terminals or output terminals of the transmission gates.

[0195] Wherein, when the first comparison result indicates that the first output voltage V O1 is greater than the second output voltage V O2 , the first control signal controls the first switching transistor S1 to conduct and the second switching transistor S2 to turn off. When the first comparison result indicates that the first output voltage V O1 is less than the second output voltage V O2 , the first control signal controls the first switching transistor S1 to turn off and the second switching transistor S2 to conduct.

[0196] The first operational amplifier EA1 can amplify the voltage difference between the first output voltage V O1 and the first reference voltage Vref1, and obtain the first feedback voltage V FB1 under the compensation of the first resistor R1 and the first capacitor C1, and transmit the first feedback voltage V FB1 to the second comparator Compa2, so that the second comparator Compa2 can obtain the first feedback voltage V FB1 .

[0197] In this way, the second comparator Compa2 can compare the magnitudes of the first feedback voltage V FB1 and the first preset voltage V FBH to obtain a second comparison result. Alternatively, the second comparator Compa2 can obtain a second feedback voltage V FB2 from the second power determination circuit 122。And, the second comparator Compa2 can compare the second feedback voltage V FB2 with the first preset voltage V FBH to obtain a second comparison result.

[0198] Thus, the first power determination circuit 121 can compare the first feedback voltage V FB1 and the first preset voltage V FBH or compare the second feedback voltage V FB2 and the first preset voltage V FBH to obtain a second comparison result.

[0199] In summary, the first operational amplifier can amplify the voltage difference between the first output voltage and the first reference voltage, and obtain the first feedback voltage under the compensation of the first resistor and the first capacitor, and transmit the first feedback voltage to the second comparator, so that the second comparator can obtain the first feedback voltage. The second comparator can compare the magnitudes of the first feedback voltage and the first preset voltage to obtain a second comparison result, or obtain the second feedback voltage from the second power determination circuit and compare the second feedback voltage with the first preset voltage to obtain a second comparison result. Thus, the first power determination circuit can obtain the second comparison result.

[0200] Based on the description of the above embodiments, exemplarily, a possible implementation manner of the second power determination circuit 122. As Figure 9 shown, the second power determination circuit 122 may include: a second operational amplifier EA2, a third comparator Compa3, a second capacitor C2, a second resistor R2, a third switch tube S3, and a fourth switch tube S4.

[0201] The non-inverting input terminal of the second operational amplifier EA2 is used to connect to the second reference voltage Vref2. The inverting input terminal of the second operational amplifier EA2 and the first plate of the second capacitor C2 are both electrically connected to the output terminal of the second output circuit 600. The second plate of the second capacitor C2 is electrically connected to the first end of the second resistor R2. The output terminal of the second operational amplifier EA2 is respectively electrically connected to the first end of the third switch tube S3, the first end of the fourth switch tube S4, and the second end of the second resistor R2. The second end of the third switch tube S3 is electrically connected to the first end of the first power determination circuit 121. The second end of the fourth switch tube S4 is respectively electrically connected to the inverting input terminal of the third comparator Compa3 and the second end of the first power determination circuit 121. The inverting input terminal of the third comparator Compa3 is used to connect to the second preset voltage V FBL, the output terminal of the second comparator Compa2 is electrically connected to the third input terminal of the freewheeling sequence determination circuit 110. The control terminals of the third switch S3 and the fourth switch S4 are used to receive a second control signal, and the second control signal is used to control the turning on or off of the third switch S3 and the fourth switch S4 according to the first comparison result.

[0202] Among them, the negative input terminal of the second operational amplifier EA2 is the input terminal of the second power determination circuit 122, the output terminal of the second comparator Compa2 is the output terminal of the second power determination circuit 122, the second terminal of the third switch S3 is the first terminal of the second power determination circuit 122, and the second terminal of the fourth switch S4 is the second terminal of the second power determination circuit 122.

[0203] Among them, the third switch S3 and the fourth switch S4 may include, but are not limited to, gallium nitride transistors, bipolar junction transistors, insulated gate bipolar transistors, metal-oxide semiconductor field effect transistors, field-controlled thyristors, gate turn-off thyristors, and transmission gates.

[0204] For example, when the third switch S3 and the fourth switch S4 are gallium nitride transistors, the control terminals of the third switch S3 and the fourth switch S4 refer to the gates of the gallium nitride transistors. The first terminals of the third switch S3 and the fourth switch S4 may be the drains or sources of the gallium nitride transistors. Correspondingly, the second terminals of the third switch S3 and the fourth switch S4 may be the sources or drains of the gallium nitride transistors.

[0205] For example, when the third switch S3 and the fourth switch S4 are bipolar junction transistors, the control terminals of the third switch S3 and the fourth switch S4 refer to the bases of the bipolar junction transistors. The first terminals of the third switch S3 and the fourth switch S4 may be the collectors or emitters of the bipolar junction transistors. Correspondingly, the second terminals of the third switch S3 and the fourth switch S4 may be the emitters or collectors of the bipolar junction transistors.

[0206] For example, when the third switch S3 and the fourth switch S4 are insulated gate bipolar transistors, the control terminals of the third switch S3 and the fourth switch S4 refer to the gates of the insulated gate bipolar transistors. The first terminals of the third switch S3 and the fourth switch S4 may be the collectors or emitters of the insulated gate bipolar transistors. Correspondingly, the second terminals of the third switch S3 and the fourth switch S4 may be the emitters or collectors of the insulated gate bipolar transistors.

[0207] For example, when the third switching transistor S3 and the fourth switching transistor S4 are metal-oxide semiconductor field effect transistors, the control terminals of the third switching transistor S3 and the fourth switching transistor S4 refer to the gates of the metal-oxide semiconductor field effect transistors. The first terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the drains or sources of the metal-oxide semiconductor field effect transistors. Correspondingly, the second terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the sources or drains of the metal-oxide semiconductor field effect transistors.

[0208] For example, when the third switching transistor S3 and the fourth switching transistor S4 are field-controlled thyristors, the control terminals of the third switching transistor S3 and the fourth switching transistor S4 refer to the gates of the field-controlled thyristors. The first terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the drains or sources of the field-controlled thyristors. Correspondingly, the second terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the sources or drains of the field-controlled thyristors.

[0209] For example, when the third switching transistor S3 and the fourth switching transistor S4 are gate turn-off thyristors, the control terminals of the third switching transistor S3 and the fourth switching transistor S4 refer to the gates of the gate turn-off thyristors. The first terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the cathodes or anodes of the gate turn-off thyristors. Correspondingly, the second terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the cathodes or anodes of the gate turn-off thyristors.

[0210] For example, when the third switching transistor S3 and the fourth switching transistor S4 are transmission gates, the control terminals of the third switching transistor S3 and the fourth switching transistor S4 refer to the ports for accessing the gate control signals of the transmission gates. The first terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the input terminals or output terminals of the transmission gates. Correspondingly, the second terminals of the third switching transistor S3 and the fourth switching transistor S4 can be the input terminals or output terminals of the transmission gates.

[0211] Wherein, when the first comparison result indicates that the first output voltage V O1 is greater than the second output voltage V O2 , the second control signal controls the third switching transistor S3 to turn off and the fourth switching transistor S4 to turn on. When the first comparison result indicates that the first output voltage V O1 is less than the second output voltage V O2 , the second control signal controls the third switching transistor S3 to turn on and the fourth switching transistor S4 to turn off.

[0212] The second operational amplifier EA2 can amplify the voltage difference between the second output voltage V O2 and the second reference voltage Vref2, and obtain the second feedback voltage V FB2 under the compensation of the second resistor R2 and the second capacitor C2, and transmit the second feedback voltage V FB2 to the third comparator Compa3., so that the third comparator Compa3 can obtain the second feedback voltage V FB2 .

[0213] In this way, the third comparator Compa3 can compare the second feedback voltage V FB2 with the second preset voltage V FBL to obtain a third comparison result. Alternatively, the third comparator Compa3 can obtain the first feedback voltage V from the first power determination circuit 121 FB1 . And the third comparator Compa3 can compare the first feedback voltage V FB1 with the second preset voltage V FBL to obtain a third comparison result.

[0214] Thus, the second power determination circuit 122 can compare the second feedback voltage V FB2 with the second preset voltage V FBL , or compare the first feedback voltage V FB1 with the second preset voltage V FBL to obtain a third comparison result.

[0215] In summary, the second operational amplifier can amplify the voltage difference between the second output voltage and the second reference voltage, and obtain the second feedback voltage under the compensation of the second resistor and the second capacitor, and transmit the second feedback voltage to the third comparator, so that the third comparator can obtain the second feedback voltage. The third comparator can compare the magnitudes of the second feedback voltage and the second preset voltage to obtain a third comparison result, or obtain the first feedback voltage from the first power determination circuit and compare the magnitudes of the first feedback voltage and the second preset voltage to obtain a third comparison result. Thus, the second power determination circuit can obtain a third comparison result.

[0216] The following combines Figures 12 - 14 , Figures 12 - 14 both show Figure 9 schematic diagrams of the working waveforms of the flyback converter in

[0217] As Figure 12 shown, in DCM, since the first output voltage V O1 < the second output voltage V O2 , the first feedback voltage V FB1 > the second preset voltage V FBL and the second feedback voltage V FB2 < the first preset voltage V FBH . Therefore, the output control circuit 100 can determine that the first output circuit 500 is the first freewheeling loop and the second output circuit 600 is the second freewheeling loop.

[0218] During the time periods t0 - t1 and t6 - t7, the primary switch Q1 is in the on state, and the magnetizing inductor current Imag linearly increases. During this time period, that is, during the conduction of the primary switch Q1, the second output circuit 600 as the second freewheeling circuit is turned off and the first output circuit 500 as the first freewheeling circuit is turned on and completed.

[0219] At time t1 and time t7, the primary switch Q1 is turned off and the first secondary switch Q2 is turned on.

[0220] During the time periods t1 - t2 and t7 - t8, the magnetizing inductor current Imag supplies energy to the first output circuit 500. During this time period, the voltage Vds across the primary switch Q1 is Vin + NV O1 . Where N is Np / Ns.

[0221] At time t2 and time t8, the first output circuit 500 is turned off and the second output circuit 600 is turned on.

[0222] During the time periods t2 - t3 and t8 - t9, the magnetizing inductor current Imag continues to supply energy to the second output circuit 600. During this time period, the voltage Vds across the primary switch Q1 is Vin + NV O2 .

[0223] At time t3 and time t9, the magnetizing inductor current Imag crosses zero and the first secondary switch Q2 is turned off.

[0224] During the time period t3 - t4, the flyback converter 1000 enters the free resonance state.

[0225] During the time period t4 - t5, before the primary switch Q1 changes from off to on, that is, before the primary switch Q1 is turned on again, the first secondary switch Q2 conducts for a preset duration. Since the second output circuit 600 is still in the on state during this time period. Therefore, the output control circuit 100 can control the second output circuit 600 to reverse - magnetize the magnetizing inductor of the transformer T, enabling the primary switch Q1 to achieve zero - voltage turn - on. Among them, this time period is the preset duration.

[0226] As Figure 13 shown, in DCM, since the first output voltage V O1 < the second output voltage V O2 , the first feedback voltage V FB1 < the second preset voltage V FBL and the second feedback voltage V FB2 > the first preset voltage V FBHTherefore, the output control circuit 100 can determine that the second output circuit 600 is the first freewheeling loop and the first output circuit 500 is the second freewheeling loop.

[0227] During the time periods t0 - t1 and t6 - t7, the primary switch Q1 is in the conducting state, and the magnetizing inductor current Imag increases linearly. During this time period, that is, during the conduction of the primary switch Q1, the first output circuit 500, which is the second freewheeling loop, turns off and the second output circuit 600, which is the first freewheeling loop, completes conduction.

[0228] At time t1 and t7, the primary switch Q1 turns off and the first secondary switch Q2 turns on.

[0229] During the time periods t1 - t2 and t7 - t8, the magnetizing inductor current Imag supplies energy to the second output circuit 600. During this time period, the voltage Vds across the primary switch Q1 is Vin + NV O2 . Where N is Np / Ns.

[0230] At time t2 and t8, the second output circuit 600 turns off and the first output circuit 500 turns on.

[0231] During the time periods t2 - t3 and t8 - t9, the magnetizing inductor current Imag continues to supply energy to the first output circuit 500. During this time period, the voltage Vds across the primary switch Q1 is Vin + NV O1 .

[0232] At time t3 and t9, the magnetizing inductor current Imag crosses zero and the first secondary switch Q2 turns off.

[0233] During the time period t3 - t4, the flyback converter 1000 enters the free resonance state.

[0234] During the time period t4 - t5, before the primary switch Q1 changes from off to on, that is, before the primary switch Q1 conducts again, the first secondary switch Q2 conducts for a preset duration. Since the first output circuit 500 is still in the conducting state during this time period. Therefore, the output control circuit 100 can control the first output circuit 500 to reverse - magnetize the magnetizing inductor of the transformer T, enabling the primary switch Q1 to achieve zero - voltage conduction. Among them, this time period is the preset duration.

[0235] As Figure 14 shown, in CCM, since the first output voltage V O1 < the second output voltage V O2 , the first feedback voltage V FB1 > the second preset voltage V FBL and the second feedback voltage V FB2 > the first preset voltage VFBH Therefore, the output control circuit 100 can determine that the first output circuit 500 is a first freewheeling loop, and the second output circuit 600 is a second freewheeling loop.

[0236] During the time periods t0-t1, t3-t4 and t6-t7, the primary switch tube Q1 is in the on state, and the excitation inductor current Imag rises linearly. During this time period, i.e., during the on-time of the primary switch tube Q1, the second output circuit 600 as the second freewheeling loop is turned off, and the first output circuit 500 as the first freewheeling loop is turned on.

[0237] At time t1, time t4 and time t7, the primary switch tube Q1 is turned off, and the secondary switch tube Q2 is turned on.

[0238] During the time periods t1-t2, t4-t5 and t7-t8, the magnetizing inductor current Imag provides energy to the first output circuit 500. During this period, the voltage Vds across the primary switch tube Q1 is Vin+Np / Ns*V O1 .

[0239] At time t2, time t5 and time t8, the first output circuit 500 is turned off and the second output circuit 600 is turned on.

[0240] During the time periods t2-t3, t5-t6 and t8-t9, the magnetizing inductor current Imag continues to provide energy to the second output circuit 600. During this period, the voltage Vds across the primary switch tube Q1 is Vin+Np / Ns*V O2 .

[0241] At time t3, time t6 and time t9, the excitation inductor current Imag is not demagnetized to zero, the first secondary switch tube Q2 is turned off, and the primary switch tube Q1 is turned on.

[0242] Based on the description of the above embodiment, a possible implementation of the first output circuit 500 is exemplified. Figure 3 , Figure 4 and Figure 9 As shown, the first output circuit 500 may include: a second secondary switch tube Q3, a third secondary switch tube Q4, a first load resistor Rload1 and a first output capacitor Cout1.

[0243] The first end of the second secondary switch tube Q3 is electrically connected to the same-name end of the secondary winding. The second end of the second secondary switch tube Q3 is electrically connected to the first end of the third secondary switch tube Q4. The control ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 are both electrically connected to the output end of the output control circuit 100. The second end of the third secondary switch tube Q4 is respectively electrically connected to the first plate of the first output capacitor Cout1, the first end of the first output capacitor Cout1, and the first input end of the output control circuit 100. The second plate of the first output capacitor Cout1 and the first end of the first output capacitor Cout1 are both grounded.

[0244] Wherein, the second secondary switch tube Q3 and the third secondary switch tube Q4 may include, but are not limited to, gallium nitride transistors, bipolar junction transistors, insulated gate bipolar transistors, metal-oxide semiconductor field effect transistors, field-controlled thyristors, gate turn-off thyristors, and transmission gates.

[0245] For example, when the second secondary switch tube Q3 and the third secondary switch tube Q4 are gallium nitride transistors, the control ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 refer to the gates of the gallium nitride transistors. The first ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the drains or sources of the gallium nitride transistors. Correspondingly, the second ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the sources or drains of the gallium nitride transistors.

[0246] For example, when the second secondary switch tube Q3 and the third secondary switch tube Q4 are bipolar junction transistors, the control ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 refer to the bases of the bipolar junction transistors. The first ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the collectors or emitters of the bipolar junction transistors. Correspondingly, the second ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the emitters or collectors of the bipolar junction transistors.

[0247] For example, when the second secondary switch tube Q3 and the third secondary switch tube Q4 are insulated gate bipolar transistors, the control ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 refer to the gates of the insulated gate bipolar transistors. The first ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the collectors or emitters of the insulated gate bipolar transistors. Correspondingly, the second ends of the second secondary switch tube Q3 and the third secondary switch tube Q4 may be the emitters or collectors of the insulated gate bipolar transistors.

[0248] For example, when the second secondary switch Q3 and the third secondary switch Q4 are metal-oxide-semiconductor field effect transistors, the control terminals of the second secondary switch Q3 and the third secondary switch Q4 refer to the gates of the metal-oxide-semiconductor field effect transistors. The first terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the drains or sources of the metal-oxide-semiconductor field effect transistors. Correspondingly, the second terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the sources or drains of the metal-oxide-semiconductor field effect transistors.

[0249] For example, when the second secondary switch Q3 and the third secondary switch Q4 are field-controlled thyristors, the control terminals of the second secondary switch Q3 and the third secondary switch Q4 refer to the gates of the field-controlled thyristors. The first terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the drains or sources of the field-controlled thyristors. Correspondingly, the second terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the sources or drains of the field-controlled thyristors.

[0250] For example, when the second secondary switch Q3 and the third secondary switch Q4 are gate turn-off thyristors, the control terminals of the second secondary switch Q3 and the third secondary switch Q4 refer to the gates of the gate turn-off thyristors. The first terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the cathodes or anodes of the gate turn-off thyristors. Correspondingly, the second terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the cathodes or anodes of the gate turn-off thyristors.

[0251] For example, when the second secondary switch Q3 and the third secondary switch Q4 are transmission gates, the control terminals of the second secondary switch Q3 and the third secondary switch Q4 refer to the ports for accessing the gate control signals of the transmission gates. The first terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the input or output terminals of the transmission gates. Correspondingly, the second terminals of the second secondary switch Q3 and the third secondary switch Q4 can be the input or output terminals of the transmission gates.

[0252] In addition, the second secondary switch Q3 and the third secondary switch Q4 can be replaced by a bidirectional gallium nitride (Bi-directional GaN).

[0253] Based on the description of the above embodiments, exemplarily, a possible implementation of the second output circuit 600. As Figure 3 、 Figure 4 and Figure 9 shown, the first output circuit 600 can include: a fourth secondary switch Q5, a fifth secondary switch Q6, a second load resistor Rload2, and a second output capacitor Cout2.

[0254] The first end of the fourth secondary switching transistor Q5 is electrically connected to the opposite-named end of the secondary winding. The second end of the fourth secondary switching transistor Q5 is electrically connected to the first end of the fifth secondary switching transistor Q6. The control ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are both electrically connected to the output end of the output control circuit 100. The fourth control signal is used to control the conduction or cutoff of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6. The second end of the fifth secondary switching transistor Q6 is respectively electrically connected to the first plate of the second output capacitor Cout2, the first end of the second output capacitor Cout2, and the second input end of the output control circuit 100. The second plate of the second output capacitor Cout2 and the first end of the second output capacitor Cout2 are both grounded.

[0255] Among them, the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 may include, but are not limited to, gallium nitride transistors, bipolar junction transistors, insulated gate bipolar transistors, metal-oxide semiconductor field effect transistors, field-controlled thyristors, gate turn-off thyristors, and transmission gates.

[0256] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are gallium nitride transistors, the control ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the gates of the gallium nitride transistors. The first ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the drains or sources of the gallium nitride transistors. Correspondingly, the second ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the sources or drains of the gallium nitride transistors.

[0257] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are bipolar junction transistors, the control ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the bases of the bipolar junction transistors. The first ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the collectors or emitters of the bipolar junction transistors. Correspondingly, the second ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the emitters or collectors of the bipolar junction transistors.

[0258] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are insulated gate bipolar transistors, the control ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the gates of the insulated gate bipolar transistors. The first ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the collectors or emitters of the insulated gate bipolar transistors. Correspondingly, the second ends of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the emitters or collectors of the insulated gate bipolar transistors.

[0259] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are metal-oxide-semiconductor field effect transistors, the control terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the gates of the metal-oxide-semiconductor field effect transistors. The first terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the drains or sources of the metal-oxide-semiconductor field effect transistors. Correspondingly, the second terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the sources or drains of the metal-oxide-semiconductor field effect transistors.

[0260] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are field-controlled thyristors, the control terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the gates of the field-controlled thyristors. The first terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the drains or sources of the field-controlled thyristors. Correspondingly, the second terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the sources or drains of the field-controlled thyristors.

[0261] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are gate-turn-off thyristors, the control terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the gates of the gate-turn-off thyristors. The first terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the cathodes or anodes of the gate-turn-off thyristors. Correspondingly, the second terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the cathodes or anodes of the gate-turn-off thyristors.

[0262] For example, when the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 are transmission gates, the control terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 refer to the ports for accessing the gate control signals of the transmission gates. The first terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the input terminals or output terminals of the transmission gates. Correspondingly, the second terminals of the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be the input terminals or output terminals of the transmission gates.

[0263] In addition, the fourth secondary switching transistor Q5 and the fifth secondary switching transistor Q6 can be replaced by a bidirectional gallium nitride (Bi-directional GaN).

[0264] Based on the description of the above embodiments, an exemplary possible implementation of the absorption circuit 700 is as follows. As Figure 3 、 Figure 4 and Figure 9 shown, the absorption circuit 700 may include: a capacitor Cclamp, a resistor Rclamp, and a diode D.

[0265] The first plate of the capacitor Cclamp and the first end of the resistor Rclamp are both electrically connected to the first end of the inductor Lk. The second plate of the capacitor Cclamp and the second end of the resistor Rclamp are both electrically connected to the negative electrode of the diode D. The positive electrode of the diode D is electrically connected to the same-name end of the primary winding.

[0266] Among them, the input voltage can be provided by the input capacitor Cin.

[0267] Among them, the first secondary switching transistor Q2 can be a rectifier for a low-side synchronous rectification configuration or a rectifier for a high-side synchronous rectification configuration. The embodiments of the present application do not make specific limitations thereto.

[0268] Among them, the isolation communication circuit 300 may include, but is not limited to: an optocoupler, capacitive isolation, and inductive isolation.

[0269] Among them, the secondary controller 200 can be a synchronous rectification controller, a protocol controller, or a device after combining a synchronous rectification controller and a protocol controller. The embodiments of the present application do not make specific limitations thereto.

[0270] Finally, it should be noted that the above embodiments are only specific implementation manners of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An output control circuit, characterized in that: The output control circuit is applied to a flyback converter, and the flyback converter comprises: a first output circuit and a second output circuit; a first input end of the output control circuit is electrically connected to an output end of the first output circuit, a second input end of the output control circuit is electrically connected to an output end of the second output circuit, and an output end of the output control circuit is electrically connected to a control end of the first output circuit and a control end of the second output circuit respectively; The output control circuit is used to obtain a first output voltage from the first output circuit and a second output voltage from the second output circuit, and to determine a first freewheeling loop and a second freewheeling loop in the first output circuit and the second output circuit according to the first output voltage and the second output voltage in each switching cycle.

2. The output control circuit according to claim 1, characterized in that: The output control circuit comprises: a freewheeling sequence determination circuit and a first comparator; The first input end of the first comparator is electrically connected to the output end of the first output circuit, the second input end of the first comparator is electrically connected to the output end of the second output circuit, the output end of the first comparator is electrically connected to the input end of the freewheeling sequence determination circuit, and the output end of the freewheeling sequence determination circuit is electrically connected to the control end of the first output circuit and the control end of the second output circuit respectively; The first comparator is used to compare the first output voltage and the second output voltage to obtain a first comparison result, and transmit the first comparison result to the freewheeling sequence determination circuit; The freewheeling sequence determination circuit is used to determine the first freewheeling loop and the second freewheeling loop in the first output circuit and the second output circuit according to the first comparison result.

3. The output control circuit according to claim 2, characterized in that: The freewheeling sequence determination circuit is used to determine that the first output circuit is the first freewheeling circuit and the second output circuit is the second freewheeling circuit, or to determine that the second output circuit is the first freewheeling circuit and the first output circuit is the second freewheeling circuit when the first comparison result indicates that the first output voltage is less than the second output voltage; or, The freewheeling sequence determination circuit is used to determine that the second output circuit is the first freewheeling circuit and the first output circuit is the second freewheeling circuit when the first comparison result indicates that the first output voltage is greater than the second output voltage, or to determine that the first output circuit is the first freewheeling circuit and the second output circuit is the second freewheeling circuit.

4. The output control circuit according to claim 1, characterized in that: The output control circuit comprises: a freewheeling sequence determination circuit, a power determination circuit and a first comparator; The first input end of the first comparator and the first input end of the power determination circuit are both electrically connected to the output end of the first output circuit, the second input end of the first comparator and the second input end of the power determination circuit are both electrically connected to the output end of the second output circuit, the output end of the first comparator is electrically connected to the first input end of the freewheeling sequence determination circuit, the output end of the power determination circuit is electrically connected to the second input end of the freewheeling sequence determination circuit, and the output end of the freewheeling sequence determination circuit is electrically connected to the control end of the first output circuit and the control end of the second output circuit respectively; The first comparator is used to compare the first output voltage and the second output voltage to obtain a first comparison result, and transmit the first comparison result to the freewheeling sequence determination circuit; The power determination circuit is used to obtain a power determination result according to the first output voltage and the second output voltage, and transmit the power determination result to the freewheeling sequence determination circuit; The freewheeling sequence determination circuit is used to determine the first freewheeling loop and the second freewheeling loop in the first output circuit and the second output circuit according to the first comparison result and the power determination result.

5. The output control circuit according to claim 4, characterized in that: The power determination circuit comprises: a first power determination circuit and a second power determination circuit; The input end of the first power determination circuit is electrically connected to the output end of the first output circuit, the input end of the second power determination circuit is electrically connected to the output end of the second output circuit, the output end of the first power determination circuit and the output end of the second power determination circuit are both electrically connected to the second input end of the freewheeling sequence determination circuit, the first end of the first power determination circuit is electrically connected to the first end of the second power determination circuit, and the second end of the first power determination circuit is electrically connected to the second end of the second power determination circuit; The first power determination circuit is used to obtain a first feedback voltage according to the first output voltage, and the first feedback voltage is used to characterize the magnitude of the power of the first output circuit; The second power determination circuit is used to obtain a second feedback voltage according to the second output voltage, and the second feedback voltage is used to characterize the magnitude of the power of the second output circuit; The first power determination circuit is further used to compare the first feedback voltage and the first preset voltage when the first output voltage is greater than the second output voltage to obtain a second comparison result, the power determination result comprising: the second comparison result and a third comparison result, the first preset voltage being used to determine whether the load of the first output circuit or the load of the second output circuit is heavy load; The second power determination circuit is further used to compare the second feedback voltage and the second preset voltage to obtain the third comparison result when the first output voltage is greater than the second output voltage, and the second preset voltage is used to determine whether the load of the first output circuit or the load of the second output circuit is light load; or, The first power determination circuit is further configured to obtain the second feedback voltage from the second power determination circuit when the first output voltage is less than the second output voltage, and compare the second feedback voltage with the first preset voltage to obtain the second comparison result; The second power determination circuit is further used to obtain the first feedback voltage from the first power determination circuit when the first output voltage is less than the second output voltage, and compare the first feedback voltage with the second preset voltage to obtain the third comparison result.

6. The output control circuit according to claim 5, characterized in that: The freewheeling sequence determination circuit is specifically used to determine whether the second comparison result and the third comparison result meet a second preset condition when the first comparison result meets a first preset condition; If the second preset condition is met, the second output circuit is determined as the first freewheeling loop, and the first output circuit is determined as the second freewheeling loop; If the second preset condition is not met, the first output circuit is determined as the first freewheeling loop, and the second output circuit is determined as the second freewheeling loop; or, The freewheeling sequence determination circuit is specifically used to determine whether the second comparison result and the third comparison result meet a third preset condition when the first comparison result does not meet the first preset condition; If the third preset condition is met, the first output circuit is determined as the first freewheeling loop, and the second output circuit is determined as the second freewheeling loop; If the third preset condition is not met, the second output circuit is determined as the first freewheeling loop, and the first output circuit is determined as the second freewheeling loop.

7. The output control circuit according to claim 5, characterized in that: The first power determination circuit includes: a first operational amplifier, a second comparator, a first capacitor, a first resistor, a first switch tube and a second switch tube; The positive phase input terminal of the first operational amplifier is used to access the first reference voltage, the negative phase input terminal of the first operational amplifier and the first plate of the first capacitor are both electrically connected to the output terminal of the first output circuit, the second plate of the first capacitor is electrically connected to the first end of the first resistor, the output terminal of the first operational amplifier is electrically connected to the first end of the first switch tube, the first end of the second switch tube and the second end of the first resistor respectively, the second end of the first switch tube is electrically connected to the positive phase input terminal of the second comparator and the first end of the second power determination circuit respectively, the negative phase input terminal of the second comparator is used to access the first preset voltage, the output terminal of the second comparator is electrically connected to the second input terminal of the freewheeling sequence determination circuit, the second end of the second switch tube is electrically connected to the second end of the second power determination circuit, the control terminal of the first switch tube and the control terminal of the second switch tube are used to access the first control signal, and the first control signal is used to control the first switch tube and the second switch tube to be turned on or off according to the first comparison result; The first operational amplifier is used to amplify the voltage difference between the first output voltage and the first reference voltage, obtain the first feedback voltage under compensation by the first resistor and the first capacitor, and transmit the first feedback voltage to the second comparator; The second comparator is used to compare the first feedback voltage with the first preset voltage to obtain the second comparison result, or to obtain the second feedback voltage from the second power determination circuit and compare the second feedback voltage with the first preset voltage to obtain the second comparison result.

8. The output control circuit according to claim 5, characterized in that: The second power determination circuit includes: a second operational amplifier, a third comparator, a second capacitor, a second resistor, a third switch tube and a fourth switch tube; The positive phase input terminal of the second operational amplifier is used to access the second reference voltage, the negative phase input terminal of the second operational amplifier and the first electrode plate of the second capacitor are both electrically connected to the output terminal of the second output circuit, the second electrode plate of the second capacitor is electrically connected to the first end of the second resistor, the output terminal of the second operational amplifier is electrically connected to the first end of the third switch tube, the first end of the fourth switch tube and the second end of the second resistor respectively, the second end of the third switch tube is electrically connected to the first end of the first power determination circuit, the second end of the fourth switch tube is electrically connected to the negative phase input terminal of the third comparator and the second end of the first power determination circuit respectively, the negative phase input terminal of the third comparator is used to access the second preset voltage, the output terminal of the second comparator is electrically connected to the third input terminal of the freewheeling sequence determination circuit, the control terminal of the third switch tube and the control terminal of the fourth switch tube are used to access the second control signal, and the second control signal is used to control the conduction or shutdown of the third switch tube and the fourth switch tube according to the first comparison result; The second operational amplifier is used to amplify the voltage difference between the second output voltage and the second reference voltage, obtain the second feedback voltage under the compensation of the second resistor and the second capacitor, and transmit the second feedback voltage to the third comparator; The third comparator is used to compare the second feedback voltage and the second preset voltage to obtain the third comparison result, or to obtain the first feedback voltage from the first power determination circuit and compare the first feedback voltage and the second preset voltage to obtain the third comparison result.

9. The output control circuit according to claim 6, characterized in that: The first preset condition is that the first output voltage is less than the second output voltage; the second preset condition is that the first feedback voltage is less than the second preset voltage, and the second feedback voltage is greater than the first preset voltage; The third preset condition is that the first feedback voltage is greater than the first preset voltage, and the second feedback voltage is less than the second preset voltage.

10. The output control circuit according to any one of claims 1 to 9, characterized in that: The flyback converter further includes: a first secondary switch tube, a transformer and a primary switch tube; The output control circuit is also used to control the second freewheeling loop to reversely excite the transformer within a preset duration of the first secondary switch tube being turned on, after the excitation inductance current in the transformer passes through zero and before the primary switch tube changes from being turned off to being turned on.

11. A flyback converter, characterized in that: The flyback converter comprises: a primary switch tube, an inductor, an absorption circuit, a primary controller, a secondary controller, a transformer, a first secondary switch tube, a first output circuit, a second output circuit, an isolation communication circuit and an output control circuit according to any one of claims 1 to 10; The first end of the inductor and the first end of the absorption circuit are both used to access the input voltage, the second end of the inductor is electrically connected to the opposite end of the primary winding of the transformer, the first end of the primary switch tube and the second end of the absorption circuit are both electrically connected to the same end of the primary winding, the control end of the primary switch tube is electrically connected to the first end of the primary controller, the second end of the primary controller is electrically connected to the first end of the isolated communication circuit, the second end of the isolated communication circuit is electrically connected to the first end of the secondary controller, the second end of the secondary controller is electrically connected to the control end of the first secondary switch tube, the first end of the first secondary switch tube is electrically connected to the opposite end of the secondary winding of the transformer, and the The same-name terminals are electrically connected to the input terminals of the first output circuit and the second output circuit respectively, the output terminal of the first output circuit is electrically connected to the first input terminal of the output control circuit, the output terminal of the second output circuit is electrically connected to the second input terminal of the output control circuit, the output terminal of the output control circuit is electrically connected to the control terminal of the first output circuit and the control terminal of the second output circuit respectively, the third terminal of the secondary controller is electrically connected to the first terminal of the output control circuit, the second terminal of the first secondary switch tube and the second terminal of the primary switch tube are both grounded, the output terminal of the first output circuit is also used to output a first output voltage, and the output terminal of the second output circuit is also used to output a second output voltage.

12. A chip, characterized in that: include: The output control circuit according to any one of claims 1 to 10, and / or the flyback converter according to claim 11.

13. An electronic device, characterized in that: include: The chip as claimed in claim 12.

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