Inductive current fitting circuit and method and average current sampling circuit
By designing an inductor current fitting circuit, using components such as sampling tubes, error amplifiers and transistors, the problem of low current sampling accuracy in the prior art is solved, and accurate fitting of inductor current and high-precision sampling of the average value is achieved.
Patent Information
- Application Number
- CN202510107039.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-05-27
AI Technical Summary
In the prior art, the sampling current accuracy is not high, and it is difficult to accurately represent the average value of the inductor current throughout the cycle, and it cannot meet the needs in occasions where precise current control is required.
An inductor current fitting circuit is designed, including a sampling tube, an error amplifier, a transistor and a slope control circuit. The transistor control current is adjusted through the error signal output by the error amplifier, thereby fitting the inductor current and providing more accurate average current sampling.
The precise fit of the inductor current is achieved, the average sampling accuracy of the inductor current is improved, and the demand is met in situations where high-precision current control is required.
Smart Images
Figure CN120049868A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of integrated circuit technologies, and in particular, to an inductor current fitting circuit, a method, and an average current sampling circuit applied to a switching converter. Background Art
[0002] Switching converters are widely used in various industrial electronic devices and consumer electronic devices. In a switching converter, the on and off of switching elements in the switching converter can be controlled by different control methods, so as to convert the input voltage received by the switching converter into a suitable output voltage.
[0003] In some control circuits, it is necessary to collect the average current of the circuit for further control of the circuit. In the prior art, usually the current flowing through one of the power switches is sampled, and then the sampled current is filtered to generate the average current. However, each power switch is not 100% on in each cycle. Therefore, the average current obtained by filtering the current flowing through one of the power switches cannot accurately represent the average value of the inductor current in the whole cycle. In some occasions where precise current control is required, such a sampling method has low accuracy and cannot meet the application requirements. Summary of the Invention
[0004] The object of the present invention is to provide an inductor current fitting circuit and method, and an average current sampling circuit to solve the technical problem in the related art that the sampling accuracy is not high and it is difficult to obtain an accurate average current.
[0005] To achieve the above object, according to the first aspect of the embodiments of the present disclosure, an inductor current fitting circuit is provided, which is applied to a switching converter. The switching converter includes a high-side switching transistor, a low-side switching transistor, and an inductor. The common terminal of the high-side switching transistor and the low-side switching transistor serves as a switching node, and the low-side switching transistor is coupled between the switching node and the reference ground. The inductor current fitting circuit includes: a sampling transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the sampling transistor is coupled to the switching node, and the control terminal of the sampling transistor receives the control signal of the low-side switching transistor; an error amplifier having a first input terminal, a second input terminal, and an output terminal, the first input terminal of the error amplifier is coupled to the reference ground, the second input terminal of the error amplifier is coupled to the second terminal of the sampling transistor, and the error amplifier amplifies the difference between the voltage on the second terminal of the sampling transistor and the reference ground to output an error signal at its output terminal; a first transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the first transistor receives a supply voltage, the second terminal of the first transistor is coupled to the second input terminal of the error amplifier, and the control terminal of the first transistor is coupled to the output terminal of the error amplifier; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor receives the supply voltage, the second terminal of the second transistor provides a fitting current signal, and the control terminal of the second transistor is coupled to the control terminal of the first transistor, wherein the fitting current signal represents the current flowing through the inductor; a slope control circuit having a first terminal and a second terminal, the first terminal of the slope control circuit is coupled to the output terminal of the error amplifier, the second terminal of the slope control circuit is coupled to the control terminal of the first transistor, and the slope control circuit samples and holds the value of the error signal as a first value at the moment when the low-side switch is turned on, and generates an adjustment current signal at the second terminal of the slope control circuit according to the first value.
[0006] According to the second aspect of the embodiments of the present disclosure, a method for fitting an inductor current is provided, which is applied to a switching converter. The switching converter includes a high-side switching transistor, a low-side switching transistor, and an inductor. The common terminal of the high-side switching transistor and the low-side switching transistor serves as a switching node, and the low-side switching transistor is coupled between the switching node and the reference ground. One end of the inductor is coupled to the switching node. The method for fitting an inductor current includes: coupling a sampling transistor between the first input terminal of the error amplifier and the switching node, and electrically connecting the second input terminal of the error amplifier to the reference ground; connecting a first transistor in series between the supply voltage and the sampling transistor, and coupling the control terminal of the first transistor and the output terminal of the error amplifier; generating an adjustment current signal according to the voltage on the output terminal of the error amplifier at the moment when the sampling transistor is turned on; sending the value of the adjustment current signal to the control terminal of the first transistor to adjust the voltage of the control terminal of the first transistor; mirroring the current flowing through the first transistor to generate a fitting current of the inductor current.
[0007] According to a third aspect of the embodiments of the present disclosure, an average current sampling circuit is provided, including: the inductance current fitting circuit as described above, which is used to provide a fitting current signal; a filtering circuit that receives the fitting current signal, converts the fitting current signal into a voltage signal, and then filters it to generate a filtered signal, where the filtered signal represents the average value of the inductance current.
[0008] Through the above technical solution, a fitting current signal that accurately fits the inductance current can be provided, and then the average value of the inductance current can be obtained. This sampling scheme is fast and highly accurate. Other features and advantages of the present invention will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The drawings are used to provide a further understanding of the present disclosure, and constitute a part of the specification. Together with the following specific implementation, they are used to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:
[0010] Figure 1 Shown is a schematic diagram of a switching converter 100 with an average current sampling circuit according to an embodiment of the present invention;
[0011] Figure 2 Shown is Figure 1 A waveform schematic diagram of relevant parameters in the shown embodiment;
[0012] Figure 3 According to an embodiment of the present invention, a specific circuit schematic diagram of the inductance current fitting circuit is shown;
[0013] Figure 4 According to another embodiment of the present invention, a specific circuit schematic diagram of the inductance current fitting circuit is shown;
[0014] Figure 5 According to an embodiment of the present invention, a method for fitting the inductance current in a switching converter is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0015] The following will describe in detail the specific implementation of the present disclosure with reference to the drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure. In the following description, terms such as "first" and "second" are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.
[0016] Figure 1 Shown is a schematic diagram of a switching converter 100 with an average current sampling circuit according to an embodiment of the present invention.
[0017] As Figure 1As shown, the switching converter 100 includes a switching circuit 10. The switching circuit 10 includes a power switch and an inductor. By controlling the on and off switching of the power switch, energy storage and release are performed in the inductor, thereby achieving power transmission. The inductor current fitting circuit 20 is used to fit the inductor current iL flowing through the inductor in the switching circuit 10, so that the fitting current Isim is as close as possible to or equal to the actual inductor current iL or is in a proportional relationship with the actual inductor current iL. The filtering circuit 30 is used to convert the fitting current Isim into a voltage signal and then filter it to generate a filtered signal Vavg, and the filtered signal Vavg represents the average current of the inductor current iL. This method generates a more accurate sampled average current and has a wider range of application scenarios.
[0018] The switching circuit 10 includes at least one controllable switch tube. By controlling the on and off switching of the controllable switch, the input voltage signal VIN is converted into an output voltage signal VOUT. In Figure 1 In the illustrated embodiment, in order to more clearly describe the principles of the inductor current fitting circuit, method, and average current sampling circuit disclosed in the present invention, the switching circuit 10 is schematically shown as a buck topology structure formed by connecting a high-side switch tube HS, a low-side switch tube LS, an inductor, and a filter capacitor. The high-side switch tube HS and the low-side switch tube LS are serially coupled between the input end of the switching circuit 10 and the reference ground, and the common node of the high-side switch tube HS and the low-side switch tube LS is marked as the switching node SW. The inductor L is coupled between the switching node SW and the output end of the switching circuit 10. The filter capacitor is coupled between the output end and the reference ground. The control signal HS-on of the high-side switch tube is used to control the on and off time of the high-side switch tube HS, and the LS-on of the low-side switch tube is used to control the on and off time of the low-side switch tube LS. Those of ordinary skill in the art can understand that generally, the control signal HS-on of the high-side switch tube and the control signal LS-on of the low-side switch tube are logically complementary signals. It can be understood that the switching circuit 10 may not be limited to the buck topology and may also be other suitable switching circuit topologies, such as a boost topology, etc.
[0019] The inductor current fitting circuit 20 is coupled to the common node of the high-side switch tube HS and the low-side switch tube LS, that is, the switching node SW, and is used to fit the inductor current iL. Next, a detailed circuit description will be given by taking the sampling of the current flowing through the low-side switch tube LS of the buck as an example. As Figure 1 shown, the inductor current fitting circuit 20 includes a sampling tube Msen, an error amplifier EA, a first transistor M1, a first transistor M2, and a slope control circuit 101.
[0020] The sampling tube Msen has a first end, a second end, and a control end. The first end of the sampling tube Msen is coupled to the switch node SW. Since the sampling tube Msen is set to sample the current flowing through the low-side switch tube LS, the control end of the sampling tube Msen receives the control signal LS-on of the low-side switch tube LS, that is, the sampling tube Msen and the low-side switch tube LS are turned on synchronously.
[0021] The error amplifier EA has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the error amplifier EA is coupled to the reference ground GND. The second input terminal of the error amplifier EA is coupled to the second end of the sampling tube Msen. The error amplifier EA amplifies the difference between the voltage on the second end of the sampling tube and the reference ground GND to output an error signal Vea at its output terminal.
[0022] The first transistor M1 has a first end, a second end, and a control end. The first end of the first transistor M1 receives the supply voltage VCC. The second end of the first transistor M1 is coupled to the second input terminal of the error amplifier EA. The control end of the first transistor M1 is coupled to the output terminal of the error amplifier EA.
[0023] The second transistor M2 has a first end, a second end, and a control end. The first end of the second transistor M2 receives the supply voltage VCC. The second end of the second transistor M2 provides a fitting current signal Isim. The control end of the second transistor M2 is coupled to the control end of the first transistor M1. The fitting current signal Isim is the fitting of the inductor current iL.
[0024] In Figure 1 In the illustrated embodiment, the inductor current fitting circuit 20 further includes a slope control circuit 101. The slope control circuit 101 has a first end and a second end. The first end of the slope control circuit 101 is coupled to the output terminal of the error amplifier. The second end of the slope control circuit is coupled to the control ends of the first transistor M1 and the second transistor M2. The slope control circuit 101 samples and holds the value of the error signal Vea as a first value at the low-side switch conduction moment, and generates an adjustment current signal Ireg at the second end of the slope control circuit 101 according to the first value. Wherein, the value of the adjustment current signal Ireg changes with the change of the first value of the error signal Vea until the first value of the error signal Vea no longer changes at the low-side switch conduction moment, and at this time the value of the adjustment current signal Ireg is also a fixed value. The adjustment current signal Ireg changes the rising slope of the fitting current Isim by adjusting the voltage at the control ends of the first transistor M1 and the second transistor M2, and each adjustment current signal Ireg corresponds to a rising slope of the fitting current Isim.
[0025] In Figure 1In the illustrated embodiment, the high-side switch HS, the low-side switch LS, the sampling transistor Msen, the first transistor M1, and the second transistor M2 are all shown as metal-oxide-semiconductor field effect transistors (MOSFETs), with the first terminal being the source of the MOSFET, the second terminal being the drain of the MOSFET, and the control terminal being the gate of the MOSFET. It can be understood that this does not limit the types of the high-side switch HS, the low-side switch LS, the sampling transistor Msen, the first transistor M1, and the second transistor M2, and they may also include any other suitable controllable semiconductor switch devices.
[0026] Figure 2 As shown Figure 1 Schematic diagrams of waveforms of relevant parameters in the illustrated embodiment. In Figure 2 , from top to bottom, the inductor current signal IL, the high-side switch control signal HS-on, the low-side switch control signal LS-on, the pulse signal on-pls, the inverted pulse signal on-pls-b, the sampling current signal Isen, and the fitted current signal Isim are respectively shown. Below, the embodiments disclosed in the present invention will be further described in conjunction with Figure 1 and Figure 2
[0027] In one embodiment, the fitted current signal Isim includes two segments of current: "low-side switch fitted current" and "high-side switch fitted current". Among them, the "low-side switch fitted current" represents the current flowing through the low-side switch LS, and its value is from the mirror image of the sampling current Isen; the "high-side switch fitted current" represents the current flowing through the high-side switch HS, and its value is fitted according to the value of the regulating current signal Ireg. Since Figure 1 the selected switching circuit 10 is a BUCK switching converter, and the sampling transistor Msen samples the current of the low-side switch LS, so the "low-side switch fitted current" of the fitted current signal Isim is the stage where the inductor current linearly decreases, and the "high-side switch fitted current" is the stage where the inductor current linearly increases. It can be understood that with different switching topologies, the two currents of the fitted current signal Isim are different. For example, if BOOST is selected as the topology of the switching circuit 10, and the sampling transistor Msen also samples the current of the low-side switch of BOOST, then the "low-side switch fitted current" of the fitted current signal Isim is the stage where the current linearly increases, and the "high-side switch fitted current" is the stage where the current linearly decreases.
[0028] In one embodiment, during the conduction of the sampling transistor Msen, the value of the regulating current signal Ireg is zero; when the sampling transistor Msen is turned off, the value of the regulating current signal Ireg changes with the change of the first value of the error signal Vea. The specific implementation circuit will be in Figure 3As shown. Specifically, when the low-side switch LS is conducting, the sampling transistor Msen is also conducting. The first transistor M1 and the error amplifier EA form a feedback loop. When the loop is stable, the voltage Vc at the second end of the sampling transistor Msen is equal to the reference ground potential. Therefore, the sampling current Isen flowing through the sampling transistor Msen is proportional to the current flowing through the low-side switch LS, and the ratio is determined by the on-resistances of the sampling transistor Msen and the low-side switch LS. The second transistor M2 mirrors the sampling current Isen to generate the "low-side switch fitting current" in the fitting current signal Isim. At this time, the fitting current signal Isim is proportional to the current flowing through the low-side switch LS. After the low-side switch LS is turned off, the sampling transistor Msen is also turned off, and no current flows through the sampling transistor Msen. The regulating current signal Ireg will linearly change the voltage VG1 at the control terminal of the first transistor M1, and then control the fitting current signal Isim to change at a certain slope to generate the "high-side switch fitting current" of the fitting current signal Isim. In Figure 1 In the illustrated embodiment, since the first transistor M1 and the first transistor M2 are shown as PMOS transistors, therefore, the regulating current signal Ireg pulls down the gate voltage VG1 of the first PMOS transistor M1, and the gate-source voltage VGS of the first PMOS transistor M1 linearly increases, and the fitting current signal Isim will linearly increase at a certain rising slope. In this embodiment, the rising slope of the fitting current signal Isim increases with the decrease of the first value of the error signal Vea.
[0029] In another embodiment, in the "low-side switch fitting current" section of the fitting current signal Isim, that is, the stage when the sampling transistor Msen is conducting and the current linearly decreases, the value of the regulating current signal Ireg is not zero and also changes with the change of the first value of the error signal Vea. The specific implementation circuit will be shown in Figure 4 As shown. In this embodiment, the inductor current in this stage can be fitted by adjusting the regulating current signal Ireg, rather than being completely generated by the sampling transistor Msen and the error amplifier EA. It is not necessary for the error amplifier EA to calculate the sampling current Isen obtained on the sampling transistor Msen in real time, which reduces the requirements for the error amplifier, has a faster sampling speed and higher accuracy. It can be understood that in this embodiment, the value and current direction of the regulating current signal Ireg in the "low-side switch fitting current" section of the fitting current signal Isim are not equal to the value and current direction of the regulating current signal Ireg in the "high-side switch fitting current" section of the fitting current signal Isim.
[0030] In Figure 1In the illustrated embodiment, at the moment when the low-side switch LS is turned on (the moment of transition from the off state to the on state), the voltage Vb at the first end of the sampling transistor Msen represents the peak value of the inductor current iL, and the voltage difference between the first end and the second end of the sampling transistor Msen is the voltage drop Va generated by the fitted current signal Isim between the first end and the second end of the sampling transistor Msen. Therefore, the voltage Vc at the second end of the sampling transistor Msen is equal to Vb - Va. At this moment, the error signal Vea represents the amplified value of Vb - Va. That is to say: the first value of the error signal Vea represents the difference between the maximum value of the "high-side switch fitted current" and the maximum value of the "low-side switch fitted current". Refer to Figure 2 the waveform of the fitted current signal Isim in Figure 2 . In one cycle, the first value of the error signal Vea represents the difference between point a1 and b; in the next cycle, the first value of the error signal Vea represents the difference between point a2 and b; in the immediately following cycle, the first value of the error signal Vea represents the difference between point a3 and b; as the current rising slope increases, the first value of the error signal Vea becomes smaller and smaller until after N cycles, the difference between aN and b is zero, that is, the maximum value of the "high-side switch fitted current" is equal to the maximum value of the "low-side switch fitted current". In one embodiment, the first value of the error signal Vea changes with the difference between the maximum value of the "high-side switch fitted current" and the maximum value of the "low-side switch fitted current", and when the maximum value of the "high-side switch fitted current" is equal to the maximum value of the "low-side switch fitted current", the first value of the error signal remains a fixed value.
[0031] In yet another embodiment, for example, in a switching converter with a BOOST topology, when the sampling transistor Msen and the low-side switch are turned on, the voltage Vb at the first end of the sampling transistor Msen is the minimum value of the inductor current iL, and at this moment, the high-side switch fitted current is also the minimum value. Therefore, the first value of the error signal Vea represents the difference between the minimum value of the "high-side switch fitted current" and the minimum value of the "low-side switch fitted current" of the fitted current signal Isim. Similarly, the first value of the error signal Vea changes with the difference between the minimum value of the "high-side switch fitted current" and the minimum value of the "low-side switch fitted current" of the fitted current signal Isim, and when the minimum value of the "high-side switch fitted current" and the minimum value of the "low-side switch fitted current" of the fitted current signal Isim are equal, the first value of the error signal remains a fixed value.
[0032] Continuing to refer to Figure 1 , the inductor current fitting circuit 20 further includes a pulse signal generator 102, a first switch transistor S1, and a second switch transistor S2.
[0033] The pulse signal generator 102 is configured to generate a pulse signal on-pls at the moment when the low-side switch LS is turned on, atFigure 1 In the illustrated embodiment, the pulse signal generator 102 receives the control signal LS-on of the low-side switch transistor to generate the pulse signal on-pls. In other embodiments, the pulse signal generator 102 may also generate the pulse signal on-pls according to the control signal HS-on of the high-side switch transistor. In one embodiment, the pulse signal on-pls is a narrow pulse signal with a certain fixed pulse width, generally dozens of ns.
[0034] The first switch transistor S1 has a first end, a second end, and a control end. The first end of the first switch transistor S1 is coupled to the output end of the error amplifier EA. The second end of the first switch transistor S1 is coupled to the control end of the first transistor M1. The control end of the first switch transistor S1 receives the inverted signal on-pls-b of the pulse signal on-pls.
[0035] The second switch transistor S2 has a first end, a second end, and a control end. The first end of the second switch transistor S2 is coupled to the output end of the error amplifier EA. The second end of the second switch transistor S2 is coupled to the first end of the slope control circuit 101. The control end of the second switch transistor S2 receives the pulse signal on-pls.
[0036] At the moment when the low-side switch transistor LS is turned on, the pulse signal on-pls turns on the second switch transistor S2 during its effective pulse width. The slope control circuit 101 samples and holds the first value of the error signal Vea at this time, and then the second switch transistor S2 is turned off. Meanwhile, in this embodiment, in order to make the first value of the error signal Vea sampled by the slope control circuit 101 more accurate, the first switch transistor S1 disconnects the output end of the error amplifier EA and the control end of the first transistor M1 during the effective pulse width of the pulse signal on-pls, so that the first value sampling is not affected by the loop change.
[0037] Continue to refer to Figure 1 , in one embodiment, for loop stability, the inductor current fitting circuit 20 further includes a first capacitor C1, which is coupled between the supply voltage VCC and the control end of the first transistor M1. The first capacitor C1 is used to compensate the loop, so that the voltages on the control ends of the first transistor M1 and the second transistor M2 change slowly, and the loop is more stable.
[0038] Figure 3 According to an embodiment of the present invention, a specific circuit schematic diagram of the inductor current fitting circuit is shown. As Figure 3As shown, the slope control circuit 101 includes a second capacitor C2, a third capacitor C3, a third switch S3, a fourth switch S4, and a current mirror 31. The second capacitor C2 has a first terminal and a second terminal. The first terminal of the second capacitor C2 is coupled to the supply voltage VCC, and the second terminal of the second capacitor C2 is coupled to the output terminal of the error amplifier EA. The third capacitor C3 has a first terminal and a second terminal. The first terminal of the third capacitor C3 is coupled to the supply voltage VCC. The third switch S3 has a first terminal, a second terminal, and a control terminal. The first terminal of the third switch S3 is coupled to the output terminal of the error amplifier through the second switch, the second terminal of the third switch S3 is coupled to the second terminal of the third capacitor C3, and the control terminal of the third switch S3 receives the inverted signal on-pls-b of the pulse signal. The third transistor M3 has a first terminal, a second terminal, and a control terminal. The first terminal of the third transistor M3 receives the supply voltage VCC, and the control terminal of the third transistor M3 is coupled to the second terminal of the third capacitor C3. The current mirror 31 has a first terminal and a second terminal. The first terminal of the current mirror 31 is coupled to the second terminal of the third transistor M3, and after mirroring the current at the second terminal of the third transistor M3, an adjusted current signal Ireg is generated at the second terminal of the current mirror 31. In Figure 3 the embodiment, the current mirror 31 is shown as being composed of a fourth transistor M4 and a fifth transistor M5. The fourth switch S4 has a first terminal, a second terminal, and a control terminal. The first terminal of the fourth switch S4 is coupled to the second terminal of the current mirror 31, the second terminal of the fourth switch S4 is coupled to the control terminal of the first transistor M1, and the control terminal of the fourth switch S4 receives the control signal HS-on of the high-side switch HS.
[0039] At the moment when the low-side switch LS conducts, the pulse signal on-pls turns on the second switch S2, and the inverted signal on-pls-b of the pulse signal on-pls turns off the third switch S3. At this time, one end of the capacitor C2 is coupled to the output terminal of the error amplifier EA, and the voltage on this end is the first value of the error signal Vea, that is, the amplified value of Vb - Va. After the effective pulse width of the pulse signal on-pls ends, the second switch S2 turns off and the third switch S3 turns on. The voltages on the second capacitor C2 and the third capacitor C3 are averaged, that is, the first value information of the error signal Vea will be superimposed on the third capacitor C3, and the voltage on the control terminal of the third transistor M3 will change, thereby controlling the change in the current flowing between the first end and the second end of the third transistor M3. The current mirror 31 mirrors the current at the second end of the third transistor M3 and generates an adjustment current signal Ireg at the second end of the current mirror 31. During the turn-off period of the low-side switch, the fourth switch S4 conducts, and at this time, the adjustment current signal Ireg will be sent to the control terminals of the first transistor M1 and the second transistor M2. It can be understood that here it is shown that the high-side switch control signal HS-on is used to control the conduction and turn-off of the fourth switch S4. In other embodiments, the inverted signal of the low-side switch control signal LS-on can also be used to control the conduction and turn-off of the fourth switch S4, as long as it is ensured that the conduction and turn-off of the fourth switch S4 are synchronized with those of the high-side switch transistor.
[0040] In Figure 3 the illustrated embodiment, since the switch circuit selects the BUCK topology, the value of the adjustment current signal Ireg is used to fit the current flowing through the high-side switch HS, and it is shown that the first transistor M1 and the first transistor M2 are PMOS transistors. Therefore, the adjustment current signal Ireg will linearly pull down the gate voltage VG1 of the first PMOS transistor M1, and the fitting current signal Isim will linearly increase with an ascending slope. This ascending slope changes with the difference between Vb - Va. When the difference between Vb - Va is equal to 0, the first value of the error signal Vea remains unchanged, the voltages on the second capacitor C2 and the third capacitor C3 no longer change, the value of the adjustment current signal Ireg remains unchanged, and therefore the ascending slope of the fitting current signal Isim will no longer change.
[0041] Continuing to refer to Figure 3 , in Figure 3 the illustrated embodiment, a fifth switch S5 is further shown. The fifth switch tube S5 has a first end, a second end, and a control terminal. The first end of the fifth switch tube S5 is electrically connected to the reference ground, the second end of the fifth switch tube S5 is coupled to the second input terminal of the error amplifier EA, and the control terminal of the fifth switch tube S5 receives the control signal HS-on of the high-side switch tube. That is, in this embodiment, when the sampling tube Msen turns off, the fifth switch tube S5 will conduct to pull down the second end of the first transistor M1 to the reference ground.
[0042] Figure 3 The fitting current signal Isim generated by the illustrated embodiment can accurately fit the inductor current iL, and then obtain the average current of the inductor current iL. The average value of the inductor current obtained by this scheme has high accuracy and can meet many occasions that require precise current control.
[0043] Figure 4 According to another embodiment of the present invention, the specific circuit schematic diagram of the inductor current fitting circuit is shown. As Figure 4As shown, the slope control circuit 101 includes a second capacitor C2, a third capacitor C3, a third switch S3, a fourth switch S4, a current mirror 41, a current mirror 42, and a multiplication circuit 43. The second capacitor C2 has a first terminal and a second terminal. The first terminal of the second capacitor C2 is coupled to the supply voltage VCC, and the second terminal of the second capacitor C2 is coupled to the output terminal of the error amplifier EA. The third capacitor C3 has a first terminal and a second terminal. The first terminal of the third capacitor C3 is coupled to the supply voltage VCC. The third switch S3 has a first terminal, a second terminal, and a control terminal. The first terminal of the third switch S3 is coupled to the output terminal of the error amplifier through the second switch, the second terminal of the third switch S3 is coupled to the second terminal of the third capacitor C3, and the control terminal of the third switch S3 receives the inverted signal on-pls-b of the pulse signal. The third transistor M3 has a first terminal, a second terminal, and a control terminal. The first terminal of the third transistor M3 receives the supply voltage VCC, and the control terminal of the third transistor M3 is coupled to the second terminal of the third capacitor C3. The current mirror 41 has a first terminal, a second terminal, and a third terminal. The first terminal of the current mirror 41 is coupled to the second terminal of the third transistor M3, and after mirroring the current at the second terminal of the third transistor M3, a first regulated current signal Ireg1 is generated at the second terminal and the third terminal of the current mirror 41 respectively. In this embodiment, the current mirror 41 is shown as being composed of a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. The fourth switch S4 has a first terminal, a second terminal, and a control terminal. The first terminal of the fourth switch S4 is coupled to the second terminal of the current mirror 31, the second terminal of the fourth switch S4 is coupled to the control terminal of the first transistor M1, and the control terminal of the fourth switch S4 receives the control signal HS-on of the high-side switch HS. The current mirror 42 has a first terminal and a second terminal. The first terminal of the current mirror 42 is coupled to the second terminal of the current mirror 41, and after mirroring the first regulated current signal Ireg1, a second regulated current signal Ireg2 is generated at its second terminal. In this embodiment, the current mirror 42 is shown as being composed of a seventh transistor M7 and an eighth transistor M8. The multiplication circuit 43 receives the second regulated current signal Ireg2 and multiplies the second regulated current signal Ireg2 by a first coefficient to generate a third regulated current signal Ireg3, where the first coefficient is the duty cycle D of the fourth switch S4. It can be understood that the duty cycle D of the fourth switch S4 is: in a switching cycle, the proportion of the time when the fourth switch S4 is conducting in the entire switching cycle.
[0044] In Figure 4In the illustrated embodiment, the regulation current signal Ireg generated by the entire slope control circuit 101 is equal to the difference between the third regulation current signal Ireg3 and the current signal flowing through the fourth switching transistor S4. Specifically, when the fourth switching transistor S4 is turned off, the current signal flowing through it is zero. Therefore, the regulation current signal generated by the entire slope control circuit 101 is equal to the third regulation current signal Ireg3. When the fourth switching transistor S4 is turned on, the current signal flowing through it is the first regulation current signal Ireg1. Therefore, the regulation current signal generated by the entire slope control circuit 101 is equal to the third regulation current signal Ireg3 minus the first regulation current signal Ireg1. Since the third regulation current signal Ireg3 is calculated based on the first regulation current signal Ireg1 and the duty cycle D, in this embodiment, in addition to being able to fit the current flowing through the high-side switch, the current flowing through the low-side switch can also be accurately calculated based on the fitted current of the high-side switch. Thus, relative to Figure 3 the illustrated embodiment, when sampling the current flowing through the low-side switch, the current flowing through the low-side switch can be fitted by the third regulation current signal Ireg3 at the same time. There is no need for the error amplifier EA to calculate the sampled current Isen obtained on the sampling transistor Msen in real time, which reduces the requirements for the error amplifier, and the sampling speed is faster and the accuracy is higher.
[0045] In one embodiment, the first coefficient, that is, the duty cycle D of the fourth switching transistor S4, is related to the topology selected by the switching circuit. For example, in a BUCK switching converter, the duty cycle D of the fourth switching transistor S4 is equal to the duty cycle of the high-side switch, that is: D = VOUT / VIN. Another example is that in a BOOST switching converter, the high-side switch in the BOOST switching converter is its freewheeling switching transistor, and the duty cycle D of the fourth switching transistor S4 is equal to the duty cycle of the freewheeling switching transistor, D = 1 - (VOUT - VIN) / VOUT = VIN / VOUT. In one embodiment, the multiplication circuit can receive the input voltage signal VIN, the output voltage signal VOUT, and the first regulation current signal Ireg1, and perform operations on the input voltage signal VIN, the output voltage signal VOUT, and the first regulation current signal Ireg1 to obtain the third regulation current signal Ireg3.
[0046] Similarly, in Figure 3 and Figure 4 the illustrated embodiment, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, and the eighth transistor M8 are all shown as MOSFETs. It can be understood that this does not limit the types of the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, and the eighth transistor M8, and they can also include any other suitable controllable semiconductor switching devices. In addition, the first to fifth switching transistors S1 - S5 can select any suitable controllable semiconductor switching devices.
[0047] Figure 5 According to an embodiment of the present invention, a method for fitting the inductor current in a switching converter is shown, which is used to generate a fitting current Isim, and includes steps S1 - S4.
[0048] Step S1: Couple the sampling transistor Msen between the first input terminal of the error amplifier EA and the switching node SW, and electrically connect the second input terminal of the error amplifier EA to the reference ground GND; connect the first transistor M1 in series between the supply voltage VCC and the sampling transistor Msen, and couple the control terminal of the first transistor M1 and the output terminal of the error amplifier EA.
[0049] Step S2: At the moment when the sampling transistor Msen is turned on, generate a regulation current signal Ireg according to the voltage on the output terminal of the error amplifier EA. Among them, when the difference between the inductor current iL and the fitting current Isim is not zero, the value of the regulation current signal will change following the change of the difference between the inductor current iL and the fitting current Isim; when the difference between the inductor current iL and the fitting current Isim is zero, the value of the regulation current signal Isim remains unchanged.
[0050] Step S3: Send the value of the regulation current signal Ireg to the control terminal of the first transistor M1 to adjust the voltage of the control terminal of the first transistor M1. Therefore, the current flowing through the first transistor M1 will linearly change at a certain slope.
[0051] Step S4: Mirror the current flowing through the first transistor M1 to generate the fitting current Isim of the inductor current.
[0052] The preferred embodiments of the present disclosure have been described in detail above in conjunction with the accompanying drawings. However, the present disclosure is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure. In addition, it should be noted that, among the various specific technical features described in the above specific embodiments, they can be combined in any appropriate manner without contradiction. To avoid unnecessary repetition, the present disclosure will not separately describe various possible combination methods. In addition, any combination can be made between various different embodiments of the present disclosure, as long as it does not violate the idea of the present disclosure, it should also be regarded as the content disclosed by the present disclosure.
Claims
1. An inductor current fitting circuit, applied to a switching converter, wherein the switching converter comprises a high-side switch tube, a low-side switch tube and an inductor, wherein a common end of the high-side switch tube and the low-side switch tube serves as a switch node, and the low-side switch tube is coupled between the switch node and a reference ground, wherein: The inductor current fitting circuit comprises: The sampling tube has a first end, a second end and a control end, the first end of the sampling tube is coupled to the switch node, and the control end of the sampling tube receives a control signal of the low-side switch tube; An error amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the error amplifier is coupled to a reference ground, the second input terminal of the error amplifier is coupled to the second terminal of the sampling tube, and the error amplifier amplifies the difference between the voltage on the second terminal of the sampling tube and the reference ground to output an error signal at its output terminal; A first transistor having a first terminal, a second terminal and a control terminal, the first terminal of the first transistor receiving a power supply voltage, the second terminal of the first transistor coupled to the second input terminal of the error amplifier, and the control terminal of the first transistor coupled to the output terminal of the error amplifier; A second transistor having a first terminal, a second terminal and a control terminal, the first terminal of the second transistor receiving a supply voltage, the second terminal of the second transistor providing a fitting current signal, the control terminal of the second transistor coupled to the control terminal of the first transistor, wherein the fitting current signal represents a current flowing through the inductor; The slope control circuit has a first end and a second end. The first end of the slope control circuit is coupled to the output end of the error amplifier, and the second end of the slope control circuit is coupled to the control end of the first transistor. The slope control circuit samples and holds the value of the error signal as the first value when the low-side switch is turned on, and generates a regulating current signal at the second end of the slope control circuit according to the first value.
2. The inductor current fitting circuit according to claim 1, characterized in that: When the sampling tube is turned on, the value of the regulated current signal is zero; when the sampling tube is turned off, the value of the regulated current signal changes with the first value of the error signal.
3. The inductor current fitting circuit according to claim 1, characterized in that: Also includes: A pulse signal generator generates a pulse signal when the low-side switch tube is turned on according to the control signal of the low-side switch tube; A first switch tube has a first end, a second end and a control end, the first end of the first switch tube is coupled to the output end of the error amplifier, the second end of the first switch tube is coupled to the control end of the first transistor, and the control end of the first switch tube receives an inverted signal of the pulse signal; The second switch tube has a first end, a second end and a control end. The first end of the second switch tube is coupled to the output end of the error amplifier, the second end of the second switch tube is coupled to the first end of the slope control circuit, and the control end of the second switch tube receives a pulse signal.
4. The inductor current fitting circuit according to claim 1, characterized in that: When the switching converter is a BUCK circuit, the regulating current signal is used to linearly pull up the voltage between the control terminal of the first transistor and the first terminal of the first transistor during the off period of the low-side switch.
5. The inductor current fitting circuit according to claim 4, characterized in that: When the switching converter is a BUCK circuit, the regulating current signal is further used to linearly pull down the voltage between the control terminal of the first transistor and the first terminal of the first transistor during the conduction period of the low-side switch.
6. The inductor current fitting circuit according to claim 1, characterized in that: When the switching converter is a BUCK circuit, the fitting current signal includes a low-side switch fitting current and a high-side switch fitting current, wherein the low-side switch fitting current represents the current flowing through the low-side switch tube, and the high-side switch fitting current represents the current flowing through the high-side switch, and the first value of the error signal represents the difference between the maximum value of the low-side switch fitting current and the maximum value of the high-side switch fitting current.
7. The inductor current fitting circuit according to claim 1, characterized in that: When the switching converter is a BOOST circuit, the fitting current signal includes a low-side switch fitting current and a high-side switch fitting current, wherein the low-side switch fitting current represents the current flowing through the low-side switch tube, and the high-side switch fitting current represents the current flowing through the high-side switch, and the first value of the error signal represents the difference between the minimum value of the low-side switch fitting current and the minimum value of the high-side switch fitting current.
8. The inductor current fitting circuit according to claim 1, characterized in that: Also includes: The first capacitor is coupled between the supply voltage and the control terminal of the first transistor.
9. The inductor current fitting circuit according to claim 3, characterized in that: The slope generating circuit comprises: A second capacitor has a first end and a second end, the first end of the second capacitor is coupled to the supply voltage, and the second end of the second capacitor is coupled to the output end of the error amplifier; A third capacitor has a first end and a second end, and the first end of the third capacitor is coupled to the supply voltage; A third switch tube has a first end, a second end and a control end, the first end of the third switch tube is coupled to the output end of the error amplifier through the second switch tube, the second end of the third switch tube is coupled to the second end of the third capacitor, and the control end of the third switch tube receives an inverted signal of the pulse signal; A third transistor has a first end, a second end and a control end, the first end of the third transistor receives a power supply voltage, and the control end of the third transistor is coupled to the second end of the third capacitor; A first current mirror having a first end and a second end, wherein the first end of the first current mirror is coupled to the second end of the third transistor, and a current at the second end of the third transistor is mirrored to generate a regulating current signal at the second end of the first current mirror; The fourth switch tube has a first end, a second end and a control end. The first end of the fourth switch tube is coupled to the second end of the first current mirror, the second end of the fourth switch tube is coupled to the control end of the first transistor, and the control end of the fourth switch tube receives the control signal of the high-side switch tube.
10. The inductor current fitting circuit according to claim 3, characterized in that: The slope generating circuit comprises: A second capacitor has a first end and a second end, the first end of the second capacitor is coupled to the supply voltage, and the second end of the second capacitor is coupled to the output end of the error amplifier; A third capacitor has a first end and a second end, and the first end of the third capacitor is coupled to the supply voltage; A third switch tube has a first end, a second end and a control end, the first end of the third switch tube is coupled to the output end of the error amplifier through the second switch tube, the second end of the third switch tube is coupled to the second end of the third capacitor, and the control end of the third switch tube receives an inverted signal of the pulse signal; A third transistor has a first end, a second end and a control end, the first end of the third transistor receives a power supply voltage, and the control end of the third transistor is coupled to the second end of the third capacitor; A first current mirror having a first end, a second end and a third end, wherein the first end of the first current mirror is coupled to the second end of the third transistor, and the current at the second end of the third transistor is mirrored to generate a first regulating current signal at the second end and the third end thereof; The fourth switch tube has a first end, a second end and a control end. The first end of the fourth switch tube is coupled to the second end of the first current mirror, the second end of the fourth switch tube is coupled to the control end of the first transistor, and the control end of the fourth switch tube receives the control signal of the high-side switch tube. A second current mirror having a first end and a second end, wherein the first end of the second current mirror is coupled to the second end of the first current mirror and the first regulating current signal is mirrored to generate a second regulating current signal at its second end; The multiplication circuit receives the second regulating current signal and multiplies the second regulating current signal by a first coefficient to generate a third regulating current signal, wherein the first coefficient is equal to the duty cycle of the fourth switch tube. The regulating current signal is equal to the difference between the third regulating current signal and the current signal flowing through the fourth switch tube.
11. The inductor current fitting circuit according to claim 10, characterized in that: The multiplication circuit may receive the input voltage signal of the switching converter, the output voltage signal of the switching converter and the first regulating current signal, and generate a third regulating current signal by operating the input voltage signal, the output voltage signal and the first regulating current signal.
12. The inductor current fitting circuit according to claim 1, characterized in that: Also includes: The fifth switch tube has a first end, a second end and a control end. The first end of the fifth switch tube is electrically connected to the reference ground, the second end of the fifth switch tube is coupled to the second input end of the error amplifier, and the control end of the fifth switch tube receives the control signal of the high-side switch tube.
13. A method for fitting an inductor current, applied to a switching converter, wherein the switching converter comprises a high-side switch tube, a low-side switch tube and an inductor, wherein a common end of the high-side switch tube and the low-side switch tube serves as a switch node, the low-side switch tube is coupled between the switch node and a reference ground, and one end of the inductor is coupled to the switch node, characterized in that: The method for fitting the inductor current includes: The sampling tube is coupled between the first input terminal of the error amplifier and the switch node, and the second input terminal of the error amplifier is electrically connected to the reference ground; the first transistor is connected in series between the power supply voltage and the sampling tube, and the control terminal of the first transistor is coupled to the output terminal of the error amplifier; When the sampling tube is turned on, a regulating current signal is generated according to the voltage at the output end of the error amplifier; Sending the value of the regulating current signal to the control terminal of the first transistor to regulate the voltage of the control terminal of the first transistor; A fitting current of the inductor current is generated by mirroring the current flowing through the first transistor.
14. An average current sampling circuit, characterized in that: include: The inductor current fitting circuit according to any one of claims 1 to 12, used to provide the fitting current signal; The filter circuit receives the fitting current signal, converts the fitting current signal into a voltage signal, and then performs filtering to generate a filtering signal, wherein the filtering signal represents an average value of the inductor current.