Low density parity check decoder and decoding method

By introducing retry controllers and multiple decoding algorithms into low-density parity check decoders, the problem of insufficient error correction capability under high memory density of flash memory is solved, and higher error correction performance and success rate are achieved.

CN120049896APending Publication Date: 2025-05-27RAYMX MICROELECTRONICS CORP
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Patent Information

Application Number
CN202510129258.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-05
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

With the increase in flash memory density, its error probability also increases. The existing low-density parity check decoding algorithm has insufficient error correction capabilities under high error rates, making it difficult to meet the requirements for error correction under high storage density.

Method used

A low-density parity check decoder and decoding method are proposed. By introducing a retry controller and a variety of decoding algorithms (such as bit flip algorithm and minimum sum algorithm) into the decoder, retry decoding is performed according to the error rate conditions when decoding fails, and the error correction success rate is improved.

Benefits of technology

Through the multiple decoding algorithm and retry mechanism, the error correction performance of low-density parity check codes is improved, the error level is reduced, and the decoding success rate is improved under high signal-to-noise ratio.

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Abstract

The invention relates to a low-density parity check decoder and a decoding method, in the decoding method executed by the low-density parity check decoder, an encoding signal is obtained from a memory, a first decoding algorithm is executed on the encoding signal, and after decoding fails, the execution of retry decoding is determined according to the degree of code word errors generated in decoding. After the disturbance is added to the code words in the first decoding algorithm, the first decoding algorithm with the disturbance is retrying to be executed. And when the result of executing the first decoding algorithm again or multiple times still fails to decode and does not meet the retry condition, continuously executing the second decoding algorithm, similarly, determining to execute the retry decoding according to the code word error degree after the decoding fails, then adjusting parameters in the second decoding algorithm, and executing the second decoding algorithm again.
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Description

Technical Field

[0001] The specification discloses a low-density parity-check decoding circuit and method, particularly a low-density parity-check decoder and decoding method that uses a code for decoding and a retry mechanism. Background Art

[0002] In order to ensure the correctness of stored data, an existing error correction code (ECC) algorithm is applied to perform error correction on data blocks by a decoder that runs a specific algorithm for different error bits, and an algorithm that requires higher computing resources has better error correction capabilities.

[0003] When flash memory moves towards a three-dimensional process and the number of stacked layers increases, its storage density also increases, resulting in an increase in the error probability of flash memory. Therefore, the requirement for error correction is also getting higher. Furthermore, it is gradually transitioning from a 2K codeword low-density parity-check code to a 4K codeword low-density parity-check code. Therefore, the optimization of the low-density parity-check decoding algorithm is urgent. Summary of the Invention

[0004] The specification proposes a low-density parity-check decoder and decoding method, which optimizes the decoding algorithm by using the characteristics of the low-density parity-check decoder.

[0005] In one embodiment, the density parity-check decoder includes an arithmetic core and a retry controller, and the retry controller is used to control the arithmetic core to execute the decoding method.

[0006] According to an embodiment of the decoding method, first obtain an encoded signal from the memory, that is, perform a first decoding algorithm on the encoded signal by the low-density parity-check decoder, and determine whether the decoding is successful according to the result of the first decoding algorithm. Among them, in response to the failure of the first decoding algorithm and satisfying a first retry condition related to the degree of codeword error generated during decoding, it is decided to execute a first retry decoding procedure.

[0007] The first decoding algorithm is a one-bit flip algorithm, and the degree of codeword error corresponds to the relationship between the number of codeword error bits per codeword obtained by executing the bit flip algorithm and the frame error rate. Therefore, it is possible to determine whether to start retrying the execution of the bit flip algorithm according to the relationship between the number of codeword error bits per codeword obtained by executing the bit flip algorithm and the frame error rate.

[0008] Furthermore, the encoded signal is added with perturbations to perform bit flips on multiple predetermined positions of the codeword, and the multiple predetermined positions are the start, end, or random multiple bits of the codeword.

[0009] Further, after determining that decoding fails and the first retry condition is not satisfied according to the result of executing the first decoding algorithm again or multiple times, the second decoding algorithm is executed, where the complexity of the second decoding algorithm is higher than that of the first decoding algorithm.

[0010] Similarly, after executing the second decoding algorithm, when the second retry condition is satisfied, it is decided to execute the second retry decoding procedure. In this second retry decoding procedure, it includes adjusting the parameters of the second decoding algorithm and executing the second decoding algorithm with the changed parameters again.

[0011] Further, the second decoding algorithm can be a min-sum algorithm. Whether to start retrying and executing the bit-flipping algorithm is determined according to the relationship between the error bits of each codeword and the frame error rate obtained by executing the min-sum algorithm.

[0012] Further, when the low-density parity-check decoder cannot complete decoding by retrying the second decoding algorithm and does not satisfy the second retry condition, then soft decoding is performed.

[0013] To enable a further understanding of the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the provided drawings are only for reference and illustration and are not used to limit the present invention. Brief Description of the Drawings

[0014] Figure 1 Schematic diagram of an architecture embodiment of a low-density parity-check decoder using a decoding method;

[0015] Figure 2 Flowchart of an embodiment of executing the first decoding algorithm in the decoding method;

[0016] Figure 3 Waterfall diagram embodiment showing whether to start retrying the first decoding algorithm for decoding;

[0017] Figure 4 Flowchart of an embodiment of executing the second decoding algorithm in the decoding method; and

[0018] Figure 5 Waterfall diagram embodiment showing whether to start retrying the second decoding algorithm for decoding. Detailed Embodiment

[0019] The disclosure proposes a low-density parity-check decoder and a decoding method, where the decoding method used is a decoding process based on an improved low-density parity-check code (LDPC). One of its purposes is to improve the overall error correction performance of the low-density parity-check code. The low-density parity-check decoder is widely used in communication systems and storage devices.

[0020] The architecture of the LDPC decoder 100 and the decoding method running therein can be referred to Figure 1 , Figure 1 which shows a schematic diagram of an architectural embodiment of an LDPC decoder. Among them, the signal decoding of the LDPC decoder 100 can be divided into hard decoding and soft decoding, and a decoding method is executed. The decoding method proposed in the disclosure is to use a high-performance hard decoding method. While obtaining the encoded signal from the flash memory 12, the codeword generated during encoding (i.e., the above-mentioned n-bit codeword) is received. After performing decoding by the decoding algorithm, error correction is performed according to the obtained codeword, and it can be determined whether the correction check target is met according to the codeword. If it is met, it means that the decoding is successful.

[0021] The illustrated LDPC decoder 100 is provided with an input buffer 11 and an output buffer 13, and an operating core for executing the decoding algorithm. The operating core may include a first operating core 113 and a second operating core 123, that is, the first operating core 113 and the second operating core 123 provide a first decoding algorithm and a second decoding algorithm. Further, a retry controller is also provided. The retry controller is electrically connected to the operating core. Among them, the retry controller is used to control the first operating core 113 and the second operating core 123 to perform retry decoding.

[0022] When executing the decoding method, the LDPC decoder 100 obtains the encoded signal from the flash memory 12 and first stores it temporarily in the input buffer 21. At least two decoding algorithms (which can be divided into a first decoding algorithm and a second decoding algorithm) are run by components implemented in hardware or in a hardware-software cooperation manner in the LDPC decoder 100. Under the requirement of performance, in particular, the decoding algorithm can be executed by the circuit hardware in the LDPC decoder 100, and the executed decoding methods can respectively retry the decoding procedure at least once according to different retry conditions.

[0023] According to the embodiment, a retry controller (such as a first retry controller 111 and a second retry controller 121) is added before the operating core (such as the first operating core 113 and the second operating core 123) that executes the first decoding algorithm and the second decoding algorithm to control the hardware components in the LDPC decoder to automatically enter the retry procedure. This retry mechanism is particularly driven by hardware and does not require the intervention of software or the flash memory controller. Therefore, it can effectively save time costs and the computing power required to execute software. In actual operation, another implementation can use soft decoding as a backup after hard decoding fails.

[0024] An example of the icon is shown in the LDPC decoder 100. The first retry controller 111 controls the first arithmetic core 113 to execute the first decoding algorithm. If the decoding process meets the first retry condition for the first decoding algorithm, the figure shows that the first decoding algorithm 115 is retried to represent the process of executing the second or multiple retry decodings. If it is confirmed that the decoding is successful after checking the codeword, the decoding completion signal can be transmitted to the output buffer 13 and then output to the data buffer 103 of the memory control circuit. According to an embodiment, if the first decoding algorithm still fails to decode successfully after retrying the decoding, the second decoding algorithm will continue to perform the decoding. Among them, according to an embodiment, the complexity of the second decoding algorithm is higher than that of the first decoding algorithm.

[0025] According to an embodiment, in the LDPC decoder 100, the second retry controller 121 controls the second arithmetic core 123 to execute the second decoding algorithm. Similarly, if the decoding process meets the second retry condition for the second decoding algorithm, the second retry condition is also related to the degree of codeword error generated during decoding. Thus, the second decoding algorithm 125 is retried, where the parameters of the second decoding algorithm are adjusted and the second decoding algorithm is executed again, and the process of executing the second or multiple retry decodings can be performed. If it is confirmed that the decoding is successful, the decoding completion signal can be transmitted to the output buffer 13 and then output to the data buffer 103 of the memory control circuit. In one case, when the LDPC decoder 100 still cannot complete the hard decoding by retrying the second decoding algorithm and does not meet the second retry condition, a soft decoding method can be sought for decoding.

[0026] It should be mentioned here that, according to an embodiment, at least two algorithms are run in the LDPC decoder 100, for example, the Bit-Flipping Algorithm (BFA) and the MinSum algorithm are respectively adopted. The decoding method proposed in the disclosure proposes an automatic condition judgment program, which can judge whether the respective corresponding retry conditions (such as the first retry condition and the second retry condition) are met after executing the first decoding algorithm or the second decoding algorithm. The judgment basis of the first retry condition and the second retry condition is related to the degree of codeword error generated during decoding. If the retry condition is met, mechanisms such as adding adaptive scrambling (such as injecting errors, that is, changing the values of some bits of the codeword) or adjusting the parameters of the low-density parity-check decoding algorithm will be automatically executed in different decoding algorithms to start the retry decoding. Among them, due to the statistical characteristics of the LDPC decoder 100 itself, it is found through experiments that for the case where the number of error bits is not particularly high, appropriately adding perturbations to the encoded signal or adjusting the parameters of the low-density parity-check decoding algorithm can give the originally uncorrectable codewords a chance to be corrected correctly again.

[0027] Based on the above architecture of the storage control circuit and the LDPC decoder that can run at least two decoding algorithms, a reference for the decoding method proposed in the disclosure Figure 2 The flowchart of the embodiment of the first decoding algorithm.

[0028] The LDPC decoder first reads the encoded signal from the flash memory (step S201), executes the first decoding algorithm with the first operation core in the LDPC decoder (step S203), and determines whether the decoding is successful according to the information provided by the codeword used for error correction in the result of executing the first decoding algorithm (step S205). If it is confirmed that the decoding is successful (yes), the decoded signal is output after the decoding is completed (step S207); otherwise, if the first decoding algorithm fails to decode (no), it is further determined whether the first retry condition is satisfied (step S209). The first retry condition for determining whether to retry the first decoding algorithm can be referred to Figure 3 The displayed waterfall plot.

[0029] In the judgment step of step S209, when the first decoding algorithm fails to decode and it is also determined according to the current situation that the first retry condition is not satisfied (no), according to the embodiment of the decoding method proposed in the disclosure, the second decoding algorithm can be continuously executed (step S217); if it is determined according to the current situation that the first retry condition for retrying the first decoding algorithm is satisfied (yes), the first retry decoding program is decided to be executed. At this time, in the first retry decoding program, perturbations are added to the codewords in the first decoding algorithm (or the parameters of the low-density parity-check decoding algorithm can be adjusted) (step S211), the second first decoding algorithm is executed (step S213), and it is again determined whether the decoding is successful (step S215).

[0030] When the first decoding algorithm is executed for the second time, the decoding method adds perturbations (such as injecting a small number of error bits) to the first decoding algorithm formula with a certain probability of successful decoding to retry the decoding, attempting to decode successfully thereby. The addition of perturbations to the encoded signal is to perform bit flips at multiple predetermined positions of the codeword. These predetermined positions can refer to the beginning, end, or random multiple bits of the codeword. Thus, according to the embodiment, the first decoding algorithm, such as the bit-flip algorithm, can form perturbations in the algorithm by flipping (i.e., changing bit 0 to bit 1 or bit 1 to bit 0) the beginning, end, or random multiple bits (bits) of the codeword in the bit-flip algorithm. For example, it can be flipping the first 10 bits at the beginning of the codeword in the first decoding algorithm; or flipping the last 10 bits at the end of the codeword in the first decoding algorithm; or randomly flipping any 10 bits of the codeword in the first decoding algorithm.

[0031] In the decoding method, according to the embodiment, the first decoding algorithm with perturbations added is retried at least once, and it is determined whether the decoding is completed. Also, after the decoding fails, it is repeatedly confirmed whether the first retry condition is satisfied and the first decoding algorithm is continued to be retried by adding perturbations.

[0032] In the above process, if the decoding is not successful and the first retry condition is not met, the second decoding algorithm is continuously executed (step S217); if it is confirmed that the decoding is successful, a decoding signal is output after the decoding is completed (step S207).

[0033] According to the embodiment, the first decoding algorithm can adopt the bit flipping algorithm (BFA) to perform the first decoding correction. In the bit flipping algorithm, taking the LDPC code of 4K bytes (Byte) as an example, first calculate the syndrome value of the codeword obtained by the LDPC decoder, and calculate the bit value after flipping in the codeword, and then compare it with a preset threshold to determine whether to flip the bit value in the codeword (such as changing the bit from 0 to 1 or from 1 to 0). Then, calculate the syndrome value of the flipped codeword again to determine whether the flipped codeword is a correct codeword within a specific recursion number. If so, stop the algorithm.

[0034] In Figure 2 step S209 for determining whether the first retry condition is met, the first decoding algorithm is such as the bit flipping algorithm, and the error degree of the codeword corresponds to the relationship between the error bit per codeword obtained by executing the bit flipping algorithm and the frame error rate, thereby determining whether to start retrying to execute the bit flipping algorithm. When the first decoding algorithm (such as the bit flipping algorithm) fails in decoding, according to Figure 3 the display example, it can be determined whether to retry the first decoding algorithm according to the relationship between the error bit per codeword and the frame error rate described in the waterfall diagram shown therein.

[0035] Figure 3 In the shown waterfall diagram, the vertical axis indicates the frame error rate, and the horizontal axis indicates the error bit per codeword. Two curves are plotted therein, including a non-retry curve 301 and a retry curve 302. The non-retry curve 301 and the retry curve 302 depict the trend that the larger the error bit per codeword, the larger the frame error rate. When the error bit per codeword reaches a certain number, such as 250, the frame error rate tends to 1. And this waterfall diagram shows that the more to the right area indicates the stronger the decoding ability of the decoder, that is, when the error bit per codeword is more and the frame error rate is higher, it has better retry decoding ability.

[0036] According to the display example in the figure, the conditions for retrying the bit flipping algorithm are defined by the non-retry curve 301 and the retry curve 302. When the LDPC decoder executes the bit flipping algorithm, the error bit per codeword is judged from the codeword obtained from the decoding signal, and the corresponding frame error rate is calculated. After comparison Figure 3The non-start retry curve 301 and the start retry curve 302 set therein. If the frame error rate corresponding to the number of error bits per codeword calculated conforms to the non-start retry curve 301, it indicates that the conditions of the retry bit flipping algorithm are not met; if the frame error rate corresponding to the number of error bits per codeword calculated conforms to the start retry curve 302, it indicates that the conditions of the retry bit flipping algorithm are met.

[0037] In Figure 2 In the determination of step S209, if the first retry condition is not satisfied, or if the first decoding algorithm cannot be decoded successfully after being executed for the second time (or multiple times), the process will execute the second decoding algorithm as in step S217.

[0038] Then, reference can be made to Figure 4 The flowchart of the embodiment of executing the second decoding algorithm in the decoding method shown. Based on the storage control circuit described in the above embodiment, where the LDPC decoder runs at least two decoding algorithms, and the second decoding algorithm is, for example, the MinSum algorithm.

[0039] After the LDPC decoder executes the second decoding algorithm (step S401), it is determined whether the decoding is successful based on the codewords generated during the decoding (step S403). If the decoding is successful (yes), the decoding is completed and the decoded signal is output (step S405); on the contrary, if the decoding fails (no), then it is determined whether the second retry condition is satisfied based on the degree of the codeword error generated during the decoding (step S407).

[0040] According to the embodiment, the second decoding algorithm is, for example, the MinSum algorithm. It is determined whether to start retrying and execute the MinSum algorithm based on the relationship between the number of error bits per codeword and the frame error rate obtained by executing the MinSum algorithm. Among them, the second retry condition for determining whether to retry and execute the MinSum algorithm is the relationship between the number of error bits per codeword and the frame error rate obtained by executing the MinSum algorithm. Reference can be made to Figure 5 The waterfall plot embodiment diagram showing whether to start retrying the second decoding algorithm for decoding.

[0041] In step S407, when the decoding fails and it is determined that the second retry condition cannot be met (No), soft decoding (step S415) can be performed according to the system default record to complete the decoding (step S405); conversely, when the decoding fails but the second retry condition is met (Yes), the second second decoding algorithm is executed (step S411). When the second (or multiple) second decoding algorithm is executed, the parameters of the algorithm equation are changed, such as the parameters shown in Equation 1, and a sample of modifying the parameters in the min-sum algorithm shown in Table 1 can be referred to (step S409). Then, the second (or multiple) second decoding algorithm is executed, and it continues to determine whether the decoding is successful from the codeword of the decoding result (step S413). In the above decoding process, if the second retry condition continues to be met after multiple decoding failures, the decoding can still be retried by modifying the parameters in the second decoding algorithm repeatedly.

[0042] If the decoding is successful (Yes) after the second or more retries, the decoding is completed and the decoding result is output (step S405), and the process also terminates; if the decoding still fails (No) after the second or more retries and the second retry condition is not met, similarly, return to the system-set record, that is, execute soft decoding for decoding (step S415).

[0043] Taking the min-sum algorithm as an example, the operation of the min-sum algorithm at the check node only makes a minimum value judgment, which can simplify the LDPC decoding algorithm, and the formula is as shown in Equation 1. Among them, "m" is the check node number in the min-sum algorithm; "n" is the variable node number; "r m→n " represents the information from the check node numbered m to the variable node numbered n; the variable "α" is a scaling parameter; "q n′→m " is the information from the variable node numbered "n ′ " to the check node numbered "m", such as the log-likelihood ratio (LLR); the sign function "sign()" returns 0, 1, or -1 according to whether the value "q n′→m " in the function is 0, a positive number, or a negative number, and is divided into two parameters αn and αp according to the result of sign(q). The selection of the parameters depends on the computing power of the encoder; "L(x n )" represents the value of the variable node to the check node. In this way, when the second (or multiple) second decoding algorithm is executed, the decoding is retried by modifying the two parameters αn and αp, and the decoding is attempted based on a certain probability of successful decoding.

[0044] Equation 1:

[0045] r m→n = α(∏sign(qn′→m )) min(|q n′→m |);

[0046] q n→m = y n + ∑r m′→n (x n );

[0047] L(x n ) = y n + ∑r m→n (x n ).

[0048] An example of modifying parameters in the min - sum algorithm is shown in Table 1, which shows examples of two parameter adjustments. During the decoding process, the decoding purpose is achieved by gradually adjusting the parameters and repeatedly executing the min - sum algorithm.

[0049] Table 1:

[0050] Parameter group αn αp First decoding parameter 0.6875 0.8125 Second decoding parameter 0.625 0.75

[0051] According to Figure 5 the waterfall plot shown for determining whether to initiate retry decoding of the second decoding algorithm (such as the min - sum algorithm), the waterfall plot depicts the relationship between the number of bit errors per codeword and the frame error rate. It shows the non - retry curve 501 and the retry curve 502. The trend shown by the curves is that the larger the number of bit errors per codeword, the larger the frame error rate. When the number of bit errors per codeword reaches a certain amount, such as 350, the frame error rate approaches 1.

[0052] Thus, the retry encoding method defines the conditions for retrying the min - sum algorithm through the non - retry curve 501 and the retry curve 502. When the LDPC decoder executes the min - sum algorithm, the number of bit errors per codeword is judged from the decoded signal, and the corresponding frame error rate is calculated. Referring to Figure 5 the shown waterfall plot, if the frame error rate corresponding to the calculated number of bit errors per codeword conforms to the non - retry curve 501, it means that the condition for retrying the min - sum algorithm is not met; if the frame error rate corresponding to the calculated number of bit errors per codeword conforms to the retry curve 502, it means that the condition for retrying the min - sum algorithm is met.

[0053] Furthermore, according to Figure 4 the shown process, if decoding fails after the first, second, or more executions of the second decoding algorithm and the second retry condition is not satisfied, soft decoding can be performed ( Figure 4 , step S415).

[0054] In summary, according to the above description of the embodiments of the low-density parity-check decoder and the decoding method, the decoding method utilizes the characteristics of the decoding algorithm of the low-density parity-check code. Based on the original decoding algorithm of the low-density parity-check code, the hard decoding performance of error correction of the low-density parity-check code is improved. Thereby, the error floor of the low-density parity-check code can be reduced, and at the same time, the performance of the waterfall region before the performance suddenly drops when reaching a certain signal-to-noise ratio (SNR) can be improved. Moreover, the decoding method provides a retry decoding mechanism, which can effectively improve the success rate of LDPC decoding, and at the same time reduces the impact of the retry decoding mechanism on the performance of the LDPC decoder through an appropriate retry judgment mechanism.

[0055] The above-disclosed content is only the preferred feasible embodiment of the present invention, and does not limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made by using the content of the specification and drawings of the present invention are included in the scope of the patent application of the present invention.

Claims

1. A decoding method, executed in a low-density parity check decoder, characterized in that: The method includes: Obtaining a coded signal from a memory; executing a first decoding algorithm on the encoded signal; Determining whether decoding is successful based on a result of decoding by the first decoding algorithm, and in response to a decoding failure by the first decoding algorithm and a first retry condition related to a degree of codeword error generated in decoding being satisfied, determining to execute a first retry decoding procedure; Wherein, the first retry decoding procedure comprises: Adding disturbance to the coded signal or adjusting parameters of a low density parity check decoding algorithm; and The first decoding algorithm is executed again.

2. The decoding method according to claim 1, characterized in that: The first decoding algorithm is a bit flip algorithm, and the codeword error degree corresponds to the relationship between the error bit of each codeword and the frame error rate obtained by executing the bit flip algorithm.

3. The decoding method according to claim 1, characterized in that: The disturbance added to the coding signal is performed on a plurality of predetermined bits of the codeword to perform bit flipping, wherein the plurality of predetermined bits are the beginning, the end or a plurality of random bits of the codeword.

4. The decoding method according to any one of claims 1 to 3, characterized in that: In response to the first decoding algorithm failing to decode and not satisfying a first retry condition, a second decoding algorithm is executed; wherein the complexity of the second decoding algorithm is higher than the complexity of the first decoding algorithm.

5. The decoding method according to claim 4, characterized in that: After executing the second decoding algorithm, a second retry condition is satisfied to determine to execute a second retry decoding procedure; wherein the second retry condition is related to the degree of codeword error generated during decoding; wherein the second retry decoding procedure includes: adjusting parameters of the second decoding algorithm; and The second decoding algorithm is executed again.

6. The decoding method according to claim 5, characterized in that: When the LDPC decoder cannot complete decoding by retrying the second decoding algorithm and the second retry condition is not met, soft decoding is used for decoding.

7. A low density parity check decoder, characterized in that: The decoder comprises: a computing core; and A retry controller is electrically connected to the computing core and is used to control the computing core to execute a decoding method, wherein the decoding method includes: Obtaining a coded signal from a memory; executing a first decoding algorithm on the encoded signal; When the decoding of the first decoding algorithm fails, determining to perform retry decoding according to the degree of codeword error generated during decoding; After adding a disturbance to the codeword in the first decoding algorithm, executing the first decoding algorithm with the disturbance again; and According to the result of executing the first decoding algorithm again, it is determined whether the decoding is completed, and after the decoding fails, it is confirmed whether the decoding can be retried and the first decoding algorithm is retried by adding disturbance.

8. The low density parity check decoder as claimed in claim 7, characterized in that The first decoding algorithm is a bit flip algorithm, and whether to start retrying the bit flip algorithm is determined based on the relationship between the error bit of each codeword and the frame error rate obtained by executing the bit flip algorithm.

9. The low density parity check decoder according to claim 7 or 8, characterized in that: After determining that decoding fails and does not meet a first retry condition according to the result of executing the first decoding algorithm again or multiple times, a second decoding algorithm is executed.

10. The low density parity check decoder of claim 9, wherein: After executing the second decoding algorithm, after determining that decoding fails according to the decoded codeword, it is decided to retry the second decoding algorithm with changed parameters according to the degree of codeword error generated during decoding.

11. The low density parity check decoder of claim 10, wherein: The second decoding algorithm is a minimum sum algorithm, and whether to start retrying the bit flip algorithm is determined based on the relationship between the error bit of each codeword and the frame error rate obtained by executing the minimum sum algorithm.

12. The low density parity check decoder of claim 10, wherein: When the LDPC decoder cannot complete decoding by retrying the second decoding algorithm and the second retry condition is not met, soft decoding is used for decoding.