High-performance silicon-based semiconductor polycrystalline silicon film resistor device

Abstract

The invention relates to the technical field of semiconductor device manufacturing, and discloses a high-performance silicon-based semiconductor polycrystalline silicon film resistance device, which comprises a silicon-based substrate, a bottom layer, a polycrystalline silicon film resistance layer and a polycrystalline silicon film resistance layer, the insulating layer directly covers the surface of the silicon-based substrate; the polycrystalline silicon layer is positioned above the insulating layer; the doped region is distributed in the polycrystalline silicon layer; the metal electrodes are located at the two ends or the surface of the polycrystalline silicon layer; and the packaging layer covers the outermost layer of the whole device and wraps the polycrystalline silicon layer and the metal electrode. By selecting proper doping elements (such as phosphorus or boron) and controlling the doping concentration, the temperature coefficient of the resistance device can be optimized to a very low level, the low temperature coefficient means that the resistance value changes slightly when the temperature changes, and due to the fact that the temperature coefficient is low, the device can be used in a wider temperature range, and the application range of the device is widened. And obvious resistance value drift does not occur.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor device manufacturing, in particular to a high-performance silicon-based semiconductor polysilicon film resistor device. Background Art

[0002] In modern electronic devices, resistors, as basic passive components, are widely used in various circuits to control current, divide voltage, adjust signals, and provide impedance matching. With the rapid development of integrated circuit technology, the role of resistors in integrated circuits has become increasingly important. Especially in analog circuits, radio frequency circuits, and sensor circuits, high-precision, high-stability, and miniaturized resistors have become indispensable components.

[0003] Although traditional thick film or thin film resistors are widely used, they have some shortcomings in applications with high integration and high precision requirements, such as high temperature coefficient, poor long-term stability, and poor noise characteristics. These problems will affect the overall performance in high-performance electronic systems, especially in applications such as high-precision measurement, stable voltage reference, RF circuits, and high temperature environments, where traditional resistors are difficult to meet the requirements. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a high-performance silicon-based semiconductor polysilicon film resistor device to solve the problem of high temperature coefficient of traditional thick film or thin film resistors in applications with high integration and high precision requirements.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: a high-performance silicon-based semiconductor polysilicon film resistor device, comprising:

[0006] Silicon-based substrate: The bottom layer of the entire device, located at the bottom, is the supporting substrate for other layers. The material is single-crystal silicon wafer, which is P-type or N-type;

[0007] Insulating layer: directly covers the surface of the silicon-based substrate, and the material is thermally grown silicon dioxide;

[0008] Polysilicon layer: located above the insulating layer, the material is a polysilicon film deposited by LPCVD;

[0009] Doped region: distributed inside the polysilicon layer, the doping elements are evenly distributed throughout the polysilicon layer, and the material is doped polysilicon;

[0010] Metal electrodes: located at both ends or on the surface of the polysilicon layer, used for current input and output, made of aluminum, titanium, tungsten or copper;

[0011] Packaging layer: The outermost layer covering the entire device, encapsulating the polysilicon layer and metal electrodes.

[0012] Preferably, the thickness of the silicon-based substrate is 500 - 700 microns, the thickness of the insulating layer is 100 - 300 nanometers, the thickness of the polysilicon layer is 100 - 500 nanometers, and the thickness of the metal electrode is 100 - 300 nanometers.

[0013] Preferably, a manufacturing method of a high-performance silicon-based semiconductor polysilicon film resistor device includes the following steps:

[0014] S1: Preparation of silicon-based substrate

[0015] Select a P-type or N-type single-crystal silicon wafer as the substrate, and perform a multi-step cleaning process. After removing the native oxide layer, the silicon wafer is ready for subsequent process steps;

[0016] S2: Growth of insulating layer

[0017] Grow a layer of silicon dioxide on the surface of the silicon-based substrate for electrical isolation;

[0018] S3: Deposition of polysilicon layer

[0019] Deposit a polysilicon thin film on the insulating layer through the LPCVD process;

[0020] S4: Doping treatment

[0021] Introduce doping elements into the polysilicon layer, and control the resistance value through ion implantation and / or diffusion processes;

[0022] S5: Patterning process

[0023] Use photolithography and dry etching processes to pattern the polysilicon layer to form the desired resistor shape;

[0024] S6: Heat treatment

[0025] Activate the doping elements through heat treatment, and optimize the electrical properties and grain structure of the polysilicon;

[0026] S7: Deposition of metal electrodes

[0027] Deposit metal electrodes at both ends of the polysilicon layer, and form the electrodes through physical vapor deposition for electrical connection;

[0028] S8: Encapsulation

[0029] Encapsulate the resistor device;

[0030] S9: Performance optimization and adjustment

[0031] Adjust the resistance value and temperature coefficient through repeated doping, annealing processes or laser trimming techniques.

[0032] Preferably, in the step S1, the selected P-type or N-type monocrystalline silicon wafer has a thickness of 500-700 microns and a resistivity between 1 and 10 ohm·cm;

[0033] Solvent cleaning: Use acetone and isopropyl alcohol for ultrasonic cleaning, with each ultrasonic cleaning lasting for 5-10 minutes;

[0034] Wet cleaning: Use sulfuric acid or ammonia: hydrogen peroxide to remove metal ions and particulate contaminants, at a temperature of 75-80 °C for 10 minutes;

[0035] Removing the oxide layer: Use a 5% dilute hydrofluoric acid solution to remove the natural oxide layer on the silicon wafer surface, with the immersion time being 30 seconds to 1 minute;

[0036] Drying: Blow dry the silicon wafer with nitrogen or bake it at 100 °C for 1-2 minutes;

[0037] In the step S2, use a horizontal or vertical thermal oxidation furnace, with oxygen as the oxidation source, at a temperature of 900-1100 °C, the oxygen flow rate controlled at 0.5-2 L / min, the time controlled at 30 minutes to 2 hours, and measure the thickness of the oxide layer through an ellipsometer, and analyze the composition and uniformity of the oxide layer using XPS or SIMS.

[0038] Preferably, in the step S3, use an LPCVD furnace, with the precursor gas being silane, the flow rate being 50-200 sccm, the deposition temperature being 600-700 °C, the pressure controlled at 200-300 mTorr, the deposition time being 30 minutes to 2 hours, analyze the grain size and orientation of the polysilicon layer using X-ray diffraction, and observe the grain boundary structure through a transmission electron microscope;

[0039] In the step S4, ion implantation uses an ion implanter, the implanted element is selected as phosphorus or boron, the implantation energy is between 10-100 keV, and the implantation dose is 1×1013 to 1×101 atoms / cm 2 , use secondary ion mass spectrometry to measure the doping distribution and adjust the implantation parameters to obtain a uniform doping concentration;

[0040] The diffusion process uses a rapid thermal annealing device or a diffusion furnace, the diffusion temperature is 900-1000 °C, the time is 10-60 minutes, the atmosphere is nitrogen or oxygen, measure the doping depth through SIMS or profile analysis, and adjust the diffusion time and temperature.

[0041] Preferably, in the step S5, the lithography process uses a stepper or a mask aligner exposure machine, the photoresist coating uses a spin-coated positive or negative photoresist, with a thickness of 1-2 microns, and the exposure energy is 100-200 mJ / cm 2, the exposure time is 2 - 10 seconds, develop using 0.26 N TMAH solution for 30 seconds to 2 minutes, check the pattern integrity using an optical microscope, and observe the pattern edges through a scanning electron microscope;

[0042] For dry etching, use a reactive ion etching equipment, and use a gas mixture of CF, SF or Cl as the etching gas. The etching rate is 50 - 100 nm / min, the pressure is 10 - 100 mTorr, the etching power is 100 - 300 W, the etching time is 1 - 10 minutes. Measure the etching depth using a profilometer or AFM, and adjust the etching time to achieve the target.

[0043] Preferably, in the S6 step, the annealing process uses a rapid thermal annealing equipment or a high-temperature furnace protected by nitrogen. The annealing temperature is 800 - 1000 °C, the time is 10 - 30 minutes, and it is protected by nitrogen or hydrogen. The cooling rate is 10 - 50 °C / min. Analyze the grain growth of polycrystalline silicon through XRD, and measure the change in resistance value through resistance testing.

[0044] Preferably, in the S7 step, for metal deposition, use a sputtering coater or an electron beam evaporator. Select aluminum, titanium, tungsten or copper as the electrode material. The deposition thickness is 100 - 300 nanometers, and the deposition rate is controlled at 1 - 10 nm / s. Measure the resistivity of the metal layer using the four-probe test method, check the electrode pattern through SEM, and use photolithography and dry etching to form the metal electrode pattern. Check the integrity and edge sharpness of the electrode pattern using an optical microscope and SEM.

[0045] Preferably, in the S8 step, connect the metal leads using a thermocompression bonder or an ultrasonic bonder. The welding temperature is 150 - 300 °C, use a polymer material for encapsulation, the curing time is 1 - 2 hours, the curing temperature is 100 - 150 °C. Verify the encapsulation quality through helium leak testing and tensile testing, and use an automatic probe station to test the resistance value, temperature coefficient and noise characteristics of the resistor.

[0046] The present invention provides a high-performance silicon-based semiconductor polycrystalline silicon film resistor device, having the following beneficial effects:

[0047] 1. By selecting appropriate doping elements (such as phosphorus or boron) and controlling the doping concentration, the present invention can optimize the temperature coefficient of the resistor device to a very low level. A low temperature coefficient means that the resistance value changes less when the temperature changes. Due to the low temperature coefficient, this device can be used in a wider temperature range without obvious resistance value drift.

[0048] 2. The present invention can accurately adjust the resistance value of the polysilicon film through precise doping processes (such as ion implantation and thermal diffusion) and annealing treatment. This precise control ensures that the resistor device has a highly consistent resistance value after manufacturing. Usually the error range can be controlled within 1%. After the polysilicon film has undergone an optimized heat treatment process, its grain structure is more stable, reducing the resistance drift caused by environmental changes (such as temperature, humidity, etc.).

[0049] 3. The device of the present invention uses high temperature resistant polysilicon materials and packaging materials. After special treatment, it can work normally in a high temperature environment. The polysilicon layer after high temperature annealing has a better grain structure, which reduces the resistance value drift at high temperature. In addition, the high temperature resistant metal electrode (such as tungsten or titanium) also enhances the overall temperature resistance of the device, making it suitable for high temperature environments such as aerospace, oil drilling, and automotive electronics.

[0050] 4. During the manufacturing process, the present invention optimizes the crystal quality and surface treatment process of polysilicon, which can significantly reduce the 1 / f noise and thermal noise of the resistor device during operation. This is very critical for applications that need to process weak signals, such as high-sensitivity sensors, audio equipment, and precision measurement systems.

[0051] 5. The present invention can make the resistor device into micron or even nanometer size through precision lithography and etching processes. This miniaturization enables it to be integrated in a micro-electromechanical system (MEMS) or occupy less space in a chip-level package, making it suitable for highly integrated electronic systems. This miniaturization and high integration feature makes the device particularly suitable for wearable devices, smart phones, embedded systems and other fields, and can achieve more functions in a limited space. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 The present invention is a flow chart of a method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device. DETAILED DESCRIPTION

[0053] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] Please see attached Figure 1 The embodiment of the present invention provides a high-performance silicon-based semiconductor polysilicon film resistor device, including:

[0055] Silicon-based substrate

[0056] Location: The bottom layer of the entire device, at the very bottom, is the supporting substrate for other layers.

[0057] Material: Single crystal silicon wafer, usually P-type or N-type.

[0058] Function: As the substrate of the device, it provides mechanical support and necessary electrical characteristics.

[0059] Insulating Layer

[0060] Location: Directly covers the surface of the silicon-based substrate.

[0061] Material: Usually thermally grown silicon dioxide (SiO), can also be deposited by CVD.

[0062] Thickness: 100 - 300 nanometers.

[0063] Function: Provides electrical isolation to prevent current leakage from the polysilicon layer to the silicon-based substrate.

[0064] Polysilicon Layer

[0065] Location: Above the insulating layer.

[0066] Material: Polysilicon thin film deposited by LPCVD.

[0067] Thickness: 100 - 500 nanometers.

[0068] Function: Forms the resistor body, and adjusts the resistance value by doping.

[0069] Doped Region

[0070] Location: Distributed inside the polysilicon layer, and the doping elements are evenly distributed throughout the polysilicon layer.

[0071] Material: Doped polysilicon, common dopants are phosphorus (N-type doping) or boron (P-type doping).

[0072] Function: Precisely adjusts the resistance value and temperature coefficient by controlling the doping concentration and distribution.

[0073] Metal Contacts / Electrodes

[0074] Location: Located at both ends or on the surface of the polysilicon layer, for input and output of current.

[0075] Material: Aluminum, titanium, tungsten or copper.

[0076] Thickness: 100 - 300 nanometers.

[0077] Function: Provide electrical connection and integrate the resistor device into an external circuit.

[0078] Packaging Layer

[0079] Location: The outermost layer covering the entire device, covering the polysilicon layer and metal electrodes.

[0080] Material: Polymer material.

[0081] Function: Protect the device from the external environment (such as moisture, oxidation, mechanical stress), ensuring the long-term stability and reliability of the device.

[0082] A manufacturing method of a high-performance silicon-based semiconductor polysilicon film resistor device includes the following steps:

[0083] S1: Preparation of silicon-based substrate

[0084] Selection of silicon wafer:

[0085] Type: P-type or N-type single crystal silicon, usually using silicon wafers with <100> or <111> crystal orientations to obtain good mechanical and electrical properties.

[0086] Thickness: 500 - 700 microns to ensure sufficient mechanical strength.

[0087] Resistivity: 1 - 10 ohm·cm, low-doped silicon wafers can reduce the influence of the substrate on the device performance.

[0088] Cleaning:

[0089] Solvent cleaning: Use acetone and isopropyl alcohol for ultrasonic cleaning.

[0090] Steps: First, put the silicon wafer into acetone and ultrasonically clean for 5 minutes, then repeat the cleaning with isopropyl alcohol for 5 minutes.

[0091] Purpose: Remove organic contaminants such as grease and photoresist residues.

[0092] Wet cleaning:

[0093] RCA-1 (SC-1): NHOH:HO:HO = 1:1:5, temperature 75 - 80 °C, clean for 10 minutes.

[0094] Steps: Mix the mixture of ammonia water and hydrogen peroxide with water in proportion at high temperature, add the silicon wafer, rinse with ultrapure water after cleaning for 10 minutes.

[0095] Purpose: Remove organic contaminants and particles on the surface of the silicon wafer.

[0096] RCA-2(SC-2): HCl: HO: HO = 1:1:6, at a temperature of 75 - 80 °C, clean for 10 minutes.

[0097] Steps: Mix the mixture of hydrochloric acid and hydrogen peroxide with water in proportion at high temperature, and rinse with ultrapure water after cleaning for 10 minutes.

[0098] Purpose: Remove metal ion contamination, such as iron, copper, etc.

[0099] Remove the oxide layer: Use a 5% hydrofluoric acid (HF) solution to remove the native oxide layer on the surface of the silicon wafer.

[0100] Steps: Immerse the silicon wafer in a 5% HF solution for 30 seconds to 1 minute, and then rinse with ultrapure water.

[0101] Purpose: Remove the native oxide layer on the surface to make the surface more active and facilitate subsequent processes.

[0102] Drying: Dry the silicon wafer with nitrogen gas or use a spin drying equipment for drying.

[0103] Steps: Put the cleaned silicon wafer into a spin drying equipment or directly blow-dry it with high-purity nitrogen gas.

[0104] Purpose: Prevent water spots and particle attachment and keep the surface of the silicon wafer clean.

[0105] S2: Insulating layer growth

[0106] Thermal oxidation process:

[0107] Equipment: Use a horizontal or vertical thermal oxidation furnace with oxygen (O) as the oxidation source.

[0108] Horizontal furnace: Suitable for high-volume production with good uniformity.

[0109] Vertical furnace: Suitable for laboratory and small- to medium-scale production with a small footprint.

[0110] Process conditions: The temperature is 900 - 1100 °C, and the oxygen flow rate is controlled at 0.5 - 2 L / min.

[0111] Oxidation time: The oxidation time is controlled between 30 minutes and 2 hours according to the required oxide layer thickness.

[0112] Thickness control: The thickness of the finally obtained SiO insulating layer is usually 100 - 300 nanometers.

[0113] Oxidation quality control: Measure the oxide layer thickness with an ellipsometer and analyze the oxide layer composition and uniformity using XPS or SIMS.

[0114] Ellipsometer: Used to monitor the growth thickness of the oxide layer in real time to ensure uniformity.

[0115] XPS or SIMS: Used to analyze the chemical composition and impurity distribution of the oxide layer.

[0116] CVD growth of insulating layer (alternative method):

[0117] Equipment: Use low-pressure chemical vapor deposition (LPCVD) equipment.

[0118] LPCVD equipment: Suitable for deposition at low pressure, reducing gas collisions and improving film quality.

[0119] Process conditions: Temperature is 600 - 700 °C, pressure is controlled at 200 - 500 mTorr.

[0120] Deposition rate: Usually 10 - 30 nm / min, thickness is controlled at 100 - 300 nanometers.

[0121] Precursor gases: SiH and NO, ensuring chemical uniformity of the oxide layer.

[0122] Quality control: Measure surface roughness by atomic force microscopy (AFM), measure thickness using an ellipsometer.

[0123] AFM: Used for precise measurement of surface roughness to ensure a smooth surface.

[0124] Ellipsometer: Used for thickness measurement and uniformity inspection.

[0125] S3: Deposition of polysilicon layer

[0126] LPCVD process:

[0127] Equipment: Use an LPCVD furnace.

[0128] LPCVD furnace: Used to deposit polysilicon layers under low-pressure conditions, suitable for mass production.

[0129] Precursor gas: SiH (silane), flow rate is 50 - 200 sccm.

[0130] Gas control: Adjust the deposition rate and thickness by precisely controlling the flow rate of silane gas.

[0131] Deposition conditions: Temperature is 600 - 700 °C, pressure is controlled at 200 - 300 mTorr.

[0132] Deposition time: Adjust the deposition time according to the required thickness, usually 30 minutes to 2 hours, to obtain a polysilicon layer of 100 - 500 nanometers.

[0133] Crystallization quality control: Analyze the grain size and orientation of the polysilicon layer using X-ray diffraction (XRD), and observe the grain boundary structure through transmission electron microscopy (TEM).

[0134] XRD: Used to analyze the grain size and orientation of the polysilicon layer and evaluate the crystallization quality.

[0135] TEM: Used to observe the grain boundary structure of polysilicon and ensure the electrical properties of the material.

[0136] S4: Doping process

[0137] Ion implantation:

[0138] Equipment: Use an ion implanter.

[0139] Ion implanter: Precisely control the energy and dose of the doping element to ensure doping uniformity.

[0140] Implanting element: Select phosphorus (P+) or boron (B+).

[0141] Implantation energy: Usually between 10 - 100 keV, adjusted according to the target doping depth.

[0142] Implantation dose: 1×1013to1×101atoms / cm 2 , which determines the final resistance value.

[0143] Doping uniformity control: Measure the doping distribution using secondary ion mass spectrometry (SIMS) and adjust the implantation parameters to obtain a uniform doping concentration.

[0144] SIMS: Precisely analyze the depth distribution and concentration of doping to ensure doping uniformity.

[0145] Diffusion process:

[0146] Equipment: Use a rapid thermal annealing (RTA) equipment or a diffusion furnace.

[0147] RTA equipment: Suitable for short-time high-temperature treatment to reduce non-uniform diffusion.

[0148] Process conditions: Diffusion temperature is 900 - 1000 °C, time is 10 - 60 minutes, and the atmosphere is nitrogen or oxygen.

[0149] Diffusion depth control: Precisely adjust the diffusion depth of the doping element by controlling the temperature and time.

[0150] Quality control: Measure the doping depth through SIMS or profile analysis to ensure uniformity.

[0151] S5: Patterning process

[0152] Lithography process:

[0153] Equipment: Use a step-and-repeat lithography machine or a mask aligner exposure machine.

[0154] Step-and-repeat lithography machine: High-resolution lithography, suitable for micron-scale patterning.

[0155] Photoresist coating: Spin-coat positive or negative photoresist with a thickness of 1-2 microns, a spin speed of 3000-5000 rpm, and a time of 30-60 seconds.

[0156] Positive photoresist: Becomes soluble in the exposed area to form a pattern.

[0157] Negative photoresist: Does not dissolve in the exposed area to form a pattern.

[0158] Exposure conditions: The exposure energy is usually 100-200 mJ / cm 2 , and the exposure time is 2-10 seconds.

[0159] Ultraviolet light exposure: Precisely control the exposure time and energy to form a clear pattern.

[0160] Development: Use a developer (such as TMAH) for development, and the development time is 30 seconds to 2 minutes.

[0161] Developer: TMAH is usually 0.26 N and is used to remove the unnecessary photoresist part after exposure.

[0162] Quality control: Use an optical microscope to check the pattern integrity and observe the pattern edges through a scanning electron microscope (SEM).

[0163] Optical microscope: Used to quickly check whether the pattern is complete.

[0164] SEM: Used to observe the edge quality and details of the pattern with high resolution.

[0165] Dry etching:

[0166] Equipment: Use a reactive ion etching (RIE) equipment.

[0167] RIE equipment: Achieve anisotropic etching of materials through ion collision to form high-fidelity patterns.

[0168] Etching gas: Use a gas mixture such as CF, SF, or Cl.

[0169] Gas flow rate: Precisely control the etching rate, and the combination of gases such as CF, SF, and Cl can optimize the etching rate and selectivity.

[0170] Etching rate: 50-100 nm / min.

[0171] Etching time: Adjust the etching time according to the target thickness, usually 1 - 10 minutes.

[0172] Etching depth control: Measure the etching depth with a profilometer or AFM to ensure the target thickness is achieved.

[0173] Profilometer: Used to measure the depth after etching and verify the etching effect.

[0174] AFM: Used for high-precision measurement of surface topography and etching depth.

[0175] S6: Heat treatment

[0176] Annealing process:

[0177] Equipment: Use a rapid thermal annealing (RTA) equipment or a high-temperature furnace with nitrogen protection.

[0178] RTA equipment: Rapid heating and cooling to reduce thermal damage and non-uniform diffusion.

[0179] Temperature and time: The annealing temperature is usually 800 - 1000 °C, and the time is 10 - 30 minutes.

[0180] Atmosphere control: Use nitrogen or hydrogen protection to prevent oxidation of polysilicon.

[0181] Cooling rate: Usually controlled at 10 - 50 °C / min to reduce stress-induced damage.

[0182] Quality control: Analyze the grain growth of polysilicon by XRD and measure the change in resistance value through resistance testing.

[0183] XRD: Used to analyze grain growth and crystal quality after annealing.

[0184] Resistance testing: Verify the effect of annealing on the resistance value and ensure that the resistance value is within the target range.

[0185] S7: Metal electrode deposition

[0186] Metal deposition:

[0187] Equipment: Use physical vapor deposition (PVD) equipment, such as a sputtering coater or an electron beam evaporator.

[0188] Sputtering coater: Suitable for large-area uniform deposition and precise control of film thickness.

[0189] Electron beam evaporator: High-precision deposition, suitable for micron-scale patterns.

[0190] Metal materials: Select aluminum, titanium, tungsten, or copper as electrode materials, and the deposition thickness is 100 - 300 nm.

[0191] Deposition rate: Controlled at 1 - 10 nm / s to ensure uniform deposition and good adhesion.

[0192] Quality control: Measure the resistivity of the metal layer using the four-probe test method and check the electrode pattern by SEM.

[0193] Four-probe test: Used to accurately measure the resistivity of the metal layer and ensure electrical performance.

[0194] SEM: Used to check the integrity and edge quality of the electrode pattern.

[0195] Electrode patterning:

[0196] Lithography and etching: Similar to the patterning of the polysilicon layer, use lithography and dry etching to form the metal electrode pattern.

[0197] Photoresist coating, exposure, development: The same lithography steps as before to form the metal electrode pattern.

[0198] Pre-packaging inspection: Use an optical microscope and SEM to check the integrity and edge clarity of the electrode pattern.

[0199] Optical microscope: Used to quickly check the integrity of the electrode pattern.

[0200] SEM: High-resolution inspection of the edge and surface quality of the electrode.

[0201] S8: Packaging

[0202] Packaging process:

[0203] Equipment: Use a thermocompression bonder or ultrasonic bonder to connect the metal leads and use a polymer material for packaging.

[0204] Welding temperature: Usually controlled at 150 - 300 °C and adjusted according to the packaging material and process requirements.

[0205] Packaging material: Polymer material, select a packaging material suitable for the working environment.

[0206] Epoxy resin: High temperature resistant, suitable for the packaging of most electronic devices.

[0207] Polymer material: Provide better environmental protection and are suitable for special applications.

[0208] Curing time: Usually 1 - 2 hours, and the curing temperature is 100 - 150 °C.

[0209] Curing process: Control the curing conditions to ensure that the packaging material is fully cured and form a reliable protective layer.

[0210] Hermeticity and mechanical strength testing:

[0211] Airtightness test: Helium leak detection is used with a detection limit of 10^-8 to 10^-10 atm·cc / s.

[0212] Mechanical strength test: Tensile tests are conducted to ensure the mechanical stability of the package. Usually, the test tensile force can reach several kilogram-force (kgf).

[0213] S9: Performance optimization and adjustment

[0214] Resistance adjustment: The resistance value is precisely adjusted by repeating the doping and annealing processes or by using laser trimming technology.

[0215] Laser trimming: The resistance value is adjusted by laser ablation. The laser power is usually 1 - 10 W, and the exposure time is from a few milliseconds to several seconds, which is precisely adjusted according to the required resistance value.

[0216] Temperature coefficient adjustment: According to the application requirements, the temperature coefficient is adjusted by changing the doping type and concentration to ensure the stability of the resistance device at different temperatures.

[0217] Lot control: The manufacturing process is monitored through statistical process control (SPC) and Six Sigma methods to ensure the consistency of device performance between lots.

[0218] SPC: Monitor the fluctuations of key process parameters to ensure they are within an acceptable range.

[0219] Six Sigma: Reduce process defects and improve product yield and consistency.

[0220] In the semiconductor manufacturing process, a variety of chemical substances and chemical reactions are involved. The following are the explanations of the chemical formulas used:

[0221] 1. H₂SO₄ (sulfuric acid)

[0222] Chemical formula: H₂SO₄

[0223] Properties: Sulfuric acid is a strong acid with high corrosiveness and strong oxidizing properties.

[0224] Uses: In semiconductor manufacturing, sulfuric acid is often mixed with hydrogen peroxide (H₂O₂) to form a Piranha solution, which is used to clean organic contaminants on the surface of silicon wafers. It decomposes organic substances through strong oxidation and, with its strong acidity, can dissolve some metal oxides.

[0225] 2. NH₄OH (ammonium hydroxide / ammonia water)

[0226] Chemical formula: NH₄OH

[0227] Properties: Ammonium hydroxide is a weak base solution and is commonly used as a cleaning agent. It is ammonia gas (NH₃)

[0228] The product after dissolving in water, so it is also called ammonia water.

[0229] Usage: In the RCA cleaning process, ammonium hydroxide is mixed with hydrogen peroxide and water to remove particulate contaminants and some metal impurities on the surface of silicon wafers. The alkalinity of ammonium hydroxide helps to remove particulate matter and promotes the decomposition of organic substances.

[0230] 3. HO (hydrogen peroxide)

[0231] Chemical formula: HO

[0232] Properties: Hydrogen peroxide is a colorless liquid with strong oxidizing properties. It can slowly decompose into water and oxygen in aqueous solution.

[0233] Usage: In semiconductor manufacturing, hydrogen peroxide is usually mixed with sulfuric acid or ammonium hydroxide for cleaning silicon wafers. Due to its strong oxidizing properties, it can effectively decompose and remove organic substances, and oxidize metal impurities in an alkaline environment, making them more soluble and easier to remove.

[0234] 4. HF (hydrofluoric acid)

[0235] Chemical formula: HF

[0236] Properties: Hydrofluoric acid is a highly corrosive acid that can dissolve many metal oxides and silicon oxides.

[0237] Usage: In semiconductor manufacturing, HF solution is commonly used to remove the native oxide layer (silicon dioxide, SiO) on the surface of silicon wafers. HF reacts with SiO to form soluble silicon tetrafluoride (SiF), thereby removing the oxide layer and exposing the pure silicon surface.

[0238] 5. SiH (silane)

[0239] Chemical formula: SiH

[0240] Properties: Silane is a colorless, highly toxic and flammable gas, belonging to silicon tetrahydride. It is easily decomposed into silicon and hydrogen at high temperatures.

[0241] Usage: In the LPCVD process, SiH is used as a silicon source to deposit polysilicon or amorphous silicon thin films through its decomposition. Under heating conditions, SiH will decompose, releasing silicon atoms that deposit on the substrate to form a thin film.

[0242] 6. NO (nitrous oxide)

[0243] Chemical formula: NO

[0244] Properties: Nitrous oxide is a colorless, slightly sweet gas, commonly used in industrial chemistry. It is one of the greenhouse gases but is relatively stable under normal conditions.

[0245] Usage: In the LPCVD process, NO can be used as an oxygen source for oxidation reactions or for depositing silicon oxide layers. It reacts with SiH to form SiO and hydrogen gas, creating an insulating layer.

[0246] 7. CF (Carbon Tetrafluoride)

[0247] Chemical Formula: CF

[0248] Properties: Carbon tetrafluoride is a stable compound. It is a colorless, odorless gas at room temperature, with high chemical inertness and thermal stability.

[0249] Usage: CF is commonly used in dry etching processes, especially in reactive ion etching (RIE) to etch materials such as silicon or silicon dioxide. It decomposes in the plasma to produce reactive fluorine atoms, which can efficiently etch silicon-based materials.

[0250] 8. SF (Sulfur Hexafluoride)

[0251] Chemical Formula: SF

[0252] Properties: Sulfur hexafluoride is a colorless, odorless, non-toxic, and highly stable gas, with strong electrical insulation properties and chemical stability.

[0253] Usage: In the RIE process, SF is commonly used to etch silicon materials. SF decomposes in the plasma to produce reactive fluorine atoms, which react with silicon to form volatile silicon tetrafluoride (SiF), thereby etching the silicon material.

[0254] 9. Cl (Chlorine Gas)

[0255] Chemical Formula: Cl

[0256] Properties: Chlorine gas is a yellow-green gas with a strong pungent odor, having strong oxidizing properties and high toxicity.

[0257] Usage: In semiconductor manufacturing, Cl gas is used in dry etching processes, especially in the etching of metal layers. Chlorine gas forms reactive chlorine atoms in the plasma, which can react with metals such as aluminum to form volatile chlorides, thereby achieving the etching of metals.

[0258] The following is introduced in combination with specific embodiments:

[0259] Example 1

[0260] Silicon-based Substrate:

[0261] Type: N-type single-crystalline silicon

[0262] Thickness: 600 microns

[0263] Resistivity: 5 ohm·cm

[0264] Insulation layer growth:

[0265] Method: Thermal oxidation

[0266] Temperature: 1000 °C

[0267] Oxygen flow rate: 1.5 L / min

[0268] Oxidation time: 1 hour

[0269] Oxide layer thickness: 200 nm

[0270] Polycrystalline silicon layer deposition:

[0271] Method: LPCVD

[0272] Temperature: 650 °C

[0273] Pressure: 250 mTorr

[0274] Polycrystalline silicon thickness: 300 nm

[0275] Doping treatment:

[0276] Ion implantation: Phosphorus, energy 40 keV, dose 1×10¹ atoms / cm 2

[0277] Thermal diffusion: 950 °C, 30 minutes

[0278] Patterning process:

[0279] Photoresist: Positive photoresist, thickness 1.5 µm

[0280] Exposure energy: 150 mJ / cm 2

[0281] Dry etching: RIE, gas CF / SF, etching rate 80 nm / min Metal electrode deposition:

[0282] Material: Aluminum

[0283] Thickness: 200 nm

[0284] Deposition rate: 5 nm / s

[0285] Packaging:

[0286] Packaging material: Epoxy resin

[0287] Curing temperature: 120 °C, time 1 hour

[0288] Example 2

[0289] Silicon-based substrate:

[0290] Type: P-type single crystal silicon

[0291] Thickness: 700 microns Resistivity: 3 ohm·cm

[0292] Insulating layer growth:

[0293] Method: CVD

[0294] Temperature: 700 °C

[0295] Pressure: 300 mTorr

[0296] Oxide layer thickness: 250 nm

[0297] Deposition rate: 20 nm / min

[0298] Polysilicon layer deposition:

[0299] Method: LPCVD

[0300] Temperature: 680 °C

[0301] Pressure: 200 mTorr

[0302] Polysilicon thickness: 400 nm

[0303] Doping treatment:

[0304] Ion implantation: Boron, energy 60 keV, dose 1×101 atoms / cm 2 Thermal diffusion: 1000 °C, 20 minutes

[0305] Patterning process:

[0306] Photoresist: Negative photoresist, thickness 2 microns

[0307] Exposure energy: 180 mJ / cm 2

[0308] Dry etching: RIE, gas Cl / SF, etching rate 90 nm / min Metal electrode deposition:

[0309] Material: Tungsten

[0310] Thickness: 150 nm

[0311] Deposition rate: 4 nm / s

[0312] Packaging:

[0313] Packaging material: High-temperature polyimide

[0314] Curing temperature: 150 °C, time 2 hours

[0315] Example 3

[0316] Silicon-based substrate:

[0317] Type: N-type monocrystalline silicon

[0318] Thickness: 600 microns Resistivity: 8 ohm·cm

[0319] Insulating layer growth:

[0320] Method: Thermal oxidation

[0321] Temperature: 950 °C

[0322] Oxygen flow rate: 1 L / min

[0323] Oxidation time: 45 minutes

[0324] Oxide layer thickness: 150 nm

[0325] Polycrystalline silicon layer deposition:

[0326] Method: LPCVD

[0327] Temperature: 640 °C

[0328] Pressure: 220 mTorr

[0329] Polycrystalline silicon thickness: 350 nm

[0330] Doping treatment:

[0331] Ion implantation: Phosphorus, energy 30 keV, dose 1×1013 atoms / cm 2 Thermal diffusion: 900 °C, 40 minutes

[0332] Patterning process:

[0333] Photoresist: Positive photoresist, thickness 1.2 microns

[0334] Exposure energy: 120 mJ / cm 2

[0335] Dry etching: RIE, gas CF / Cl, etching rate 70 nm / min Metal electrode deposition:

[0336] Material: Aluminum / titanium composite layer

[0337] Thickness: 100 nm aluminum, 50 nm titanium

[0338] Deposition rate: 6 nm / s

[0339] Packaging:

[0340] Packaging material: Low-noise polymer coating

[0341] Curing temperature: 100 °C, time 1.5 hours

[0342] Example 4

[0343] Silicon-based substrate:

[0344] Type: SOI wafer Thickness: 600 microns (including insulation layer and silicon film)

[0345] Resistivity: 5 ohm·cm

[0346] Insulation layer growth:

[0347] Method: BOX layer thickness control

[0348] Thickness: 200 nm

[0349] Polysilicon layer deposition:

[0350] Method: LPCVD

[0351] Temperature: 650 °C

[0352] Pressure: 250 mTorr

[0353] Polysilicon thickness: 150 nm

[0354] Doping treatment:

[0355] Ion implantation: Phosphorus, energy 50 keV, dose 5×1013 atoms / cm 2 Thermal diffusion: 950 °C, 25 minutes

[0356] Patterning process:

[0357] Photoresist: Positive photoresist, thickness 1.0 micron

[0358] Exposure energy: 110 mJ / cm 2

[0359] Dry etching: RIE, gas CF / SF, etching rate 60 nm / min

[0360] Metal electrode deposition:

[0361] Material: Aluminum

[0362] Thickness: 100 nm

[0363] Deposition rate: 5 nm / s

[0364] Packaging:

[0365] Packaging material: Polyimide

[0366] Curing temperature: 120 °C, time 1 hour.

[0367] Comparison of Various Attributes of High-Performance Silicon-Based Semiconductor Polysilicon Film Resistor Devices Manufactured in Different Embodiments during Use

[0368]

[0369] Among them, the explanations of the table fields are as follows:

[0370] Temperature Coefficient of Resistance: The temperature coefficient of resistance (TCR) represents the degree to which the resistance value changes with temperature. It is usually expressed in ppm / °C (parts per million per degree Celsius). A positive temperature coefficient means the resistance increases as the temperature rises, while a negative temperature coefficient indicates that the resistance decreases as the temperature rises. This field shows the temperature coefficient characteristics of the resistor devices in each embodiment, described as medium, low, very low, etc.

[0371] Temperature Resistance Performance: The temperature resistance performance indicates the ability of the device to operate in a high-temperature environment. High temperature resistance performance means that the resistor device can maintain stable electrical characteristics at a relatively high temperature without being affected by temperature changes. This field shows the adaptability of the resistor devices in each embodiment in a high-temperature environment, described as "medium", "high", or "low to medium".

[0372] Noise Characteristics: The noise characteristics refer to the level of electrical noise generated by the resistor device during operation. Low noise characteristics are very important for high-precision and sensitive applications because it can reduce random interference in the signal. This field describes the noise level of the resistor devices in each embodiment, described as "medium" or "low noise".

[0373] Electrode Durability: Electrode durability refers to the ability of the metal electrodes in the resistor device to maintain their conductive properties and structural integrity under long-term use and various operating environments (such as temperature changes, mechanical stress, corrosive atmospheres, etc.). High-durability electrodes can maintain stable electrical connections under harsh conditions, avoiding performance degradation or failure due to degradation of the electrode material. This field describes the durability of the electrodes in each embodiment, marked as "standard", "high", or "medium", reflecting the impact of the electrode material and deposition process on its long-term stability.

[0374] Although the embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A high-performance silicon-based semiconductor polysilicon film resistor device, characterized in that: include: Silicon-based substrate: The bottom layer of the entire device, located at the bottom, is the supporting substrate for other layers. The material is single-crystal silicon wafer, which is P-type or N-type; Insulating layer: directly covers the surface of the silicon-based substrate, and the material is thermally grown silicon dioxide; Polysilicon layer: located above the insulating layer, the material is a polysilicon film deposited by LPCVD; Doped region: distributed inside the polysilicon layer, the doping elements are evenly distributed throughout the polysilicon layer, and the material is doped polysilicon; Metal electrodes: located at both ends or on the surface of the polysilicon layer, used for current input and output, made of aluminum, titanium, tungsten or copper; Packaging layer: The outermost layer covering the entire device, encapsulating the polysilicon layer and metal electrodes.

2. A high performance silicon-based semiconductor polycrystalline silicon film resistor device according to claim 1, characterized in that: The thickness of the silicon-based substrate is 500-700 micrometers, the thickness of the insulating layer is 100-300 nanometers, the thickness of the polysilicon layer is 100-500 nanometers, and the thickness of the metal electrode is 100-300 nanometers.

3. A method for manufacturing a high-performance silicon-based semiconductor polycrystalline silicon film resistor device, according to any one of claims 1-2, characterized in that: The following steps are involved: S1: Silicon substrate preparation Select P-type or N-type single crystal silicon wafer as the substrate and go through a multi-step cleaning process. After removing the natural oxide layer, the silicon wafer is ready for subsequent process steps; S2: Insulating layer growth A layer of silicon dioxide is grown on the surface of the silicon-based substrate for electrical isolation; S3: Polysilicon layer deposition Depositing a polysilicon film on the insulating layer by LPCVD process; S4: Doping treatment Introducing doping elements into the polysilicon layer to control the resistance value through ion implantation and / or diffusion processes; S5: Graphical Process Using photolithography and dry etching processes, the polysilicon layer is patterned to form the desired resistor shape; S6: Heat treatment Activate doping elements through heat treatment and optimize the electrical properties and grain structure of polysilicon; S7: Metal Electrode Deposition Depositing metal electrodes at both ends of the polysilicon layer to form electrodes for electrical connection through a physical vapor deposition process; S8: Encapsulation Packaging resistor devices; S9: Performance optimization and tuning The resistance value and temperature coefficient are adjusted through repeated doping, annealing process or laser trimming technology.

4. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the step S1, the thickness of the selected P-type or N-type single crystal silicon wafer is 500-700 microns, and the resistivity is between 1-10 ohm·cm; Solvent cleaning: Use acetone and isopropyl alcohol for ultrasonic cleaning, each ultrasonic cleaning lasts 5-10 minutes; Wet cleaning: Use sulfuric acid or ammonia: hydrogen peroxide to remove metal ions and particulate contaminants at a temperature of 75-80°C for 10 minutes; Remove the oxide layer: Use 5% dilute hydrofluoric acid solution to remove the natural oxide layer on the surface of the silicon wafer. The soaking time is 30 seconds to 1 minute. Drying: Blow dry the silicon wafer with nitrogen, or bake it at 100°C for 1 to 2 minutes; In the S2 step, a horizontal or vertical thermal oxidation furnace is used, oxygen is used as an oxidation source, the temperature is 900-1100° C., the oxygen flow rate is controlled at 0.5-2 L / min, the time is controlled at 30 minutes to 2 hours, and the thickness of the oxide layer is measured by an ellipsometer, and the composition and uniformity of the oxide layer are analyzed using XPS or SIMS.

5. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the step S3, an LPCVD furnace is used, the precursor gas is silane, the flow rate is 50-200 sccm, the deposition temperature is 600-700°C, the pressure is controlled at 200-300 mTorr, the deposition time is 30 minutes to 2 hours, the grain size and orientation of the polycrystalline silicon layer are analyzed by X-ray diffraction, and the grain boundary structure is observed by transmission electron microscopy; In the step S4, ion implantation is performed using an ion implanter, the implanted element is selected to be phosphorus or boron, the implantation energy is between 10-100 keV, and the implantation dose is 1×1013 to 1×101 atoms / cm 2 , using secondary ion mass spectrometry to measure the doping profile and adjust the implantation parameters to obtain a uniform doping concentration; The diffusion process uses rapid thermal annealing equipment or a diffusion furnace, with a diffusion temperature of 900-1000°C and a time of 10-60 minutes in a nitrogen or oxygen atmosphere. The doping depth is measured by SIMS or profile analysis to adjust the diffusion time and temperature.

6. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the step S5, the photolithography process uses a stepper or a mask alignment exposure machine, and the photoresist coating uses spin coating positive or negative photoresist with a thickness of 1-2 microns and an exposure energy of 100-200 mJ / cm 2 , the exposure time is 2-10 seconds, and the development time is 30 seconds to 2 minutes using 0.26NTMAH solution. The integrity of the pattern is checked using an optical microscope, and the edge of the pattern is observed using a scanning electron microscope; Dry etching uses reactive ion etching equipment, and the etching gas uses CF, SF or Cl gas mixture. The etching rate is 50-100nm / min, the pressure is 10-100mTorr, the etching power is 100-300W, and the etching time is 1-10 minutes. The etching depth is measured by a step profiler or AFM, and the etching time is adjusted to achieve the target.

7. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the step S6, the annealing process uses a rapid thermal annealing device or a high-temperature furnace protected by nitrogen, the annealing temperature is 800-1000°C, the time is 10-30 minutes, and nitrogen or hydrogen protection is used, the cooling rate is 10-50°C / min, the grain growth of polycrystalline silicon is analyzed by XRD, and the change in resistance value is measured by resistance test.

8. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the S7 step, the metal is deposited using a sputtering coater or an electron beam evaporator, aluminum, titanium, tungsten or copper is selected as the electrode material, the deposition thickness is 100-300 nanometers, the deposition rate is controlled at 1-10 nm / s, the resistivity of the metal layer is measured using a four-probe test method, the electrode pattern is inspected by SEM, and the metal electrode pattern is formed by photolithography and dry etching, and the integrity and edge clarity of the electrode pattern are inspected using an optical microscope and SEM.

9. The method for manufacturing a high-performance silicon-based semiconductor polysilicon film resistor device according to claim 3, characterized in that: In the step S8, a hot press welding machine or an ultrasonic welding machine is used to connect the metal leads, the welding temperature is 150-300°C, a polymer material is used for packaging, the curing time is 1-2 hours, the curing temperature is 100-150°C, the packaging quality is verified by a helium leak test and a tensile test, and the resistance value, temperature coefficient and noise characteristics of the resistor are tested using an automatic probe station.

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