Sensing, storing and computing integrated transistor based on organic-inorganic heterogeneous dielectric layer, preparation method of transistor and application of transistor in programmable display drive

Abstract

The invention provides a sensing, storage and calculation integrated transistor based on an organic-inorganic heterogeneous dielectric layer, a preparation method of the transistor and application of the transistor in programmable display driving, and belongs to the technical field of organic field effect transistors. The sensing-storage integrated transistor based on the organic-inorganic heterogeneous dielectric layer sequentially comprises a substrate, a dielectric layer, an organic small molecule semiconductor layer and a source / drain electrode from bottom to top, and the dielectric layer is the organic-inorganic heterogeneous dielectric layer; the organic-inorganic heterogeneous dielectric layer is of a double-layer structure composed of a lower dielectric layer and an upper dielectric layer, the upper dielectric layer is a polyamide acid layer, and the lower dielectric layer is a hafnium oxide layer. According to the invention, the polyamic acid-hafnium oxide heterogeneous dielectric layer is utilized to obtain the high-performance and low-energy-consumption organic thin film transistor array which has storage performance and excellent photoelectric sensing performance and integrates sensing, storage and calculation, and the organic thin film transistor array is applied to programmable display driving; and a new way is developed for development and application of the fields of organic sensing, storage and calculation integrated neuromorphic visual devices and display driving.

Description

Technical Field

[0001] The present invention belongs to the technical field of organic field-effect transistors, and particularly relates to a sensing, storage, and computing integrated transistor based on an organic-inorganic heterodielectric layer, a preparation method thereof, and an application in programmable display driving. Background Art

[0002] With the rapid development of the Internet of Things and the field of artificial intelligence, sensing data is experiencing explosive growth. The problem that the sensing, storage, and computing units in traditional machine vision systems are physically separated makes it increasingly difficult to meet the growing demands for low energy consumption and high efficiency. Organic thin-film transistors (OTFTs) integrating the functions of "sensing-storage-computing" are expected to overcome the bottlenecks of high energy consumption and low efficiency in traditional machine vision systems. However, only a limited number of organic thin-film transistors integrate sensing, synaptic performance, and storage functions to explore the synergistic enhancement effect of light responsiveness and storage performance. This limitation stems from the inherent conflict between the charge trapping effect and the effective charge transport characteristics. In addition, currently available organic photonic synaptic transistors usually have characteristics such as short-term plasticity, rapid decay of postsynaptic current, and insufficient attention to the sensitivity and response speed of the devices. Although a few devices integrate photonic synapses and storage functions, the synergistic enhancement of light sensing ability, storage performance, and computing ability has not been achieved, and the use of "sensing-storage-computing" integrated OTFTs to drive light-emitting diode (LED) arrays and achieve programmable control of LED arrays has not been reported. Therefore, realizing a high-performance, low-energy-consuming "sensing-storage-processing" integrated organic thin-film transistor array with both storage performance and excellent optoelectronic sensing performance is crucial for the development and application of organic sensing, storage, and computing integrated neuromorphic vision devices and the field of display driving. Summary of the Invention

[0003] Aiming at the key problem that it is difficult for organic thin-film transistors (OTFTs) to have both storage performance and excellent optoelectronic sensing performance, the present invention proposes a sensing, storage, and computing integrated transistor based on an organic-inorganic heterodielectric layer, a preparation method thereof, and an application in programmable display driving. The present invention combines hafnium oxide (HfO 2 ) and polyamic acid (PAA) as the dielectric layer of the organic thin-film transistor, combines the ability of PAA to induce strong charge carriers and the charge trapping ability of HfO 2 , and obtains a high-performance, low-energy-consuming "sensing-storage-computing" integrated organic thin-film transistor array with both storage performance and excellent optoelectronic sensing performance, and its "sensing-storage-computing" characteristics enable it to be used in an LED array driven by a programmable OTFT.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] One of the technical solutions of the present invention:

[0006] A memory-in-computation integrated transistor based on an organic-inorganic hetero dielectric layer, which sequentially includes a substrate, a dielectric layer, an organic small molecule semiconductor layer, and source / drain electrodes from bottom to top. The dielectric layer is an organic-inorganic hetero dielectric layer; the organic-inorganic hetero dielectric layer is a bilayer structure composed of a lower dielectric layer and an upper dielectric layer. The upper dielectric layer is a polyamic acid (PAA) layer, and the lower dielectric layer is a hafnium oxide (HfO 2 ) layer.

[0007] A transistor with a single-layer polyamic acid as the dielectric layer has excellent charge transport performance but does not have non-volatile storage performance. A transistor with a single-layer hafnium oxide as the dielectric layer has poor charge transport ability and poor light perception ability. The present invention combines a polyamic acid (PAA) layer with hafnium oxide (HfO 2 ) to prepare an organic-inorganic hetero dielectric layer, endowing the organic thin film transistor with excellent light perception ability and efficient charge transport performance, and also having excellent storage performance. Among them, polyamic acid is used as the upper dielectric layer and is in direct contact with the organic small molecule semiconductor layer, which is beneficial to inducing charge transfer at the semiconductor-dielectric layer interface, has better charge transport performance, improves the mobility of the device, and also realizes the detection of weak light. At the same time, hafnium oxide in the lower layer can well capture charges as a charge trapping layer, making the device have excellent non-volatile storage performance.

[0008] Further, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0-270 nm (not 0); preferably, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

[0009] Further, the substrate is a silicon substrate, the organic small molecule semiconductor layer is a 2,9-didecylnaphtho[2,3b:2',3'f]thieno[3,2b]thiophene (C10-DNTT) layer, and the source / drain electrodes are gold (Au) source / drain electrodes.

[0010] Further, the thickness of the organic small molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrodes is 20 nm.

[0011] Two of the technical solutions of the present invention:

[0012] A preparation method of the memory-in-computation integrated transistor based on the organic-inorganic hetero dielectric layer, comprising the following steps:

[0013] A hafnium oxide layer is prepared on a substrate by plasma-enhanced atomic layer deposition (PEALD). A polyamic acid layer is prepared on the hafnium oxide layer by spin coating to form an organic-inorganic heterogeneous dielectric layer on the substrate. Then, an organic small molecule semiconductor layer is deposited by evaporation using a coating instrument on the organic-inorganic heterogeneous dielectric layer, and source / drain electrodes are deposited by evaporation using a metal coating instrument to obtain the memory-in-sensor-integrated transistor based on the organic-inorganic heterogeneous dielectric layer.

[0014] Further, tetra(dimethylamino)hafnium (Hf[N(CH 3 ) 2 4 ) is used as a precursor for preparing the hafnium oxide layer.

[0015] The third technical solution of the present invention:

[0016] Application of the memory-in-sensor-integrated transistor based on the organic-inorganic heterogeneous dielectric layer in programmable display driving.

[0017] The fourth technical solution of the present invention:

[0018] A light-emitting diode array driven by a programmable organic thin-film transistor, including the memory-in-sensor-integrated transistor based on the organic-inorganic heterogeneous dielectric layer.

[0019] Further, the memory-in-sensor-integrated transistor based on the organic-inorganic heterogeneous dielectric layer is connected to a light-emitting diode through a circuit. Writing of patterns is achieved through an external light source and a mask, and then erasing is performed through a negative gate voltage to obtain a light-emitting diode array driven by a programmable organic thin-film transistor.

[0020] Compared with the prior art, the present invention utilizes a polyamic acid-hafnium oxide heterogeneous dielectric layer to obtain a high-performance and low-power consumption memory-in-sensor-integrated organic thin-film transistor array with both storage performance and excellent optoelectronic sensing performance, opening up a new way for the development and application of organic memory-in-sensor-integrated neuromorphic vision devices and display driving fields. Its beneficial technical effects are as follows:

[0021] 1. The present invention constructs an organic thin-film transistor array with PAA-HfO 2 as the dielectric layer and C10-DNTT as the semiconductor. First, the electrical properties of the device are tested. The device exhibits the transmission characteristics of a P-type semiconductor. When the source-drain voltage is -5V, the mobility of the device based on the PAA-HfO 2 dielectric layer with a thickness of 20 nm can exceed 10 cm 2 V -1 s -1 , and the on / off ratio of the current exceeds 10 7 ​, 20 devices in the array were selected to test the uniformity. When the source-drain voltage was -1V, -3V, and -5V, the average mobilities of the 20 devices were 5.3 cm 2 V -1 s -1 , 6.8 cm 2 V -1 s -1 and 14.9 cm 2 V -1 s -1 .

[0022] 2. In terms of the sensing performance of light, since PAA has the ability to induce charge carriers, when PAA is used as the upper dielectric layer, the device has an obvious light response behavior under the irradiation of 450 nm blue light with an intensity of 3.38 μW / cm 2 . The weakest light intensity that can be responded to is 102 nW / cm 2 , and the fastest response speed is 50 μs. In addition, the device based on the PAA-HfO 2 heterogeneous dielectric layer also has an obvious light response to light with different wavelengths between 300 nm and 515 nm.

[0023] 3. In terms of the storage performance, in the present invention, HfO 2 is introduced under PAA as the charge trapping layer. Writing is performed with a voltage of -20V and 1s, and erasing is performed with light of 450 nm. The maximum storage window is 4.1V. The source-drain current after writing and erasing is read at a fixed gate voltage, and a storage retention time of more than 50000 seconds is achieved. In addition, the device based on the PAA-HfO 2 heterogeneous dielectric layer can also perform 1000 write-read-erase-read cycle durabilities.

[0024] 4. In terms of simulating biological synapses and performing neuromorphic computing, the device based on the PAA-HfO 2 heterogeneous dielectric layer successfully simulates excitatory postsynaptic current (EPSC) and inhibitory postsynaptic current (IPSC), exhibits long-term synaptic plasticity (LTP), the minimum energy consumption for one synaptic event is 53 aJ / spike. In addition, the process of learning, forgetting, and relearning is also simulated, and the highest accuracy rate for handwritten digit recognition based on the artificial neural network reaches 94.64%.

[0025] 5. Based on the organic-inorganic heterogeneous dielectric layer of the present invention, the sense-storage-computation integrated transistor can, by utilizing the characteristics of "sensing-storing-computing" integration, combine external light with a mask template to repeatedly write and erase patterns on the LED array. Description of the Drawings

[0026] The accompanying drawings, which form a part of the present invention, are used to provide a further understanding of the present invention. The schematic embodiments and descriptions thereof are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0027] Figure 1 Charge transfer characteristics and output characteristics of devices (sensor arrays) with different dielectric layers, where a is Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), 270nm-PAA / HfO 2 (Example 2) transfer characteristic curves of the devices, and b is the output characteristic curve of the 20nm-PAA / HfO 2 (Example 1) device;

[0028] Figure 2 For Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), 270nm-PAA / HfO 2 (Example 2) mobility statistical graphs of 20 devices under source-drain voltages of -1V, -3V, and -5V;

[0029] Figure 3 For Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1) light response performance test results under 450nm light irradiation, where a is the transfer curve of Bare HfO 2 (Comparative Example 1), b is the transfer curve of the 20nm-PAA / HfO 2 (Example 1) device;

[0030] Figure 4 For 20nm-PAA / HfO 2 (Example 1) transfer curves of the device under light irradiation with different wavelengths, where a is the transfer curve under 300nm light irradiation, b is the transfer curve under 365nm light irradiation, and c is the transfer curve under 515nm light irradiation;

[0031] Figure 5 For Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), 270nm-PAA / HfO 2 (Example 2) storage performance of the devices, respectively testing the initial transfer curves of the three devices, applying a write voltage of -20V for 1s, and the transfer curves after erasing with 450nm light. Where a is Bare HfO 2The storage window of Comparative Example 1, where b is 20nm-PAA / HfO 2 The storage window of Example 1, where c is 270nm-PAA / HfO 2 The storage window of Example 2. d is the read V G = -0.2V for 20nm-PAA / HfO 2 The source-drain current retention time of the device of Example 1.

[0032] Figure 6 For 20nm-PAA / HfO 2 The storage cycling performance of the device of Example 1, where a is the curve after 1000 cycles, b is the detailed enlarged view at the beginning of the cycle, and c is the detailed enlarged view at the end of the cycle;

[0033] Figure 7 For 20nm-PAA / HfO 2 The structural schematic diagram and opto-synaptic performance of the device of Example 1, where a is the structural schematic diagram of the fabricated 20nm-PAA / HfO 2 heterogeneous dielectric layer-based device and the biological synapse structure, b is the change in the post-synaptic current under 450nm light stimulation with different application times of 6.26mW / cm 2 ; c is the change in the post-synaptic current under 450nm light with different numbers of 6.26mW / cm 2 ;

[0034] Figure 8 For 20nm-PAA / HfO 2 The electro-synaptic performance of the device of Example 1;

[0035] Figure 9 For 20nm-PAA / HfO 2 The energy consumption of the device of Example 1 at different operating voltages (V DS );

[0036] Figure 10 For 20nm-PAA / HfO 2 The device of Example 1 recognizes handwritten digits through a neural network, where a is the schematic diagram of the multi-layer neural network for digit recognition; b is the long-term potentiation (LTP) and long-term depression (LTD) characteristic curves of three devices; c is the change in the recognition accuracy of handwritten digits with the number of training cycles;

[0037] Figure 11 For 20nm-PAA / HfO 2(Example 1) The device OTFT drives an LED array, where a is the circuit schematic diagram of the OTFT driving the LED array; b is the optical image of the LED array driven by OTFT in the initial state, when light is applied, and when light is removed; c is that any row of the LED array can be controlled to light up through external light stimulation; d is that the letters "T", "J", and "U" are respectively written into the LED array by writing and erasing; e is that the LED array driven by OTFT undergoes a switching cycle under the control of external light and gate negative voltage. Detailed implementation manners

[0038] The various exemplary implementation manners of the present invention will now be described in detail. This detailed description should not be considered as a limitation of the present invention, but rather as a more detailed description of certain aspects, characteristics, and implementation schemes of the present invention.

[0039] It should be understood that the terms used in the present invention are only for describing specific implementation manners and are not used to limit the present invention. Additionally, for the numerical ranges in the present invention, it should be understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. Each intermediate value within any stated value or stated range, as well as each smaller range between any other stated value or intermediate value within the stated range, is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded from the range.

[0040] Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention pertains. Although the present invention only describes preferred methods and materials, any methods and materials similar or equivalent to those described herein can also be used in the implementation or testing of the present invention. All documents mentioned in this specification are incorporated by reference to disclose and describe the methods and / or materials related to the documents. In case of conflict with any incorporated document, the content of this specification shall prevail.

[0041] Without departing from the scope or spirit of the present invention, various improvements and changes can be made to the specific implementation manners of the present invention specification, which are obvious to those skilled in the art. Other implementation manners obtained from the present invention specification are obvious to those skilled in the art. The present invention specification and examples are only exemplary.

[0042] Regarding the use of "comprising", "including", "having", "containing", etc. in this article, they are all open-ended terms, meaning including but not limited to.

[0043] An embodiment of the present invention provides a sense-memory-computation integrated transistor based on an organic-inorganic hetero dielectric layer, which sequentially includes a substrate, a dielectric layer, an organic small molecule semiconductor layer, and source / drain electrodes from bottom to top. The dielectric layer is an organic-inorganic hetero dielectric layer; the organic-inorganic hetero dielectric layer is a bilayer structure composed of a lower dielectric layer and an upper dielectric layer. The upper dielectric layer is a polyamic acid (PAA) layer, and the lower dielectric layer is a hafnium oxide (HfO 2 ) layer.

[0044] In an embodiment of the present invention, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0 - 270 nm (not 0); preferably, the thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

[0045] In an embodiment of the present invention, the substrate is a silicon substrate, and the resistivity of the silicon substrate is 0.001 - 0.0052 Ω·cm.

[0046] In an embodiment of the present invention, the organic small molecule semiconductor layer is a 2,9-didecylnaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (C10-DNTT) layer, and the source / drain electrodes are gold (Au) source / drain electrodes.

[0047] In an embodiment of the present invention, the thickness of the organic small molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrodes is 20 nm.

[0048] An embodiment of the present invention also provides a preparation method for the above-mentioned sense-memory-computation integrated transistor based on an organic-inorganic hetero dielectric layer, including the following steps:

[0049] A hafnium oxide layer is prepared on the substrate by plasma enhanced atomic layer deposition (PEALD for short). A polyamic acid layer is prepared on the hafnium oxide layer by spin coating to form an organic-inorganic hetero dielectric layer on the substrate. Then, an organic small molecule semiconductor layer is evaporated and deposited on the organic-inorganic hetero dielectric layer by a coating instrument, and source / drain electrodes are evaporated and deposited by a metal coating instrument to obtain the sense-memory-computation integrated transistor based on the organic-inorganic hetero dielectric layer.

[0050] In an embodiment of the present invention, the processes of PEALD, spin coating, evaporation deposition by a coating instrument, and deposition by a metal coating instrument are all conventional techniques in the art and will not be elaborated here. The equipment used for PEALD is Beneq TFS-200, and hafnium tetrakis(dimethylamino) (Hf[N(CH 3 ) 2 4 ​)As a precursor for preparing the hafnium oxide layer, the oxygen source is water, and the growth chamber temperature is 200 °C; the spin coating method is carried out by a spin coater at 5000 revolutions per minute; the deposition rate of evaporation deposition by the coating instrument is The deposition rate of deposition by the metal plating coating instrument is

[0051] In the embodiment of the present invention, the PAA solution used in the spin coating method is a mixture of PAA and DMAC (N,N-dimethylacetamide) in a volume ratio of 1:(2-8).

[0052] The embodiment of the present invention also proposes a light-emitting diode array driven by a programmable organic thin-film transistor, including the sense-in-memory-integrated transistor based on the organic-inorganic heterodielectric layer, connecting the sense-in-memory-integrated transistor based on the organic-inorganic heterodielectric layer and the light-emitting diode through a circuit, realizing the writing of the pattern through an external light source and a mask, and then erasing through a gate negative voltage to obtain a light-emitting diode array driven by a programmable organic thin-film transistor.

[0053] All raw materials used in the embodiment of the present invention are obtained by commercial purchase, and some raw materials and sources are as follows:

[0054] 1. Polyamic acid (PAA):

[0055]

[0056] Purchased from: Beijing University of Chemical Technology.

[0057] 2. C10 DNTT (2,9-didecylnaphtho[2,3B:2',3'F]thieno[3,2B]thiophene):

[0058]

[0059] Purchased from: Hangzhou Aode Technology Co., Ltd.

[0060] 3. Gold (Au), with a purity of 99.999%, purchased from: Tianjin Leviathan Technology Co., Ltd.

[0061] The technical solution of the present invention will be further described below through examples.

[0062] Example 1

[0063] A preparation method of a sense-in-memory-integrated transistor based on an organic-inorganic heterodielectric layer includes the following steps:

[0064] Growing a 15-nm HfO 2 film (hafnium oxide layer) on a silicon substrate by PEALD method, and further using a vacuum oxygen plasma cleaner to clean HfO 2The thin film is subjected to plasma treatment (50 W, 5 min), and then a PAA solution (mixed by PAA and DMAC in a volume ratio of 1:8) is spin-coated on the upper surface of the HfO 2 thin film (hafnium oxide layer) at 5000 revolutions per minute by a spin coater to obtain a PAA thin film (polyamic acid layer) with a thickness of 20 nm, thereby forming an organic-inorganic heterogeneous dielectric layer on the silicon substrate, and placing it in a glove box overnight to volatilize the DMAC solvent. After that, under a vacuum condition of 1×10 -5 Pa, an organic semiconductor C10-DNTT layer with a thickness of 20 nm is deposited on the PAA thin film (polyamic acid layer) by a coating instrument at a deposition rate of . Finally, a 20-nm-thick Au is deposited on the surface of the C10-DNTT layer as the source / drain electrode at a deposition rate of using a metal mask template, obtaining a memory-in-computation integrated transistor based on the organic-inorganic heterogeneous dielectric layer.

[0065] Comparative Example 1

[0066] A preparation method of a memory-in-computation integrated transistor based on a hafnium oxide dielectric layer includes the following steps:

[0067] A 15-nm HfO 2 thin film (hafnium oxide layer) is grown on a silicon substrate by the PEALD method. After that, under a vacuum condition of 1×10 -5 Pa, an organic semiconductor C10-DNTT layer with a thickness of 20 nm is deposited on the HfO thin film (hafnium oxide layer) by a coating instrument at a deposition rate of 2 . Finally, a 20-nm-thick Au is deposited on the surface of the C10-DNTT layer as the source / drain electrode at a deposition rate of using a metal mask template, obtaining a memory-in-computation integrated transistor based on the hafnium oxide heterogeneous dielectric layer.

[0068] Example 2

[0069] A preparation method of a memory-in-computation integrated transistor based on an organic-inorganic heterogeneous dielectric layer includes the following steps:

[0070] A 15-nm HfO 2 thin film (hafnium oxide layer) is grown on a silicon substrate by the PEALD method. Further, the HfO 2 thin film is subjected to plasma treatment (50 W, 5 min), and then a PAA solution is spin-coated on the HfO 2The PAA solution (a mixture of PAA and DMAC in a volume ratio of 1:2) was spin-coated on the upper surface of the thin film (hafnium oxide layer) to obtain a PAA thin film (polyamic acid layer) with a thickness of 270 nm, thereby forming an organic-inorganic hetero dielectric layer on the silicon substrate. It was placed in a glove box overnight to volatilize the DMAC solvent. Then, under a vacuum condition of 1×10 -5 Pa, an organic semiconductor C10-DNTT layer with a thickness of 20 nm was deposited on the PAA thin film (polyamic acid layer) by a coating instrument at a deposition rate of . Finally, a 20-nm-thick Au was deposited on the surface of the C10-DNTT layer as the source / drain electrode at a deposition rate of using a metal mask template, obtaining a memory-in-memory-in-computation transistor based on the organic-inorganic hetero dielectric layer.

[0071] Performance testing

[0072] In Examples 1 to 2 and Comparative Example 1, polyamic acid (PAA) with different thicknesses (0 nm (Comparative Example 1), 20 nm (Example 1), and 270 nm (Example 2)) was spin-coated on the HfO 2 thin film as the organic-inorganic hetero dielectric layer. Then, C10-DNTT was used as the semiconductor and Au as the source / drain electrode, thereby obtaining a memory-in-memory-in-computation transistor and constructing an organic neuromorphic vision sensor array with a bottom-gate top-contact architecture, denoted as Bare HfO 2 (Comparative Example 1), 20-nm-PAA / HfO 2 (Example 1), 270-nm-PAA / HfO 2 (Example 2). The charge transport characteristics and output characteristics of the devices (sensor arrays) with the above different dielectric layers were tested, and the results are shown in Figure 1 , where a is the transfer characteristic curve of the Bare HfO 2 (Comparative Example 1), 20-nm-PAA / HfO 2 (Example 1), 270-nm-PAA / HfO 2 (Example 2) devices, and b is the output characteristic curve of the 20-nm-PAA / HfO 2 (Example 1) device. As can be seen from Figure 1 , all devices can work normally at a working voltage of -1V, but the on-state current of the transfer curve of the devices with PAA introduced increases significantly. Further, the mobility of the devices was statistically analyzed, and the results are shown in Figure 2 . As can be seen from Figure 2 , at different source-drain voltages (V DS ), the mobility of the devices based on the organic-inorganic hetero dielectric layer is higher than that of Bare HfO 2(Comparative Example 1), where, when the source-drain voltage is -5V, 20nm-PAA / HfO is measured at 20Hz 2 (Example 1) The mobility exceeds 10cm 2 V -1 s -1 , when the source-drain voltages are -1V, -3V and -5V, 20 devices of Example 1 are repeatedly tested, and the average mobilities are obtained as 5.3cm 2 V -1 s -1 , 6.8cm 2 V -1 s -1 and 14.9cm 2 V -1 s -1 . The improvement of the device mobility proves that PAA in the heterodielectric layer induces charge transfer at the interface between the semiconductor and the dielectric layer, which is beneficial to efficient carrier transport.

[0073] Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1) The test results of the photo-response performance under 450nm light irradiation are shown in Figure 3 , as Figure 3 shown, a is the photo-response transfer curve of Bare HfO 2 (Comparative Example 1) under weak light with an illumination intensity of 3.38 - 690 μW / cm 2 . It can be seen that it shows poor detection ability. b shows that the 20nm-PAA / HfO 2 (Example 1) with PAA introduced endows the device with a stronger ability to sense weak light, and the threshold voltage change of the transfer curve is more obvious. Further, the photo-response performance of the 20nm-PAA / HfO 2 (Example 1) device for different wavelengths of light is tested, as Figure 4 shown, a is the photo-response transfer curve under 300nm light irradiation, b is the photo-response transfer curve under 365nm light irradiation, and c is the photo-response transfer curve under 515nm light irradiation, all showing an obvious positive shift of the threshold voltage.

[0074] Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), 270nm-PAA / HfO 2 (Example 2) The storage performance of the device is shown in Figure 5 , and the initial transfer curves, write voltages of -20V for 1s, and transfer curves after erasure with 450nm light of the three devices are respectively tested. Among them, a is Bare HfO2 (Comparative Example 1)'s storage window, b is 20nm-PAA / HfO 2 (Example 1)'s storage window, c is 270nm-PAA / HfO 2 (Example 2)'s storage window. After applying a voltage pulse of -20V for 1s to the device, the transfer curve shifts negatively from the initial state to achieve electrical writing. Subsequently, under the stimulation of a light pulse at 450nm, the transfer curve shifts towards positive voltage to achieve optical erasure. The storage window (ΔVth) is defined as the deviation of the threshold voltage between the electrical writing and optical erasure curves. From Figure 5 It can be seen that Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), 270nm-PAA / HfO 2 (Example 2) devices can obtain storage windows of 3.7V, 4.1V, and 1.0V respectively. After spin-coating the polymer PAA onto HfO 2 , holes in the channel are likely to be trapped at the shallow defect states existing at the PAA-HfO 2 interface. Therefore, when the PAA thickness increases, it becomes difficult for channel holes to tunnel through PAA and be trapped at the interface, so the storage performance of the device deteriorates significantly and the storage window is the smallest. Further preferably, when the PAA thickness is 20nm, the device exhibits the best light perception and storage performance. As Figure 5 d, the storage retention time of the 20nm-PAA / HfO 2 (Example 1) device was tested in nitrogen. After a test time of more than 50000 seconds, the on-state and off-state currents still maintained a switching ratio greater than 10 6 .

[0075] In addition, the cycle tolerance ability to perform continuous write-read-erase-read operations is a key indicator for evaluating the stability and reliability of the device. The results are shown in Figure 6 , where a is the curve after 1000 cycles, b is the detailed enlarged view at the beginning of the cycle, and c is the detailed enlarged view at the end of the cycle. From Figure 6 It can be seen that for the read-write-erase cycle test of the 20nm-PAA / HfO 2 (Example 1) device, the read voltage is V DS =-1V, V GS =0.8V, the write voltage V DS =0V, V GS =-30V, the time is 0.1s, and the initial current switching ratio is greater than 10 4 . After 1000 cycles (one cycle is about 2.3s), it still has a current switching ratio greater than 10.

[0076] Furthermore, 20nm-PAA / HfO is used 2 (Example 1) The device simulates the biological synapses between neurons, such as Figure 7 where a is the structural schematic diagram of the 20nm-PAA / HfO 2 heterogeneous dielectric layer-based device and the biological synapse structure. First, its opto-synaptic performance is tested. The externally applied light pulse is similar to the pre-synaptic stimulus, and the output current of the device is similar to the post-synaptic current. The results are shown in Figure 7 b-c in it, where b is the change of the post-synaptic current under the 450nm light stimulation with different application times of 6.26mW / cm 2 , and c is the change of the post-synaptic current under the 450nm light with different numbers of 6.26mW / cm 2 . It can be seen that after applying a 450nm, 6.26mW / cm 2 (Example 1) light pulse stimulation to the device, the current increases significantly, showing typical excitatory post-synaptic current behavior (EPSC). As the pulse stimulation increases from 5s to 25s, the current increases linearly. After removing the light stimulation, the current of the device decays very slowly, showing obvious long-term synaptic plasticity (LTP). When the pulse stimulation applied to the device increases from 1 to 50, the post-synaptic current of the device still shows very good linear growth, indicating the strong ability of the 20nm-PAA / HfO 2 (Example 1) device channel to generate photo-generated carriers. 2

[0077] Using the 20nm-PAA / HfO 2 (Example 1) device to simulate the biological synapses between neurons and test its electro-synaptic performance. The results are shown in Figure 8 , and it can be seen that after applying a gate negative voltage with a pulse width of -2.5V for different times, the post-synaptic current shows inhibition, and the current can decay rapidly after applying a negative voltage to the device.

[0078] Figure 9 The energy consumption is the minimum energy required to complete a synaptic event and is an important indicator for measuring synaptic devices. The energy consumption of the 20nm-PAA / HfO 2 (Example 1) device at different operating voltages (V DS ) is shown in Figure 9 , and it can be seen that as V D increases from -1mV to -100mV, the energy consumption increases from 0.053fJ to 35.3fJ.

[0079] To evaluate the ability of the device for neuromorphic computing, an artificial neural network (ANN) consisting of a simple three-layer neural network was constructed for neuromorphic computing, which was used for the image recognition of the handwritten digit "8". Through 100 consecutive optical pulse stimulations (450 nm, 0.22 mW / cm 2 , 0.5 s) and 100 consecutive electrical pulse inhibitions, long-term potentiation (LTP) and long-term depression (LTD) curves can be obtained respectively to simulate the change of synaptic weights. The results are shown in Figure 10 , where a is the schematic diagram of the multi-layer neural network for digit recognition; b is the long-term potentiation (LTP) and long-term depression (LTD) characteristic curves of the three devices; c is the change of the recognition accuracy of handwritten digits with the training cycle. It can be seen that under the same stimulation conditions in the LTP-LTD curve, the 20nm-PAA / HfO 2 (Example 1) device has a higher conductance value, better linearity and symmetry. After 120 training cycles, the recognition accuracies of the three devices of Bare HfO 2 (Comparative Example 1), 20nm-PAA / HfO 2 (Example 1), and 270nm-PAA / HfO 2 (Example 2) are 92.15%, 94.64% and 93.75% respectively.

[0080] Figure 11 For the 20nm-PAA / HfO 2 (Example 1) device to drive the LED array, where a is the circuit schematic diagram of the OTFT driving the LED array; b is the optical images of the OTFT-driven LED array in the initial state, when light is applied and when light is removed; c is that any row of the LED array can be controlled to be lit by external light stimulation; d is that the letters "T", "J", and "U" are written into the LED array through writing and erasing respectively; e is that the OTFT-driven LED array undergoes a switching cycle under external light and gate negative voltage control. The organic field effect transistor (OFET) with "sensing-storage-computing" characteristics can endow the OFET-driven LED array with programmable ability by using the writing and erasing functions. Initially, the OFET is in the off state and the LED is in the deactivated state. When exposed to light, the writing process starts, causing the source-drain current in the OFET to increase rapidly, thus activating the LED. When the light is turned off, due to the storage characteristics of the device, the LED will remain lit for a long time. Subsequently, applying a bias voltage will erase the current, causing the LED to go out. And even after the light pulse stops, the device containing 20nm-PAA / HfO 2 (Example 1) can also keep the LED in the lit state. In contrast, the device based only on PAA (or Bare HfO 2The device (Comparative Example 1)) has a rapid decrease in photocurrent when external light is withdrawn, resulting in rapid inactivation of the LED. Further, a 5×6 LED array controlled by an OFET was successfully fabricated (as shown in Figure 11 a in). Under external light irradiation, the source-drain current in the OFET array increases, resulting in full activation of the LED array. Even after removing the external light source, the LED continues to emit light, as shown in Figure 11 b in. In addition, any row of the LED array can be arbitrarily activated or deactivated by external illumination and a mask template, as shown in Figure 11 c in. At the same time, imaging of different patterns can be achieved using various mask templates. As shown in Figure 11 d in, the process begins by writing the letter "T" into the array. By applying a negative gate voltage, the letter "T" can be erased and then the letter "J" can be written. After erasing the letter "J", the letter "U" can be written again. Further, the LED array can also be manipulated through the writing and erasing processes (as shown in Figure 11 e in).

[0081] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A sensing-storage-computing integrated transistor based on an organic-inorganic heterogeneous dielectric layer, comprising, from bottom to top, a substrate, a dielectric layer, an organic small molecule semiconductor layer, and a source / drain electrode, characterized in that: The dielectric layer is an organic-inorganic heterogeneous dielectric layer; the organic-inorganic heterogeneous dielectric layer is a double-layer structure consisting of a lower dielectric layer and an upper dielectric layer, the upper dielectric layer is a polyamic acid layer, and the lower dielectric layer is a hafnium oxide layer.

2. The sensing-storage-computing integrated transistor based on organic-inorganic heterogeneous dielectric layer according to claim 1, characterized in that: The thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 0-270 nm, and is not zero.

3. The sensing-storage-computing integrated transistor based on organic-inorganic heterogeneous dielectric layer according to claim 2, characterized in that: The thickness of the lower dielectric layer is 15 nm, and the thickness of the upper dielectric layer is 20 nm.

4. The sensing-storage-computing integrated transistor based on organic-inorganic heterogeneous dielectric layer according to claim 1, characterized in that: The substrate is a silicon substrate, the organic small molecule semiconductor layer is a 2,9-didecylnaphtho[2,3B:2',3'F]thieno[3,2B]thiophene layer, and the source / drain electrode is a gold source / drain electrode.

5. The sensing-storage-computing integrated transistor based on organic-inorganic heterogeneous dielectric layer according to claim 1, characterized in that: The thickness of the organic small molecule semiconductor layer is 20 nm, and the thickness of the source / drain electrode is 20 nm.

6. A method for preparing a sensing-storage-computing integrated transistor based on an organic-inorganic heterogeneous dielectric layer according to any one of claims 1 to 5, characterized in that: The following steps are involved: A hafnium oxide layer is prepared on a substrate by plasma enhanced atomic layer deposition, a polyamic acid layer is prepared on the hafnium oxide layer by spin coating, an organic-inorganic heterogeneous dielectric layer is formed on the substrate, and then an organic small molecule semiconductor layer is evaporated and deposited on the organic-inorganic heterogeneous dielectric layer, and source / drain electrodes are evaporated and deposited to obtain the sensing, storage and computing integrated transistor based on the organic-inorganic heterogeneous dielectric layer.

7. Application of the sensing-storage-computing integrated transistor based on the organic-inorganic heterogeneous dielectric layer as claimed in any one of claims 1 to 5 in programmable display driving.

8. A light emitting diode array driven by a programmable organic thin film transistor, characterized in that: It comprises a sensing-storage-computing integrated transistor based on an organic-inorganic heterogeneous dielectric layer as described in any one of claims 1 to 5.

9. The programmable organic thin film transistor driven light emitting diode array according to claim 8, characterized in that: The sensing, storage and computing integrated transistor based on the organic-inorganic heterogeneous dielectric layer is connected to the light-emitting diode through a circuit, the pattern is written through an external light source and a mask, and then erased through a negative gate voltage to obtain a light-emitting diode array driven by a programmable organic thin film transistor.

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